ARM: dts: dra7: Move cpus node to parent dts for dra74x and dra72x
authorDave Gerlach <d-gerlach@ti.com>
Wed, 18 May 2016 23:36:32 +0000 (18:36 -0500)
committerTony Lindgren <tony@atomide.com>
Fri, 10 Jun 2016 11:58:07 +0000 (04:58 -0700)
Nearly all of the information in the cpus node, especially for cpu0, is
the same between dra74x and dra72x so move the common information to
the parent dra7.dtsi to avoid duplication of data.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/dra7.dtsi
arch/arm/boot/dts/dra72x.dtsi
arch/arm/boot/dts/dra74x.dtsi

index cc4cb76..b1e9f5c 100644 (file)
                interrupt-parent = <&gic>;
        };
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <0>;
+
+                       operating-points = <
+                               /* kHz    uV */
+                               1000000 1060000
+                               1176000 1160000
+                               >;
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
+
+                       /* cooling options */
+                       cooling-min-level = <0>;
+                       cooling-max-level = <2>;
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+       };
+
        /*
         * The soc node represents the soc top level view. It is used for IPs
         * that are not memory mapped in the MPU view or for the MPU itself.
index 70a2170..6710760 100644 (file)
 / {
        compatible = "ti,dra722", "ti,dra72", "ti,dra7";
 
-       cpus {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               cpu0: cpu@0 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <0>;
-
-                       /* cooling options */
-                       cooling-min-level = <0>;
-                       cooling-max-level = <2>;
-                       #cooling-cells = <2>; /* min followed by max */
-               };
-       };
-
        pmu {
                compatible = "arm,cortex-a15-pmu";
                interrupt-parent = <&wakeupgen>;
index 4220eef..0c31db3 100644 (file)
        compatible = "ti,dra742", "ti,dra74", "ti,dra7";
 
        cpus {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               cpu0: cpu@0 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <0>;
-
-                       operating-points = <
-                               /* kHz    uV */
-                               1000000 1060000
-                               1176000 1160000
-                               >;
-
-                       clocks = <&dpll_mpu_ck>;
-                       clock-names = "cpu";
-
-                       clock-latency = <300000>; /* From omap-cpufreq driver */
-
-                       /* cooling options */
-                       cooling-min-level = <0>;
-                       cooling-max-level = <2>;
-                       #cooling-cells = <2>; /* min followed by max */
-               };
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a15";