phy: phy_brcmstb_sata: add support for MIPS-based platforms
authorJaedon Shin <jaedon.shin@gmail.com>
Thu, 26 Nov 2015 02:56:35 +0000 (11:56 +0900)
committerKishon Vijay Abraham I <kishon@ti.com>
Sun, 20 Dec 2015 11:58:33 +0000 (17:28 +0530)
The BCM7xxx ARM-based and MIPS-based platforms share a similar hardware
block for AHCI SATA3.

This new compatible string, "brcm,bcm7425-sata-phy", may be used for
most MIPS-based platforms of 40nm process technology.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt
drivers/phy/Kconfig
drivers/phy/phy-brcmstb-sata.c

index 7f81ef9..d87ab7c 100644 (file)
@@ -2,6 +2,7 @@
 
 Required properties:
 - compatible: should be one or more of
+     "brcm,bcm7425-sata-phy"
      "brcm,bcm7445-sata-phy"
      "brcm,phy-sata3"
 - address-cells: should be 1
index 90eec60..e7e117d 100644 (file)
@@ -390,11 +390,11 @@ config PHY_TUSB1210
 
 config PHY_BRCMSTB_SATA
        tristate "Broadcom STB SATA PHY driver"
-       depends on ARCH_BRCMSTB
+       depends on ARCH_BRCMSTB || BMIPS_GENERIC
        depends on OF
        select GENERIC_PHY
        help
-         Enable this to support the SATA3 PHY on 28nm Broadcom STB SoCs.
+         Enable this to support the SATA3 PHY on 28nm or 40nm Broadcom STB SoCs.
          Likely useful only with CONFIG_SATA_BRCMSTB enabled.
 
 config PHY_CYGNUS_PCIE
index 555fb2d..a23172f 100644 (file)
 /* Register offset between PHYs in PCB space */
 #define SATA_MDIO_REG_28NM_SPACE_SIZE                  0x1000
 
+/* The older SATA PHY registers duplicated per port registers within the map,
+ * rather than having a separate map per port.
+ */
+#define SATA_MDIO_REG_40NM_SPACE_SIZE                  0x10
+
 enum brcm_sata_phy_version {
        BRCM_SATA_PHY_28NM,
+       BRCM_SATA_PHY_40NM,
 };
 
 struct brcm_sata_port {
@@ -51,7 +57,7 @@ struct brcm_sata_phy {
        struct brcm_sata_port phys[MAX_PORTS];
 };
 
-enum sata_mdio_phy_regs_28nm {
+enum sata_mdio_phy_regs {
        PLL_REG_BANK_0                          = 0x50,
        PLL_REG_BANK_0_PLLCONTROL_0             = 0x81,
 
@@ -69,10 +75,14 @@ enum sata_mdio_phy_regs_28nm {
 static inline void __iomem *brcm_sata_phy_base(struct brcm_sata_port *port)
 {
        struct brcm_sata_phy *priv = port->phy_priv;
-       u32 offset;
+       u32 offset = 0;
 
        if (priv->version == BRCM_SATA_PHY_28NM)
                offset = SATA_MDIO_REG_28NM_SPACE_SIZE;
+       else if (priv->version == BRCM_SATA_PHY_40NM)
+               offset = SATA_MDIO_REG_40NM_SPACE_SIZE;
+       else
+               dev_err(priv->dev, "invalid phy version\n");
 
        return priv->phy_base + (port->portnum * offset);
 }
@@ -93,7 +103,7 @@ static void brcm_sata_mdio_wr(void __iomem *addr, u32 bank, u32 ofs,
 #define FMAX_VAL_DEFAULT       0x3df
 #define FMAX_VAL_SSC           0x83
 
-static void brcm_sata_cfg_ssc_28nm(struct brcm_sata_port *port)
+static void brcm_sata_cfg_ssc(struct brcm_sata_port *port)
 {
        void __iomem *base = brcm_sata_phy_base(port);
        struct brcm_sata_phy *priv = port->phy_priv;
@@ -124,12 +134,12 @@ static int brcm_sata_phy_init(struct phy *phy)
 {
        struct brcm_sata_port *port = phy_get_drvdata(phy);
 
-       brcm_sata_cfg_ssc_28nm(port);
+       brcm_sata_cfg_ssc(port);
 
        return 0;
 }
 
-static const struct phy_ops phy_ops_28nm = {
+static const struct phy_ops phy_ops = {
        .init           = brcm_sata_phy_init,
        .owner          = THIS_MODULE,
 };
@@ -137,6 +147,8 @@ static const struct phy_ops phy_ops_28nm = {
 static const struct of_device_id brcm_sata_phy_of_match[] = {
        { .compatible   = "brcm,bcm7445-sata-phy",
          .data = (void *)BRCM_SATA_PHY_28NM },
+       { .compatible   = "brcm,bcm7425-sata-phy",
+         .data = (void *)BRCM_SATA_PHY_40NM },
        {},
 };
 MODULE_DEVICE_TABLE(of, brcm_sata_phy_of_match);
@@ -196,7 +208,7 @@ static int brcm_sata_phy_probe(struct platform_device *pdev)
                port = &priv->phys[id];
                port->portnum = id;
                port->phy_priv = priv;
-               port->phy = devm_phy_create(dev, child, &phy_ops_28nm);
+               port->phy = devm_phy_create(dev, child, &phy_ops);
                port->ssc_en = of_property_read_bool(child, "brcm,enable-ssc");
                if (IS_ERR(port->phy)) {
                        dev_err(dev, "failed to create PHY\n");