clk: qcom: Set CLK_SET_RATE_PARENT on ce1 clocks
authorStephen Boyd <sboyd@codeaurora.org>
Tue, 14 Jul 2015 23:57:29 +0000 (16:57 -0700)
committerStephen Boyd <sboyd@codeaurora.org>
Tue, 28 Jul 2015 18:51:40 +0000 (11:51 -0700)
The other ce clocks have the flag set, but ce1 doesn't, so
clk_set_rate() doesn't propagate up the tree to the ce1_src_clk.
Set the flag as this is supported.

Reported-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Tested-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Fixes: 02824653200b ("clk: qcom: Add APQ8084 Global Clock Controller support")
Fixes: d33faa9ead8d ("clk: qcom: Add support for MSM8974's global clock controller (GCC)")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/qcom/gcc-apq8084.c
drivers/clk/qcom/gcc-msm8974.c

index 05b7a25..3563019 100644 (file)
@@ -2105,6 +2105,7 @@ static struct clk_branch gcc_ce1_clk = {
                                "ce1_clk_src",
                        },
                        .num_parents = 1,
+                       .flags = CLK_SET_RATE_PARENT,
                        .ops = &clk_branch2_ops,
                },
        },
index 2c28970..2bcf875 100644 (file)
@@ -1783,6 +1783,7 @@ static struct clk_branch gcc_ce1_clk = {
                                "ce1_clk_src",
                        },
                        .num_parents = 1,
+                       .flags = CLK_SET_RATE_PARENT,
                        .ops = &clk_branch2_ops,
                },
        },