dmaengine: dw: define DW_DMA_MAX_NR_MASTERS
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 13 Jan 2015 17:08:14 +0000 (19:08 +0200)
committerVinod Koul <vinod.koul@intel.com>
Thu, 5 Feb 2015 06:39:44 +0000 (22:39 -0800)
Instead of using magic number in the code the patch provides
DW_DMA_MAX_NR_MASTERS constant.

While here, restrict the reading of data width array by amount of the actual
number of AHB masters.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Documentation/devicetree/bindings/dma/snps-dma.txt
arch/arc/boot/dts/abilis_tb10x.dtsi
arch/arm/boot/dts/spear13xx.dtsi
arch/avr32/mach-at32ap/at32ap700x.c
drivers/dma/dw/core.c
drivers/dma/dw/platform.c
drivers/dma/dw/regs.h
include/linux/platform_data/dma-dw.h

index d58675e..c261598 100644 (file)
@@ -38,7 +38,7 @@ Example:
                chan_allocation_order = <1>;
                chan_priority = <1>;
                block_size = <0xfff>;
-               data_width = <3 3 0 0>;
+               data_width = <3 3>;
        };
 
 DMA clients connected to the Designware DMA controller must use the format
index a098d7c..cfb5052 100644 (file)
                        chan_allocation_order = <0>;
                        chan_priority = <1>;
                        block_size = <0x7ff>;
-                       data_width = <2 0 0 0>;
+                       data_width = <2>;
                        clocks = <&ahb_clk>;
                        clock-names = "hclk";
                };
index a6eb543..40accc8 100644 (file)
                        chan_priority = <1>;
                        block_size = <0xfff>;
                        dma-masters = <2>;
-                       data_width = <3 3 0 0>;
+                       data_width = <3 3>;
                };
 
                dma@eb000000 {
                        chan_allocation_order = <1>;
                        chan_priority = <1>;
                        block_size = <0xfff>;
-                       data_width = <3 3 0 0>;
+                       data_width = <3 3>;
                };
 
                fsmc: flash@b0000000 {
index cc92cdb..1d8b147 100644 (file)
@@ -607,7 +607,7 @@ static struct dw_dma_platform_data dw_dmac0_data = {
        .nr_channels    = 3,
        .block_size     = 4095U,
        .nr_masters     = 2,
-       .data_width     = { 2, 2, 0, 0 },
+       .data_width     = { 2, 2 },
 };
 
 static struct resource dw_dmac0_resource[] = {
index fcb9a91..0469d8e 100644 (file)
@@ -1562,7 +1562,8 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
                }
        } else {
                dw->nr_masters = pdata->nr_masters;
-               memcpy(dw->data_width, pdata->data_width, 4);
+               for (i = 0; i < dw->nr_masters; i++)
+                       dw->data_width[i] = pdata->data_width[i];
        }
 
        /* Calculate all channel mask before DMA setup */
index a630161..aaff37f 100644 (file)
@@ -99,7 +99,7 @@ dw_dma_parse_dt(struct platform_device *pdev)
 {
        struct device_node *np = pdev->dev.of_node;
        struct dw_dma_platform_data *pdata;
-       u32 tmp, arr[4];
+       u32 tmp, arr[DW_DMA_MAX_NR_MASTERS];
 
        if (!np) {
                dev_err(&pdev->dev, "Missing DT data\n");
@@ -126,7 +126,7 @@ dw_dma_parse_dt(struct platform_device *pdev)
                pdata->block_size = tmp;
 
        if (!of_property_read_u32(np, "dma-masters", &tmp)) {
-               if (tmp > 4)
+               if (tmp > DW_DMA_MAX_NR_MASTERS)
                        return NULL;
 
                pdata->nr_masters = tmp;
index 254a1db..241ff2b 100644 (file)
@@ -285,7 +285,7 @@ struct dw_dma {
 
        /* hardware configuration */
        unsigned char           nr_masters;
-       unsigned char           data_width[4];
+       unsigned char           data_width[DW_DMA_MAX_NR_MASTERS];
 };
 
 static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma *dw)
index 359127d..87ac14c 100644 (file)
@@ -13,6 +13,8 @@
 
 #include <linux/device.h>
 
+#define DW_DMA_MAX_NR_MASTERS  4
+
 /**
  * struct dw_dma_slave - Controller-specific information about a slave
  *
@@ -53,7 +55,7 @@ struct dw_dma_platform_data {
        unsigned char   chan_priority;
        unsigned short  block_size;
        unsigned char   nr_masters;
-       unsigned char   data_width[4];
+       unsigned char   data_width[DW_DMA_MAX_NR_MASTERS];
 };
 
 #endif /* _PLATFORM_DATA_DMA_DW_H */