CHROMIUM: ARM: exynos: mct: cache mct upper count

Saves one register read.

BUG=chrome-os-partner:14575
TEST=Test with a chrome that has the above bug.

Before (perf report):

    9.76%  [kernel]             [k] exynos4_frc_read

After (perf report):

    7.34%  [kernel]             [k] exynos4_frc_read

Change-Id: I6a75c4aa7ed1461e8fa8915a1492664527cab819
Signed-off-by: Mandeep Singh Baines <msb@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/32190
Reviewed-by: Olof Johansson <olofj@chromium.org>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>

diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index df0c1c1..b3ef0b4 100644 (file)
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -134,8 +134,8 @@ static notrace u32 exynos4_read_sched_clock(void)
 
 static cycle_t exynos4_frc_read(struct clocksource *cs)
 {
-       unsigned int lo, hi;
-       u32 hi2 = __raw_readl(EXYNOS4_MCT_G_CNT_U);
+       u32 lo, hi;
+       static u32 hi2;
 
        do {
                hi = hi2;