x86, microcode: Share native MSR accessing variants

We want to use those in AMD's early loading path too. Also, add a
native_wrmsrl variant.

Signed-off-by: Borislav Petkov <bp@suse.de>
Tested-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>

diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index f98bd66..b59827e 100644 (file)
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -1,6 +1,21 @@
 #ifndef _ASM_X86_MICROCODE_H
 #define _ASM_X86_MICROCODE_H
 
+#define native_rdmsr(msr, val1, val2)                  \
+do {                                                   \
+       u64 __val = native_read_msr((msr));             \
+       (void)((val1) = (u32)__val);                    \
+       (void)((val2) = (u32)(__val >> 32));            \
+} while (0)
+
+#define native_wrmsr(msr, low, high)                   \
+       native_write_msr(msr, low, high)
+
+#define native_wrmsrl(msr, val)                                \
+       native_write_msr((msr),                         \
+                        (u32)((u64)(val)),             \
+                        (u32)((u64)(val) >> 32))
+
 struct cpu_signature {
        unsigned int sig;
        unsigned int pf;

diff --git a/arch/x86/kernel/microcode_intel_early.c b/arch/x86/kernel/microcode_intel_early.c
index 1575deb..18f7391 100644 (file)
--- a/arch/x86/kernel/microcode_intel_early.c
+++ b/arch/x86/kernel/microcode_intel_early.c
@@ -365,16 +365,6 @@ out:
        return state;
 }
 
-#define native_rdmsr(msr, val1, val2)          \
-do {                                           \
-       u64 __val = native_read_msr((msr));     \
-       (void)((val1) = (u32)__val);            \
-       (void)((val2) = (u32)(__val >> 32));    \
-} while (0)
-
-#define native_wrmsr(msr, low, high)           \
-       native_write_msr(msr, low, high);
-
 static int collect_cpu_info_early(struct ucode_cpu_info *uci)
 {
        unsigned int val[2];