drm/amd/powerplay: fix a bug on updating sclk for Tonga

Update sclk smc table rather than mclk smc table for sclk updates.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
index 1faad92..cb28335 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
@@ -5445,7 +5445,7 @@ static int tonga_populate_and_upload_sclk_mclk_dpm_levels(struct pp_hwmgr *hwmgr
        }
 
        if (data->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK)) {
-               result = tonga_populate_all_memory_levels(hwmgr);
+               result = tonga_populate_all_graphic_levels(hwmgr);
                PP_ASSERT_WITH_CODE((0 == result),
                        "Failed to populate SCLK during PopulateNewDPMClocksStates Function!",
                        return result);