.phy_init = s5p_usb_phy_init,
.phy_exit = s5p_usb_phy_exit,
.phyclk_switch = exynos5_dwc_phyclk_switch,
+ .use_ext_clk = s5p_usb_phy_use_ext_clk,
};
struct exynos_gpio_cfg {
static atomic_t host_usage;
static struct exynos_usb_phy usb_phy_control;
static DEFINE_SPINLOCK(phy_lock);
+static bool ext_clk;
static int exynos4_usb_host_phy_is_on(void)
{
return _exynos5_usb_phy30_init(pdev, use_ext_clk);
}
-static int exynos5_usb_phy30_init(struct platform_device *pdev, bool ext_clk)
+static int exynos5_usb_phy30_init(struct platform_device *pdev)
{
int ret;
struct clk *host_clk = NULL;
return 0;
}
-int s5p_usb_phy_init(struct platform_device *pdev, int type, bool ext_clk)
+int s5p_usb_phy_use_ext_clk(struct platform_device *pdev, bool ext_clk_val)
+{
+ ext_clk = ext_clk_val;
+ return 0;
+}
+
+int s5p_usb_phy_init(struct platform_device *pdev, int type)
{
if (type == S5P_USB_PHY_HOST) {
if (soc_is_exynos5250())
return exynos4_usb_phy1_init(pdev);
} else if (type == S5P_USB_PHY_DRD) {
if (soc_is_exynos5250())
- return exynos5_usb_phy30_init(pdev, ext_clk);
+ return exynos5_usb_phy30_init(pdev);
else
dev_err(&pdev->dev, "USB 3.0 DRD not present\n");
}
struct s5p_ehci_platdata {
int (*phy_init)(struct platform_device *pdev, int type);
int (*phy_exit)(struct platform_device *pdev, int type);
+ int (*use_ext_clk)(struct platform_device *pdev, bool ext_clk);
};
extern void s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd);
S5P_USB_PHY_DRD,
};
-extern int s5p_usb_phy_init(struct platform_device *pdev, int type,
- bool use_ext_clk);
+extern int s5p_usb_phy_use_ext_clk(struct platform_device *pdev, bool ext_clk);
+extern int s5p_usb_phy_init(struct platform_device *pdev, int type);
+extern int s5p_usb_phy_exit(struct platform_device *pdev, int type);
extern int s5p_usb_phy_exit(struct platform_device *pdev, int type);
extern int exynos5_dwc_phyclk_switch(struct platform_device *pdev,
bool use_ext_clk);
* if we have no gpio to control external PLL, we are using
* the internal clock.
*/
+ if (pdata->use_ext_clk)
+ pdata->use_ext_clk(pdev,
+ gpio_is_valid(exynos->phyclk_gpio));
if (pdata->phy_init)
- pdata->phy_init(pdev, pdata->phy_type,
- gpio_is_valid(exynos->phyclk_gpio));
+ pdata->phy_init(pdev, pdata->phy_type);
}
pm_runtime_set_active(&pdev->dev);
if (!pdata) {
dev_dbg(&pdev->dev, "missing platform data\n");
} else {
+ if (pdata->use_ext_clk)
+ pdata->use_ext_clk(pdev,
+ gpio_is_valid(exynos->phyclk_gpio));
if (pdata->phy_init)
- pdata->phy_init(pdev, pdata->phy_type,
- gpio_is_valid(exynos->phyclk_gpio));
+ pdata->phy_init(pdev, pdata->phy_type);
}
/* runtime set active to reflect active state. */
struct dwc3_exynos_data {
int phy_type;
- int (*phy_init)(struct platform_device *pdev, int type, bool ext_clk);
+ int (*phy_init)(struct platform_device *pdev, int type);
int (*phy_exit)(struct platform_device *pdev, int type);
int (*phyclk_switch)(struct platform_device *pdev, bool use_ext_clk);
+ int (*use_ext_clk)(struct platform_device *pdev, bool ext_clk);
};
#endif /* _DWC3_EXYNOS_H_ */