cascardo/linux.git
7 years agoMerge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman...
Arnd Bergmann [Mon, 19 Sep 2016 15:53:38 +0000 (17:53 +0200)]
Merge tag 'amlogic-dt64-2' of git://git./linux/kernel/git/khilman/linux-amlogic into next/late

Pull "Amlogic 64-bit DT changes for v4.9, round 2" from Kevin Hilman:

Primarily adding support for newly added drivers

- USB host
- I2C
- SPI flash controller
- PWM
- mailbox, MHU
- pinctrl: add pins for SPI, I2C, SDIO

and then enabling these drivers on various boards.

* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: dts: meson-gxbb-vega-s95: Enable USB Nodes
  ARM64: dts: meson-gxbb-p20x: Enable USB Nodes
  ARM64: dts: meson-gxbb: add USB Nodes
  ARM64: dts: gxbb: add i2c bus
  ARM64: dts: meson-gxbb: add I2C nodes
  ARM64: dts: meson-gxbb: add pins for I2C
  ARM64: dts: meson-gxbb: Add SPIFC node
  ARM64: dts: meson-gxbb: add the SDIO pins
  ARM64: dts: amlogic: add spi nor pins
  ARM64: dts: meson-gxbb: use the new GXBB DWMAC glue driver
  ARM64: dts: meson-gxbb: Add Meson GXBB PWM Controller nodes
  ARM64: dts: meson-gxbb: Add Meson MHU Node
  ARM64: dts: amlogic: enable ethernet on all Tronsmart Vega S95 devices

7 years agoMerge tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilma...
Arnd Bergmann [Mon, 19 Sep 2016 15:49:07 +0000 (17:49 +0200)]
Merge tag 'amlogic-drivers-2' of git://git./linux/kernel/git/khilman/linux-amlogic into next/late

Pull "Amlogic driver updates for v4.9, 2nd round" from Kevin Hilman:

- media: update IR support for newer SoCs
- firmware: add secure monitor driver
- net: new stmmac glue driver
- usb: udd DWC2 support for meson-gxbb
- clocks: expose more clock IDs for use by DT
- DT binding updates

* tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (21 commits)
  clk: gxbb: expose i2c clocks
  clk: gxbb: expose USB clocks
  clk: gxbb: expose spifc clock
  clk: gxbb: expose MPLL2 clock for use by DT
  Documentation: dt-bindings: Add documentation for the Meson USB2 PHYs
  usb: dwc2: add support for Meson8b and GXBB SoCs
  net: stmmac: update the module description of the dwmac-meson driver
  net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC
  stmmac: introduce get_stmmac_bsp_priv() helper
  net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings
  clk: meson-gxbb: Export PWM related clocks for DT
  meson: clk: Add support for clock gates
  gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
  clk: meson: Copy meson8b CLKID defines to private header file
  meson: clk: Rename register names according to Amlogic datasheet
  meson: clk: Move register definitions to meson8b.h
  clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
  nvmem: amlogic: Add Amlogic Meson EFUSE driver
  firmware: Amlogic: Add secure monitor driver
  media: rc: meson-ir: Add support for newer versions of the IR decoder
  ...

7 years agoMerge branch 'v4.8/dt64' into v4.8/dt64-2
Kevin Hilman [Thu, 15 Sep 2016 22:35:50 +0000 (15:35 -0700)]
Merge branch 'v4.8/dt64' into v4.8/dt64-2

7 years agoMerge tag 'amlogic-drivers-2' into v4.8/dt64-2
Kevin Hilman [Thu, 15 Sep 2016 22:35:35 +0000 (15:35 -0700)]
Merge tag 'amlogic-drivers-2' into v4.8/dt64-2

Amlogic driver updates for v4.9, 2nd round
- media: update IR support for newer SoCs
- firmware: add secure monitor driver
- net: new stmmac glue driver
- usb: udd DWC2 support for meson-gxbb
- clocks: expose more clock IDs for use by DT
- DT binding updates

7 years agoARM64: dts: meson-gxbb-vega-s95: Enable USB Nodes
Martin Blumenstingl [Sun, 11 Sep 2016 13:41:11 +0000 (15:41 +0200)]
ARM64: dts: meson-gxbb-vega-s95: Enable USB Nodes

Enable both gxbb USB controller and add a 5V regulator for the OTG port
VBUS

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: meson-gxbb-p20x: Enable USB Nodes
Jerome Brunet [Sun, 11 Sep 2016 13:41:10 +0000 (15:41 +0200)]
ARM64: dts: meson-gxbb-p20x: Enable USB Nodes

Enable both gxbb USB controller and add a 5V regulator for the OTG port
VBUS

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
[khilman: rename vbus node to match P200 schematics]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoclk: gxbb: expose i2c clocks
Jerome Brunet [Wed, 14 Sep 2016 10:06:05 +0000 (12:06 +0200)]
clk: gxbb: expose i2c clocks

I2C and AO_I2C clocks are needed for the i2c driver, expose to DT
(and comment out in clk driver)

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoclk: gxbb: expose USB clocks
Martin Blumenstingl [Sun, 4 Sep 2016 21:31:46 +0000 (23:31 +0200)]
clk: gxbb: expose USB clocks

USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
Expose these clocks to DT and comment out in clk driver.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoclk: gxbb: expose spifc clock
Jerome Brunet [Wed, 7 Sep 2016 15:13:39 +0000 (17:13 +0200)]
clk: gxbb: expose spifc clock

SPI clock is needed for the spifc driver, expose to DT
(and comment out in the clk driver)

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoclk: gxbb: expose MPLL2 clock for use by DT
Martin Blumenstingl [Tue, 6 Sep 2016 21:38:44 +0000 (23:38 +0200)]
clk: gxbb: expose MPLL2 clock for use by DT

This exposes the MPLL2 clock as this is one of the input clocks of the
ethernet controller's internal mux.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoMerge branch 'clk-meson-gxbb' of git://git.kernel.org/pub/scm/linux/kernel/git/clk...
Kevin Hilman [Wed, 14 Sep 2016 18:21:15 +0000 (11:21 -0700)]
Merge branch 'clk-meson-gxbb' of git://git./linux/kernel/git/clk/linux into v4.8/drivers

* 'clk-meson-gxbb' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: meson-gxbb: Export PWM related clocks for DT
  meson: clk: Add support for clock gates
  gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
  clk: meson: Copy meson8b CLKID defines to private header file
  meson: clk: Rename register names according to Amlogic datasheet
  meson: clk: Move register definitions to meson8b.h
  clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
  clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()
  clk: meson: Add GXBB AO Clock and Reset controller driver
  dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings
  clk: gxbb: add MMC gate clocks, and expose for DT

7 years agoDocumentation: dt-bindings: Add documentation for the Meson USB2 PHYs
Martin Blumenstingl [Sun, 11 Sep 2016 13:41:07 +0000 (15:41 +0200)]
Documentation: dt-bindings: Add documentation for the Meson USB2 PHYs

Add the documentation for the bindings for the Meson8b and GXBB USB2
PHYs.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agousb: dwc2: add support for Meson8b and GXBB SoCs
Jerome Brunet [Sun, 11 Sep 2016 13:41:06 +0000 (15:41 +0200)]
usb: dwc2: add support for Meson8b and GXBB SoCs

Add compatible strings for amlogic Meson8b and GXBB SoCs with the
corresponding configuration parameters.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: meson-gxbb: add USB Nodes
Martin Blumenstingl [Sun, 11 Sep 2016 13:41:09 +0000 (15:41 +0200)]
ARM64: dts: meson-gxbb: add USB Nodes

Add the nodes for the dwc2 USB controller and the related USB PHYs.
Currently we force usb0 to host mode because OTG is currently not
working in our PHY driver.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: gxbb: add i2c bus
Jerome Brunet [Wed, 14 Sep 2016 10:06:08 +0000 (12:06 +0200)]
ARM64: dts: gxbb: add i2c bus

Add nodes for i2c bus on gxbb based platforms.
On the OdroidC2 (I2C A) and P200 (I2C B), the pull-up resistor are
present directly on the board. This indicates that these pins are
dedicated to i2c.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: meson-gxbb: add I2C nodes
Neil Armstrong [Wed, 14 Sep 2016 10:06:07 +0000 (12:06 +0200)]
ARM64: dts: meson-gxbb: add I2C nodes

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: meson-gxbb: add pins for I2C
Jerome Brunet [Wed, 14 Sep 2016 10:06:06 +0000 (12:06 +0200)]
ARM64: dts: meson-gxbb: add pins for I2C

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: meson-gxbb: Add SPIFC node
Neil Armstrong [Fri, 9 Sep 2016 08:28:58 +0000 (10:28 +0200)]
ARM64: dts: meson-gxbb: Add SPIFC node

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: meson-gxbb: add the SDIO pins
Neil Armstrong [Sun, 11 Sep 2016 12:39:03 +0000 (14:39 +0200)]
ARM64: dts: meson-gxbb: add the SDIO pins

This is used to configure the pins of the sd_emmc_a controller to
which an SDIO module is connected (when available).

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: amlogic: add spi nor pins
Jerome Brunet [Fri, 9 Sep 2016 08:28:57 +0000 (10:28 +0200)]
ARM64: dts: amlogic: add spi nor pins

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: meson-gxbb: use the new GXBB DWMAC glue driver
Martin Blumenstingl [Sun, 4 Sep 2016 18:23:20 +0000 (20:23 +0200)]
ARM64: dts: meson-gxbb: use the new GXBB DWMAC glue driver

The Amlogic reference driver uses the "mc_val" devicetree property to
configure the PRG_ETHERNET_ADDR0 register. Unfortunately it uses magic
values for this configuration.
According to the datasheet the PRG_ETHERNET_ADDR0 register is at address
0xc8834108. However, the reference driver uses 0xc8834540 instead.
According to my tests, the value from the reference driver is correct.

No changes are required to the board dts files because the only
required configuration option is the phy-mode, which had to be
configured correctly before as well.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: meson-gxbb: Add Meson GXBB PWM Controller nodes
Neil Armstrong [Mon, 22 Aug 2016 15:36:32 +0000 (17:36 +0200)]
ARM64: dts: meson-gxbb: Add Meson GXBB PWM Controller nodes

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jérôme Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: meson-gxbb: Add Meson MHU Node
Neil Armstrong [Thu, 18 Aug 2016 10:10:27 +0000 (12:10 +0200)]
ARM64: dts: meson-gxbb: Add Meson MHU Node

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: amlogic: enable ethernet on all Tronsmart Vega S95 devices
Martin Blumenstingl [Sun, 4 Sep 2016 18:29:03 +0000 (20:29 +0200)]
ARM64: dts: amlogic: enable ethernet on all Tronsmart Vega S95 devices

All of these have a Realtek Gbit RGMII PHY.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoMerge tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Wed, 14 Sep 2016 15:55:26 +0000 (17:55 +0200)]
Merge tag 'integrator-armsoc-1' of git://git./linux/kernel/git/linusw/linux-integrator into next/late

Pull "This is a bunch of Integrator changes for v4.9" Linus Walleij:

- Add and fix a bunch of clocks in the DTS corresponding
  to the new clock support merged into the clk tree.
- Move the CLCD display configuration from boardfile to
  device tree using the new CLCD support merged into the
  fbdev tree.
- Cut some auxdata.
- Cut some static remappings.
- Move the sched_clock() counter to use syscon+regmap.

* tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: integrator: read counter using syscon/regmap
  ARM: integrator: cut down on static maps
  ARM: integrator: delete some auxdata
  ARM: integrator: move CP CLCD display to DTS
  ARM: dts: add the core module clocks to Integrator/CP
  ARM: dts: Add the core module clocks to Integrator/AP
  ARM: dts: add the Integrator/AP baseboard clocks
  ARM: dts: set the 24MHz xtal as parent of the UART clock

7 years agoMerge tag 'renesas-arm64-dt-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Wed, 14 Sep 2016 15:42:12 +0000 (17:42 +0200)]
Merge tag 'renesas-arm64-dt-for-v4.9' of git://git./linux/kernel/git/horms/renesas into next/late

Pull "Renesas ARM64 Based SoC DT Updates for v4.9" from Simon Horman:

Clean up:
* Remove unnecessary cap-mmc-highspeed property from SDHI nodes on r8a7795 SoC
* Add SoC-specific compatible property to audio-dmac nodes on r8a7795 SoC

New Board:
* Add r8a7794/h3ulcb board

Enablement:
* Add PFC and GPIO to r8a7796 SoC
* Enable DU and USB 2.0 on r8a7795/salvator-x board
* Add VTP, FCPV, FCPF and FDP1 to r8a7795 SoC
* Set maximum frequency for SDHI clocks on r8a7795 SoC

* tag 'renesas-arm64-dt-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (43 commits)
  arm64: dts: r8a7796: Add GPIO device nodes
  arm64: dts: r8a7796: salvator-x: add serial console pins
  arm64: dts: r8a7796: Add pinctrl device node
  arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB output
  arm64: dts: h3ulcb: enable GPIO leds
  arm64: dts: h3ulcb: Sound SSI support
  arm64: dts: h3ulcb: enable SDHI0
  arm64: dts: h3ulcb: enable GPIO keys
  arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed property
  arm64: dts: h3ulcb: enable USB2.0 Host channel 1
  arm64: dts: h3ulcb: enable USB2 PHY of channel 1
  arm64: dts: h3ulcb: enable WDT
  arm64: dts: h3ulcb: enable EXTALR clk
  arm64: dts: h3ulcb: enable I2C2
  arm64: dts: h3ulcb: enable EthernetAVB
  arm64: dts: h3ulcb: enable SCIF clk and pins
  arm64: dts: h3ulcb: initial device tree
  arm64: dts: h3ulcb: add H3ULCB board DT bindings
  arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodes
  arm64: dts: r8a7795: renesas: salvator-x: Enable DU
  ...

7 years agoMerge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman...
Arnd Bergmann [Wed, 14 Sep 2016 15:34:35 +0000 (17:34 +0200)]
Merge tag 'amlogic-dt64' of git://git./linux/kernel/git/khilman/linux-amlogic into next/late

Pull "Amlogic 64-bit DT changes for v4.9" from Kevin Hilman:

- add watchdog, reset, IR remote, PWM
- add secure monitor and eFuse
- add always-on (AO) domain clock and reset

* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: dts: amlogic: gxbb: Enable NVMEM
  documentation: Add nvmem bindings documentation
  ARM64: dts: amlogic: gxbb: Enable secure monitor
  documentation: Add secure monitor bindings documentation
  ARM64: dts: meson-gxbb: Add PWM pinctrl nodes
  ARM64: dts: meson-gxbb: Enable the the IR decoder on supported boards
  ARM64: dts: meson-gxbb: Add Infrared Remote Controller decoder
  dt-bindings: media: meson-ir: Add Meson8b and GXBB compatible strings
  ARM64: dts: amlogic: add the input pin for the IR remote
  ARM64: dts: meson-gxbb: Add GXBB AO Clock and Reset node
  clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()
  clk: meson: Add GXBB AO Clock and Reset controller driver
  dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings
  ARM64: DTS: meson-gxbb: switch ethernet to real clock
  ARM64: dts: amlogic: meson-gxbb: Add watchdog node

7 years agoMerge tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Tue, 13 Sep 2016 15:51:23 +0000 (17:51 +0200)]
Merge tag 'sunxi-dt-for-4.9-2' of https://git./linux/kernel/git/mripard/linux into next/late

Merge "Allwinner DT changes for 4.9, take 2" from Maxime Ripard:

A second set of device tree changes, this time switching a few SoCs to the
new sunxi-ng clock framework. We also added the support for a new SoC
(NextThing GR8 and its evaluation board), and the support for the DRM
driver in the A33.

To maintain bisectability, while avoiding some un-trivial merge
conflicts, I had to merge the clk branch that I've sent a PR to Mike
and Stephen. This branch will of course be stable.

* tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (53 commits)
  ARM: dts: gr8: Add support for the GR8 evaluation board
  ARM: dts: Add NextThing GR8 dtsi
  ARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsi
  ARM: sun8i: a23/a33: Add RGB666 pins
  ARM: sun8i: a33: Add display pipeline
  ARM: sun8i: Convert the A23 and A33 to the CCU
  ARM: dts: sun6i: switch A31/A31s to new CCU clock bindings
  clk: sunxi-ng: Add hardware dependency
  clk: sunxi-ng: Add A23 CCU
  clk: sunxi-ng: Add A33 CCU support
  clk: sunxi-ng: Add N-class clocks support
  clk: sunxi-ng: mux: Add mux table macro
  clk: sunxi-ng: div: Allow to set a maximum
  clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
  clk: sunxi-ng: div: Add mux table macros
  devicetree: Add vendor prefix for FriendlyARM
  ARM: dts: sun8i: Add dts file for the NanoPi NEO SBC
  ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers
  ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC
  ARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2
  ...

7 years agoARM: dts: gr8: Add support for the GR8 evaluation board
Mylène Josserand [Thu, 8 Sep 2016 10:26:10 +0000 (12:26 +0200)]
ARM: dts: gr8: Add support for the GR8 evaluation board

The GR8-EVB is a small board with an NextThing GR8, an Hynix MLC NAND,
an AXP209 PMIC, USB host and OTG, an SPDIF output and a connectors for CSI,
I2S and LCD.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
7 years agoARM: dts: Add NextThing GR8 dtsi
Mylène Josserand [Thu, 8 Sep 2016 10:26:09 +0000 (12:26 +0200)]
ARM: dts: Add NextThing GR8 dtsi

The GR8 is an SoC made by Nextthing loosely based on the sun5i family.

Since it's not clear yet what we can factor out and merge with the A10s and
A13 support, let's keep it out of the sun5i.dtsi include tree. We will
figure out what can be shared when things settle down.

Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
7 years agoARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsi
Chen-Yu Tsai [Thu, 8 Sep 2016 03:25:35 +0000 (11:25 +0800)]
ARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsi

The usbphy and usb_otg nodes in the A23 and A33 dts files only differ
by compatible, and for the usbphy, the size of one of its register
regions.

Move all the common bits to the A23/A33 common dtsi file.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoARM: sun8i: a23/a33: Add RGB666 pins
Maxime Ripard [Thu, 9 Jun 2016 11:56:21 +0000 (13:56 +0200)]
ARM: sun8i: a23/a33: Add RGB666 pins

The LCD output needs to be muxed. Add the proper pinctrl node.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
7 years agoARM: sun8i: a33: Add display pipeline
Maxime Ripard [Thu, 7 Jan 2016 11:28:00 +0000 (12:28 +0100)]
ARM: sun8i: a33: Add display pipeline

Add all the needed blocks to the A33 DTSI.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
7 years agoARM: sun8i: Convert the A23 and A33 to the CCU
Maxime Ripard [Wed, 31 Aug 2016 12:58:20 +0000 (14:58 +0200)]
ARM: sun8i: Convert the A23 and A33 to the CCU

Now that we have support for the CCU driver in sunxi-ng, convert the A23
and A33 DTs to that driver.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
7 years agoARM: dts: sun6i: switch A31/A31s to new CCU clock bindings
Chen-Yu Tsai [Thu, 25 Aug 2016 06:22:00 +0000 (14:22 +0800)]
ARM: dts: sun6i: switch A31/A31s to new CCU clock bindings

Now that we have a different clock representation, switch to it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoMerge branch 'sunxi/clk-for-4.9' into sunxi/dt-for-4.9
Maxime Ripard [Sat, 10 Sep 2016 09:45:28 +0000 (11:45 +0200)]
Merge branch 'sunxi/clk-for-4.9' into sunxi/dt-for-4.9

7 years agoclk: sunxi-ng: Add hardware dependency
Jean Delvare [Thu, 8 Sep 2016 21:28:29 +0000 (23:28 +0200)]
clk: sunxi-ng: Add hardware dependency

The sunxi-ng clock driver is useless for other architectures.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoclk: sunxi-ng: Add A23 CCU
Maxime Ripard [Wed, 31 Aug 2016 14:55:00 +0000 (16:55 +0200)]
clk: sunxi-ng: Add A23 CCU

Add support for the clock unit found in the A23. Due to the similarities
with the A33, it also shares its clock IDs to allow sharing the DTSI.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
7 years agoclk: sunxi-ng: Add A33 CCU support
Maxime Ripard [Wed, 24 Aug 2016 12:10:15 +0000 (14:10 +0200)]
clk: sunxi-ng: Add A33 CCU support

This commit introduces the clocks found in the Allwinner A33 CCU.

Since this SoC is very similar to the A23, and we share a significant share
of the DTSI, the clock IDs that are going to be used will also be shared
with the A23, hence the name of the various header files.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
7 years agoclk: sunxi-ng: Add N-class clocks support
Maxime Ripard [Tue, 30 Aug 2016 08:38:07 +0000 (10:38 +0200)]
clk: sunxi-ng: Add N-class clocks support

Add support for the class with a single factor, N, being a multiplier.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
7 years agoclk: sunxi-ng: mux: Add mux table macro
Maxime Ripard [Tue, 30 Aug 2016 08:38:51 +0000 (10:38 +0200)]
clk: sunxi-ng: mux: Add mux table macro

Add a new macro to declare muxes based on a table and a gate.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
7 years agoclk: sunxi-ng: div: Allow to set a maximum
Maxime Ripard [Tue, 6 Sep 2016 10:29:04 +0000 (12:29 +0200)]
clk: sunxi-ng: div: Allow to set a maximum

Some dividers might have a maximum value that is lower than the width of
the register.

Add a field to _ccu_div to handle those case properly. If the field is set
to 0, the code will assume that the maximum value is the maximum one that
can be used with the field register width.

Otherwise, we'll use whatever value has been set.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
7 years agoclk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
Maxime Ripard [Thu, 8 Sep 2016 09:29:13 +0000 (11:29 +0200)]
clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure

The internal _ccu_div structure is meant to be embedded into other
structures to combine the various dividers and to form the clock classes
support.

Start to document those structures by using kerneldoc.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoclk: sunxi-ng: div: Add mux table macros
Maxime Ripard [Tue, 30 Aug 2016 08:38:41 +0000 (10:38 +0200)]
clk: sunxi-ng: div: Add mux table macros

Add some macros to ease the declaration of clocks that are using them.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
7 years agoarm64: dts: r8a7796: Add GPIO device nodes
Takeshi Kihara [Wed, 17 Aug 2016 09:13:51 +0000 (11:13 +0200)]
arm64: dts: r8a7796: Add GPIO device nodes

Add GPIO device nodes to the DT of the r8a7796 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
7 years agoarm64: dts: r8a7796: salvator-x: add serial console pins
Ulrich Hecht [Thu, 18 Aug 2016 13:12:35 +0000 (15:12 +0200)]
arm64: dts: r8a7796: salvator-x: add serial console pins

Adds pin control for SCIF2.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: r8a7796: Add pinctrl device node
Takeshi Kihara [Thu, 18 Aug 2016 13:12:34 +0000 (15:12 +0200)]
arm64: dts: r8a7796: Add pinctrl device node

This patch adds pinctrl device node for R8A7796 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB output
Laurent Pinchart [Fri, 12 Aug 2016 09:18:55 +0000 (12:18 +0300)]
arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB output

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: h3ulcb: enable GPIO leds
Vladimir Barinov [Mon, 5 Sep 2016 12:40:21 +0000 (15:40 +0300)]
arm64: dts: h3ulcb: enable GPIO leds

This supports GPIO leds on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: h3ulcb: Sound SSI support
Vladimir Barinov [Fri, 2 Sep 2016 16:25:29 +0000 (19:25 +0300)]
arm64: dts: h3ulcb: Sound SSI support

This supports SSI sound for H3ULCB board.
SSI DMA mode used. CS2000 used as AUDIO_CLK_B.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: h3ulcb: enable SDHI0
Vladimir Barinov [Fri, 2 Sep 2016 16:25:08 +0000 (19:25 +0300)]
arm64: dts: h3ulcb: enable SDHI0

This supports SDHI0 on H3ULCB board SD card slot

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: h3ulcb: enable GPIO keys
Vladimir Barinov [Fri, 2 Sep 2016 16:24:58 +0000 (19:24 +0300)]
arm64: dts: h3ulcb: enable GPIO keys

This supports GPIO keys on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed property
Simon Horman [Tue, 30 Aug 2016 21:09:55 +0000 (23:09 +0200)]
arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed property

Remove cap-mmc-highspeed property from SDHI2 and SDHI3.

This property is unnecessary as the driver automatically sets
the highspeed capability. Furthermore its use is inconsistent with SDHI0
and SDHI1 which are also highspeed capable but do not have this property
present.

Found by inspection.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: h3ulcb: enable USB2.0 Host channel 1
Vladimir Barinov [Wed, 31 Aug 2016 10:04:03 +0000 (13:04 +0300)]
arm64: dts: h3ulcb: enable USB2.0 Host channel 1

This supports USB2.0 Host channel 1 on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agonet: stmmac: update the module description of the dwmac-meson driver
Martin Blumenstingl [Tue, 6 Sep 2016 21:38:48 +0000 (23:38 +0200)]
net: stmmac: update the module description of the dwmac-meson driver

The dwmac-meson glue driver supports Meson6 and Meson8 SoCs. Newer SoCs
are supported by the dwmac-meson8b driver.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agonet: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC
Martin Blumenstingl [Tue, 6 Sep 2016 21:38:46 +0000 (23:38 +0200)]
net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC

The Ethernet controller available in Meson8b and GXBB SoCs is a Synopsys
DesignWare MAC IP core which is already supported by the stmmac driver.

In addition to the standard stmmac driver some Meson8b / GXBB specific
registers have to be configured for the PHY clocks. These SoC specific
registers are called PRG_ETHERNET_ADDR0 and PRG_ETHERNET_ADDR1 in the
datasheet.
These registers are not backwards compatible with those on Meson 6b,
which is why a new glue driver is introduced. This worked for many
boards because the bootloader programs the PRG_ETHERNET registers
correctly. Additionally the meson6-dwmac driver only sets bit 1 of
PRG_ETHERNET_ADDR0 which (according to the datasheet) is only used
during reset.

Currently all configuration values can be determined automatically,
based on the configured phy-mode (which is mandatory for the stmmac
driver). If required the tx-delay and the mux clock (so it supports
the MPLL2 clock as well) can be made configurable in the future.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agostmmac: introduce get_stmmac_bsp_priv() helper
Joachim Eastwood [Tue, 6 Sep 2016 21:38:45 +0000 (23:38 +0200)]
stmmac: introduce get_stmmac_bsp_priv() helper

Create a helper to retrieve dwmac private data from a dev
pointer. This is useful in PM callbacks and driver remove.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agonet: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings
Martin Blumenstingl [Tue, 6 Sep 2016 21:38:43 +0000 (23:38 +0200)]
net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings

This patch adds the documentation for the DWMAC ethernet controller
found in Amlogic Meson 8b (S805) and GXBB (S905) SoCs.
The main difference between the Meson6 glue is that different registers
(with different layout) are used.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoarm64: dts: h3ulcb: enable USB2 PHY of channel 1
Vladimir Barinov [Wed, 31 Aug 2016 10:03:56 +0000 (13:03 +0300)]
arm64: dts: h3ulcb: enable USB2 PHY of channel 1

This supports USB2 PHY channel #1 on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: h3ulcb: enable WDT
Vladimir Barinov [Wed, 31 Aug 2016 10:03:48 +0000 (13:03 +0300)]
arm64: dts: h3ulcb: enable WDT

This supports watchdog timer for H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: h3ulcb: enable EXTALR clk
Vladimir Barinov [Wed, 31 Aug 2016 10:03:36 +0000 (13:03 +0300)]
arm64: dts: h3ulcb: enable EXTALR clk

This enables EXTALR clock that can be used for the watchdog.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: h3ulcb: enable I2C2
Vladimir Barinov [Wed, 31 Aug 2016 10:03:29 +0000 (13:03 +0300)]
arm64: dts: h3ulcb: enable I2C2

This supports I2C2 bus on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: h3ulcb: enable EthernetAVB
Vladimir Barinov [Wed, 31 Aug 2016 10:02:59 +0000 (13:02 +0300)]
arm64: dts: h3ulcb: enable EthernetAVB

This supports Ethernet AVB on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: h3ulcb: enable SCIF clk and pins
Vladimir Barinov [Wed, 31 Aug 2016 10:02:49 +0000 (13:02 +0300)]
arm64: dts: h3ulcb: enable SCIF clk and pins

This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: h3ulcb: initial device tree
Vladimir Barinov [Wed, 31 Aug 2016 10:02:39 +0000 (13:02 +0300)]
arm64: dts: h3ulcb: initial device tree

Add the initial device tree for the R8A7795 SoC based H3ULCB low cost
board.

This commit supports the following peripherals:
- SCIF (console)

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: h3ulcb: add H3ULCB board DT bindings
Vladimir Barinov [Wed, 31 Aug 2016 10:02:21 +0000 (13:02 +0300)]
arm64: dts: h3ulcb: add H3ULCB board DT bindings

Add H3ULCB Device tree bindings Documentation, listing it as a supported
board.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodes
Geert Uytterhoeven [Wed, 31 Aug 2016 09:31:55 +0000 (11:31 +0200)]
arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodes

The audio-dmac nodes used the generic compatible property only.
Add the SoC-specific one, to make it future proof.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: r8a7795: renesas: salvator-x: Enable DU
Laurent Pinchart [Tue, 9 Aug 2016 12:29:12 +0000 (15:29 +0300)]
arm64: dts: r8a7795: renesas: salvator-x: Enable DU

Only the VGA output is supported for now.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: renesas: r8a7795: Add DU device to DT
Laurent Pinchart [Tue, 9 Aug 2016 12:29:11 +0000 (15:29 +0300)]
arm64: dts: renesas: r8a7795: Add DU device to DT

Add the DU device to r8a7795.dtsi in a disabled state.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: renesas: r8a7795: Add VSP instances
Laurent Pinchart [Tue, 9 Aug 2016 12:29:10 +0000 (15:29 +0300)]
arm64: dts: renesas: r8a7795: Add VSP instances

The r8a7795 has 9 VSP instances.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: renesas: r8a7795: Add FCPV nodes
Laurent Pinchart [Tue, 9 Aug 2016 12:29:09 +0000 (15:29 +0300)]
arm64: dts: renesas: r8a7795: Add FCPV nodes

The FCPs handle the interface between various IP cores and memory. Add
the instances related to the VSP2s.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: r8a7795: salvator-x: enable HSUSB
Yoshihiro Shimoda [Thu, 21 Jul 2016 10:47:00 +0000 (19:47 +0900)]
arm64: dts: r8a7795: salvator-x: enable HSUSB

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: r8a7795: salvator-x: enable USB 2.0 Host channel 0
Yoshihiro Shimoda [Thu, 21 Jul 2016 10:46:59 +0000 (19:46 +0900)]
arm64: dts: r8a7795: salvator-x: enable USB 2.0 Host channel 0

We have to set SW15 to pin 2-3 side on the board before we use CN9
as USB host or peripheral.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0
Yoshihiro Shimoda [Thu, 21 Jul 2016 10:46:58 +0000 (19:46 +0900)]
arm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0

This patch also adds a regulator node for USB2.0 to handle VBUS on/off
by the phy-rcar-gen3-usb2 driver.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: r8a7795: Add HSUSB device node
Yoshihiro Shimoda [Thu, 21 Jul 2016 10:46:57 +0000 (19:46 +0900)]
arm64: dts: r8a7795: Add HSUSB device node

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: r8a7795: set maximum frequency for SDHI clocks
Wolfram Sang [Thu, 21 Jul 2016 17:01:44 +0000 (19:01 +0200)]
arm64: dts: r8a7795: set maximum frequency for SDHI clocks

Define the upper limit otherwise the driver cannot utilize max speeds.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: r8a7795: add FDP1 device nodes
Kieran Bingham [Thu, 30 Jun 2016 13:32:43 +0000 (14:32 +0100)]
arm64: dts: r8a7795: add FDP1 device nodes

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agoarm64: dts: r8a7795: add FCPF device nodes
Kieran Bingham [Thu, 30 Jun 2016 13:32:42 +0000 (14:32 +0100)]
arm64: dts: r8a7795: add FCPF device nodes

Provide nodes for the FCP devices dedicated to the FDP device channels.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
7 years agodevicetree: Add vendor prefix for FriendlyARM
James Pettigrew [Mon, 5 Sep 2016 22:15:57 +0000 (08:15 +1000)]
devicetree: Add vendor prefix for FriendlyARM

Guangzhou FriendlyARM Computer Tech Co., Ltd is a Chinese ARM board vendor.

Signed-off-by: James Pettigrew <james@innovum.com.au>
Reviewed-by: Rask Ingemann Lambertsen <ccc94453@vip.cybercity.dk>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoARM: dts: sun8i: Add dts file for the NanoPi NEO SBC
James Pettigrew [Mon, 5 Sep 2016 22:15:56 +0000 (08:15 +1000)]
ARM: dts: sun8i: Add dts file for the NanoPi NEO SBC

The NanoPi NEO is a minimal H3 based SBC. It comes with 256/512M RAM, a
micro SD slot, 10/100Mbit ethernet and a single USB-A port.

Signed-off-by: James Pettigrew <james@innovum.com.au>
Reviewed-by: Rask Ingemann Lambertsen <ccc94453@vip.cybercity.dk>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers
Hans de Goede [Fri, 26 Aug 2016 14:52:36 +0000 (16:52 +0200)]
ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers

Most of the sun8i q8 boards have an SDIO wifi controller, on the
variants which use an USB wifi controller, this will result in a
couple of error msg-s in dmesg when proving the sdio bus and
an used mmc controller.

The best way to deal with wifi on this boards really is to simply
let the kernel auto-detect usb or sdio wifi controllers, so we
will just have to live with the few errors in dmesg.

This has been tested on a23 based q8 tablets with ESP8089, RTL8703AS and
RTL8189FTV wifi controllers.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC
Hans de Goede [Sat, 3 Sep 2016 11:05:18 +0000 (13:05 +0200)]
ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC

The Orange Pi Plus2E is an extended version of the Orange Pi Pc Plus,
with 2G RAM and an external gbit ethernet phy.

Note currently the dts is pretty much empty (except for including the
pc-plus dts), I've a local patch which enables the emac actually making
this dts different from the pc-plus one, but that needs the h3 emac
driver to get merged first.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2
Hans de Goede [Sat, 3 Sep 2016 11:05:17 +0000 (13:05 +0200)]
ARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2

Update the sun8i-h3-orangepi-plus.dts model string to reflect that it
is valid for both the Orange Pi Plus and the Orange Pi Plus 2.

This is also meant to help users realize that it is not valid for
the new Orange Pi Plus 2E, which will get its own dts.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
7 years agoclk: meson-gxbb: Export PWM related clocks for DT
Neil Armstrong [Mon, 22 Aug 2016 12:49:37 +0000 (14:49 +0200)]
clk: meson-gxbb: Export PWM related clocks for DT

Add the PWM related clocks in order to be referenced as PWM source
clocks.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1471870177-10609-1-git-send-email-narmstrong@baylibre.com

7 years agomeson: clk: Add support for clock gates
Alexander Müller [Sat, 27 Aug 2016 17:40:54 +0000 (19:40 +0200)]
meson: clk: Add support for clock gates

This patch adds support for the meson8b clock gates. Most of
them are disabled by Amlogic U-Boot, but need to be enabled
for ethernet, USB and many other components.

Signed-off-by: Alexander Müller <serveralex@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-7-git-send-email-serveralex@gmail.com

7 years agogxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
Alexander Müller [Sat, 27 Aug 2016 17:40:53 +0000 (19:40 +0200)]
gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b

The macro used gxbb_ prefix for clock definitions. In order
to share the macro between gxbb and meson8b, the prefix must
be moved to gxbb.c.

Signed-off-by: Alexander Müller <serveralex@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-6-git-send-email-serveralex@gmail.com

7 years agoclk: meson: Copy meson8b CLKID defines to private header file
Alexander Müller [Sat, 27 Aug 2016 17:40:52 +0000 (19:40 +0200)]
clk: meson: Copy meson8b CLKID defines to private header file

Only expose future CLKID constants if necessary. This patch
removes CLK_NR_CLKS from the DT bindings but leaves all previously
defined CLKIDs there to keep backward compatibility.

Signed-off-by: Alexander Müller <serveralex@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-5-git-send-email-serveralex@gmail.com

7 years agomeson: clk: Rename register names according to Amlogic datasheet
Alexander Müller [Sat, 27 Aug 2016 17:40:51 +0000 (19:40 +0200)]
meson: clk: Rename register names according to Amlogic datasheet

Signed-off-by: Alexander Müller <serveralex@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-4-git-send-email-serveralex@gmail.com

7 years agomeson: clk: Move register definitions to meson8b.h
Alexander Müller [Sat, 27 Aug 2016 17:40:50 +0000 (19:40 +0200)]
meson: clk: Move register definitions to meson8b.h

Move the register definitions into a separate header file
to reflect the gxbb implementation.

Signed-off-by: Alexander Müller <serveralex@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-3-git-send-email-serveralex@gmail.com

7 years agoclk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
Alexander Müller [Sat, 27 Aug 2016 17:40:49 +0000 (19:40 +0200)]
clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention

Signed-off-by: Alexander Müller <serveralex@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1472319654-59048-2-git-send-email-serveralex@gmail.com

7 years agoMerge remote-tracking branch 'clk/clk-meson-gxbb-ao' into clk-meson-gxbb
Michael Turquette [Fri, 2 Sep 2016 00:31:33 +0000 (17:31 -0700)]
Merge remote-tracking branch 'clk/clk-meson-gxbb-ao' into clk-meson-gxbb

7 years agoARM64: dts: amlogic: gxbb: Enable NVMEM
Carlo Caione [Sat, 27 Aug 2016 13:43:48 +0000 (15:43 +0200)]
ARM64: dts: amlogic: gxbb: Enable NVMEM

Add the NVMEM device node in the DTSI.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
[khilman: dropped driver cleanup hunk]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agodocumentation: Add nvmem bindings documentation
Carlo Caione [Sat, 27 Aug 2016 13:43:47 +0000 (15:43 +0200)]
documentation: Add nvmem bindings documentation

This patch add the bindings document of Amlogic eFuse driver.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: amlogic: gxbb: Enable secure monitor
Carlo Caione [Sat, 27 Aug 2016 13:43:45 +0000 (15:43 +0200)]
ARM64: dts: amlogic: gxbb: Enable secure monitor

Add the secure monitor node in the Amlogic Meson GXBB DTSI file to
enable it.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agodocumentation: Add secure monitor bindings documentation
Carlo Caione [Sat, 27 Aug 2016 13:43:44 +0000 (15:43 +0200)]
documentation: Add secure monitor bindings documentation

Add the binding documentation for the Amlogic secure monitor driver.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: meson-gxbb: Add PWM pinctrl nodes
Kevin Hilman [Thu, 1 Sep 2016 22:26:56 +0000 (15:26 -0700)]
ARM64: dts: meson-gxbb: Add PWM pinctrl nodes

Add DT nodes for PWMs in EE and AO domains.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
7 years agoARM64: dts: meson-gxbb: Enable the the IR decoder on supported boards
Martin Blumenstingl [Sat, 20 Aug 2016 09:54:24 +0000 (11:54 +0200)]
ARM64: dts: meson-gxbb: Enable the the IR decoder on supported boards

Enable the Infrared Remote Controller on boards which have an Infrared
receiver.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: meson-gxbb: Add Infrared Remote Controller decoder
Neil Armstrong [Sat, 20 Aug 2016 09:54:23 +0000 (11:54 +0200)]
ARM64: dts: meson-gxbb: Add Infrared Remote Controller decoder

This adds the Infrared Remote Controller node so boards with an IR
remote can simply enable it.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agodt-bindings: media: meson-ir: Add Meson8b and GXBB compatible strings
Neil Armstrong [Sat, 20 Aug 2016 09:54:21 +0000 (11:54 +0200)]
dt-bindings: media: meson-ir: Add Meson8b and GXBB compatible strings

New bindings are needed as the register layout on the newer platforms
is slightly different compared to Meson6b.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
7 years agoARM64: dts: amlogic: add the input pin for the IR remote
Kevin Hilman [Thu, 1 Sep 2016 22:26:13 +0000 (15:26 -0700)]
ARM64: dts: amlogic: add the input pin for the IR remote

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>