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drm/i915: Rewrite fb rotation GTT handling
2016-08-11 Ville Syrjälädrm/i915: Rewrite fb rotation GTT handling
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2016-08-11 Ville Syrjälädrm/i915: Account for TSEG size when determining 865G...
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2016-08-05 Ville Syrjälädrm/i915: Use the g4x+ approach on gen2 for handling...
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2016-08-05 Ville Syrjälädrm/i915: Introduce gpu_reset_clobbers_display()
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2016-08-05 Ville Syrjälädrm/i915: Don't mark PCH underrun reporting as disabled...
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2016-08-05 Ville Syrjälädrm/i915: Add some curly braces
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2016-08-05 Ville SyrjäläRevert "drm/i915: Track active streams also for DP...
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2016-08-05 Ville Syrjälädrm/i915: Fix iboost setting for SKL Y/U DP DDI buffer...
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2016-08-04 Ville Syrjälädrm/i915: Don't try to ack sink irqs when there are...
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2016-08-04 Ville Syrjälädrm/i915: Remove useless rate_to_index() usage
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2016-08-04 Ville Syrjälädrm/i915: Allow MST sinks to work even if drm_probe_ddc...
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2016-08-04 Ville Syrjälädrm/i915: Track active streams also for DP SST
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2016-08-04 Ville Syrjälädrm/i915: Reject mixing MST and SST/HDMI on the same...
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2016-08-04 Ville Syrjälädrm/i915: Avoid mixing up SST and MST in DDI setup
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2016-08-04 Ville Syrjälädrm/i915: Read PSR caps/intermediate freqs/etc. only...
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2016-08-03 Ville Syrjälädrm/i915: Clean up the extra RPM ref on CHV with i915...
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2016-08-02 Ville Syrjälädrm/i915: Warn about aux msg buffer vs. size mismatch
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2016-08-02 Ville Syrjälädrm/i915: Program FW_BLC_SELF on 915G as well
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2016-08-02 Ville Syrjälädrm/i915: Always use cpp==4 for FW_BLC_SELF on 915GM...
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2016-08-02 Ville Syrjälädrm/i915: Extract bdw_get_buf_trans_edp()
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2016-08-02 Ville Syrjälädrm/i915: Simplify intel_ddi_get_encoder_port()
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2016-08-02 Ville Syrjälädrm/i915: Get the iboost setting based on the port...
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2016-08-02 Ville Syrjälädrm/i915: Split DP/eDP/FDI and HDMI/DVI DDI buffer...
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2016-08-02 Ville Syrjälädrm/i915: Explicitly use ddi buf trans entry 9 for...
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2016-08-02 Ville Syrjälädrm/i915: Move bxt_ddi_vswing_sequence() call into...
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2016-08-02 Ville Syrjälädrm/i915: Program iboost settings for HDMI/DVI on SKL
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2016-08-02 Ville Syrjälädrm/i915: Name the "iboost bit"
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2016-08-02 Ville Syrjälädrm/i915: Fix iboost setting for DDI with 4 lanes on SKL
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2016-07-29 Ville Syrjälädrm: aux ->transfer() can return 0, deal with it
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2016-07-28 Ville Syrjälädrm/i915: Never fully mask the the EI up rps interrupt...
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2016-07-27 Ville Syrjälädrm/i915: Wait up to 3ms for the pcu to ack the cdclk...
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2016-07-18 Ville Syrjälädrm/i915: Treat eDP as always connected, again
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2016-07-18 Ville Syrjälädrm/i915: Treat eDP as always connected, again
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2016-07-14 Ville Syrjälädrm/i915: Ignore panel type from OpRegion on SKL
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2016-07-14 Ville Syrjälädrm/i915: Unbreak interrupts on pre-gen6
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2016-07-14 Ville Syrjälädrm/i915: Ignore panel type from OpRegion on SKL
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2016-07-13 Ville Syrjälädrm/i915: Unbreak interrupts on pre-gen6
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2016-07-07 Ville Syrjälädrm/i915: Check for invalid cloning earlier during...
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2016-07-07 Ville Syrjälädrm/i915: Simplify hdmi_12bpc_possible()
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2016-07-07 Ville Syrjälädrm/i915: Kill has_dsi_encoder
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2016-07-07 Ville Syrjälädrm/i915: s/INTEL_OUTPUT_DISPLAYPORT/INTEL_OUTPUT_DP/
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2016-07-07 Ville Syrjälädrm/i915: Replace some open coded intel_crtc_has_dp_encoder()s
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2016-07-07 Ville Syrjälädrm/i915: Kill has_dp_encoder from pipe_config
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2016-07-07 Ville Syrjälädrm/i915: Replace manual lvds and sdvo/hdmi counting...
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2016-07-07 Ville Syrjälädrm/i915: Unify intel_pipe_has_type() and intel_pipe_will_ha...
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2016-07-07 Ville Syrjälädrm/i915: Add output_types bitmask into the crtc state
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2016-07-07 Ville Syrjälädrm/i915: Remove encoder type checks from MST suspend...
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2016-07-07 Ville Syrjälädrm/i915: Don't mark eDP encoders as MST capable
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2016-07-06 Ville Syrjäläx86/perf/intel/rapl: Fix module name collision with...
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2016-06-29 Ville Syrjälädrm/i915: Refresh cached DP port register value on...
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2016-06-22 Ville Syrjälädrm/i915: Refresh cached DP port register value on...
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2016-06-17 Ville Syrjälädrm: Deal with rotation in drm_plane_helper_check_update()
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2016-06-10 Ville Syrjälädrm/i915: Extract physical display dimensions from VBT
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2016-06-10 Ville Syrjälädrm/i915: Check VBT for port presence in addition to...
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2016-06-07 Ville Syrjälädrm/i915: Check VBT for port presence in addition to...
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2016-06-02 Ville Syrjälädrm/i915: Extract physical display dimensions from VBT
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2016-05-30 Ville Syrjälädrm/i915: kill STANDARD/CURSOR plane screams
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2016-05-30 Ville Syrjälädrm/i915: Give encoders useful names
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2016-05-30 Ville Syrjälädrm/i915: Give meaningful names to all the planes
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2016-05-30 Ville Syrjälädrm/i915: Don't leak primary/cursor planes on crtc...
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2016-05-30 Ville Syrjälädrm/i915: Set crtc->name to "pipe A", "pipe B", etc.
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2016-05-30 Ville Syrjälädrm/i915: Use plane->name in debug prints
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2016-05-30 Ville Syrjälädrm/i915: Use crtc->name in debug messages
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2016-05-27 Ville Syrjälädrm/i915: Reject modeset if the dotclock is too high
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2016-05-26 Ville Syrjälädma-debug: avoid spinlock recursion when disabling...
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2016-05-23 Ville Syrjälädrm/i915: Assert the dbuf is enabled when disabling...
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2016-05-23 Ville Syrjälädrm/i915: Set BXT cdclk to minimum initially
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2016-05-23 Ville Syrjälädrm/i915: Replace bxt_verify_cdclk_state() with a more...
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2016-05-23 Ville Syrjälädrm/i915: Make bxt_set_cdclk() operate in terms of...
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2016-05-23 Ville Syrjälädrm/i915: Rewrite broxton_get_display_clock_speed(...
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2016-05-23 Ville Syrjälädrm/i915: Update cached cdclk state from broxton_init_cdclk()
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2016-05-23 Ville Syrjälädrm/i915: Store BXT DE PLL vco and ref clocks in dev_priv
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2016-05-23 Ville Syrjälädrm/i915: Extract bxt DE PLL enable/disable from broxton_set...
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2016-05-23 Ville Syrjälädrm/i915: Store cdclk PLL reference clock under dev_priv
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2016-05-23 Ville Syrjälädrm/i915: Rename skl_vco_freq to cdclk_pll.vco
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2016-05-23 Ville Syrjälädrm/i915: Make 308 and 671 MHz cdclks more accurate...
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2016-05-23 Ville Syrjälädrm/i915: Move SKL+ DBUF enable/disable to display...
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2016-05-23 Ville Syrjälädrm/i915: Unify SKL cdclk init paths
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2016-05-23 Ville Syrjälädrm/i915: Beef up skl_sanitize_cdclk() a bit
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2016-05-23 Ville Syrjälädrm/i915: Keep track of preferred cdclk vco frequency...
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2016-05-23 Ville Syrjälädrm/i915: Allow enable/disable of DPLL0 around cdclk...
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2016-05-23 Ville Syrjälädrm/i915: Report the current DPLL0 vco on SKL/KBL
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2016-05-23 Ville Syrjälädrm/i915: Actually read out DPLL0 vco on skl from hardware
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2016-05-23 Ville Syrjälädrm/i915: Extract skl_calc_cdclk()
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2016-05-23 Ville Syrjälädrm/i915: Move the SKL DPLL0 VCO computation into intel_dp_c...
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2016-05-23 Ville Syrjälädrm/i915: Fix BXT min_pixclk after state readout
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2016-05-23 Ville Syrjälädrm/i915: Enable GSE interrupt on BDW+
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2016-05-23 Ville Syrjälädrm/i915: Ignore stale wm register values on resume...
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2016-05-23 Ville Syrjälädrm/i915: Don't leave old junk in ilk active watermarks...
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2016-05-23 Ville Syrjälädrm/i915: s/DPPL/DPLL/ for SKL DPLLs
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2016-05-23 Ville Syrjälädrm/i915: Re-enable GGTT earlier during resume on pre...
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2016-05-23 Ville Syrjälädrm/i915: Determine DP++ type 1 DVI adaptor presence...
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2016-05-23 Ville Syrjälädrm/i915: Enable/disable TMDS output buffers in DP...
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2016-05-23 Ville Syrjälädrm/i915: Respect DP++ adaptor TMDS clock limit
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2016-05-23 Ville Syrjälädrm: Add helper for DP++ adaptors
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2016-05-13 Ville Syrjälädrm/i915: Ignore stale wm register values on resume...
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2016-05-13 Ville Syrjälädrm/i915: Don't leave old junk in ilk active watermarks...
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2016-05-13 Ville Syrjälädrm/i915: Eliminate the CDCLK_CTL RMW on BXT
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2016-05-13 Ville Syrjälädrm/i915: Program BXT_CDCLK_CD2X_PIPE
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2016-05-13 Ville Syrjälädrm/i915: s/required_vco/vco/ in skl cdclk code
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