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ARM: clk-imx6q: refine esai_ipg's parent
2015-01-20 Shengjiu WangARM: clk-imx6q: refine esai_ipg's parent
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-09-17 Shengjiu WangASoC: fsl_ssi: refine ipg clock usage in this module
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-09-16 Shengjiu WangARM: dts: imx6sl: add baud clock and clock-names for ssi
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-09-16 Shengjiu WangARM: dts: imx6qdl: add baud clock and clock-names for ssi
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-09-16 Shengjiu WangARM: clk-imx6sl: refine clock tree for SSI
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-09-16 Shengjiu WangARM: clk-imx6q: refine clock tree for SSI
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-09-16 Shengjiu WangARM: clk-imx6q: refine clock tree for ASRC
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-09-16 Shengjiu WangARM: clk-imx6q: refine clock tree for ESAI
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-08-19 Shengjiu WangASoC: fsl-asoc-card: move 'config SND_SOC_FSL_ASOC_CARD...
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-08-18 Shengjiu WangASoC: fsl: fsl-asoc-card: Select SND_SOC_IMX_AUDMUX
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-08-18 Shengjiu WangASoC: fsl-asoc-card: Fix build warning for maybe-uninitialized
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-08-16 Shengjiu WangASoC: fsl_esai: refine esai for TDM support
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-08-13 Shengjiu WangASoC: fsl_esai: refine esai for TDM support
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-08-13 Shengjiu WangASoC: fsl-esai: Revert .xlate_tdm_slot_mask() support
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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2014-07-29 Shengjiu WangASoC: cs42xx8: Add SND_SOC_DAIFMT_DSP_A support
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
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