mlx4_core: initial header-file changes for SRIOV support

[cascardo/linux.git] / include / linux / mlx4 / device.h

diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index 2366f94..b9466af 100644 (file)
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -47,6 +47,9 @@
 enum {
        MLX4_FLAG_MSI_X         = 1 << 0,
        MLX4_FLAG_OLD_PORT_CMDS = 1 << 1,
+       MLX4_FLAG_MASTER        = 1 << 2,
+       MLX4_FLAG_SLAVE         = 1 << 3,
+       MLX4_FLAG_SRIOV         = 1 << 4,
 };
 
 enum {
@@ -57,10 +60,20 @@ enum {
        MLX4_BOARD_ID_LEN = 64
 };
 
+enum {
+       MLX4_MAX_NUM_PF         = 16,
+       MLX4_MAX_NUM_VF         = 64,
+       MLX4_MFUNC_MAX          = 80,
+       MLX4_MFUNC_EQ_NUM       = 4,
+       MLX4_MFUNC_MAX_EQES     = 8,
+       MLX4_MFUNC_EQE_MASK     = (MLX4_MFUNC_MAX_EQES - 1)
+};
+
 enum {
        MLX4_DEV_CAP_FLAG_RC            = 1LL <<  0,
        MLX4_DEV_CAP_FLAG_UC            = 1LL <<  1,
        MLX4_DEV_CAP_FLAG_UD            = 1LL <<  2,
+       MLX4_DEV_CAP_FLAG_XRC           = 1LL <<  3,
        MLX4_DEV_CAP_FLAG_SRQ           = 1LL <<  6,
        MLX4_DEV_CAP_FLAG_IPOIB_CSUM    = 1LL <<  7,
        MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1LL <<  8,
@@ -76,13 +89,20 @@ enum {
        MLX4_DEV_CAP_FLAG_IBOE          = 1LL << 30,
        MLX4_DEV_CAP_FLAG_UC_LOOPBACK   = 1LL << 32,
        MLX4_DEV_CAP_FLAG_FCS_KEEP      = 1LL << 34,
-       MLX4_DEV_CAP_FLAG_WOL           = 1LL << 38,
+       MLX4_DEV_CAP_FLAG_WOL_PORT1     = 1LL << 37,
+       MLX4_DEV_CAP_FLAG_WOL_PORT2     = 1LL << 38,
        MLX4_DEV_CAP_FLAG_UDP_RSS       = 1LL << 40,
        MLX4_DEV_CAP_FLAG_VEP_UC_STEER  = 1LL << 41,
        MLX4_DEV_CAP_FLAG_VEP_MC_STEER  = 1LL << 42,
        MLX4_DEV_CAP_FLAG_COUNTERS      = 1LL << 48
 };
 
+#define MLX4_ATTR_EXTENDED_PORT_INFO   cpu_to_be16(0xff90)
+
+enum {
+       MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO        = 1 <<  0
+};
+
 enum {
        MLX4_BMME_FLAG_LOCAL_INV        = 1 <<  6,
        MLX4_BMME_FLAG_REMOTE_INV       = 1 <<  7,
@@ -109,7 +129,11 @@ enum mlx4_event {
        MLX4_EVENT_TYPE_PORT_CHANGE        = 0x09,
        MLX4_EVENT_TYPE_EQ_OVERFLOW        = 0x0f,
        MLX4_EVENT_TYPE_ECC_DETECT         = 0x0e,
-       MLX4_EVENT_TYPE_CMD                = 0x0a
+       MLX4_EVENT_TYPE_CMD                = 0x0a,
+       MLX4_EVENT_TYPE_VEP_UPDATE         = 0x19,
+       MLX4_EVENT_TYPE_COMM_CHANNEL       = 0x18,
+       MLX4_EVENT_TYPE_FLR_EVENT          = 0x1c,
+       MLX4_EVENT_TYPE_NONE               = 0xff,
 };
 
 enum {
@@ -176,6 +200,7 @@ enum mlx4_qp_region {
 };
 
 enum mlx4_port_type {
+       MLX4_PORT_TYPE_NONE     = 0,
        MLX4_PORT_TYPE_IB       = 1,
        MLX4_PORT_TYPE_ETH      = 2,
        MLX4_PORT_TYPE_AUTO     = 3
@@ -208,6 +233,7 @@ static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
 
 struct mlx4_caps {
        u64                     fw_ver;
+       u32                     function;
        int                     num_ports;
        int                     vl_cap[MLX4_MAX_PORTS + 1];
        int                     ib_mtu_cap[MLX4_MAX_PORTS + 1];
@@ -257,6 +283,8 @@ struct mlx4_caps {
        int                     num_qp_per_mgm;
        int                     num_pds;
        int                     reserved_pds;
+       int                     max_xrcds;
+       int                     reserved_xrcds;
        int                     mtt_entry_sz;
        u32                     max_msg_sz;
        u32                     page_size_cap;
@@ -277,6 +305,7 @@ struct mlx4_caps {
        u32                     port_mask;
        enum mlx4_port_type     possible_type[MLX4_MAX_PORTS + 1];
        u32                     max_counters;
+       u8                      ext_port_cap[MLX4_MAX_PORTS + 1];
 };
 
 struct mlx4_buf_list {
@@ -455,6 +484,7 @@ struct mlx4_counter {
 struct mlx4_dev {
        struct pci_dev         *pdev;
        unsigned long           flags;
+       unsigned long           num_slaves;
        struct mlx4_caps        caps;
        struct radix_tree_root  qp_table_tree;
        u8                      rev_id;
@@ -483,8 +513,27 @@ struct mlx4_init_port_param {
 #define mlx4_foreach_ib_transport_port(port, dev)                      \
        for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++)     \
                if (((dev)->caps.port_mask & 1 << ((port) - 1)) ||      \
-                   ((dev)->caps.flags & MLX4_DEV_CAP_FLAG_IBOE))
+                    ((dev)->caps.flags & MLX4_DEV_CAP_FLAG_IBOE))
+
+static inline int mlx4_is_master(struct mlx4_dev *dev)
+{
+       return dev->flags & MLX4_FLAG_MASTER;
+}
 
+static inline int mlx4_is_qp_reserved(struct mlx4_dev *dev, u32 qpn)
+{
+       return (qpn < dev->caps.sqp_start + 8);
+}
+
+static inline int mlx4_is_mfunc(struct mlx4_dev *dev)
+{
+       return dev->flags & (MLX4_FLAG_SLAVE | MLX4_FLAG_MASTER);
+}
+
+static inline int mlx4_is_slave(struct mlx4_dev *dev)
+{
+       return dev->flags & MLX4_FLAG_SLAVE;
+}
 
 int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct,
                   struct mlx4_buf *buf);
@@ -500,6 +549,8 @@ static inline void *mlx4_buf_offset(struct mlx4_buf *buf, int offset)
 
 int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn);
 void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn);
+int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn);
+void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn);
 
 int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar);
 void mlx4_uar_free(struct mlx4_dev *dev, struct mlx4_uar *uar);
@@ -539,8 +590,8 @@ void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt);
 int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp);
 void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp);
 
-int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt,
-                  u64 db_rec, struct mlx4_srq *srq);
+int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcdn,
+                  struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq);
 void mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq);
 int mlx4_srq_arm(struct mlx4_dev *dev, struct mlx4_srq *srq, int limit_watermark);
 int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_watermark);