{net,IB}/mlx5: MKey/PSV commands via mlx5 ifc

[cascardo/linux.git] / include / linux / mlx5 / device.h

diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 5a1c160..fb002db 100644 (file)
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -197,19 +197,6 @@ enum {
        MLX5_PCIE_CTRL_TPH_MASK         = 3 << 4,
 };
 
-enum {
-       MLX5_ACCESS_MODE_PA     = 0,
-       MLX5_ACCESS_MODE_MTT    = 1,
-       MLX5_ACCESS_MODE_KLM    = 2
-};
-
-enum {
-       MLX5_MKEY_REMOTE_INVAL  = 1 << 24,
-       MLX5_MKEY_FLAG_SYNC_UMR = 1 << 29,
-       MLX5_MKEY_BSF_EN        = 1 << 30,
-       MLX5_MKEY_LEN64         = 1 << 31,
-};
-
 enum {
        MLX5_EN_RD      = (u64)1,
        MLX5_EN_WR      = (u64)2
@@ -923,6 +910,13 @@ enum {
        MLX5_MKEY_STATUS_FREE = 1 << 6,
 };
 
+enum {
+       MLX5_MKEY_REMOTE_INVAL  = 1 << 24,
+       MLX5_MKEY_FLAG_SYNC_UMR = 1 << 29,
+       MLX5_MKEY_BSF_EN        = 1 << 30,
+       MLX5_MKEY_LEN64         = 1 << 31,
+};
+
 struct mlx5_mkey_seg {
        /* This is a two bit field occupying bits 31-30.
         * bit 31 is always 0,
@@ -945,105 +939,12 @@ struct mlx5_mkey_seg {
        u8              rsvd4[4];
 };
 
-struct mlx5_query_special_ctxs_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-       u8                      rsvd[8];
-};
-
-struct mlx5_query_special_ctxs_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       __be32                  dump_fill_mkey;
-       __be32                  reserved_lkey;
-};
-
-struct mlx5_create_mkey_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-       __be32                  input_mkey_index;
-       __be32                  flags;
-       struct mlx5_mkey_seg    seg;
-       u8                      rsvd1[16];
-       __be32                  xlat_oct_act_size;
-       __be32                  rsvd2;
-       u8                      rsvd3[168];
-       __be64                  pas[0];
-};
-
-struct mlx5_create_mkey_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       __be32                  mkey;
-       u8                      rsvd[4];
-};
-
-struct mlx5_destroy_mkey_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-       __be32                  mkey;
-       u8                      rsvd[4];
-};
-
-struct mlx5_destroy_mkey_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       u8                      rsvd[8];
-};
-
-struct mlx5_query_mkey_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-       __be32                  mkey;
-};
-
-struct mlx5_query_mkey_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       __be64                  pas[0];
-};
-
-struct mlx5_modify_mkey_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-       __be32                  mkey;
-       __be64                  pas[0];
-};
-
-struct mlx5_modify_mkey_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       u8                      rsvd[8];
-};
-
-struct mlx5_dump_mkey_mbox_in {
-       struct mlx5_inbox_hdr   hdr;
-};
-
-struct mlx5_dump_mkey_mbox_out {
-       struct mlx5_outbox_hdr  hdr;
-       __be32                  mkey;
-};
-
 #define MLX5_ATTR_EXTENDED_PORT_INFO   cpu_to_be16(0xff90)
 
 enum {
        MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO        = 1 <<  0
 };
 
-struct mlx5_allocate_psv_in {
-       struct mlx5_inbox_hdr   hdr;
-       __be32                  npsv_pd;
-       __be32                  rsvd_psv0;
-};
-
-struct mlx5_allocate_psv_out {
-       struct mlx5_outbox_hdr  hdr;
-       u8                      rsvd[8];
-       __be32                  psv_idx[4];
-};
-
-struct mlx5_destroy_psv_in {
-       struct mlx5_inbox_hdr   hdr;
-       __be32                  psv_number;
-       u8                      rsvd[4];
-};
-
-struct mlx5_destroy_psv_out {
-       struct mlx5_outbox_hdr  hdr;
-       u8                      rsvd[8];
-};
-
 enum {
        VPORT_STATE_DOWN                = 0x0,
        VPORT_STATE_UP                  = 0x1,