CHROMIUM: exynos: dts: configure audio codec master clock pin
On Spring, the I2S0 clock is connected to MCLK2/GPIO3 instead of MCLK1.
Explicitly configure the pin on boards I have tested and let the sane
default value (MCLK1 as before) for others.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:17343
TEST=emerge-daisy_spring chromeos-kernel
play sound on Snow with the codec on MCLK1, on Spring proto-1 with the
codec on MCLK2.
Change-Id: I9792dc325bea67e9466cff04576d9a3bbcea4eb1
Reviewed-on: https://gerrit.chromium.org/gerrit/41790
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>