clk: berlin: add cpuclk
authorAntoine Tenart <antoine.tenart@free-electrons.com>
Thu, 15 Oct 2015 18:55:55 +0000 (20:55 +0200)
committerSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Thu, 15 Oct 2015 18:55:55 +0000 (20:55 +0200)
commit515f1a2027006839c08c842da919abfcc3c7ae2a
treef5fddc6bbacde7265e2b194debd2a474a57dcdd8
parent0f0ebb13493f1133aa9fbea44783f0e5380a9770
clk: berlin: add cpuclk

Add cpuclk in the Berlin BG2Q clock driver. This clk has a divider
fixed to 1.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
drivers/clk/berlin/bg2q.c