MIPS: GIC: Send IPIs using the GIC
authorSteven J. Hill <Steven.Hill@imgtec.com>
Wed, 9 Oct 2013 15:47:23 +0000 (16:47 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 22 Jan 2014 19:18:57 +0000 (20:18 +0100)
commit5cf8b2409c8c08f7505925d2ba78f71b362d902e
tree600cc2e0e05cbc9fd9756d33bfdfece835fd8dbf
parentc2c2a644935dcdb287a87bf4f3cccd13bd8d3468
MIPS: GIC: Send IPIs using the GIC

If GIC is present, then use it to send IPIs between the cores.
Using GIC for IPIs is simpler and is usable for multicore
systems compared to the existing way of doing IPIs where all VPEs
had to be disabled for another VPE to access the Cause register
in one of the TCs and enable all the VPEs back.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6040/
arch/mips/kernel/smp-mt.c