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ARM: dts: sun8i: sina33: Enable hardware reset and HS-DDR for eMMC
authorChen-Yu Tsai <wens@csie.org>
Thu, 21 Jan 2016 05:26:38 +0000 (13:26 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Sun, 24 Jan 2016 23:01:21 +0000 (00:01 +0100)
commit74124439b93065c35b840f381bb26f61452c18e5
treedc33b4ce4eb5b7c9de4938de56558d6d84327a1btree | snapshot
parentdb30fce1eea58e50ae8b2722704b4f529c394dbacommit | diff
ARM: dts: sun8i: sina33: Enable hardware reset and HS-DDR for eMMC

mmc2 has a special pin for eMMC hardware reset, which is controllable
from the controller. Add the "mmc-cap-hw-reset" property to denote that
this controller supports this function, and the pins are actually used.

Also increase the signal drive strength for mmc2 pins, for HS-DDR mode
support.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts diff | blob | history
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