clk: tegra: Micro-optimize Tegra210 clock setup
authorThierry Reding <treding@nvidia.com>
Thu, 23 Jun 2016 10:52:31 +0000 (12:52 +0200)
committerThierry Reding <treding@nvidia.com>
Thu, 23 Jun 2016 15:47:03 +0000 (17:47 +0200)
commit74d3ba0b6f1b22ed02ae16031c741822c9928793
tree245c38b42ffccc810d84926d97e4a38c258ccdf4
parent2e34c2ac16ee6574743c73caa3d796e307f028a6
clk: tegra: Micro-optimize Tegra210 clock setup

sor_safe being the parent of the dpaux and dpaux1 clocks, it's not only
natural, but also slightly more efficient, to initialize it before its
children. This avoids orphaning the dpaux and dpaux1 clocks only to get
them reparented when the sor_safe clock is registered.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-tegra210.c