perf/x86/intel: Fix SLM MSR_OFFCORE_RSP1 valid_mask
authorKan Liang <kan.liang@intel.com>
Wed, 24 Jun 2015 18:23:35 +0000 (11:23 -0700)
committerIngo Molnar <mingo@kernel.org>
Tue, 4 Aug 2015 08:16:54 +0000 (10:16 +0200)
commitae3f011fc25104a218caf4448b1d47ef1c9b3a42
tree0aa5659b07801b2943c07f761eb70ea725f34c6e
parentc749b3e96398fcc39286267b72fb8b85c0f757ea
perf/x86/intel: Fix SLM MSR_OFFCORE_RSP1 valid_mask

AVG_LATENCY(bit 38) is only available on MSR_OFFCORE_RSP0.
So the bit should be removed from RSP1 valid_mask.

Since RSP0 and RSP1 may have different valid_mask, intel_alt_er should
validate the config on the alternate offcore reg before replacing it.

Signed-off-by: Kan Liang <kan.liang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1435170215-5017-1-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event_intel.c