clk: tegra: Fix wrong value written to PLLE_AUX
authorTuomas Tynkkynen <ttynkkynen@nvidia.com>
Fri, 16 May 2014 13:50:20 +0000 (16:50 +0300)
committerMike Turquette <mturquette@linaro.org>
Fri, 16 May 2014 22:49:23 +0000 (15:49 -0700)
commitd2c834abe2b39a2d5a6c38ef44de87c97cbb34b4
tree0b481e0a303d60d3f79d8bf0333b1168b4a24b6d
parent8e33f91a0b84ae1964bef77cb92f5d41d97530c8
clk: tegra: Fix wrong value written to PLLE_AUX

The value written to PLLE_AUX was incorrect due to a wrong variable
being used. Without this fix SATA does not work.

Cc: stable@vger.kernel.org
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: improved changelog]
drivers/clk/tegra/clk-pll.c