ARM: dts: am335x: Disable wait pin monitoring for NAND
authorRoger Quadros <rogerq@ti.com>
Tue, 23 Feb 2016 16:37:22 +0000 (18:37 +0200)
committerTony Lindgren <tony@atomide.com>
Fri, 26 Feb 2016 18:32:14 +0000 (10:32 -0800)
commitdb0f68529a6a7f3f42486398275926be946903b0
treeaff7b268a9c1d0c9835c73908cf272cec0015c36
parent03752148384652743069776e7023a8e46ed9164b
ARM: dts: am335x: Disable wait pin monitoring for NAND

The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].

[1] AM335x TRM: SPRUH73L: 7.1.3.3.12.2 NAND Device-Ready Pin

Cc: Teresa Remmet <t.remmet@phytec.de>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Yegor Yefremov <yegorslists@googlemail.com>
Cc: Rostislav Lisovy <lisovy@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/am335x-baltos-ir5221.dts
arch/arm/boot/dts/am335x-chilisom.dtsi
arch/arm/boot/dts/am335x-cm-t335.dts
arch/arm/boot/dts/am335x-evm.dts
arch/arm/boot/dts/am335x-igep0033.dtsi
arch/arm/boot/dts/am335x-phycore-som.dtsi