drm/exynos: hdmi: Correct the timing values for HDMI
authorShirish S <s.shirish@samsung.com>
Mon, 27 Aug 2012 07:22:14 +0000 (16:22 +0900)
committerGerrit <chrome-bot@google.com>
Tue, 28 Aug 2012 04:20:38 +0000 (21:20 -0700)
commite0c51b5c83006d5846930cdff5f1891cbd0be655
tree1167091a70fe234de64d6a5204651b01c5673a6a
parent883788de0d035d9d0c23679a9f2958f7b814a231
drm/exynos: hdmi: Correct the timing values for HDMI

The current method of calculation uses DRM_MODE_FLAG_PVSYNC
and DRM_MODE_FLAG_PHSYNC, which makes it non-usable for "Nx480/576"
etc resolutions whose flags use a higher value for flags variable.

Hence now,DRM_MODE_FLAG_NVSYNC and DRM_MODE_FLAG_NHSYNC are used for
calculating HSYNC and VSYNC Polarity.

Also as per the Exynos 5 IP design, the hsync start and hsync end
has a offset of 2 pixels.This patch corrects this.

The above modifications are required for passing the HDMI compliance
tests.

BUG=chrome-os-partner:13173
TEST=Verified that all the compliance tests pass
for 480p,720p and 1080p in
Agilent Technologies,N5998A protocol analyser.

Change-Id: I25d1bb2a77dcd109ec0669555b3d87f1a277299a
Signed-off-by: Shirish S <s.shirish@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/31447
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Tested-by: Shirish S <shirish@chromium.org>
Commit-Ready: Shirish S <shirish@chromium.org>
drivers/gpu/drm/exynos/exynos_hdmi.c