From: Stuart Abercrombie Date: Mon, 29 Apr 2013 22:07:29 +0000 (-0700) Subject: Fix display underruns on Pineview with 2048x1280 VGA display. X-Git-Url: http://git.cascardo.eti.br/?p=cascardo%2Flinux.git;a=commitdiff_plain;h=28b837d445453c19ba00c3bcc06b0aaac25d8c6d Fix display underruns on Pineview with 2048x1280 VGA display. Higher dot clocks were working because pixel doubling was enabled. Lower the apparently arbitrary threshold so it's enabled for 2048x1280. Intel hasn't felt moved to document any of this, so this is purely empirical. The original threshold was introduced here: http://cgit.freedesktop.org/~anholt/xf86-video-intel/commit/?id=8fcf9a81179ee8577ddab5e904c58fbfd14cf59c BUG=chromium:219562 TEST=All previously working U3011 modes + 2048x1280 work Change-Id: I69f47b6ef292d65dc1a3ff6288c33eaa4c1cd894 Reviewed-on: https://gerrit.chromium.org/gerrit/49434 Reviewed-by: Stuart Abercrombie Tested-by: Stuart Abercrombie Commit-Queue: Stuart Abercrombie --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 6bfbd3508ad7..074d283a0e14 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5324,14 +5324,14 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, dspcntr |= DISPPLANE_SEL_PIPE_B; if (pipe == 0 && INTEL_INFO(dev)->gen < 4) { - /* Enable pixel doubling when the dot clock is > 90% of the (display) + /* Enable pixel doubling when the dot clock is > 85% of the (display) * core speed. * * XXX: No double-wide on 915GM pipe B. Is that the only reason for the * pipe == 0 check? */ if (mode->clock > - dev_priv->display.get_display_clock_speed(dev) * 9 / 10) + dev_priv->display.get_display_clock_speed(dev) * 17 / 20) pipeconf |= PIPECONF_DOUBLE_WIDE; else pipeconf &= ~PIPECONF_DOUBLE_WIDE;