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MIPS: mm: Add MIPS R6 instruction encodings
authorLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Wed, 19 Nov 2014 09:29:42 +0000 (09:29 +0000)
committerMarkos Chandras <markos.chandras@imgtec.com>
Mon, 16 Feb 2015 14:02:50 +0000 (14:02 +0000)
commita168b8f1cde6588ff7a67699fa11e01bc77a5ddd
treec7c8e42b220c8a2af11c7aa99d14ad5e8fd8954btree | snapshot
parent51eec48e1252ea39d21b5206e4962f09f823a369commit | diff
MIPS: mm: Add MIPS R6 instruction encodings

MIPS R6 defines new opcodes for ll, sc, cache and pref instructions
so we need to take these into consideration in the micro-assembler.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
arch/mips/include/uapi/asm/inst.h diff | blob | history
arch/mips/mm/uasm-mips.c diff | blob | history
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