From 9e7bb7d3c4badab4dd5f49b2213da5faea384ab3 Mon Sep 17 00:00:00 2001 From: Todd Broch Date: Fri, 3 May 2013 08:23:52 -0700 Subject: [PATCH] CHROMIUM: mfd: s5m: Refactor regmap usage. Refactor s5m_bulk|reg_* functions usage of regmap to facilitate multiple regmapped devices in preparation for using s5m-rtc. Signed-off-by: Todd Broch BUG=chrome-os-partner:19036 TEST=manual, compiles & kernel boots. Change-Id: I4ac47de476cd6d94ebd751fa0aee7800f369b1ad Reviewed-on: https://gerrit.chromium.org/gerrit/50529 Reviewed-by: Vincent Palatin Tested-by: Todd Broch Commit-Queue: Todd Broch --- drivers/mfd/s5m-core.c | 65 ++++++++--------------- drivers/mfd/s5m-irq.c | 29 ++++++----- drivers/regulator/s5m8767.c | 78 ++++++++++++++++------------ include/linux/mfd/s5m87xx/s5m-core.h | 17 ++---- 4 files changed, 85 insertions(+), 104 deletions(-) diff --git a/drivers/mfd/s5m-core.c b/drivers/mfd/s5m-core.c index 27e219f1ec89..912216dd3c64 100644 --- a/drivers/mfd/s5m-core.c +++ b/drivers/mfd/s5m-core.c @@ -61,36 +61,6 @@ static struct mfd_cell s5m8767_devs[] = { }, }; -int s5m_reg_read(struct s5m87xx_dev *s5m87xx, u8 reg, void *dest) -{ - return regmap_read(s5m87xx->regmap, reg, dest); -} -EXPORT_SYMBOL_GPL(s5m_reg_read); - -int s5m_bulk_read(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf) -{ - return regmap_bulk_read(s5m87xx->regmap, reg, buf, count); -} -EXPORT_SYMBOL_GPL(s5m_bulk_read); - -int s5m_reg_write(struct s5m87xx_dev *s5m87xx, u8 reg, u8 value) -{ - return regmap_write(s5m87xx->regmap, reg, value); -} -EXPORT_SYMBOL_GPL(s5m_reg_write); - -int s5m_bulk_write(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf) -{ - return regmap_raw_write(s5m87xx->regmap, reg, buf, count); -} -EXPORT_SYMBOL_GPL(s5m_bulk_write); - -int s5m_reg_update(struct s5m87xx_dev *s5m87xx, u8 reg, u8 val, u8 mask) -{ - return regmap_update_bits(s5m87xx->regmap, reg, mask, val); -} -EXPORT_SYMBOL_GPL(s5m_reg_update); - static struct regmap_config s5m_regmap_config = { .reg_bits = 8, .val_bits = 8, @@ -148,9 +118,9 @@ static int s5m87xx_set_low_jitter(struct s5m87xx_dev *s5m87xx) if (!s5m87xx->pdata->low_jitter) return 0; - return s5m_reg_update(s5m87xx, S5M8767_REG_CTRL1, - S5M8767_LOW_JITTER_MASK, - S5M8767_LOW_JITTER_MASK); + return regmap_update_bits(s5m87xx->pmic, S5M8767_REG_CTRL1, + S5M8767_LOW_JITTER_MASK, + S5M8767_LOW_JITTER_MASK); } static int __devinit s5m87xx_i2c_probe(struct i2c_client *i2c, @@ -158,6 +128,7 @@ static int __devinit s5m87xx_i2c_probe(struct i2c_client *i2c, { struct s5m_platform_data *pdata = i2c->dev.platform_data; struct s5m87xx_dev *s5m87xx; + struct i2c_client *rtc_i2c = NULL; int ret; s5m87xx = devm_kzalloc(&i2c->dev, sizeof(struct s5m87xx_dev), @@ -167,7 +138,6 @@ static int __devinit s5m87xx_i2c_probe(struct i2c_client *i2c, i2c_set_clientdata(i2c, s5m87xx); s5m87xx->dev = &i2c->dev; - s5m87xx->i2c = i2c; s5m87xx->irq = i2c->irq; s5m87xx->type = s5m87xx_i2c_get_driver_data(i2c, id); @@ -199,16 +169,23 @@ static int __devinit s5m87xx_i2c_probe(struct i2c_client *i2c, s5m87xx->wakeup = pdata->wakeup; #endif - s5m87xx->regmap = regmap_init_i2c(i2c, &s5m_regmap_config); - if (IS_ERR(s5m87xx->regmap)) { - ret = PTR_ERR(s5m87xx->regmap); + s5m87xx->pmic = regmap_init_i2c(i2c, &s5m_regmap_config); + if (IS_ERR(s5m87xx->pmic)) { + ret = PTR_ERR(s5m87xx->pmic); dev_err(&i2c->dev, "Failed to allocate register map: %d\n", ret); goto err; } - s5m87xx->rtc = i2c_new_dummy(i2c->adapter, RTC_I2C_ADDR); - i2c_set_clientdata(s5m87xx->rtc, s5m87xx); + rtc_i2c = i2c_new_dummy(i2c->adapter, RTC_I2C_ADDR); + i2c_set_clientdata(rtc_i2c, s5m87xx); + s5m87xx->rtc = regmap_init_i2c(rtc_i2c, &s5m_regmap_config); + if (IS_ERR(s5m87xx->rtc)) { + ret = PTR_ERR(s5m87xx->rtc); + dev_err(&rtc_i2c->dev, "Failed to allocate register map: %d\n", + ret); + goto err; + } if (pdata && pdata->cfg_pmic_irq) pdata->cfg_pmic_irq(); @@ -249,8 +226,10 @@ static int __devinit s5m87xx_i2c_probe(struct i2c_client *i2c, err: mfd_remove_devices(s5m87xx->dev); s5m_irq_exit(s5m87xx); - i2c_unregister_device(s5m87xx->rtc); - regmap_exit(s5m87xx->regmap); + if (rtc_i2c) + i2c_unregister_device(rtc_i2c); + regmap_exit(s5m87xx->pmic); + regmap_exit(s5m87xx->rtc); return ret; } @@ -260,8 +239,8 @@ static int s5m87xx_i2c_remove(struct i2c_client *i2c) mfd_remove_devices(s5m87xx->dev); s5m_irq_exit(s5m87xx); - i2c_unregister_device(s5m87xx->rtc); - regmap_exit(s5m87xx->regmap); + regmap_exit(s5m87xx->pmic); + regmap_exit(s5m87xx->rtc); return 0; } diff --git a/drivers/mfd/s5m-irq.c b/drivers/mfd/s5m-irq.c index 0236676085cf..7c232757673f 100644 --- a/drivers/mfd/s5m-irq.c +++ b/drivers/mfd/s5m-irq.c @@ -14,6 +14,7 @@ #include #include #include +#include #include struct s5m_irq_data { @@ -188,8 +189,8 @@ static void s5m8767_irq_sync_unlock(struct irq_data *data) for (i = 0; i < ARRAY_SIZE(s5m87xx->irq_masks_cur); i++) { if (s5m87xx->irq_masks_cur[i] != s5m87xx->irq_masks_cache[i]) { s5m87xx->irq_masks_cache[i] = s5m87xx->irq_masks_cur[i]; - s5m_reg_write(s5m87xx, S5M8767_REG_INT1M + i, - s5m87xx->irq_masks_cur[i]); + regmap_write(s5m87xx->pmic, S5M8767_REG_INT1M + i, + s5m87xx->irq_masks_cur[i]); } } @@ -243,8 +244,8 @@ static void s5m8763_irq_sync_unlock(struct irq_data *data) for (i = 0; i < ARRAY_SIZE(s5m87xx->irq_masks_cur); i++) { if (s5m87xx->irq_masks_cur[i] != s5m87xx->irq_masks_cache[i]) { s5m87xx->irq_masks_cache[i] = s5m87xx->irq_masks_cur[i]; - s5m_reg_write(s5m87xx, S5M8763_REG_IRQM1 + i, - s5m87xx->irq_masks_cur[i]); + regmap_write(s5m87xx->pmic, S5M8763_REG_IRQM1 + i, + s5m87xx->irq_masks_cur[i]); } } @@ -286,8 +287,8 @@ static irqreturn_t s5m8767_irq_thread(int irq, void *data) int i; - ret = s5m_bulk_read(s5m87xx, S5M8767_REG_INT1, - NUM_IRQ_REGS - 1, irq_reg); + ret = regmap_bulk_read(s5m87xx->pmic, S5M8767_REG_INT1, + irq_reg, NUM_IRQ_REGS - 1); if (ret < 0) { dev_err(s5m87xx->dev, "Failed to read interrupt register: %d\n", ret); @@ -312,8 +313,8 @@ static irqreturn_t s5m8763_irq_thread(int irq, void *data) int ret; int i; - ret = s5m_bulk_read(s5m87xx, S5M8763_REG_IRQ1, - NUM_IRQ_REGS, irq_reg); + ret = regmap_bulk_read(s5m87xx->pmic, S5M8763_REG_IRQ1, + irq_reg, NUM_IRQ_REGS); if (ret < 0) { dev_err(s5m87xx->dev, "Failed to read interrupt register: %d\n", ret); @@ -379,12 +380,12 @@ int s5m_irq_init(struct s5m87xx_dev *s5m87xx) for (i = 0; i < NUM_IRQ_REGS; i++) { s5m87xx->irq_masks_cur[i] = 0xff; s5m87xx->irq_masks_cache[i] = 0xff; - s5m_reg_write(s5m87xx, S5M8763_REG_IRQM1 + i, - 0xff); + regmap_write(s5m87xx->pmic, S5M8763_REG_IRQM1 + i, + 0xff); } - s5m_reg_write(s5m87xx, S5M8763_REG_STATUSM1, 0xff); - s5m_reg_write(s5m87xx, S5M8763_REG_STATUSM2, 0xff); + regmap_write(s5m87xx->pmic, S5M8763_REG_STATUSM1, 0xff); + regmap_write(s5m87xx->pmic, S5M8763_REG_STATUSM2, 0xff); for (i = 0; i < S5M8763_IRQ_NR; i++) { cur_irq = i + s5m87xx->irq_base; @@ -413,8 +414,8 @@ int s5m_irq_init(struct s5m87xx_dev *s5m87xx) for (i = 0; i < NUM_IRQ_REGS - 1; i++) { s5m87xx->irq_masks_cur[i] = 0xff; s5m87xx->irq_masks_cache[i] = 0xff; - s5m_reg_write(s5m87xx, S5M8767_REG_INT1M + i, - 0xff); + regmap_write(s5m87xx->pmic, S5M8767_REG_INT1M + i, + 0xff); } for (i = 0; i < S5M8767_IRQ_NR; i++) { cur_irq = i + s5m87xx->irq_base; diff --git a/drivers/regulator/s5m8767.c b/drivers/regulator/s5m8767.c index 332608273be4..3ea015aa9bfd 100644 --- a/drivers/regulator/s5m8767.c +++ b/drivers/regulator/s5m8767.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -213,7 +214,7 @@ static int s5m8767_reg_is_enabled(struct regulator_dev *rdev) else if (ret) return ret; - ret = s5m_reg_read(s5m8767->iodev, reg, &val); + ret = regmap_read(s5m8767->iodev->pmic, reg, &val); if (ret) return ret; @@ -229,7 +230,7 @@ static int s5m8767_reg_enable(struct regulator_dev *rdev) if (ret) return ret; - return s5m_reg_update(s5m8767->iodev, reg, pattern, mask); + return regmap_update_bits(s5m8767->iodev->pmic, reg, mask, pattern); } static int s5m8767_reg_disable(struct regulator_dev *rdev) @@ -241,7 +242,7 @@ static int s5m8767_reg_disable(struct regulator_dev *rdev) if (ret) return ret; - return s5m_reg_update(s5m8767->iodev, reg, ~mask, mask); + return regmap_update_bits(s5m8767->iodev->pmic, reg, mask, ~mask); } static int s5m8767_get_voltage_register(struct regulator_dev *rdev, int *_reg) @@ -303,7 +304,7 @@ static int s5m8767_get_voltage_sel(struct regulator_dev *rdev) mask = (reg_id < S5M8767_BUCK1) ? 0x3f : 0xff; - ret = s5m_reg_read(s5m8767->iodev, reg, &val); + ret = regmap_read(s5m8767->iodev->pmic, reg, &val); if (ret) return ret; @@ -367,11 +368,11 @@ static int s5m8767_set_voltage(struct regulator_dev *rdev, if (ret) return ret; - s5m_reg_read(s5m8767->iodev, reg, &val); + regmap_read(s5m8767->iodev->pmic, reg, &val); val &= ~mask; val |= sel; - ret = s5m_reg_write(s5m8767->iodev, reg, val); + ret = regmap_write(s5m8767->iodev->pmic, reg, val); *selector = sel; return ret; @@ -792,65 +793,74 @@ static __devinit int s5m8767_pmic_probe(struct platform_device *pdev) } } - s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL, - (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1), 1 << 1); - s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL, - (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1), 1 << 1); - s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL, - (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1), 1 << 1); + regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_BUCK2CTRL, 1 << 1, + (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1)); + regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_BUCK3CTRL, 1 << 1, + (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1)); + regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_BUCK4CTRL, 1 << 1, + (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1)); /* Initialize GPIO DVS registers */ for (i = 0; i < 8; i++) { if (s5m8767->buck2_gpiodvs) { - s5m_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i, - s5m8767->buck2_vol[i]); + regmap_write(s5m8767->iodev->pmic, + S5M8767_REG_BUCK2DVS1 + i, + s5m8767->buck2_vol[i]); } if (s5m8767->buck3_gpiodvs) { - s5m_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i, - s5m8767->buck3_vol[i]); + regmap_write(s5m8767->iodev->pmic, + S5M8767_REG_BUCK3DVS1 + i, + s5m8767->buck3_vol[i]); } if (s5m8767->buck4_gpiodvs) { - s5m_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i, - s5m8767->buck4_vol[i]); + regmap_write(s5m8767->iodev->pmic, + S5M8767_REG_BUCK4DVS1 + i, + s5m8767->buck4_vol[i]); } } - s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL, 0x78, 0xff); - s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL, 0x58, 0xff); - s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL, 0x78, 0xff); + regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_BUCK2CTRL, + 0xff, 0x78); + regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_BUCK3CTRL, + 0xff, 0x58); + regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_BUCK4CTRL, + 0xff, 0x78); if (s5m8767->buck2_ramp) - s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08); + regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_DVSRAMP, + 0x08, 0x08); if (s5m8767->buck3_ramp) - s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04); + regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_DVSRAMP, + 0x04, 0x04); if (s5m8767->buck4_ramp) - s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02); + regmap_update_bits(s5m8767->iodev->pmic, S5M8767_REG_DVSRAMP, + 0x02, 0x02); if (s5m8767->buck2_ramp || s5m8767->buck3_ramp || s5m8767->buck4_ramp) { switch (s5m8767->ramp_delay) { case 15: - s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, - 0xc0, 0xf0); + regmap_update_bits(s5m8767->iodev->pmic, + S5M8767_REG_DVSRAMP, 0xf0, 0xc0); break; case 25: - s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, - 0xd0, 0xf0); + regmap_update_bits(s5m8767->iodev->pmic, + S5M8767_REG_DVSRAMP, 0xf0, 0xd0); break; case 50: - s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, - 0xe0, 0xf0); + regmap_update_bits(s5m8767->iodev->pmic, + S5M8767_REG_DVSRAMP, 0xf0, 0xe0); break; case 100: - s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, - 0xf0, 0xf0); + regmap_update_bits(s5m8767->iodev->pmic, + S5M8767_REG_DVSRAMP, 0xf0, 0xf0); break; default: - s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, - 0x90, 0xf0); + regmap_update_bits(s5m8767->iodev->pmic, + S5M8767_REG_DVSRAMP, 0xf0, 0x90); } } diff --git a/include/linux/mfd/s5m87xx/s5m-core.h b/include/linux/mfd/s5m87xx/s5m-core.h index 540adefc0a6a..024df90bb7de 100644 --- a/include/linux/mfd/s5m87xx/s5m-core.h +++ b/include/linux/mfd/s5m87xx/s5m-core.h @@ -296,9 +296,8 @@ enum s5m8763_irq { /** * struct s5m87xx_dev - s5m87xx master device for sub-drivers * @dev: master device of the chip (can be used to access platform data) - * @i2c: i2c client private data for regulator - * @rtc: i2c client private data for rtc - * @iolock: mutex for serializing io access + * @pmic: regmap private data for pmic regulators + * @rtc: regmap private data for rtc * @irqlock: mutex for buslock * @irq_base: base IRQ number for s5m87xx, required for IRQs * @irq: generic IRQ number for s5m87xx @@ -310,10 +309,8 @@ enum s5m8763_irq { */ struct s5m87xx_dev { struct device *dev; - struct regmap *regmap; - struct i2c_client *i2c; - struct i2c_client *rtc; - struct mutex iolock; + struct regmap *pmic; + struct regmap *rtc; struct mutex irqlock; int device_type; @@ -331,12 +328,6 @@ int s5m_irq_init(struct s5m87xx_dev *s5m87xx); void s5m_irq_exit(struct s5m87xx_dev *s5m87xx); int s5m_irq_resume(struct s5m87xx_dev *s5m87xx); -extern int s5m_reg_read(struct s5m87xx_dev *s5m87xx, u8 reg, void *dest); -extern int s5m_bulk_read(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf); -extern int s5m_reg_write(struct s5m87xx_dev *s5m87xx, u8 reg, u8 value); -extern int s5m_bulk_write(struct s5m87xx_dev *s5m87xx, u8 reg, int count, u8 *buf); -extern int s5m_reg_update(struct s5m87xx_dev *s5m87xx, u8 reg, u8 val, u8 mask); - struct s5m_platform_data { struct s5m_regulator_data *regulators; int device_type; -- 2.20.1