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secomp: Constify mode1 syscall whitelist
2016-05-13
Matt Redfearn
secomp: Constify mode1 syscall whitelist
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
>
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2016-05-13
Matt Redfearn
MIPS: seccomp: Support compat with both O32 and N32
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
>
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2016-05-13
Matt Redfearn
seccomp: Get compat syscalls from asm-generic header
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
>
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2016-05-13
Matt Redfearn
MIPS: scall: Handle seccomp filters which redirect...
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
>
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2016-05-13
Matt Redfearn
MIPS: Support sending SIG_SYS to 32bit userspace from...
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
>
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2016-05-13
Matt Redfearn
selftests/seccomp: add MIPS self-test support
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
>
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2016-05-09
Matt Redfearn
MIPS: dma-default: Defend against NULL dev in massage_gfp_flags
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
>
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2016-04-21
Matt Redfearn
genirq: Dont allow affinity mask to be updated on IPIs
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
>
...1461229712-13057-1-git-send-email-
matt.redfearn@imgtec.com
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2016-01-24
Matt Redfearn
MIPS: smp-cps: Ensure secondary cores start with EVA...
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
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2015-10-04
Matt Redfearn
devicetree: Add JZ4760/JZ4775 to Ingenic SoC UART binding
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
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2015-10-04
Matt Redfearn
serial: 8250_ingenic: Enable FIFO for Ingenic UARTs
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
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2015-10-04
Matt Redfearn
serial: 8250_ingenic: Enable hardware flow control
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
>
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2015-08-24
Matt Redfearn
mfd: jz4740-adc: Init mask cache in generic IRQ chip
Signed-off-by: Matt Redfearn <
matt.redfearn@imgtec.com
>
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