Enhanced do_mounts_dm to handle multiple devices

Handling mutliple device-mappers is preperation for adding
the boot cache.

The change to optionally accept <num> fields is a temporary
measure until all scripts supply the <num> fields, then the
code will be changed to make it required.

BUG=chromium-os:25441
TEST=booted stumpy and ran code with a number of tests in a mock
test environment.

Change-Id: I10b9c21d2b76763872a91053db94a8354429f33d
Signed-off-by: Paul Taysom <taysom@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27311
Reviewed-by: Kees Cook <keescook@chromium.org>

CHROMIUM: ARM: exynos: snow: Turn down drive strength for wifi pins

We are seeing EMI from the SDIO clock on Snow.  Turn down the drive
strength of these pins to reduce hard edges on the lines and improve
EMI.  We're not adjusting Daisy settings right now since WiFi is hooked
up differently there and we need extra testing to tell that the drive
strength is safe.

BUG=chrome-os-partner:12151
TEST=Boot on Snow and see WiFi still work.
TEST=Measure EMI and see it reduced.  After applying that CL, EMI is
lower than before(5dB lower at 450MHz/11dB lower at 750MHz).
TEST=Ran wifi test suites (MatFunc, Manager, SecMat) and didn't see
any instability which could be introduced by this CL

Change-Id: Ib979a57710117edc60893c0d32f5b64eeb6cc6db
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29084
Reviewed-by: Tan Gao <tgao@chromium.org>

CHROMIUM: config: exynos: Enable PTN3460 bridge driver

Enable the PTN3460 bridge driver for exynos.

BUG=chrome-os-partner:10829
BUG=chrome-os-partner:11158
BUG=chrome-os-partner:12046
TEST=Tested on snow, screen came up on power-on and resume

Change-Id: I31410f521224b2e3d7e17837e86314c1ed63f0d2
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29346
Reviewed-by: Olof Johansson <olofj@chromium.org>

ARM: exynos: lcd: Remove ptn3460 initialization

Removes PTN3460 bridge initialization code out of the board setup. We
will use the PTN3460 bridge driver to do this instead.

BUG=chrome-os-partner:10829
BUG=chrome-os-partner:11158
BUG=chrome-os-partner:12046
TEST=Tested on snow, screen came up on power-on and resume

Change-Id: I0bd6e57a2e568efc936ddb3102a0b823fe2c2ae9
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29345
Reviewed-by: Olof Johansson <olofj@chromium.org>

CHROMIUM: exynos: dt: Match ptn3460 node bindings

Rename the ptn3460 device tree node to match the bindings documentation
in Documentation/devicetree/bindings/video/ptn3460.txt

BUG=chrome-os-partner:10829
BUG=chrome-os-partner:11158
BUG=chrome-os-partner:12046
TEST=Tested on snow, screen came up on power-on and resume

Change-Id: Ib884fd732272e21bfbc8b42350b9bc49bec08dc1
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29344
Reviewed-by: Olof Johansson <olofj@chromium.org>

auxdisplay/ptn3460: Add driver for NXP PTN3460

Add a new driver to handle the NXP PTN3460 DP/LVDS bridge chip. The
driver currently gets its platform data from device tree. In its current
state, it only supports power up/down using PD_N & RST_N pins.

BUG=chrome-os-partner:10829
BUG=chrome-os-partner:11158
BUG=chrome-os-partner:12046
TEST=Tested on snow, screen came up on power-on and resume

Change-Id: Ic9c7884edfe514ae5ab646b172c4c47352d46276
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29239
Reviewed-by: Olof Johansson <olofj@chromium.org>

ARM: exynos: dp: Remove 90ms bridge delay

Now that the DP driver supports hotplug interrupts, we can get rid of
the 90ms delay and let the DP driver handle any glitching that occurs
because of the bridge.

BUG=chrome-os-partner:10829
BUG=chrome-os-partner:11158
BUG=chrome-os-partner:12046
TEST=Tested on snow, screen came up on power-on and resume

Change-Id: Ieabeeaf81e4e657b91c7996a3ded73dc650eff99
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29146
Reviewed-by: Olof Johansson <olofj@chromium.org>

video/exynos: dp: Enable hotplug interrupts

Enable hotplug interrupts and move the hotplug scheduling into the
interrupt handler. This allows us to introduce a screen at any time
while we're running.

BUG=chrome-os-partner:10829
BUG=chrome-os-partner:11158
BUG=chrome-os-partner:12046
TEST=Tested on snow, screen came up on power-on and resume

Change-Id: I410fe3ffb9ac341a13135c09dbeb9eec8d75beef
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29145
Reviewed-by: Olof Johansson <olofj@chromium.org>

video/exynos: dp: Fix bug when checking dp->irq

Fix a bug where we check !dp->irq instead of the correct check for
-ENXIO.

BUG=None
TEST=None

Change-Id: Ibcdd16fb71eb41e4380ac8911ad6063634ff80e2
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29144
Reviewed-by: Olof Johansson <olofj@chromium.org>

video/exynos: dp: Move hotplug into a workqueue

Move the hotplug related code from probe and resume into a workqueue.
This allows us to initialize the DP driver (and resume it) when there
is no monitor connected.

BUG=chrome-os-partner:10829
BUG=chrome-os-partner:11158
BUG=chrome-os-partner:12046
TEST=Tested on snow, screen came up on power-on and resume

Change-Id: I1cd21d8430541396a376dc31c0be51a29f0560fc
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29143
Reviewed-by: Olof Johansson <olofj@chromium.org>

video/exynos: dp: Improve EDID error handling

EDID error handling has 2 problems:
 - It doesn't fail as early as it can
 - The retry counts for i2c and aux transactions are huge

This patch fails if the initial i2c transaction fails, and reduces the
aux and i2c retry counts down to 3.

BUG=None
TEST=None

Change-Id: I72598c883cfc812b1985f716ba70ac8294e95366
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29302
Reviewed-by: Olof Johansson <olofj@chromium.org>

video/exynos: dp: Fix up a couple return values

Fix the return values of exynos_dp_enable_hw_link_training and
exynos_dp_get_pll_lock_status to reflect what they actually return.

BUG=None
TEST=None

Change-Id: I9d7733b523d42c9de5db48b4d30592092dc40dcd
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29238
Reviewed-by: Olof Johansson <olofj@chromium.org>

rtc: recycle id when unloading a rtc driver

When calling rtc_device_unregister, we are not freeing the id used by the
driver.
So when doing a unload/load cycle for a RTC driver (e.g. rmmod rtc_cmos
&& modprobe rtc_cmos), its id is incremented by one. As a consequence,
we no longer have neither an rtc0 driver nor a /proc/driver/rtc (as it
only exists for the first driver).

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=on x86 platform, rmmod rtc_cmos && modprobe rtc_cmos
and see the new rtc driver is still /sys/class/rtc/rtc0 and
/proc/driver/rtc still exists.

Change-Id: I1b60e25611d30b46a3744d38dc34213db6e21b72
Reviewed-on: https://gerrit.chromium.org/gerrit/29103
Reviewed-by: Derek Basehore <dbasehore@chromium.org>
Tested-by: Derek Basehore <dbasehore@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Olof Johansson <olofj@chromium.org>
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>

CHROMIUM: sysrq: Added Chrome OS specific 'x' key

On Chrome OS systems the magic sysrq x key will cause the following to
happen:
- show processes in blocked state
- emergency file sync
- crash the system

This key combination can be used in the field by users to cause the
system to crash so that crash dumps can be collected to help debug UI
freeze issues.

BUG=chromium-os:33249
TEST=First "echo 0x1000 > /proc/sys/kernel/sysrq", then do the two tests
below:
1. Alt-F10-x should cause the system to crash. Looks for kcrash logs
under /var/spool/crash when the system reboots.
2. All other magic sysrq operation aside from alt-F10-x should be
ineffective.

Change-Id: I62d0a7f0028c072928be0125da4e069bafa5d88c
Signed-off-by: Sameer Nanda <snanda@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29316
Reviewed-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Olof Johansson <olofj@chromium.org>

CHROMIUM: exynos: pwm: Avoid flickers in the PWM when adjusting

When adjusting the PWM we want to avoid using the manual update bit
and avoid stopping / starting the PWM since this can make the LCD
flicker noticibly during the brightness adjustment.  Now we detect
the cases where we actually need to use manual update.

BUG=chrome-os-partner:12186
TEST=Can adjust backlight and don't see any flicker during steps.
TEST=Backlight works after suspend/resume (and has the right
brighness).

Change-Id: I7084d271b8dce70f7bc1baaa07bc2abc91f9551b
Signed-off-by: Simon Que <sque@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29209

Revert "mwifiex: Change some debug logging to info logging"

This reverts commit 5cf9fa2631c7503408174b546fe30dd675ded84d

Turn off the extra debug logging before R22 branches.

Change-Id: I719b494ae361f20e42ee4ec21b1165decd449bed
Reviewed-on: https://gerrit.chromium.org/gerrit/29296
Reviewed-by: Paul Stewart <pstew@chromium.org>
Commit-Ready: Gary Morain <gmorain@chromium.org>
Tested-by: Gary Morain <gmorain@chromium.org>

Add /proc/<pid>/totmaps

BUG=None
TEST=Manual

/proc/<pid>/totmaps is an alternative to /proc/<pid>/smaps. It contains a
summary of all memory displayed in smaps, while hiding the memory page
addresses. Thus, it is possible to access any process's totmaps info.
totmaps also gets the information from the PTEs, like smaps. Furthermore,
it also gives more detailed and accurate information about the memory
usage of a process than statm. The fields available in totmaps are Rss,
totmaps, Shared_Clean, Shared_Dirty, Private_clean, Private_Dirty,
Referenced, Anonymous, AnonHugePages, Swap and Locked.

Sample output:

Rss:                6120 kB
Pss:                3335 kB
Shared_Clean:       1008 kB
Shared_Dirty:       4012 kB
Private_Clean:         4 kB
Private_Dirty:      1096 kB
Referenced:         1812 kB
Anonymous:          5108 kB
AnonHugePages:         0 kB
Swap:                  0 kB
Locked:                0 kB

Change-Id: I4867554c1a4d200d304c3765447977767b7b3c72
Signed-off-by: Thiago Goncales <thiagog@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28731
Reviewed-by: Kees Cook <keescook@chromium.org>

CHROMIUM: exynos: Print out time for firmware + early kernel init on Exynos

This reads the MCT global register which is started by the firmware
very early on to get the approximate amount of time we spend in
firmware and early kernel initialization prior to time-keeping.

BUG=chrome-os-partner:12196
TEST=kernel prints out a reasonable time and /tmp/firmware-boot-time is
not 0

Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Change-Id: I25214fe4cad0de7f29f50a1f4859e663d451f5ed
Reviewed-on: https://gerrit.chromium.org/gerrit/29265
Reviewed-by: Olof Johansson <olofj@chromium.org>
Commit-Ready: Sonny Rao <sonnyrao@chromium.org>
Tested-by: Sonny Rao <sonnyrao@chromium.org>

CHROMIUM: config: exynos5: Disable USB_GADGET

Disabling the USB_GADGET and related support since we are not using it.

BUG=chrome-os-partner:11145
TEST=emerge-daisy chromeos-kernel; tested with usb MSD
and usb HID.

Change-Id: Ie56c90f099253fc53f8ca4b684965bb4f94db6f1
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/27973
Reviewed-by: Doug Anderson <dianders@chromium.org>

UPSTREAM: mwifiex: update max_chan_per_scan correctly for SSID scan

As per recent patch "658f37b mwifiex: scan less channels..."
less channels are scanned per scan command in associated state.

Default number of channels per scan command for normal scan are
already 4, but those are 14 for SSID specific scan operation.

This code change in this patch is required for SSID specific scan.

Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Signed-off-by: Bing Zhao <bzhao@marvell.com>
This patch has been submitted to wireless-testing.git and expected
in upstream shortly.

BUG=chrome-os-partner:11597
TEST=Run autotest WiFiMatFunc.090_BgScanBackoff and pass the test

Change-Id: Ie5decec777e91ca28d36dbe366a7ec6c8677b434
Reviewed-on: https://gerrit.chromium.org/gerrit/29230
Reviewed-by: Sam Leffler <sleffler@chromium.org>
Commit-Ready: Bing Zhao <bzhao@marvell.com>
Tested-by: Bing Zhao <bzhao@marvell.com>

ARM: Exynos: Set 70.25Mhz for pixel clock and adjust snow LCD timings

This patch sets sclk_fimd to 70.25Mhz and
LCD timings are adjusted to get a refresh rate~=60
in both the cases(only LCD and LCD + HDMI).

BUG=chrome-os-partner:11695
TEST=LCD, HDMI and Gscaler are working fine on snow.

Change-Id: Ie301fcb2e4f3e16610a24cac756c2b63cf4e2fa7
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/28938
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Commit-Ready: Doug Anderson <dianders@chromium.org>

exynos: drm: Use sclk_vpll as source for sclk_fimd

Use sclk_vpll as source instead of mout_mpll_user
for sclk_fimd in order to set fractional values
for pixel clock by using VPLL as source.

BUG=chrome-os-partner:11695
TEST=LCD, HDMI and Gscaler are working fine on snow.

Change-Id: I0350dd1e4941364b3018e522c7beca6e4357f045
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/28937
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Commit-Ready: Doug Anderson <dianders@chromium.org>

ARM: Exynos: Add clock_ops callbacks for clk_fout_vpll and set VPLL to 281MHz

VPLL was set in u-boot to 300Mhz.
We add set_rate and get_rate callback for clk_fout_vpll
in order to set VPLL to 281Mhz.

BUG=chrome-os-partner:11695
TEST=LCD, HDMI and Gscaler are working fine on snow.

Change-Id: Idac1be4608336b09f4fcacf076e22ec73bbc35a8
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/28385
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Commit-Ready: Doug Anderson <dianders@chromium.org>

CHROMIUM: x86: smp: don't send NMI while stopping CPUs

There have been an increasing number of reports of systems freezing.
The kernel watchdogs are not causing reboots.

While debugging NMI watchdog issues couple of months back I had noticed
that the new code that sends NMIs to other CPUs can cause lockups since
the perf counter NMI handler also gets executed in this path.  The perf
counter handler is a _lot_ of code to be executing when the CPUs are
being stopped especially in panic situations.

Setting smp_no_nmi_ipi to true to see if this helps bring down the
system freezing reports and also hopefully provides us stack traces to
debug the root cause of the panics.

BUG=chromium-os:32987
TEST="echo bug > /proc/breakme" and check that kcrash files are
generated correctly.

Change-Id: I276ea6c6918ab05714692bd614e7dfe179a4d32a
Signed-off-by: Sameer Nanda <snanda@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29085
Reviewed-by: Mandeep Singh Baines <msb@chromium.org>
Reviewed-by: Puneet Kumar <puneetster@chromium.org>

CHROMIUM: sysrq: treat F10 as magic sysrq key

Chrome OS keyboards don't have a sysrq key. This means we lose magic
sysrq functionality on systems that don't have external USB keyboards
attached to them, i.e., default configuration for Chromebooks.

This change treats F10 key as sysrq key for sysrq filtering purposes.
With this change in place, as an example, alt-F10-c will cause a kernel
crash, reboot system and generate a kcrash file.

Note that this change only impacts systems in dev mode since the sysrq
functionality is only enabled in dev mode currently.

BUG=chromium-os:32987
TEST=hit 'alt-F10-c' key combination.  This should cause a kernel panic
and the system will reboot.  Kernel crash file will be be present under
/var/spool/crash.

Change-Id: Ic795023927f4411964a2040ff407dc115e0960ec
Signed-off-by: Sameer Nanda <snanda@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29110
Reviewed-by: Puneet Kumar <puneetster@chromium.org>
Reviewed-by: Mandeep Singh Baines <msb@chromium.org>

UPSTREAM: mwifiex: correction in mcs index check

mwifiex driver supports 2x2 chips as well. Hence valid mcs values
are 0 to 15. The check for mcs index is corrected in this patch.

For example: if 40MHz is enabled and mcs index is 11, "iw link"
command would show "tx bitrate: 108.0 MBit/s" without this patch.
Now it shows "tx bitrate: 108.0 MBit/s MCS 11 40Mhz" with the patch.

Cc: "3.2.y, 3.3.y, 3.4.y" <stable@vger.kernel.org>
Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Signed-off-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
BUG=chrome-os-partner:12190
TEST=Build and run autotest WiFiMatFunc, WiFiSecMat, WiFiManager, WiFiPerf

Change-Id: I4ec246b8d8e9a1f36eb3caa4438e19076dc3f8bd
Reviewed-on: https://gerrit.chromium.org/gerrit/29094
Reviewed-by: Sam Leffler <sleffler@chromium.org>
Tested-by: Bing Zhao <bzhao@marvell.com>
Commit-Ready: Bing Zhao <bzhao@marvell.com>

UPSTREAM: mwifiex: wakeup main thread to handle command queued

We miss to wakeup main thread after adding command to cmd pending
queue at follwing places. These commands are handled later when
main thread is woken up for handling an interrupt for sleep event
from firmware. This adds worst case delay of 50msec.

1) We don't wakeup main thread when asynchronous command is added
to cmd pending queue. Move queue_work() call from
mwifiex_wait_queue_complete() to mwifiex_send_cmd_async() to wakeup
main thread for sync as well as async commands.

2) Scan operation is triggered due to following reasons
   a) request from user (ex. "iw scan" command)
   b) Scan performed by driver internally.
   In first case main thread is woken up when first scan command is
queued in cmd pending queue (we don't need to wakeup main thread for
subsequent scan commands, because they are queued in scan command
response handler), but it is not done for second case. queue_work()
is moved inside mwifiex_scan_networks() to handle both the cases.

Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
BUG=chrome-os-partner:12190
TEST=Build and run autotest WiFiMatFunc, WiFiSecMat, WiFiManager, WiFiPerf

Change-Id: I0578930c86224c382fa4ae25e0b0d7fc3887c93e
Reviewed-on: https://gerrit.chromium.org/gerrit/29093
Reviewed-by: Sam Leffler <sleffler@chromium.org>
Tested-by: Bing Zhao <bzhao@marvell.com>
Commit-Ready: Bing Zhao <bzhao@marvell.com>

UPSTREAM: mwifiex: wake up main thread to handle Tx traffic if scan is delayed/aborted

This is a flaw in recently implemented logic to handle Tx traffic
and scan operation simultaneously. We missed to wakeup main thread
to handle Tx traffic if scan is delayed/aborted.

For some cards (SD8797, for example), firmware will send SLEEP event
if there is no activity for 50msec. While handling the SLEEP event,
main thread will be woken up and Tx packet gets sent hence. In worst
case Tx traffic will be delayed for 50msec.

For other cards, such as USB8797, firmware won't send SLEEP event.
So, Tx traffic gets stuck if no other event triggers the wakeup of
main thread.

This patch fixes above issues.

Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Signed-off-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
BUG=chrome-os-partner:12190
TEST=Build and run autotest WiFiMatFunc, WiFiSecMat, WiFiManager, WiFiPerf

Change-Id: I0f60e30639fe531b554fde32a6bb55303abb0fb4
Reviewed-on: https://gerrit.chromium.org/gerrit/29092
Reviewed-by: Sam Leffler <sleffler@chromium.org>
Tested-by: Bing Zhao <bzhao@marvell.com>
Commit-Ready: Bing Zhao <bzhao@marvell.com>

UPSTREAM: mwifiex: fix wrong return values in add_virtual_intf() error cases

commit 858faa57dd9e2b91f3f870fbb1185982e42f5a2b upstream

add_virtual_intf() needs to return an ERR_PTR(), instead of NULL,
on errors, otherwise cfg80211 will crash.

Reported-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
BUG=chrome-os-partner:12190
TEST=Build and run autotest WiFiMatFunc, WiFiSecMat, WiFiManager, WiFiPerf

Change-Id: I90c07d50d50f25476a0495b3beff6a9b3f74226d
Reviewed-on: https://gerrit.chromium.org/gerrit/29091
Reviewed-by: Sam Leffler <sleffler@chromium.org>
Tested-by: Bing Zhao <bzhao@marvell.com>
Commit-Ready: Bing Zhao <bzhao@marvell.com>

UPSTREAM: mwifiex: fix WPS eapol handshake failure

commit f03ba7e9a24e5e9efaad56bd1713b994ea556b16 upstream.

After association, STA will go through eapol handshake with WPS
enabled AP. It's observed that WPS handshake fails with some 11n
AP. The reason for the failure is that the eapol packet is sent
via 11n frame aggregation.

The eapol packet should be sent directly without 11n aggregation.

This patch fixes the problem by adding WPS session control while
dequeuing Tx packets for transmission.

Signed-off-by: Stone Piao <piaoyun@marvell.com>
Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
BUG=chrome-os-partner:12190
TEST=Build and run autotest WiFiMatFunc, WiFiSecMat, WiFiManager, WiFiPerf

Change-Id: I19c6250f8d63e1c9c7440d95d8d09fc16f6393b2
Reviewed-on: https://gerrit.chromium.org/gerrit/29090
Reviewed-by: Sam Leffler <sleffler@chromium.org>
Tested-by: Bing Zhao <bzhao@marvell.com>
Commit-Ready: Bing Zhao <bzhao@marvell.com>

UPSTREAM: mwifiex: fix 11n rx packet drop issue

commit 925839243dc9aa4ef25305f5afd10ed18258a4ac upstream.

Currently we check the sequence number of last packet received
against start_win. If a sequence hole is detected, start_win is
updated to next sequence number.

Since the rx sequence number is initialized to 0, a corner case
exists when BA setup happens immediately after association. As
0 is a valid sequence number, start_win gets increased to 1
incorrectly. This causes the first packet with sequence number 0
being dropped.

Initialize rx sequence number as 0xffff and skip adjusting
start_win if the sequence number remains 0xffff. The sequence
number will be updated once the first packet is received.

Signed-off-by: Stone Piao <piaoyun@marvell.com>
Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Kiran Divekar <dkiran@marvell.com>
Signed-off-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
BUG=chrome-os-partner:12190
TEST=Build and run autotest WiFiMatFunc, WiFiSecMat, WiFiManager, WiFiPerf

Change-Id: I787cbd42acff6350cb617a339a0ae5ecfcb69b97
Reviewed-on: https://gerrit.chromium.org/gerrit/29089
Reviewed-by: Sam Leffler <sleffler@chromium.org>
Tested-by: Bing Zhao <bzhao@marvell.com>
Commit-Ready: Bing Zhao <bzhao@marvell.com>

CHROMIUM: config: exynos5: Enable ADC and thermistor

Enable support for Samsung's s3c-adc driver and NTC thermistor
driver.

BUG=chrome-os-partner:11688
TEST=Can now see this in dmesg:
  [    0.863241] s3c-adc 12d10000.adc: attached adc driver
TEST=With a future CL can cat the sysfs entry for each hwmon
representing the thermistors
  localhost ~ # cat /sys/class/hwmon/hwmon1/device/temp1_input
  61542

Change-Id: Icebed0b8105dbc589b1782cac525bc24181ba7b0
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28940

CHROMIUM: config: Renormalize splitconfig

Just ran: ./chromeos/scripts/kernelconfig oldconfig
...and hit return for everything.  AKA: no functional change
here, this just tells us where we are.

BUG=None
TEST=Compiled and booted on one device.

Change-Id: I6990037f07bb983ff9f47e8db9c3c9dc5651de71
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29046
Reviewed-by: Olof Johansson <olofj@chromium.org>

ARM: cros5250: Setup the regulator for the adc

We can now specify the regulator of the adc in the device tree.  That
means we don't need to name the regulator "vdd" and can instead call
it something more meaningful like "vdd_1v8".

BUG=chrome-os-partner:11688
TEST=After enabling ADC config I can see this in dmesg.
  [    0.863241] s3c-adc 12d10000.adc: attached adc driver
TEST=Suspend/resume works.

Change-Id: I5b0e9d7ea3a296d6cd7d608071b378d15e7967ec
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28987
Reviewed-by: Olof Johansson <olofj@chromium.org>

arm: cros5250-common: use always-on option for vdd regulator

The adc driver uses this regulator and it calls regulator_enable() and
regulator_disable().  Once it does that set of calls the vdd_1v8 rail
will turn off (although it was on at boot).  That's not so good since
the 1v8 rail is used by lots of components and needs to be on all the
time.

We'll change the regulator to be always on.

BUG=chrome-os-partner:11688
TEST=powerd_suspend then press power button; device wakes up

Change-Id: I7ef30b88746e86d331b06d927569f88f20d9593b
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28939
Reviewed-by: Olof Johansson <olofj@chromium.org>

arm: exynos5: dts: Add adc to device tree

Having the ADC in the device tree allows us to properly specify its
regulator among other benefits.

Note that this needs a followon CL to add the regulator to the device
trees of individual boards.

BUG=chrome-os-partner:11688
TEST=In next CL I add dts definition to board then I see in dmesg:
  [    0.863241] s3c-adc 12d10000.adc: attached adc driver

Change-Id: Id1f6e6687ce7f86e76124559a258a9f9c2792565
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28986
Reviewed-by: Olof Johansson <olofj@chromium.org>

arm: exynos5: Remove platform device for adc

Removing the platform registration of the ADC device in preparation
for moving to device tree.

This is a partial revert of https://gerrit.chromium.org/gerrit/27151
AKA 7fae83c9d8c927c77f4aff21eb744e1f46ca2cf5, which added the
platform registration.

Things still left from the original change:
* Physical address still left in map.h.  This is harmless and actually
  seems beneficial.
* Still doing the enabling power by mucking with S5P_ADC_PHY_CONTROL.
  This is ugly and should idelaly be cleaned up in a followon CL.
* Still left change to get platform_get_irq(pdev, 0) instead of 1.
  I did a print out and saw that it was getting 138 which seems to
  correspond to adc0.

BUG=chrome-os-partner:11688
TEST=In follow-on CLs I add dts definitions and still see ADC come up
in dmesg.

Change-Id: I3683d6d71b3eb19243d89c0b650540fbab602c2c
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28985
Reviewed-by: Olof Johansson <olofj@chromium.org>

samsung: adc: Add device tree support

Add device tree probe support for Samsung's adc driver.

BUG=chrome-os-partner:11688
TEST=In follow-on CLs I add dts definitions and remove platform
definitions and still see ADC come up in dmesg.

Change-Id: I42a428949a48829b2c4dc1290f4757a25bda2892
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28984
Reviewed-by: Olof Johansson <olofj@chromium.org>

CHROMIUM: config: enable mali syfs support

Turn on CONFIG_T6XX_DEBUG_SYS for sysfs support and CONFIG_T6XX_DVFS_FREQ_LOCK
for the ability to lock the dvfs frequency.  Temporary for debugging.

Signed-off-by: Sam Leffler <sleffler@chromium.org>
BUG=chrome-os-partner:11795
TEST=boot and check sysfs files are present

Change-Id: If8fe7fbfb884ec7e01ec4427b8c31a754d6625ca
Reviewed-on: https://gerrit.chromium.org/gerrit/28527
Commit-Ready: Sam Leffler <sleffler@chromium.org>
Tested-by: Sam Leffler <sleffler@chromium.org>
Reviewed-by: Sam Leffler <sleffler@chromium.org>

CHROMIUM: regulator: Add device tree node for max77686

This just passes the device tree node to regulator_register() which
allows get_regulator() to work when supplies are defined in the device
tree.

NOTE: The maxim77686 driver has changed significantly upstream so this
is not easily posted upstream.  Hopefully the code there has already
been fixed.

BUG=chrome-os-partner:11688
TEST=In follow-on CLs I have specified supplies in the device tree.
Before this change that didn't work for max77686 provided supplies.
After this change that works.

Change-Id: I93a46db7e80910a8a98ac89c93e1291b96f97dad
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28983
Reviewed-by: Olof Johansson <olofj@chromium.org>

ARM MALI: Cleanup sysfs support.

Promote T6XX_DEBUG_SYS and T6XX_DVFS_FREQ_LOCK (renamed from T6XX_FREQ_LOCK)
to real config knobs and fixup the associated code:

o conditionally compiled sysfs files are now present only when configured
o dvfs on/off uses existing routines to control dvfs support instead of
  directly frobbing internal state
o add kbasep_pm_metrics_isactive instead of inspecting internal state
  (sometimes incorrectly; e.g. metrics.timer.active instead of
  metrics.timer_active)
o fix signed/unsigned badness in dvfs freq lock stuff
o fix set_clock to identify why something fails and remove the clock wait
  logic that is already done in kbase_platform_dvfs_set_clock
o static'ize CONFIG_T6XX_DVFS_FREQ_LOCK functions used only in the file
o rename sysfs helper functions
o make clkout write accept any value (instead of requiring "3d")
o checkpatch complaints

Signed-off-by: Sam Leffler <sleffler@chromium.org>
BUG=none
TEST=build w/ each combination of config knobs; check r/w of each sysfs file

Change-Id: Iae7ae43cef66e54ffc89d71b1d8fa1e9135acf74
Reviewed-on: https://gerrit.chromium.org/gerrit/28340
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Gabriele Paoloni <gabriele.paoloni@arm.com>
Commit-Ready: Sam Leffler <sleffler@chromium.org>
Reviewed-by: Sam Leffler <sleffler@chromium.org>
Tested-by: Sam Leffler <sleffler@chromium.org>

CHROMIUM: config: switch BATTERY_SBS to module on exynos

Battery init is 300ms on critical boot path, so moving it to a module
helps overall boot time.

BUG=chrome-os-partner:11403
TEST=boot

Change-Id: Ia52fe5942c97816a4f8c2e443a3726fe86ed9591
Signed-off-by: Olof Johansson <olof@lixom.net>
Reviewed-on: https://gerrit.chromium.org/gerrit/28919
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Simon Que <sque@chromium.org>
Commit-Ready: Olof Johansson <olofj@chromium.org>
Reviewed-by: Olof Johansson <olofj@chromium.org>

CHROMIUM: USB: DWC3: Disabling gadget support for DWC3

This patch removes the dependency of USB_DWC3 on USB_GADGET
and further disables the gadget support and related features
in dwc3 since we are not using it.

BUG=chrome-os-partner:11145
TEST=emerge-daisy chromeos-kernel; tested with usb MSD and usb HID.

Change-Id:I269ab2aee26e913cc06f2dbbc9c7ac9ef6b2cbac
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/27751
Reviewed-by: Doug Anderson <dianders@chromium.org>

exynos: dp: Fix incorrect setting for INT_CTL

Actually, there is INT_POL0 and INT_POL1 and not INT_POL.
We enable 2 bits INT_POL0 and INT_POL1 for DP on Exynos5.

BUG=chrome-os-partner:10537
TEST=Tested on DVT. Saw chromium splash screen.

Change-Id: Iff88592bc965ec40a62df72924ce884dbd906b25
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/28695
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>

CHROMIUM: cfg80211: Clear "beacon_found" on regulatory restore

Restore the default state to the "beacon_found" flag when
the channel flags are restored.  Otherwise, we can end up
with a channel that we can no longer transmit on even when
we can see beacons on that channel.

Signed-off-by: Paul Stewart <pstew@chromium.org>
BUG=chrome-os-partner:12087
TEST=Rerun network_WiFiMatFunc.004CheckHiddenSSID 10 times.
Monitor channel flags in "iw list" for a passive-only channel.

Change-Id: Ief2762e08d236a0ac60cb00b96eafc3b23af75f2
Reviewed-on: https://gerrit.chromium.org/gerrit/28996
Reviewed-by: Gary Morain <gmorain@chromium.org>
Commit-Ready: Paul Stewart <pstew@chromium.org>
Tested-by: Paul Stewart <pstew@chromium.org>

CHROMIUM: tpm: tpm_tis_i2c: switch to workqueue for tpm self test

Moving to a workqueue means that the rest of boot can continue. It's
just important to make sure the selftest has actually completed before
any reads/writes are done.

BUG=chrome-os-partner:11403
TEST=tpm test suite

Change-Id: I5c12f3db88ac6ddaa8d5caeb0aa2a56a550cc267
Signed-off-by: Olof Johansson <olofj@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28915
Reviewed-by: Doug Anderson <dianders@chromium.org>

CHROMIUM: config: disable serial on exynos by default

Serial slows down boot, besides there will be no accessible serial port on actual
devices.

BUG=chrome-os-partner:11403
TEST=boot

Change-Id: If7a0f19a299c1f220ddfc95294caea6ff98ef7c3
Signed-off-by: Olof Johansson <olofj@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28921
Reviewed-by: Doug Anderson <dianders@chromium.org>

CHROMIUM: video: exynos: move dp configuration to a workqueue

This speeds up boot significantly, since it can take up to a second to
get the display up and going, and we want to keep on booting (through
some userspace) while that happens.

BUG=chrome-os-partner:11403
TEST=boot

Change-Id: I88a287d427b870c0521aa0c9aec79fd6d943233e
Signed-off-by: Olof Johansson <olof@lixom.net>
Reviewed-on: https://gerrit.chromium.org/gerrit/28918
Reviewed-by: Olof Johansson <olofj@chromium.org>
Tested-by: Olof Johansson <olofj@chromium.org>
Commit-Ready: Olof Johansson <olofj@chromium.org>

CHROMIUM: video: exynos: remove redundant parameters

They're not needed.

BUG=none
TEST=build

Change-Id: I3b879e5093ff93d41c0225fb3a92dbf4996ae2c6
Signed-off-by: Olof Johansson <olof@lixom.net>
Reviewed-on: https://gerrit.chromium.org/gerrit/28917
Reviewed-by: Olof Johansson <olofj@chromium.org>
Tested-by: Olof Johansson <olofj@chromium.org>
Commit-Ready: Olof Johansson <olofj@chromium.org>

CHROMIUM: input: cyapa: switch to async_schedule for detect and start

This speeds up boot since it's one of the long init functions.

BUG=chrome-os-partner:11403
TEST=boot

Change-Id: I7d005f95656510164b2368196b6b94884e77fc56
Signed-off-by: Olof Johansson <olofj@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28916
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Benson Leung <bleung@chromium.org>

ARM: exynos: backlight: Init the backlight high

Initialize the backlight enable pin high so we don't drop the backlight
between u-boot and kernel.

BUG=None
TEST=Tested on snow, verified backlight was maintained through boot

Change-Id: I0bb7ee36277059f21821012ba255ed07fcaa0842
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28990
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Olof Johansson <olofj@chromium.org>

CHROMIUM: ALSA: hda/realtek - Ignore mic sense without headphones on Parrot.

Add an automic and automute hook for Parrot.  The mic hook checks if the
headphones are attached before checking the mic sense.  The mic sense
for Parrot reports "attached" when the combo jack is empty, this change
causes that to be ignored.  The automute hook is added so that the mic sense
will be checked when headphones state changes.

BUG=chrome-os-partner:11254
TEST=Call the echo bot with parrot plug/unplug headsets and mics.

Change-Id: Iee6c1a41c98b0829f6254ec2f9eacbead40d1468
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28869
Reviewed-by: Olof Johansson <olofj@chromium.org>

CHROMIUM: ALSA: hda/realtek - Add automic hook.

This hook mirrors the automute hook functionality, but for input
selection instead of output selection.  The hook will be used allow for
board specific mic routing behaviour.  On some machines the mic sense
signal is only valid if headphones are attached, this will allow for a
hook to filter mic sense events based on headphone jack state.

BUG=chrome-os-partner:11254
TEST=plug/unplug mic on parrot.

Change-Id: I01168baaa9ad9ee449eb8c2ac93e585f77f16065
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28844
Reviewed-by: Olof Johansson <olofj@chromium.org>

drm/exynos: pageflip_event_list accesses must be protected

We manipulate the list in a number of places and they are all protected
except for exynos_drm_crtc_page_flip.

BUG=none
TEST=Many Planets Deep

Change-Id: I715492631e2f0018182b8fc9856a469a565d903f
Reviewed-on: https://gerrit.chromium.org/gerrit/28868
Commit-Ready: Mandeep Singh Baines <msb@chromium.org>
Reviewed-by: Mandeep Singh Baines <msb@chromium.org>
Tested-by: Mandeep Singh Baines <msb@chromium.org>

drm/exynos: HACK: return an error when flip called with event flag

The event flag to the page_flip ioctl is optional. If it is set,
an event will be sent to the drm fd after page flip is complete.
Otherwise, no event is sent after page flip. The exynos implementation
was doing nothing if the event flag was not set. This would
break any application expecting a page flip to happen. Rather than
do nothing (which is incorrect behavior), we'll now return and log
an error.

Rather than silently breaking applications, we'll return and log
an error so that we can detect anything that's broken.

This also removes one level of indenting, making the code easier to
read.

BUG=none
TEST=Verified that no errors were logged.

Change-Id: I31af40a392c89ea4386bfe38c00d79979aa9dc0b
Signed-off-by: Mandeep Singh Baines <msb@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28853

drm/exynos: Use 4WORD burstlen for cursorfb <= 64

BUG=chrome-os-partner:12016
TEST=run on snow and see no hwcursor tearing while perf is
still the same (on many planets

Change-Id: I1d354f6ab9729eb50b37acfb2349ef4f2da49375
Signed-off-by: Anush Elangovan <anush@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28824
Reviewed-by: Abhinav Kochhar <abhinav@chromium.org>
Tested-by: Abhinav Kochhar <abhinav@chromium.org>
Tested-by: Anush Elangovan <anush@google.com>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Commit-Ready: Anush Elangovan <anush@google.com>

gpio: samsung: Clarify gpio powerdown-settings values

Clarify the 0 value for powerdown-settings to indicate it preserves
previously set values.

BUG=None
TEST=Kernel still compiles

Change-Id: I1b3373bad1b5f687cfa08060e5ab388610419639
Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28847
Reviewed-by: Doug Anderson <dianders@chromium.org>

CHROMIUM: Input: atmel_mxt_ts : Expose T38 object in debugfs

We plan to use T38 (MXT_SPT_USERDATA object) to store device
specific information (e.g. sensor pattern information). This
CL exposes the T38 in debugfs so the userspace can query it to
get the device specific information.

Signed-off-by: Yufeng Shen <miletus@chromium.org>
BUG=chrome-os-partner:12059
TEST=cat /sys/kernel/debug/atmel_mxt_ts/2-004a/object
     and check that T38 data is present.

Change-Id: Ie773be9c7a1b7132aa51fd99021f426fe98960bb
Reviewed-on: https://gerrit.chromium.org/gerrit/28838
Reviewed-by: Benson Leung <bleung@chromium.org>
Commit-Ready: Yufeng Shen <miletus@chromium.org>
Tested-by: Yufeng Shen <miletus@chromium.org>

Revert "drm/exynos: Check for null dev_priv and return"

This reverts commit 622b68598331d185f0c4e2cea1926f97e30a1676.

The reverted change did not actually fix the bug (since root-caused).
The change also introduced a compile warning.

BUG=none
TEST=Booted.

Change-Id: If6e5af465fcc0f6c512e0f795a8d91ad3b587906
Signed-off-by: Mandeep Singh Baines <msb@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28850
Reviewed-by: Anush Elangovan <anush@google.com>

CHROMIUM: tpm: Fix wrong parameter type warning in tpm_continue_selftest

Fix an incorrect typecast that was generating a warning calling
tpm_transmit_cmd

This warning was introduced in a CL that diverged from mainstream
so no change to upstream.

BUG=None
TEST=Compiler warnings went away, suspend/resume on snow works, trybot
  run.

Change-Id: I0ce191e74da1532ff04bf4b639dc2fb4ee448d48
Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28815
Reviewed-by: Olof Johansson <olofj@chromium.org>

CHROMIUM: tpm: Cleanup missing newlines in string constants

A few dev_info strings are missing terminating newlines. Fix them.

Upstream does not have these strings in them so not upstreaming.

BUG=None
TEST=Booted, saw log message with proper newline

Change-Id: I77db2516e450de609cfb7e1608dc4e33113abca0
Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28814
Reviewed-by: Olof Johansson <olofj@chromium.org>

arm: exynos5: Pull i2c busses high on suspend

Set the i2c busses to be configured as input pins pulled up
on suspend.

BUG=chrome-os-partner:11846
TEST=Multiple suspend/resumes.  Ensure i2c devices aren't confused
Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Change-Id: Iec2a7fb856e67b32b5ffa813880a9ceba99f1ed8
Reviewed-on: https://gerrit.chromium.org/gerrit/28640
Reviewed-by: Olof Johansson <olofj@chromium.org>
Commit-Ready: Jon Kliegman <kliegs@chromium.org>
Tested-by: Jon Kliegman <kliegs@chromium.org>

gpio: samsung: add flags for suspend conditions for gpios

On suspend, gpio lines are driven active low by default.  This
extends the flags field for samsung,exynos4-gpio compatible
gpio chips to support specifying the suspend state of its gpios.

In addition modifying the saving of GPIO registers to only save
the CONPDN and PUDPDN registers for chips that indicate they support
it.

The information is passed through a new powerdown-settings property
in the GPIO chip configuration.  It specifies the state during powerdown
of each individual gpio as:
     0 - Use existing
     1 - Float (input, no PU/PD)
     2 - Pull up (input)
     3 - Pull down (input)
     4 - Output high
     5 - Output low

BUG=chrome-os-partner:11846
TEST=Suspend/resume multiple times, confirm state of pins
  from interaction with other components.
  Insert bad values, confirm proper error handling.
Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Change-Id: Ife5e9070eaaf1fb5feec2d70623fddc5aea48613
Reviewed-on: https://gerrit.chromium.org/gerrit/28639
Reviewed-by: Olof Johansson <olofj@chromium.org>
Commit-Ready: Jon Kliegman <kliegs@chromium.org>
Tested-by: Jon Kliegman <kliegs@chromium.org>

Revert "CHROMIUM: config: exynos5: Enable ADC and thermistor"

This reverts commit e3129054ac44022520e24c8948084de87a7d7a74

With this change in the tree suspend now causes the system to shutdown.

Change-Id: Iba2dca6349228fc0d3ef923c89b1a0c5b8091592
Reviewed-on: https://gerrit.chromium.org/gerrit/28739
Commit-Ready: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>

Revert "Revert "drm/exynos: KDS fix for performance at vsync""

There is a race condition when we try to handle event from KDS callback.
When guest mode resumes, there is a cleanup of buffers and drm driver is closed. At this time if we were in the irq handler then we may crash while accessing the event list which would have been destroyed in close().
Need to add events in page_flip ioctl where spin locks ensure there is no race condition.

This reverts commit 7f639dfd3c1e7707cf31985a04f39b4e6b306e52

Change-Id: Ib9c1eaa71dc133949343fbd44ed7b3a9e6079df1
Reviewed-on: https://gerrit.chromium.org/gerrit/28732
Reviewed-by: Pawel Osciak <posciak@google.com>
Commit-Ready: Anush Elangovan <anush@google.com>
Tested-by: Anush Elangovan <anush@google.com>

ARM: exynos: dp: Move bridge init into phy init

Move the eDP bridge initialization code into the dp phy init function so
we run it both on startup and on resume. As a side-effect of this
change, we need to wait 90ms so we know the bridge chip has come out of
reset since the phy init is much closer to the HPD loop.

BUG=chrome-os-partner:11908
TEST=Tested on DVT and PVT snow

Change-Id: I3522b8aacd4a8cebc8bc230e81fe23b9afae02f2
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28626
Reviewed-by: Doug Anderson <dianders@chromium.org>

drm/exynos: dp: Lower AUX failure messages to dbg

Change the level of Aux Transaction fail messages from error to debug.
We retry the transactions a few times and will report errors if
warranted outside of this function.

BUG=chrome-os-partner:11908
TEST=Tested on PVT and DVT snow

Change-Id: I8b636890d02d7e77308d78a3165925b7b7728fa1
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28625
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>

ARM: exynos: snow: dts: Set DP gpios as outputs

Properly set the DP bridge gpios outputs in the snow device tree
file.

BUG=chrome-os-partner:11908
TEST=Tested on snow, ensured display came up properly

Change-Id: Idef088242557dc5c396190eb815e93fab58f4429
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28728
Reviewed-by: Doug Anderson <dianders@chromium.org>

UPSTREAM: Input: gpio_keys - report a wakeup_event for a button press

In order to avoid races with suspend, a wakeup event must register as
such by calling pm_wakeup_event() or pm_stay_awake().  This will ensure
that the current suspend cycle aborts.

When the user-space visible event is created in the interrupt handler
(gpio_keys_irq_isr), a simple pm_wakeup_event() with no delay is
sufficient as suspend will synchronise with all interrupt delivery.

When the user-space visible event is created later
(gpio_keys_gpio_isr), we need to bracket the event with
pm_stay_awake() and pm_relax().

Signed-off-by: NeilBrown <neilb@suse.de>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
(cherry picked from commit 032169f6513ccf83f9ba30969528c48ee0555df6)
Signed-off-by: Benson Leung <bleung@chromium.org>
BUG=chrome-os-partner:11869
TEST=stop powerm
watch -n 0.1 cat /sys/power/wakeup_count
press the power button. close and open the lid.
Ensure that the wakeup_count rises on those inputs.
echo disabled > /sys/devices/gpio-keys.9/power/wakeup
watch -n 0.1 cat /sys/power/wakeup_count
Ensure that the wakeup_count does not rise with the wakeup disabled.

Change-Id: I8a700d8be0d3c6eda06afc3ee7047de5769ad953
Reviewed-on: https://gerrit.chromium.org/gerrit/28712
Reviewed-by: Olof Johansson <olofj@chromium.org>
Commit-Ready: Benson Leung <bleung@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>

CHROMIUM: i2c-i801: enable irq for Panther Point

Enable irq for byte by byte and block transactions on
Panther Point PCH as well as Cougar Point.

Signed-off-by: Benson Leung <bleung@chromium.org>
BUG=chrome-os-partner:11958
TEST=cat /proc/interrupts on parrot and link systems.
Check that i801_smbus appears on list of interrupts.
test smbus cyapa (parrot):
 1) is detected on both warm and cold boot.
 2) fw update takes ~15 seconds (was 95 sec)

Change-Id: Iae81aec7cdaadc9e385d82efb6a8d7068e637a77
Reviewed-on: https://gerrit.chromium.org/gerrit/28721
Reviewed-by: Olof Johansson <olofj@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Commit-Ready: Benson Leung <bleung@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>

HACK: tpm: Resume tpm chip after suspend

The tpm chip is being reset accidentally on suspend/resume.  As
a temporary fix while more secure solutions are being worked on,
resume the tpm in the driver instead of firmware.

TEST=tpmc rand 5 worked post-resume.
BUG=chrome-os-partner:11639

Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Change-Id: I84ff9858e60d0c8d45b96bca28b483d13a2a4271
Reviewed-on: https://gerrit.chromium.org/gerrit/28534

ARM: SAMSUNG: Save drive and powerdown gpio registers

On suspend the GPIOs are all set based on GPxxCONPDN and
GPxxPUDPDN registers.  Make sure these get saved and restored.

Save the GPxxDRV registers as well.

BUG=chrome-os-partner:11846
TEST=Did multiple suspends, confirmed configured gpios
  stayed correct.
  Visually confirmed from debug output DRV register persists.
Signed-off-by: Jonathan Kliegman <kliegs@chromium.org>
Change-Id: I600ed0a201e28873f5454d65ef092affe46b5716
Reviewed-on: https://gerrit.chromium.org/gerrit/28619
Commit-Ready: Jon Kliegman <kliegs@chromium.org>
Reviewed-by: Jon Kliegman <kliegs@chromium.org>
Tested-by: Jon Kliegman <kliegs@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>

CHROMIUM: config: exynos5: Enable ADC and thermistor

Enable support for Samsung's s3c-adc driver and NTC thermistor
driver.

BUG=chrome-os-partner:11688
TEST=With future CL to add thermistors, can cat the sysfs
entry for each hwmon representing the thermistors:
  localhost ~ # cat /sys/class/hwmon/hwmon1/device/temp1_input
  61542

Change-Id: Ia0cc8b8e9cb27e00699531c22f3d691518d7e9be
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27152

CHROMIUM: ARM: cros5250: add vdd regulator

This is used by the ADC driver (among other things) which probes
regulator "vdd". Adding the same under MAX77686.

BUG=chrome-os-partner:11688
TEST=BUCK5 value is configured as per the schematics

Change-Id: Ic1b1efc7455f1f788657984df72e2587e6fdaaf6
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Naveen krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27148
Reviewed-by: Olof Johansson <olofj@chromium.org>

CHROMIUM: ath9k: Do not divide by zero cycle counter

cc_rxpoll.cycles can be zero under certain circumstances.
Skip this round of rx hang detection when this happens.

Signed-off-by: Paul Stewart <pstew@chromium.org>
BUG=chromium-os:32956
TEST=Reboot system.  Still waiting to see this message.

Change-Id: Id0a6d4b01137af4c36a27424615c30c52ed05fd8
Reviewed-on: https://gerrit.chromium.org/gerrit/28642
Reviewed-by: Simon Que <sque@chromium.org>
Reviewed-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Reviewed-by: Darin Petkov <petkov@chromium.org>
Commit-Ready: Paul Stewart <pstew@chromium.org>
Tested-by: Paul Stewart <pstew@chromium.org>

gpu: vithar: Set aclk_400_g3d as the source for GPU

To run at 533MHz set aclk_400_g3d to be the source clock
for the GPU.

BUG=chrome-os-partner:11853
TEST=Verify that "cat /sys/devices/platform/mali-t604.0/clock shows
     533 MHz (after applying Sam Leffler's Iae7ae43c: ARM MALI:
     Cleanup sysfs support.)

Change-Id: If018bddbdf77d33192b2ebda9eb37584e45767c6
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/28671
Reviewed-by: Anush Elangovan <anush@google.com>
Commit-Ready: Anush Elangovan <anush@google.com>
Tested-by: Anush Elangovan <anush@google.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>

arm: exynos5: Fix the g3d clock hierarchy

As per Pg445 of Exynos_5250_SCP_UM_REV1.00, to setup an initial
frequency of 533MHz for the G3D block we need to have the parent
source clock of MOUTACLK_400_G3D as sclk_gpll and the divisor
register as 0. Fix the clock hierarchy for the same.

BUG=chrome-os-partner:11853
TEST=Build and boot Snow.
     1) Verify that ACLK400G3D print at bootup shows 533MHz.
     2) Verify CLK_SRC_TOP1[28], CLK_SRC_TOP2[28] and CLK_DIV_TOP0[24]
     bits are set appropriately for 533 MHz (1, 1, 0).
     3) Verify that "cat /sys/devices/platform/mali-t604.0/clock shows
     533 MHz (after applying Sam Leffler's Iae7ae43c: ARM MALI: Cleanup
     sysfs support.)

Change-Id: Ib1e9631bc1232f0df590ece5b9c5770aca1801e3
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/28489
Reviewed-by: Anush Elangovan <anush@google.com>
Commit-Ready: Anush Elangovan <anush@google.com>
Tested-by: Anush Elangovan <anush@google.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>

media: s5p-mfc: propagate flags when setting up private controls.

V4L2_CID_MPEG_MFC51_VIDEO_CHECK_STATE is a read-only control and has to be
initialized as one, otherwise the v4l2 code that initially sets controls
to their default values will call s_ctrl for it and the driver will
complain that a read-only control is being modified.

Signed-off-by: Pawel Osciak <posciak@chromium.org>
BUG=none
TEST=manual run

Change-Id: I8b552201df5e09678f21298e82ef6f2c8a584a53
Reviewed-on: https://gerrit.chromium.org/gerrit/28647
Tested-by: Pawel Osciak <posciak@chromium.org>
Reviewed-by: Sunil Mazhavanchery <sunilm@samsung.com>
Reviewed-by: Bibhuti Bhusan Panigrahi <bibhuti.p@samsung.com>
Tested-by: Bibhuti Bhusan Panigrahi <bibhuti.p@samsung.com>
Reviewed-by: kiran <kiran@chromium.org>
Tested-by: kiran <kiran@chromium.org>
Reviewed-by: Naveen Krishna Chatradhi <naveen@chromium.org>
Commit-Ready: Pawel Osciak <posciak@google.com>
Tested-by: Pawel Osciak <posciak@google.com>

mwifiex: Change some debug logging to info logging

Some issues occur infrequently and more logging is required
to diagnose them.  This patch changes some debug logging to
info logging.

BUG=chrome-os-partner:11586
TEST=Build and boot kernel.

Change-Id: I460374061eab32ea3b978eb9d6e39f9b0a4c726a
Signed-off-by: Gary Morain <gmorain@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28596
Reviewed-by: Paul Stewart <pstew@chromium.org>

Revert "drm/exynos: dp: Disable DP scrambling"

People are reporting much worse glitching while using Chrome, seems
like this patch aggrevates it. Reverting until we know why.

This reverts commit e0547c7cc8eefd095e09fec19ab1b3f34adb3d38

Change-Id: I47c208b10f1e5441387cc3da6af7638a435458fc
Reviewed-on: https://gerrit.chromium.org/gerrit/28618
Reviewed-by: Anush Elangovan <anush@google.com>
Tested-by: Sean Paul <seanpaul@chromium.org>
Commit-Ready: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>

CHROMIUM: Input: cyapa - support left/right/middle physical buttons

Set bits for BTN_RIGHT, BTN_MIDDLE, and BTN_LEFT if the trackpad
reports each button in its capabilities.

Signed-off-by: Du, Dudley <dudl@cypress.com>
Signed-off-by: Benson Leung <bleung@chromium.org>
BUG=chrome-os-partner:11753
TEST=Test on butterfly platform. Verify that Left and Right buttons
are correctly reported when clicked and testing with mtplot/evtest.
Verify that right click generates a context menu in Chrome OS.

Change-Id: I60c22d2110feea8815aee4104fd013f129c89dc9
Reviewed-on: https://gerrit.chromium.org/gerrit/27704
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>
Commit-Ready: Benson Leung <bleung@chromium.org>

drm/exynos: dp: Disable DP scrambling

Displayport scrambling is causing screen glitches/corruption when the
device is under heavy load. This requires investigation into why it's
happening, but let's disable it until we can fix it the right way.

BUG=chrome-os-partner:11834
TEST=Tested by running 2 instances of "dd if=/dev/zero of=/dev/null"

Change-Id: I513406e1a96d762363af1ac8d831481dd877a643
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28578
Reviewed-by: Anush Elangovan <anush@google.com>

drm/exynos: Check for null dev_priv and return

During suspend resume we seem to be getting a NULL dev_priv
Good to check and return when null.

BUG=none
TEST=Crash is hard to reproduce tried 10 times. But hopefully
wont happen

Change-Id: I2c99e86103bc23f7b62f417e48232c98d6eca176
Signed-off-by: Anush Elangovan <anush@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28568
Reviewed-by: Pawel Osciak <posciak@google.com>
Commit-Ready: Anush Elangovan <anush@google.com>
Tested-by: Anush Elangovan <anush@google.com>

CHROMIUM: ARM: exynos: add sata clock

Add clock definition for 'sclk_sata'.

TEST=Kernel compiles
BUG=none
Signed-off-by: Taylor Hutt <thutt@chromium.org>
Change-Id: Ibb720d0eb55057bca80c07b649c8ec9113faa0b9
Reviewed-on: https://gerrit.chromium.org/gerrit/26474
Reviewed-by: Olof Johansson <olofj@chromium.org>

CHROMIUM: cpufreq_interactive: merge up/down work

Down-clocking was being done in a workqueue but there is already a
realtime task for handling up-clocking: do both in the task and remove
the workqueue.  This eliminates conflicts and the mtx that guarded
frequency/clock changes.  As a side-effect input handler registration
is now done on the system workqueue.

While here also move the updown state mtx so that pcpu data
are correctly synchronized between cpufreq_interactive_boost and
cpufreq_interactive_timer (handling cpufreq_interactive_updown_task is
more difficult and may not matter).

Signed-off-by: Sam Leffler <sleffler@chromium.org>
BUG=none
TEST=run workloads and examine event traces

Change-Id: I84937df032287c925499d88bbdd2931f213ac1b9
Reviewed-on: https://gerrit.chromium.org/gerrit/27096
Reviewed-by: Sam Leffler <sleffler@chromium.org>
Tested-by: Sam Leffler <sleffler@chromium.org>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Commit-Ready: Sam Leffler <sleffler@chromium.org>

ARM MALI: add mali trace events for dvfs

Add trace events for dvfs event handling, voltage and clock changes.

Signed-off-by: Sam Leffler <sleffler@chromium.org>
BUG=none
TEST=enable dvfs and collect trace data

Change-Id: Ibf9d239462b5d1517a842086cc2aabb7024544b9
Reviewed-on: https://gerrit.chromium.org/gerrit/28438
Commit-Ready: Sam Leffler <sleffler@chromium.org>
Reviewed-by: Sam Leffler <sleffler@chromium.org>
Tested-by: Sam Leffler <sleffler@chromium.org>

Added support for VIDEO_CHECK_STATE in mfc driver

Added V4L2_CID_MPEG_MFC51_VIDEO_CHECK_STATE config in g_ctrl
ioctl so that application can get the state by calling
v4l2_mfc_g_ctrl.

BUG=None
TEST= Tested with VDA test application.

Change-Id: I20e618443ca87803804b2ae1dbe0dcb6c2127627
Signed-off-by: Bibhuti Bhusan Panigrahi <bibhuti.p@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/27364
Reviewed-by: Pawel Osciak <posciak@google.com>
Commit-Ready: Kiran Avnd <kiran@chromium.org>

UPSTREAM: usb: dwc3: core: split host address space

This fix prevents a problem with dwc3 and host mode where
we were requesting the entire memory region in dwc3/core.c,
thus preventing xhci-plat from ever ioremapping its own address space.

Signed-off-by: Ido Shayevitz <idos@codeaurora.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Cherry-picking from 'master' branch of 3.5rc7
(cherry picked from commit 51249dca627d9d0e6b41531e716cbc308554a62c)

BUG=chrome-os-partner:9771
TEST=emerge-daisy chromeos-kernel; booted kernel
and tested with USB 2.0 and USB 3.0 MSD and USB HID.

Change-Id: I280bf83c84fee4c923d8ff1cc0af5c23bf5c6929
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/28382
Reviewed-by: Olof Johansson <olofj@chromium.org>
Commit-Ready: Olof Johansson <olofj@chromium.org>

Revert "usb: exynos: hack: Removing code for mem request for xhci"

This reverts commit d1dbd1a237f12ba274578578892c3505f03b081c.

Reverting this CL since it is fixed in upstream.

BUG=chrome-os-partner:9771
TEST=emerge-daisy chromeos-kernel; booted kernel
and tested with USB 2.0 and USB 3.0 MSD and USB HID.

Change-Id: I057cadb1966accb545318d82d4aa5e3b53270233
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/28381
Reviewed-by: Olof Johansson <olofj@chromium.org>
Commit-Ready: Olof Johansson <olofj@chromium.org>

CHROMIUM: ASoC: samsung: Route clocks to i2s.

Configure the clocks so that the i2s block is driven with a clock that
can be divided to the current audio frequency.  The rate of epll is
already being adjusted to match the frame rate, but epll was not being
configured to drive the audio clocks.  At init, set the clock muxes to
route epll through the muxes.  This fixes audio on Daisy playing back
too fast (6% fast for 44.1, almost 2x for 48k).

BUG=chrome-os-partner:11225
TEST=Play sine waves of various frequencies and check they are rendered
correctly with a spectrum analyzer.

Change-Id: I46c5f466088a825942931007b49fcde2e40e9fc6
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28453
Reviewed-by: Olof Johansson <olofj@chromium.org>

UPSTREAM: ath9k: fix dynamic WEP related regression

commit 7a532fe7131216a02c81a6c1b1f8632da1195a58
ath9k_hw: fix interpretation of the rx KeyMiss flag

This commit used the rx key miss indication to detect packets that were
passed from the hardware without being decrypted, however it seems that
this bit is not only undefined in the static WEP case, but also for
dynamically allocated WEP keys. This caused a regression when using
WEP-LEAP.

This patch fixes the regression by keeping track of which key indexes
refer to CCMP keys and only using the key miss indication for those.

Reported-by: Stanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Cc: stable@vger.kernel.org
Signed-off-by: John W. Linville <linville@tuxdriver.com>
(cherry picked from commit bed3d9c0b71f9afbfec905cb6db3b9f16be29d4d)

Signed-off-by: Paul Stewart <pstew@chromium.org>
BUG=chromium-os:32941
TEST=Autotest network_WiFiSecMat/003CheckWEP_8021x

Change-Id: I32698eab7ddb0ae59bb32aea952d8b3242fac077
Reviewed-on: https://gerrit.chromium.org/gerrit/28400
Reviewed-by: Gary Morain <gmorain@chromium.org>
Tested-by: Paul Stewart <pstew@chromium.org>
Commit-Ready: Paul Stewart <pstew@chromium.org>

drm/exynos: Release KDS resource before dmabuf

Release current KDS resource before its corresponding
dmabuf release.

BUG=chrome-os-partner:11637
TEST=build and run on system without "KDS resource in use" msg

Change-Id: I6d5d1c832e0d8612e0f586d99209a95992cfbd14
Signed-off-by: Anush Elangovan <anush@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28440
Reviewed-by: Mandeep Singh Baines <msb@chromium.org>
Commit-Ready: Anush Elangovan <anush@google.com>
Tested-by: Anush Elangovan <anush@google.com>

CHROMIUM: Input: cyapa - Disable runtime PM

Disable runtime pm to prevent the use of low power modes at
runtime. Firmware 11.22 on Lumpy incorrectly handles unrelated
i2c traffic when in IDLE state, potentially wedging the
SMBUS until powered down.

Signed-off-by: Benson Leung <bleung@chromium.org>
BUG=chrome-os-partner:10550
TEST=Boot system.
check /sys/bus/i2c/devices/7-0067/power
check that runtime_suspend_scanrate_ms does not exist.

Change-Id: I7758837bac0f109f500baf2543e98275721e7445
Reviewed-on: https://gerrit.chromium.org/gerrit/28221
Reviewed-by: Benson Leung <bleung@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>
Commit-Ready: Benson Leung <bleung@chromium.org>

CHROMIUM: Input: cyapa - Set active at probe and at cyapa_resume

pm_runtime_set_active should be called before pm_runtime_enable
in cyapa_start_runtime to reflect the initial state of FULL_ACTIVE
as set by cyapa_detect.

Also, at resume time, we should also pm_runtime_set_active to
reflect the transition to FULL_ACTIVE by cyapa_resume.

Signed-off-by: Benson Leung <bleung@chromium.org>
BUG=chromium-os:32929
TEST=Add a debug message in set_power_mode, and verify that
at init, and at resume time, we set to an IDLE state
shortly after setting to FULL_ACTIVE.

Change-Id: Id80ab31c7bff777f6907e4804512da6e165359cd
Reviewed-on: https://gerrit.chromium.org/gerrit/28361
Reviewed-by: Benson Leung <bleung@chromium.org>
Tested-by: Benson Leung <bleung@chromium.org>
Commit-Ready: Benson Leung <bleung@chromium.org>

MALI: Set the mali voltage to 1.25V

Define CONFIG_T6XX_HWVER_R0P0 since we use hwver r0p0
For now retain the clock setup that we have been using

BUG=chrome-os-partner:11818
TEST=build and verify on running system

localhost regulator.13 # cat /sys/class/regulator/regulator.13/name
vdd_g3d
localhost regulator.13 # cat /sys/class/regulator/regulator.13/microvolts
1250000

Change-Id: If89232ea2444fc1ff70f96c64590023243a49f0e
Signed-off-by: Anush Elangovan <anush@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28408
Reviewed-by: Doug Anderson <dianders@chromium.org>
Commit-Ready: Anush Elangovan <anush@google.com>
Tested-by: Anush Elangovan <anush@google.com>

i915: Use 120MHz LVDS SSC clock for gen5/gen6/gen7

We had been using a DMI table workaround to select the right
frequency for devices, but this is fragile and must be updated
with every new platform.

Instead the default case when VBT is missing is changed to use
120MHz clock for LVDS SSC for these generations.

The docs for 2010-Core, SandyBridge, and IvyBridge all indicate
that the reference frequency for LVDS is 120MHz:

"2010 Core"
http://intellinuxgraphics.org/IHD_OS_Vol3_Part3r2.pdf
page 38
Reference Frequency: 120MHz for CRT and LVDS.  100MHz for the FDI.

"2011 SandyBridge"
http://intellinuxgraphics.org/documentation/SNB/IHD_OS_Vol3_Part3.pdf
page 33
Reference Frequency: 120MHz for CRT, HDMI, LVDS.  100MHz for the FDI.

"2012 IvyBridge"
http://intellinuxgraphics.org/documentation/IVB/IHD_OS_Vol3_Part4.pdf
page 27
Reference Frequency: 120 MHz for CRT, HDMI, LVDS, 100MHz for the FDI.

BUG=chrome-os-partner:11744
TEST=manual: boot on Lumpy and Parrot with and without VBIOS

Change-Id: Ieae3d37d4a5f6eb11c45a5e2fa76b0c106404e69
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28274
Reviewed-by: Marc Jones <marc.jones@se-eng.com>

Revert "arm: exynos5: Add NTC Thermistor attached to S3C-ADC"

This reverts commit 5f5d100942e2482c63645c95c59fff9897f403a7.

Using s3c_adc_read must define CONFIG_S3C_ADC in corresponding kernel
configuration files, otherwise all exynos5 family builds would fail.

BUG=chromium-os:32934
TEST=emerge-daisy chromeos-kernel # pass

Change-Id: I6a142bd62e26474a4bed633201e304e522982b27
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28379
Reviewed-by: Brian Harring <ferringb@chromium.org>

hwmon: ntc_thermistor: Modify read_uV amd read_ohm function prototypes

Add a pdev parameter to the read_uV and read_ohm call-backs to handle
multiple thermistor support. (Modifications implemented by Grant Grundler)

BUG=None
TEST=Temperature is read using the sysfs entries in NTC Thermistor
driver: cat /sys/class/hwmon/hwmonX/device/temp1_input

Change-Id: I463b009354ee7f20bb15a0447c87223aefa8b59d
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Grant Grundler <grundler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27277
Tested-by: naveen krishna chatradhi <naveen@chromium.org>
Commit-Ready: Naveen Krishna Chatradhi <naveen@chromium.org>

arm: exynos5: Add NTC Thermistor attached to S3C-ADC

This patch allows platform configurations to share information about
the NTC thermistor device attached to ADC port of S3C.

A platform configuration is required to initialize the ADC port for NTC
thermistor by calling "s3c_adc_ntc_init(pdev);" before registering the
NTC thermistor device. Then, registering a platform device,
s3c_device_adc_ntc_thermistor enables NTC thermistor for the platform.
(Modifications implemented by Grant Grundler)

BUG=None
TEST=Temperature is read using the sysfs entries in NTC Thermistor
driver: cat /sys/class/hwmon/hwmonX/device/temp1_input

Change-Id: Ifbe91202213f2dda589d2ca9d3e99eea43f1508e
Signed-off-by: Naveen krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Grant Grundler <grundler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/27150
Tested-by: naveen krishna chatradhi <naveen@chromium.org>
Commit-Ready: Naveen Krishna Chatradhi <naveen@chromium.org>

UPSTREAM: usb: dwc3: Fix the dwc3 dependency

The warning shown up when ran with randconfig,

warning: (USB_DWC3) selects USB_XHCI_PLATFORM which has unmet direct dependencies (USB_SUPPORT && USB_XHCI_HCD)

Signed-off-by: joseph daniel <josephdanielwalter@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cherry-picking from 'master' branch of 3.5rc7
(cherry picked from commit b8cacf33f09c60208a914b36b3e6de8e9ba228d5)

Change-Id: I757a3cee918fa11581c86f8fc59993e24a8ca741
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/27750
Commit-Ready: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>