video/exynos: dp: Improve EDID error handling

EDID error handling has 2 problems:
 - It doesn't fail as early as it can
 - The retry counts for i2c and aux transactions are huge

This patch fails if the initial i2c transaction fails, and reduces the
aux and i2c retry counts down to 3.

BUG=None
TEST=None

Change-Id: I72598c883cfc812b1985f716ba70ac8294e95366
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/29302
Reviewed-by: Olof Johansson <olofj@chromium.org>

diff --git a/drivers/video/exynos/exynos_dp_core.c b/drivers/video/exynos/exynos_dp_core.c
index fc511ae..b98daa7 100644 (file)
--- a/drivers/video/exynos/exynos_dp_core.c
+++ b/drivers/video/exynos/exynos_dp_core.c
@@ -90,9 +90,11 @@ static int exynos_dp_read_edid(struct exynos_dp_device *dp)
         */
 
        /* Read Extension Flag, Number of 128-byte EDID extension blocks */
-       exynos_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
+       retval = exynos_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
                                EDID_EXTENSION_FLAG,
                                &extend_block);
+       if (retval)
+               return retval;
 
        if (extend_block > 0) {
                dev_dbg(dp->dev, "EDID data includes a single extension!\n");
@@ -178,21 +180,21 @@ static int exynos_dp_handle_edid(struct exynos_dp_device *dp)
 {
        u8 buf[12];
        int i;
-       int retval;
+       int ret;
 
        /* Read DPCD DPCD_ADDR_DPCD_REV~RECEIVE_PORT1_CAP_1 */
-       exynos_dp_read_bytes_from_dpcd(dp,
-               DPCD_ADDR_DPCD_REV,
-               12, buf);
+       ret = exynos_dp_read_bytes_from_dpcd(dp, DPCD_ADDR_DPCD_REV, 12, buf);
+       if (ret)
+               return ret;
 
        /* Read EDID */
        for (i = 0; i < 3; i++) {
-               retval = exynos_dp_read_edid(dp);
-               if (retval == 0)
+               ret = exynos_dp_read_edid(dp);
+               if (!ret)
                        break;
        }
 
-       return retval;
+       return ret;
 }
 
 static void exynos_dp_enable_rx_to_enhanced_mode(struct exynos_dp_device *dp,

diff --git a/drivers/video/exynos/exynos_dp_reg.c b/drivers/video/exynos/exynos_dp_reg.c
index 9c67897..7860dec 100644 (file)
--- a/drivers/video/exynos/exynos_dp_reg.c
+++ b/drivers/video/exynos/exynos_dp_reg.c
@@ -509,7 +509,7 @@ int exynos_dp_write_bytes_to_dpcd(struct exynos_dp_device *dp,
                else
                        cur_data_count = count - start_offset;
 
-               for (i = 0; i < 10; i++) {
+               for (i = 0; i < 3; i++) {
                        /* Select DPCD device address */
                        reg = AUX_ADDR_7_0(reg_addr + start_offset);
                        writel(reg, dp->reg_base + EXYNOS_DP_AUX_ADDR_7_0);
@@ -574,7 +574,7 @@ int exynos_dp_read_bytes_from_dpcd(struct exynos_dp_device *dp,
                        cur_data_count = count - start_offset;
 
                /* AUX CH Request Transaction process */
-               for (i = 0; i < 10; i++) {
+               for (i = 0; i < 3; i++) {
                        /* Select DPCD device address */
                        reg = AUX_ADDR_7_0(reg_addr + start_offset);
                        writel(reg, dp->reg_base + EXYNOS_DP_AUX_ADDR_7_0);
@@ -657,7 +657,7 @@ int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
        int i;
        int retval;
 
-       for (i = 0; i < 10; i++) {
+       for (i = 0; i < 3; i++) {
                /* Clear AUX CH data buffer */
                reg = BUF_CLR;
                writel(reg, dp->reg_base + EXYNOS_DP_BUFFER_DATA_CTL);
@@ -665,7 +665,6 @@ int exynos_dp_read_byte_from_i2c(struct exynos_dp_device *dp,
                /* Select EDID device */
                retval = exynos_dp_select_i2c_device(dp, device_addr, reg_addr);
                if (retval != 0) {
-                       dev_err(dp->dev, "Select EDID device fail!\n");
                        continue;
                }
 
@@ -707,7 +706,7 @@ int exynos_dp_read_bytes_from_i2c(struct exynos_dp_device *dp,
        int retval = 0;
 
        for (i = 0; i < count; i += 16) {
-               for (j = 0; j < 100; j++) {
+               for (j = 0; j < 3; j++) {
                        /* Clear AUX CH data buffer */
                        reg = BUF_CLR;
                        writel(reg, dp->reg_base + EXYNOS_DP_BUFFER_DATA_CTL);