4 compatible = "brcm,bcm7125";
10 mips-hpt-frequency = <202500000>;
13 compatible = "brcm,bmips4380";
19 compatible = "brcm,bmips4380";
31 compatible = "mti,cpu-interrupt-controller";
34 #interrupt-cells = <1>;
39 compatible = "fixed-clock";
41 clock-frequency = <81000000>;
49 compatible = "simple-bus";
50 ranges = <0 0x10000000 0x01000000>;
52 periph_intc: periph_intc@441400 {
53 compatible = "brcm,bcm7038-l1-intc";
54 reg = <0x441400 0x30>, <0x441600 0x30>;
57 #interrupt-cells = <1>;
59 interrupt-parent = <&cpu_intc>;
60 interrupts = <2>, <3>;
63 sun_l2_intc: sun_l2_intc@401800 {
64 compatible = "brcm,l2-intc";
65 reg = <0x401800 0x30>;
67 #interrupt-cells = <1>;
68 interrupt-parent = <&periph_intc>;
73 compatible = "brcm,bcm7400-gisb-arb";
74 reg = <0x400000 0xdc>;
76 interrupt-parent = <&sun_l2_intc>;
77 interrupts = <0>, <2>;
78 brcm,gisb-arb-master-mask = <0x2f7>;
79 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0",
80 "bsp_0", "rdc_0", "rptd_0",
84 upg_irq0_intc: upg_irq0_intc@406780 {
85 compatible = "brcm,bcm7120-l2-intc";
88 brcm,int-map-mask = <0x44>, <0xf000000>;
89 brcm,int-fwd-mask = <0x70000>;
92 #interrupt-cells = <1>;
94 interrupt-parent = <&periph_intc>;
95 interrupts = <18>, <19>;
96 interrupt-names = "upg_main", "upg_bsc";
99 sun_top_ctrl: syscon@404000 {
100 compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
101 reg = <0x404000 0x60c>;
106 compatible = "brcm,bcm7038-reboot";
107 syscon = <&sun_top_ctrl 0x8 0x14>;
110 uart0: serial@406b00 {
111 compatible = "ns16550a";
112 reg = <0x406b00 0x20>;
113 reg-io-width = <0x4>;
116 interrupt-parent = <&periph_intc>;
118 clocks = <&uart_clk>;
122 uart1: serial@406b40 {
123 compatible = "ns16550a";
124 reg = <0x406b40 0x20>;
125 reg-io-width = <0x4>;
128 interrupt-parent = <&periph_intc>;
130 clocks = <&uart_clk>;
134 uart2: serial@406b80 {
135 compatible = "ns16550a";
136 reg = <0x406b80 0x20>;
137 reg-io-width = <0x4>;
140 interrupt-parent = <&periph_intc>;
142 clocks = <&uart_clk>;
147 clock-frequency = <390000>;
148 compatible = "brcm,brcmstb-i2c";
149 interrupt-parent = <&upg_irq0_intc>;
150 reg = <0x406200 0x58>;
152 interrupt-names = "upg_bsca";
157 clock-frequency = <390000>;
158 compatible = "brcm,brcmstb-i2c";
159 interrupt-parent = <&upg_irq0_intc>;
160 reg = <0x406280 0x58>;
162 interrupt-names = "upg_bscb";
167 clock-frequency = <390000>;
168 compatible = "brcm,brcmstb-i2c";
169 interrupt-parent = <&upg_irq0_intc>;
170 reg = <0x406300 0x58>;
172 interrupt-names = "upg_bscc";
177 clock-frequency = <390000>;
178 compatible = "brcm,brcmstb-i2c";
179 interrupt-parent = <&upg_irq0_intc>;
180 reg = <0x406380 0x58>;
182 interrupt-names = "upg_bscd";
187 compatible = "brcm,bcm7125-ehci", "generic-ehci";
188 reg = <0x488300 0x100>;
190 interrupt-parent = <&periph_intc>;
196 compatible = "brcm,bcm7125-ohci", "generic-ohci";
197 reg = <0x488400 0x100>;
199 interrupt-parent = <&periph_intc>;