arch/mips/boot/dts/brcm/bcm7425.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "brcm,bcm7425";
   5
   6         cpus {
   7                 #address-cells = <1>;
   8                 #size-cells = <0>;
   9
  10                 mips-hpt-frequency = <163125000>;
  11
  12                 cpu@0 {
  13                         compatible = "brcm,bmips5000";
  14                         device_type = "cpu";
  15                         reg = <0>;
  16                 };
  17
  18                 cpu@1 {
  19                         compatible = "brcm,bmips5000";
  20                         device_type = "cpu";
  21                         reg = <1>;
  22                 };
  23         };
  24
  25         aliases {
  26                 uart0 = &uart0;
  27         };
  28
  29         cpu_intc: interrupt-controller {
  30                 #address-cells = <0>;
  31                 compatible = "mti,cpu-interrupt-controller";
  32
  33                 interrupt-controller;
  34                 #interrupt-cells = <1>;
  35         };
  36
  37         clocks {
  38                 uart_clk: uart_clk {
  39                         compatible = "fixed-clock";
  40                         #clock-cells = <0>;
  41                         clock-frequency = <81000000>;
  42                 };
  43
  44                 upg_clk: upg_clk {
  45                         compatible = "fixed-clock";
  46                         #clock-cells = <0>;
  47                         clock-frequency = <27000000>;
  48                 };
  49         };
  50
  51         rdb {
  52                 #address-cells = <1>;
  53                 #size-cells = <1>;
  54
  55                 compatible = "simple-bus";
  56                 ranges = <0 0x10000000 0x01000000>;
  57
  58                 periph_intc: interrupt-controller@41a400 {
  59                         compatible = "brcm,bcm7038-l1-intc";
  60                         reg = <0x41a400 0x30>, <0x41a600 0x30>;
  61
  62                         interrupt-controller;
  63                         #interrupt-cells = <1>;
  64
  65                         interrupt-parent = <&cpu_intc>;
  66                         interrupts = <2>, <3>;
  67                 };
  68
  69                 sun_l2_intc: interrupt-controller@403000 {
  70                         compatible = "brcm,l2-intc";
  71                         reg = <0x403000 0x30>;
  72                         interrupt-controller;
  73                         #interrupt-cells = <1>;
  74                         interrupt-parent = <&periph_intc>;
  75                         interrupts = <47>;
  76                 };
  77
  78                 gisb-arb@400000 {
  79                         compatible = "brcm,bcm7400-gisb-arb";
  80                         reg = <0x400000 0xdc>;
  81                         native-endian;
  82                         interrupt-parent = <&sun_l2_intc>;
  83                         interrupts = <0>, <2>;
  84                         brcm,gisb-arb-master-mask = <0x177b>;
  85                         brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pcie_0",
  86                                                      "bsp_0", "rdc_0",
  87                                                      "raaga_0", "avd_1",
  88                                                      "jtag_0", "svd_0",
  89                                                      "vice_0";
  90                 };
  91
  92                 upg_irq0_intc: interrupt-controller@406780 {
  93                         compatible = "brcm,bcm7120-l2-intc";
  94                         reg = <0x406780 0x8>;
  95
  96                         brcm,int-map-mask = <0x44>, <0x7000000>;
  97                         brcm,int-fwd-mask = <0x70000>;
  98
  99                         interrupt-controller;
 100                         #interrupt-cells = <1>;
 101
 102                         interrupt-parent = <&periph_intc>;
 103                         interrupts = <55>, <53>;
 104                         interrupt-names = "upg_main", "upg_bsc";
 105                 };
 106
 107                 upg_aon_irq0_intc: interrupt-controller@409480 {
 108                         compatible = "brcm,bcm7120-l2-intc";
 109                         reg = <0x409480 0x8>;
 110
 111                         brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
 112                         brcm,int-fwd-mask = <0>;
 113                         brcm,irq-can-wake;
 114
 115                         interrupt-controller;
 116                         #interrupt-cells = <1>;
 117
 118                         interrupt-parent = <&periph_intc>;
 119                         interrupts = <56>, <54>, <59>;
 120                         interrupt-names = "upg_main_aon", "upg_bsc_aon",
 121                                           "upg_spi";
 122                 };
 123
 124                 sun_top_ctrl: syscon@404000 {
 125                         compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
 126                         reg = <0x404000 0x51c>;
 127                         native-endian;
 128                 };
 129
 130                 reboot {
 131                         compatible = "brcm,brcmstb-reboot";
 132                         syscon = <&sun_top_ctrl 0x304 0x308>;
 133                 };
 134
 135                 uart0: serial@406b00 {
 136                         compatible = "ns16550a";
 137                         reg = <0x406b00 0x20>;
 138                         reg-io-width = <0x4>;
 139                         reg-shift = <0x2>;
 140                         interrupt-parent = <&periph_intc>;
 141                         interrupts = <61>;
 142                         clocks = <&uart_clk>;
 143                         status = "disabled";
 144                 };
 145
 146                 uart1: serial@406b40 {
 147                         compatible = "ns16550a";
 148                         reg = <0x406b40 0x20>;
 149                         reg-io-width = <0x4>;
 150                         reg-shift = <0x2>;
 151                         interrupt-parent = <&periph_intc>;
 152                         interrupts = <62>;
 153                         clocks = <&uart_clk>;
 154                         status = "disabled";
 155                 };
 156
 157                 uart2: serial@406b80 {
 158                         compatible = "ns16550a";
 159                         reg = <0x406b80 0x20>;
 160                         reg-io-width = <0x4>;
 161                         reg-shift = <0x2>;
 162                         interrupt-parent = <&periph_intc>;
 163                         interrupts = <63>;
 164                         clocks = <&uart_clk>;
 165                         status = "disabled";
 166                 };
 167
 168                 bsca: i2c@409180 {
 169                       clock-frequency = <390000>;
 170                       compatible = "brcm,brcmstb-i2c";
 171                       interrupt-parent = <&upg_aon_irq0_intc>;
 172                       reg = <0x409180 0x58>;
 173                       interrupts = <27>;
 174                       interrupt-names = "upg_bsca";
 175                       status = "disabled";
 176                 };
 177
 178                 bscb: i2c@409400 {
 179                       clock-frequency = <390000>;
 180                       compatible = "brcm,brcmstb-i2c";
 181                       interrupt-parent = <&upg_aon_irq0_intc>;
 182                       reg = <0x409400 0x58>;
 183                       interrupts = <28>;
 184                       interrupt-names = "upg_bscb";
 185                       status = "disabled";
 186                 };
 187
 188                 bscc: i2c@406200 {
 189                       clock-frequency = <390000>;
 190                       compatible = "brcm,brcmstb-i2c";
 191                       interrupt-parent = <&upg_irq0_intc>;
 192                       reg = <0x406200 0x58>;
 193                       interrupts = <24>;
 194                       interrupt-names = "upg_bscc";
 195                       status = "disabled";
 196                 };
 197
 198                 bscd: i2c@406280 {
 199                       clock-frequency = <390000>;
 200                       compatible = "brcm,brcmstb-i2c";
 201                       interrupt-parent = <&upg_irq0_intc>;
 202                       reg = <0x406280 0x58>;
 203                       interrupts = <25>;
 204                       interrupt-names = "upg_bscd";
 205                       status = "disabled";
 206                 };
 207
 208                 bsce: i2c@406300 {
 209                       clock-frequency = <390000>;
 210                       compatible = "brcm,brcmstb-i2c";
 211                       interrupt-parent = <&upg_irq0_intc>;
 212                       reg = <0x406300 0x58>;
 213                       interrupts = <26>;
 214                       interrupt-names = "upg_bsce";
 215                       status = "disabled";
 216                 };
 217
 218                 pwma: pwm@406580 {
 219                         compatible = "brcm,bcm7038-pwm";
 220                         reg = <0x406580 0x28>;
 221                         #pwm-cells = <2>;
 222                         clocks = <&upg_clk>;
 223                         status = "disabled";
 224                 };
 225
 226                 pwmb: pwm@406800 {
 227                         compatible = "brcm,bcm7038-pwm";
 228                         reg = <0x406800 0x28>;
 229                         #pwm-cells = <2>;
 230                         clocks = <&upg_clk>;
 231                         status = "disabled";
 232                 };
 233
 234                 aon_pm_l2_intc: interrupt-controller@408440 {
 235                         compatible = "brcm,l2-intc";
 236                         reg = <0x408440 0x30>;
 237                         interrupt-controller;
 238                         #interrupt-cells = <1>;
 239                         interrupt-parent = <&periph_intc>;
 240                         interrupts = <49>;
 241                         brcm,irq-can-wake;
 242                 };
 243
 244                 upg_gio: gpio@406700 {
 245                         compatible = "brcm,brcmstb-gpio";
 246                         reg = <0x406700 0x80>;
 247                         #gpio-cells = <2>;
 248                         #interrupt-cells = <2>;
 249                         gpio-controller;
 250                         interrupt-controller;
 251                         interrupt-parent = <&upg_irq0_intc>;
 252                         interrupts = <6>;
 253                         brcm,gpio-bank-widths = <32 32 32 21>;
 254                 };
 255
 256                 upg_gio_aon: gpio@4094c0 {
 257                         compatible = "brcm,brcmstb-gpio";
 258                         reg = <0x4094c0 0x40>;
 259                         #gpio-cells = <2>;
 260                         #interrupt-cells = <2>;
 261                         gpio-controller;
 262                         interrupt-controller;
 263                         interrupt-parent = <&upg_aon_irq0_intc>;
 264                         interrupts = <6>;
 265                         interrupts-extended = <&upg_aon_irq0_intc 6>,
 266                                               <&aon_pm_l2_intc 5>;
 267                         wakeup-source;
 268                         brcm,gpio-bank-widths = <18 4>;
 269                 };
 270
 271                 enet0: ethernet@b80000 {
 272                         phy-mode = "internal";
 273                         phy-handle = <&phy1>;
 274                         mac-address = [ 00 10 18 36 23 1a ];
 275                         compatible = "brcm,genet-v3";
 276                         #address-cells = <0x1>;
 277                         #size-cells = <0x1>;
 278                         reg = <0xb80000 0x11c88>;
 279                         interrupts = <17>, <18>;
 280                         interrupt-parent = <&periph_intc>;
 281                         status = "disabled";
 282
 283                         mdio@e14 {
 284                                 compatible = "brcm,genet-mdio-v3";
 285                                 #address-cells = <0x1>;
 286                                 #size-cells = <0x0>;
 287                                 reg = <0xe14 0x8>;
 288
 289                                 phy1: ethernet-phy@1 {
 290                                         max-speed = <100>;
 291                                         reg = <0x1>;
 292                                         compatible = "brcm,40nm-ephy",
 293                                                 "ethernet-phy-ieee802.3-c22";
 294                                 };
 295                         };
 296                 };
 297
 298                 ehci0: usb@480300 {
 299                         compatible = "brcm,bcm7425-ehci", "generic-ehci";
 300                         reg = <0x480300 0x100>;
 301                         native-endian;
 302                         interrupt-parent = <&periph_intc>;
 303                         interrupts = <65>;
 304                         status = "disabled";
 305                 };
 306
 307                 ohci0: usb@480400 {
 308                         compatible = "brcm,bcm7425-ohci", "generic-ohci";
 309                         reg = <0x480400 0x100>;
 310                         native-endian;
 311                         no-big-frame-no;
 312                         interrupt-parent = <&periph_intc>;
 313                         interrupts = <67>;
 314                         status = "disabled";
 315                 };
 316
 317                 ehci1: usb@480500 {
 318                         compatible = "brcm,bcm7425-ehci", "generic-ehci";
 319                         reg = <0x480500 0x100>;
 320                         native-endian;
 321                         interrupt-parent = <&periph_intc>;
 322                         interrupts = <66>;
 323                         status = "disabled";
 324                 };
 325
 326                 ohci1: usb@480600 {
 327                         compatible = "brcm,bcm7425-ohci", "generic-ohci";
 328                         reg = <0x480600 0x100>;
 329                         native-endian;
 330                         no-big-frame-no;
 331                         interrupt-parent = <&periph_intc>;
 332                         interrupts = <68>;
 333                         status = "disabled";
 334                 };
 335
 336                 ehci2: usb@490300 {
 337                         compatible = "brcm,bcm7425-ehci", "generic-ehci";
 338                         reg = <0x490300 0x100>;
 339                         native-endian;
 340                         interrupt-parent = <&periph_intc>;
 341                         interrupts = <70>;
 342                         status = "disabled";
 343                 };
 344
 345                 ohci2: usb@490400 {
 346                         compatible = "brcm,bcm7425-ohci", "generic-ohci";
 347                         reg = <0x490400 0x100>;
 348                         native-endian;
 349                         no-big-frame-no;
 350                         interrupt-parent = <&periph_intc>;
 351                         interrupts = <72>;
 352                         status = "disabled";
 353                 };
 354
 355                 ehci3: usb@490500 {
 356                         compatible = "brcm,bcm7425-ehci", "generic-ehci";
 357                         reg = <0x490500 0x100>;
 358                         native-endian;
 359                         interrupt-parent = <&periph_intc>;
 360                         interrupts = <71>;
 361                         status = "disabled";
 362                 };
 363
 364                 ohci3: usb@490600 {
 365                         compatible = "brcm,bcm7425-ohci", "generic-ohci";
 366                         reg = <0x490600 0x100>;
 367                         native-endian;
 368                         no-big-frame-no;
 369                         interrupt-parent = <&periph_intc>;
 370                         interrupts = <73>;
 371                         status = "disabled";
 372                 };
 373
 374                 hif_l2_intc: interrupt-controller@41a000 {
 375                         compatible = "brcm,l2-intc";
 376                         reg = <0x41a000 0x30>;
 377                         interrupt-controller;
 378                         #interrupt-cells = <1>;
 379                         interrupt-parent = <&periph_intc>;
 380                         interrupts = <24>;
 381                 };
 382
 383                 nand: nand@41b800 {
 384                         compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
 385                         #address-cells = <1>;
 386                         #size-cells = <0>;
 387                         reg-names = "nand";
 388                         reg = <0x41b800 0x400>;
 389                         interrupt-parent = <&hif_l2_intc>;
 390                         interrupts = <24>;
 391                         status = "disabled";
 392                 };
 393
 394                 sata: sata@181000 {
 395                         compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
 396                         reg-names = "ahci", "top-ctrl";
 397                         reg = <0x181000 0xa9c>, <0x180020 0x1c>;
 398                         interrupt-parent = <&periph_intc>;
 399                         interrupts = <41>;
 400                         #address-cells = <1>;
 401                         #size-cells = <0>;
 402                         status = "disabled";
 403
 404                         sata0: sata-port@0 {
 405                                 reg = <0>;
 406                                 phys = <&sata_phy0>;
 407                         };
 408
 409                         sata1: sata-port@1 {
 410                                 reg = <1>;
 411                                 phys = <&sata_phy1>;
 412                         };
 413                 };
 414
 415                 sata_phy: sata-phy@180100 {
 416                         compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
 417                         reg = <0x180100 0x0eff>;
 418                         reg-names = "phy";
 419                         #address-cells = <1>;
 420                         #size-cells = <0>;
 421                         status = "disabled";
 422
 423                         sata_phy0: sata-phy@0 {
 424                                 reg = <0>;
 425                                 #phy-cells = <0>;
 426                         };
 427
 428                         sata_phy1: sata-phy@1 {
 429                                 reg = <1>;
 430                                 #phy-cells = <0>;
 431                         };
 432                 };
 433
 434                 sdhci0: sdhci@419000 {
 435                         compatible = "brcm,bcm7425-sdhci";
 436                         reg = <0x419000 0x100>;
 437                         interrupt-parent = <&periph_intc>;
 438                         interrupts = <43>;
 439                         sd-uhs-sdr50;
 440                         mmc-hs200-1_8v;
 441                         status = "disabled";
 442                 };
 443
 444                 sdhci1: sdhci@419200 {
 445                         compatible = "brcm,bcm7425-sdhci";
 446                         reg = <0x419200 0x100>;
 447                         interrupt-parent = <&periph_intc>;
 448                         interrupts = <44>;
 449                         sd-uhs-sdr50;
 450                         mmc-hs200-1_8v;
 451                         status = "disabled";
 452                 };
 453         };
 454 };