2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
27 #include <linux/kvm_host.h>
28 #include <linux/types.h>
29 #include <linux/string.h>
31 #include <linux/highmem.h>
32 #include <linux/module.h>
33 #include <linux/swap.h>
34 #include <linux/hugetlb.h>
35 #include <linux/compiler.h>
36 #include <linux/srcu.h>
37 #include <linux/slab.h>
38 #include <linux/uaccess.h>
41 #include <asm/cmpxchg.h>
44 #include <asm/kvm_page_track.h>
47 * When setting this variable to true it enables Two-Dimensional-Paging
48 * where the hardware walks 2 page tables:
49 * 1. the guest-virtual to guest-physical
50 * 2. while doing 1. it walks guest-physical to host-physical
51 * If the hardware supports that we don't need to do shadow paging.
53 bool tdp_enabled = false;
57 AUDIT_POST_PAGE_FAULT,
68 module_param(dbg, bool, 0644);
70 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
71 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
72 #define MMU_WARN_ON(x) WARN_ON(x)
74 #define pgprintk(x...) do { } while (0)
75 #define rmap_printk(x...) do { } while (0)
76 #define MMU_WARN_ON(x) do { } while (0)
79 #define PTE_PREFETCH_NUM 8
81 #define PT_FIRST_AVAIL_BITS_SHIFT 10
82 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
84 #define PT64_LEVEL_BITS 9
86 #define PT64_LEVEL_SHIFT(level) \
87 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
89 #define PT64_INDEX(address, level)\
90 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
93 #define PT32_LEVEL_BITS 10
95 #define PT32_LEVEL_SHIFT(level) \
96 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
98 #define PT32_LVL_OFFSET_MASK(level) \
99 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
100 * PT32_LEVEL_BITS))) - 1))
102 #define PT32_INDEX(address, level)\
103 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
106 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
107 #define PT64_DIR_BASE_ADDR_MASK \
108 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
109 #define PT64_LVL_ADDR_MASK(level) \
110 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
111 * PT64_LEVEL_BITS))) - 1))
112 #define PT64_LVL_OFFSET_MASK(level) \
113 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
114 * PT64_LEVEL_BITS))) - 1))
116 #define PT32_BASE_ADDR_MASK PAGE_MASK
117 #define PT32_DIR_BASE_ADDR_MASK \
118 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
119 #define PT32_LVL_ADDR_MASK(level) \
120 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
121 * PT32_LEVEL_BITS))) - 1))
123 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \
124 | shadow_x_mask | shadow_nx_mask)
126 #define ACC_EXEC_MASK 1
127 #define ACC_WRITE_MASK PT_WRITABLE_MASK
128 #define ACC_USER_MASK PT_USER_MASK
129 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
131 #include <trace/events/kvm.h>
133 #define CREATE_TRACE_POINTS
134 #include "mmutrace.h"
136 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
137 #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1))
139 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
141 /* make pte_list_desc fit well in cache line */
142 #define PTE_LIST_EXT 3
144 struct pte_list_desc {
145 u64 *sptes[PTE_LIST_EXT];
146 struct pte_list_desc *more;
149 struct kvm_shadow_walk_iterator {
157 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
158 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
159 shadow_walk_okay(&(_walker)); \
160 shadow_walk_next(&(_walker)))
162 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
163 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
164 shadow_walk_okay(&(_walker)) && \
165 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
166 __shadow_walk_next(&(_walker), spte))
168 static struct kmem_cache *pte_list_desc_cache;
169 static struct kmem_cache *mmu_page_header_cache;
170 static struct percpu_counter kvm_total_used_mmu_pages;
172 static u64 __read_mostly shadow_nx_mask;
173 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
174 static u64 __read_mostly shadow_user_mask;
175 static u64 __read_mostly shadow_accessed_mask;
176 static u64 __read_mostly shadow_dirty_mask;
177 static u64 __read_mostly shadow_mmio_mask;
179 static void mmu_spte_set(u64 *sptep, u64 spte);
180 static void mmu_free_roots(struct kvm_vcpu *vcpu);
182 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask)
184 shadow_mmio_mask = mmio_mask;
186 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask);
189 * the low bit of the generation number is always presumed to be zero.
190 * This disables mmio caching during memslot updates. The concept is
191 * similar to a seqcount but instead of retrying the access we just punt
192 * and ignore the cache.
194 * spte bits 3-11 are used as bits 1-9 of the generation number,
195 * the bits 52-61 are used as bits 10-19 of the generation number.
197 #define MMIO_SPTE_GEN_LOW_SHIFT 2
198 #define MMIO_SPTE_GEN_HIGH_SHIFT 52
200 #define MMIO_GEN_SHIFT 20
201 #define MMIO_GEN_LOW_SHIFT 10
202 #define MMIO_GEN_LOW_MASK ((1 << MMIO_GEN_LOW_SHIFT) - 2)
203 #define MMIO_GEN_MASK ((1 << MMIO_GEN_SHIFT) - 1)
205 static u64 generation_mmio_spte_mask(unsigned int gen)
209 WARN_ON(gen & ~MMIO_GEN_MASK);
211 mask = (gen & MMIO_GEN_LOW_MASK) << MMIO_SPTE_GEN_LOW_SHIFT;
212 mask |= ((u64)gen >> MMIO_GEN_LOW_SHIFT) << MMIO_SPTE_GEN_HIGH_SHIFT;
216 static unsigned int get_mmio_spte_generation(u64 spte)
220 spte &= ~shadow_mmio_mask;
222 gen = (spte >> MMIO_SPTE_GEN_LOW_SHIFT) & MMIO_GEN_LOW_MASK;
223 gen |= (spte >> MMIO_SPTE_GEN_HIGH_SHIFT) << MMIO_GEN_LOW_SHIFT;
227 static unsigned int kvm_current_mmio_generation(struct kvm_vcpu *vcpu)
229 return kvm_vcpu_memslots(vcpu)->generation & MMIO_GEN_MASK;
232 static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn,
235 unsigned int gen = kvm_current_mmio_generation(vcpu);
236 u64 mask = generation_mmio_spte_mask(gen);
238 access &= ACC_WRITE_MASK | ACC_USER_MASK;
239 mask |= shadow_mmio_mask | access | gfn << PAGE_SHIFT;
241 trace_mark_mmio_spte(sptep, gfn, access, gen);
242 mmu_spte_set(sptep, mask);
245 static bool is_mmio_spte(u64 spte)
247 return (spte & shadow_mmio_mask) == shadow_mmio_mask;
250 static gfn_t get_mmio_spte_gfn(u64 spte)
252 u64 mask = generation_mmio_spte_mask(MMIO_GEN_MASK) | shadow_mmio_mask;
253 return (spte & ~mask) >> PAGE_SHIFT;
256 static unsigned get_mmio_spte_access(u64 spte)
258 u64 mask = generation_mmio_spte_mask(MMIO_GEN_MASK) | shadow_mmio_mask;
259 return (spte & ~mask) & ~PAGE_MASK;
262 static bool set_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
263 kvm_pfn_t pfn, unsigned access)
265 if (unlikely(is_noslot_pfn(pfn))) {
266 mark_mmio_spte(vcpu, sptep, gfn, access);
273 static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte)
275 unsigned int kvm_gen, spte_gen;
277 kvm_gen = kvm_current_mmio_generation(vcpu);
278 spte_gen = get_mmio_spte_generation(spte);
280 trace_check_mmio_spte(spte, kvm_gen, spte_gen);
281 return likely(kvm_gen == spte_gen);
284 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
285 u64 dirty_mask, u64 nx_mask, u64 x_mask)
287 shadow_user_mask = user_mask;
288 shadow_accessed_mask = accessed_mask;
289 shadow_dirty_mask = dirty_mask;
290 shadow_nx_mask = nx_mask;
291 shadow_x_mask = x_mask;
293 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
295 static int is_cpuid_PSE36(void)
300 static int is_nx(struct kvm_vcpu *vcpu)
302 return vcpu->arch.efer & EFER_NX;
305 static int is_shadow_present_pte(u64 pte)
307 return pte & PT_PRESENT_MASK && !is_mmio_spte(pte);
310 static int is_large_pte(u64 pte)
312 return pte & PT_PAGE_SIZE_MASK;
315 static int is_last_spte(u64 pte, int level)
317 if (level == PT_PAGE_TABLE_LEVEL)
319 if (is_large_pte(pte))
324 static kvm_pfn_t spte_to_pfn(u64 pte)
326 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
329 static gfn_t pse36_gfn_delta(u32 gpte)
331 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
333 return (gpte & PT32_DIR_PSE36_MASK) << shift;
337 static void __set_spte(u64 *sptep, u64 spte)
342 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
347 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
349 return xchg(sptep, spte);
352 static u64 __get_spte_lockless(u64 *sptep)
354 return ACCESS_ONCE(*sptep);
365 static void count_spte_clear(u64 *sptep, u64 spte)
367 struct kvm_mmu_page *sp = page_header(__pa(sptep));
369 if (is_shadow_present_pte(spte))
372 /* Ensure the spte is completely set before we increase the count */
374 sp->clear_spte_count++;
377 static void __set_spte(u64 *sptep, u64 spte)
379 union split_spte *ssptep, sspte;
381 ssptep = (union split_spte *)sptep;
382 sspte = (union split_spte)spte;
384 ssptep->spte_high = sspte.spte_high;
387 * If we map the spte from nonpresent to present, We should store
388 * the high bits firstly, then set present bit, so cpu can not
389 * fetch this spte while we are setting the spte.
393 ssptep->spte_low = sspte.spte_low;
396 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
398 union split_spte *ssptep, sspte;
400 ssptep = (union split_spte *)sptep;
401 sspte = (union split_spte)spte;
403 ssptep->spte_low = sspte.spte_low;
406 * If we map the spte from present to nonpresent, we should clear
407 * present bit firstly to avoid vcpu fetch the old high bits.
411 ssptep->spte_high = sspte.spte_high;
412 count_spte_clear(sptep, spte);
415 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
417 union split_spte *ssptep, sspte, orig;
419 ssptep = (union split_spte *)sptep;
420 sspte = (union split_spte)spte;
422 /* xchg acts as a barrier before the setting of the high bits */
423 orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
424 orig.spte_high = ssptep->spte_high;
425 ssptep->spte_high = sspte.spte_high;
426 count_spte_clear(sptep, spte);
432 * The idea using the light way get the spte on x86_32 guest is from
433 * gup_get_pte(arch/x86/mm/gup.c).
435 * An spte tlb flush may be pending, because kvm_set_pte_rmapp
436 * coalesces them and we are running out of the MMU lock. Therefore
437 * we need to protect against in-progress updates of the spte.
439 * Reading the spte while an update is in progress may get the old value
440 * for the high part of the spte. The race is fine for a present->non-present
441 * change (because the high part of the spte is ignored for non-present spte),
442 * but for a present->present change we must reread the spte.
444 * All such changes are done in two steps (present->non-present and
445 * non-present->present), hence it is enough to count the number of
446 * present->non-present updates: if it changed while reading the spte,
447 * we might have hit the race. This is done using clear_spte_count.
449 static u64 __get_spte_lockless(u64 *sptep)
451 struct kvm_mmu_page *sp = page_header(__pa(sptep));
452 union split_spte spte, *orig = (union split_spte *)sptep;
456 count = sp->clear_spte_count;
459 spte.spte_low = orig->spte_low;
462 spte.spte_high = orig->spte_high;
465 if (unlikely(spte.spte_low != orig->spte_low ||
466 count != sp->clear_spte_count))
473 static bool spte_is_locklessly_modifiable(u64 spte)
475 return (spte & (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE)) ==
476 (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE);
479 static bool spte_has_volatile_bits(u64 spte)
482 * Always atomicly update spte if it can be updated
483 * out of mmu-lock, it can ensure dirty bit is not lost,
484 * also, it can help us to get a stable is_writable_pte()
485 * to ensure tlb flush is not missed.
487 if (spte_is_locklessly_modifiable(spte))
490 if (!shadow_accessed_mask)
493 if (!is_shadow_present_pte(spte))
496 if ((spte & shadow_accessed_mask) &&
497 (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
503 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
505 return (old_spte & bit_mask) && !(new_spte & bit_mask);
508 static bool spte_is_bit_changed(u64 old_spte, u64 new_spte, u64 bit_mask)
510 return (old_spte & bit_mask) != (new_spte & bit_mask);
513 /* Rules for using mmu_spte_set:
514 * Set the sptep from nonpresent to present.
515 * Note: the sptep being assigned *must* be either not present
516 * or in a state where the hardware will not attempt to update
519 static void mmu_spte_set(u64 *sptep, u64 new_spte)
521 WARN_ON(is_shadow_present_pte(*sptep));
522 __set_spte(sptep, new_spte);
525 /* Rules for using mmu_spte_update:
526 * Update the state bits, it means the mapped pfn is not changged.
528 * Whenever we overwrite a writable spte with a read-only one we
529 * should flush remote TLBs. Otherwise rmap_write_protect
530 * will find a read-only spte, even though the writable spte
531 * might be cached on a CPU's TLB, the return value indicates this
534 static bool mmu_spte_update(u64 *sptep, u64 new_spte)
536 u64 old_spte = *sptep;
539 WARN_ON(!is_shadow_present_pte(new_spte));
541 if (!is_shadow_present_pte(old_spte)) {
542 mmu_spte_set(sptep, new_spte);
546 if (!spte_has_volatile_bits(old_spte))
547 __update_clear_spte_fast(sptep, new_spte);
549 old_spte = __update_clear_spte_slow(sptep, new_spte);
552 * For the spte updated out of mmu-lock is safe, since
553 * we always atomicly update it, see the comments in
554 * spte_has_volatile_bits().
556 if (spte_is_locklessly_modifiable(old_spte) &&
557 !is_writable_pte(new_spte))
560 if (!shadow_accessed_mask)
564 * Flush TLB when accessed/dirty bits are changed in the page tables,
565 * to guarantee consistency between TLB and page tables.
567 if (spte_is_bit_changed(old_spte, new_spte,
568 shadow_accessed_mask | shadow_dirty_mask))
571 if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
572 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
573 if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
574 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
580 * Rules for using mmu_spte_clear_track_bits:
581 * It sets the sptep from present to nonpresent, and track the
582 * state bits, it is used to clear the last level sptep.
584 static int mmu_spte_clear_track_bits(u64 *sptep)
587 u64 old_spte = *sptep;
589 if (!spte_has_volatile_bits(old_spte))
590 __update_clear_spte_fast(sptep, 0ull);
592 old_spte = __update_clear_spte_slow(sptep, 0ull);
594 if (!is_shadow_present_pte(old_spte))
597 pfn = spte_to_pfn(old_spte);
600 * KVM does not hold the refcount of the page used by
601 * kvm mmu, before reclaiming the page, we should
602 * unmap it from mmu first.
604 WARN_ON(!kvm_is_reserved_pfn(pfn) && !page_count(pfn_to_page(pfn)));
606 if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
607 kvm_set_pfn_accessed(pfn);
608 if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
609 kvm_set_pfn_dirty(pfn);
614 * Rules for using mmu_spte_clear_no_track:
615 * Directly clear spte without caring the state bits of sptep,
616 * it is used to set the upper level spte.
618 static void mmu_spte_clear_no_track(u64 *sptep)
620 __update_clear_spte_fast(sptep, 0ull);
623 static u64 mmu_spte_get_lockless(u64 *sptep)
625 return __get_spte_lockless(sptep);
628 static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)
631 * Prevent page table teardown by making any free-er wait during
632 * kvm_flush_remote_tlbs() IPI to all active vcpus.
635 vcpu->mode = READING_SHADOW_PAGE_TABLES;
637 * Make sure a following spte read is not reordered ahead of the write
643 static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)
646 * Make sure the write to vcpu->mode is not reordered in front of
647 * reads to sptes. If it does, kvm_commit_zap_page() can see us
648 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
651 vcpu->mode = OUTSIDE_GUEST_MODE;
655 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
656 struct kmem_cache *base_cache, int min)
660 if (cache->nobjs >= min)
662 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
663 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
666 cache->objects[cache->nobjs++] = obj;
671 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache *cache)
676 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
677 struct kmem_cache *cache)
680 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
683 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
688 if (cache->nobjs >= min)
690 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
691 page = (void *)__get_free_page(GFP_KERNEL);
694 cache->objects[cache->nobjs++] = page;
699 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
702 free_page((unsigned long)mc->objects[--mc->nobjs]);
705 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
709 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
710 pte_list_desc_cache, 8 + PTE_PREFETCH_NUM);
713 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
716 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
717 mmu_page_header_cache, 4);
722 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
724 mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
725 pte_list_desc_cache);
726 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
727 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
728 mmu_page_header_cache);
731 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
736 p = mc->objects[--mc->nobjs];
740 static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu)
742 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache);
745 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
747 kmem_cache_free(pte_list_desc_cache, pte_list_desc);
750 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
752 if (!sp->role.direct)
753 return sp->gfns[index];
755 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
758 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
761 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
763 sp->gfns[index] = gfn;
767 * Return the pointer to the large page information for a given gfn,
768 * handling slots that are not large page aligned.
770 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
771 struct kvm_memory_slot *slot,
776 idx = gfn_to_index(gfn, slot->base_gfn, level);
777 return &slot->arch.lpage_info[level - 2][idx];
780 static void update_gfn_disallow_lpage_count(struct kvm_memory_slot *slot,
781 gfn_t gfn, int count)
783 struct kvm_lpage_info *linfo;
786 for (i = PT_DIRECTORY_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
787 linfo = lpage_info_slot(gfn, slot, i);
788 linfo->disallow_lpage += count;
789 WARN_ON(linfo->disallow_lpage < 0);
793 void kvm_mmu_gfn_disallow_lpage(struct kvm_memory_slot *slot, gfn_t gfn)
795 update_gfn_disallow_lpage_count(slot, gfn, 1);
798 void kvm_mmu_gfn_allow_lpage(struct kvm_memory_slot *slot, gfn_t gfn)
800 update_gfn_disallow_lpage_count(slot, gfn, -1);
803 static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
805 struct kvm_memslots *slots;
806 struct kvm_memory_slot *slot;
809 kvm->arch.indirect_shadow_pages++;
811 slots = kvm_memslots_for_spte_role(kvm, sp->role);
812 slot = __gfn_to_memslot(slots, gfn);
814 /* the non-leaf shadow pages are keeping readonly. */
815 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
816 return kvm_slot_page_track_add_page(kvm, slot, gfn,
817 KVM_PAGE_TRACK_WRITE);
819 kvm_mmu_gfn_disallow_lpage(slot, gfn);
822 static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
824 struct kvm_memslots *slots;
825 struct kvm_memory_slot *slot;
828 kvm->arch.indirect_shadow_pages--;
830 slots = kvm_memslots_for_spte_role(kvm, sp->role);
831 slot = __gfn_to_memslot(slots, gfn);
832 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
833 return kvm_slot_page_track_remove_page(kvm, slot, gfn,
834 KVM_PAGE_TRACK_WRITE);
836 kvm_mmu_gfn_allow_lpage(slot, gfn);
839 static bool __mmu_gfn_lpage_is_disallowed(gfn_t gfn, int level,
840 struct kvm_memory_slot *slot)
842 struct kvm_lpage_info *linfo;
845 linfo = lpage_info_slot(gfn, slot, level);
846 return !!linfo->disallow_lpage;
852 static bool mmu_gfn_lpage_is_disallowed(struct kvm_vcpu *vcpu, gfn_t gfn,
855 struct kvm_memory_slot *slot;
857 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
858 return __mmu_gfn_lpage_is_disallowed(gfn, level, slot);
861 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
863 unsigned long page_size;
866 page_size = kvm_host_page_size(kvm, gfn);
868 for (i = PT_PAGE_TABLE_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
869 if (page_size >= KVM_HPAGE_SIZE(i))
878 static inline bool memslot_valid_for_gpte(struct kvm_memory_slot *slot,
881 if (!slot || slot->flags & KVM_MEMSLOT_INVALID)
883 if (no_dirty_log && slot->dirty_bitmap)
889 static struct kvm_memory_slot *
890 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
893 struct kvm_memory_slot *slot;
895 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
896 if (!memslot_valid_for_gpte(slot, no_dirty_log))
902 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn,
903 bool *force_pt_level)
905 int host_level, level, max_level;
906 struct kvm_memory_slot *slot;
908 if (unlikely(*force_pt_level))
909 return PT_PAGE_TABLE_LEVEL;
911 slot = kvm_vcpu_gfn_to_memslot(vcpu, large_gfn);
912 *force_pt_level = !memslot_valid_for_gpte(slot, true);
913 if (unlikely(*force_pt_level))
914 return PT_PAGE_TABLE_LEVEL;
916 host_level = host_mapping_level(vcpu->kvm, large_gfn);
918 if (host_level == PT_PAGE_TABLE_LEVEL)
921 max_level = min(kvm_x86_ops->get_lpage_level(), host_level);
923 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
924 if (__mmu_gfn_lpage_is_disallowed(large_gfn, level, slot))
931 * About rmap_head encoding:
933 * If the bit zero of rmap_head->val is clear, then it points to the only spte
934 * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct
935 * pte_list_desc containing more mappings.
939 * Returns the number of pointers in the rmap chain, not counting the new one.
941 static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte,
942 struct kvm_rmap_head *rmap_head)
944 struct pte_list_desc *desc;
947 if (!rmap_head->val) {
948 rmap_printk("pte_list_add: %p %llx 0->1\n", spte, *spte);
949 rmap_head->val = (unsigned long)spte;
950 } else if (!(rmap_head->val & 1)) {
951 rmap_printk("pte_list_add: %p %llx 1->many\n", spte, *spte);
952 desc = mmu_alloc_pte_list_desc(vcpu);
953 desc->sptes[0] = (u64 *)rmap_head->val;
954 desc->sptes[1] = spte;
955 rmap_head->val = (unsigned long)desc | 1;
958 rmap_printk("pte_list_add: %p %llx many->many\n", spte, *spte);
959 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
960 while (desc->sptes[PTE_LIST_EXT-1] && desc->more) {
962 count += PTE_LIST_EXT;
964 if (desc->sptes[PTE_LIST_EXT-1]) {
965 desc->more = mmu_alloc_pte_list_desc(vcpu);
968 for (i = 0; desc->sptes[i]; ++i)
970 desc->sptes[i] = spte;
976 pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head,
977 struct pte_list_desc *desc, int i,
978 struct pte_list_desc *prev_desc)
982 for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j)
984 desc->sptes[i] = desc->sptes[j];
985 desc->sptes[j] = NULL;
988 if (!prev_desc && !desc->more)
989 rmap_head->val = (unsigned long)desc->sptes[0];
992 prev_desc->more = desc->more;
994 rmap_head->val = (unsigned long)desc->more | 1;
995 mmu_free_pte_list_desc(desc);
998 static void pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head)
1000 struct pte_list_desc *desc;
1001 struct pte_list_desc *prev_desc;
1004 if (!rmap_head->val) {
1005 printk(KERN_ERR "pte_list_remove: %p 0->BUG\n", spte);
1007 } else if (!(rmap_head->val & 1)) {
1008 rmap_printk("pte_list_remove: %p 1->0\n", spte);
1009 if ((u64 *)rmap_head->val != spte) {
1010 printk(KERN_ERR "pte_list_remove: %p 1->BUG\n", spte);
1015 rmap_printk("pte_list_remove: %p many->many\n", spte);
1016 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1019 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i) {
1020 if (desc->sptes[i] == spte) {
1021 pte_list_desc_remove_entry(rmap_head,
1022 desc, i, prev_desc);
1029 pr_err("pte_list_remove: %p many->many\n", spte);
1034 static struct kvm_rmap_head *__gfn_to_rmap(gfn_t gfn, int level,
1035 struct kvm_memory_slot *slot)
1039 idx = gfn_to_index(gfn, slot->base_gfn, level);
1040 return &slot->arch.rmap[level - PT_PAGE_TABLE_LEVEL][idx];
1043 static struct kvm_rmap_head *gfn_to_rmap(struct kvm *kvm, gfn_t gfn,
1044 struct kvm_mmu_page *sp)
1046 struct kvm_memslots *slots;
1047 struct kvm_memory_slot *slot;
1049 slots = kvm_memslots_for_spte_role(kvm, sp->role);
1050 slot = __gfn_to_memslot(slots, gfn);
1051 return __gfn_to_rmap(gfn, sp->role.level, slot);
1054 static bool rmap_can_add(struct kvm_vcpu *vcpu)
1056 struct kvm_mmu_memory_cache *cache;
1058 cache = &vcpu->arch.mmu_pte_list_desc_cache;
1059 return mmu_memory_cache_free_objects(cache);
1062 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1064 struct kvm_mmu_page *sp;
1065 struct kvm_rmap_head *rmap_head;
1067 sp = page_header(__pa(spte));
1068 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
1069 rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp);
1070 return pte_list_add(vcpu, spte, rmap_head);
1073 static void rmap_remove(struct kvm *kvm, u64 *spte)
1075 struct kvm_mmu_page *sp;
1077 struct kvm_rmap_head *rmap_head;
1079 sp = page_header(__pa(spte));
1080 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
1081 rmap_head = gfn_to_rmap(kvm, gfn, sp);
1082 pte_list_remove(spte, rmap_head);
1086 * Used by the following functions to iterate through the sptes linked by a
1087 * rmap. All fields are private and not assumed to be used outside.
1089 struct rmap_iterator {
1090 /* private fields */
1091 struct pte_list_desc *desc; /* holds the sptep if not NULL */
1092 int pos; /* index of the sptep */
1096 * Iteration must be started by this function. This should also be used after
1097 * removing/dropping sptes from the rmap link because in such cases the
1098 * information in the itererator may not be valid.
1100 * Returns sptep if found, NULL otherwise.
1102 static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head,
1103 struct rmap_iterator *iter)
1107 if (!rmap_head->val)
1110 if (!(rmap_head->val & 1)) {
1112 sptep = (u64 *)rmap_head->val;
1116 iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1118 sptep = iter->desc->sptes[iter->pos];
1120 BUG_ON(!is_shadow_present_pte(*sptep));
1125 * Must be used with a valid iterator: e.g. after rmap_get_first().
1127 * Returns sptep if found, NULL otherwise.
1129 static u64 *rmap_get_next(struct rmap_iterator *iter)
1134 if (iter->pos < PTE_LIST_EXT - 1) {
1136 sptep = iter->desc->sptes[iter->pos];
1141 iter->desc = iter->desc->more;
1145 /* desc->sptes[0] cannot be NULL */
1146 sptep = iter->desc->sptes[iter->pos];
1153 BUG_ON(!is_shadow_present_pte(*sptep));
1157 #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \
1158 for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \
1159 _spte_; _spte_ = rmap_get_next(_iter_))
1161 static void drop_spte(struct kvm *kvm, u64 *sptep)
1163 if (mmu_spte_clear_track_bits(sptep))
1164 rmap_remove(kvm, sptep);
1168 static bool __drop_large_spte(struct kvm *kvm, u64 *sptep)
1170 if (is_large_pte(*sptep)) {
1171 WARN_ON(page_header(__pa(sptep))->role.level ==
1172 PT_PAGE_TABLE_LEVEL);
1173 drop_spte(kvm, sptep);
1181 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1183 if (__drop_large_spte(vcpu->kvm, sptep))
1184 kvm_flush_remote_tlbs(vcpu->kvm);
1188 * Write-protect on the specified @sptep, @pt_protect indicates whether
1189 * spte write-protection is caused by protecting shadow page table.
1191 * Note: write protection is difference between dirty logging and spte
1193 * - for dirty logging, the spte can be set to writable at anytime if
1194 * its dirty bitmap is properly set.
1195 * - for spte protection, the spte can be writable only after unsync-ing
1198 * Return true if tlb need be flushed.
1200 static bool spte_write_protect(struct kvm *kvm, u64 *sptep, bool pt_protect)
1204 if (!is_writable_pte(spte) &&
1205 !(pt_protect && spte_is_locklessly_modifiable(spte)))
1208 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep, *sptep);
1211 spte &= ~SPTE_MMU_WRITEABLE;
1212 spte = spte & ~PT_WRITABLE_MASK;
1214 return mmu_spte_update(sptep, spte);
1217 static bool __rmap_write_protect(struct kvm *kvm,
1218 struct kvm_rmap_head *rmap_head,
1222 struct rmap_iterator iter;
1225 for_each_rmap_spte(rmap_head, &iter, sptep)
1226 flush |= spte_write_protect(kvm, sptep, pt_protect);
1231 static bool spte_clear_dirty(struct kvm *kvm, u64 *sptep)
1235 rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep, *sptep);
1237 spte &= ~shadow_dirty_mask;
1239 return mmu_spte_update(sptep, spte);
1242 static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head)
1245 struct rmap_iterator iter;
1248 for_each_rmap_spte(rmap_head, &iter, sptep)
1249 flush |= spte_clear_dirty(kvm, sptep);
1254 static bool spte_set_dirty(struct kvm *kvm, u64 *sptep)
1258 rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep, *sptep);
1260 spte |= shadow_dirty_mask;
1262 return mmu_spte_update(sptep, spte);
1265 static bool __rmap_set_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head)
1268 struct rmap_iterator iter;
1271 for_each_rmap_spte(rmap_head, &iter, sptep)
1272 flush |= spte_set_dirty(kvm, sptep);
1278 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1279 * @kvm: kvm instance
1280 * @slot: slot to protect
1281 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1282 * @mask: indicates which pages we should protect
1284 * Used when we do not need to care about huge page mappings: e.g. during dirty
1285 * logging we do not have any such mappings.
1287 static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
1288 struct kvm_memory_slot *slot,
1289 gfn_t gfn_offset, unsigned long mask)
1291 struct kvm_rmap_head *rmap_head;
1294 rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1295 PT_PAGE_TABLE_LEVEL, slot);
1296 __rmap_write_protect(kvm, rmap_head, false);
1298 /* clear the first set bit */
1304 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages
1305 * @kvm: kvm instance
1306 * @slot: slot to clear D-bit
1307 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1308 * @mask: indicates which pages we should clear D-bit
1310 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1312 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1313 struct kvm_memory_slot *slot,
1314 gfn_t gfn_offset, unsigned long mask)
1316 struct kvm_rmap_head *rmap_head;
1319 rmap_head = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1320 PT_PAGE_TABLE_LEVEL, slot);
1321 __rmap_clear_dirty(kvm, rmap_head);
1323 /* clear the first set bit */
1327 EXPORT_SYMBOL_GPL(kvm_mmu_clear_dirty_pt_masked);
1330 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1333 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1334 * enable dirty logging for them.
1336 * Used when we do not need to care about huge page mappings: e.g. during dirty
1337 * logging we do not have any such mappings.
1339 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1340 struct kvm_memory_slot *slot,
1341 gfn_t gfn_offset, unsigned long mask)
1343 if (kvm_x86_ops->enable_log_dirty_pt_masked)
1344 kvm_x86_ops->enable_log_dirty_pt_masked(kvm, slot, gfn_offset,
1347 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1350 bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm,
1351 struct kvm_memory_slot *slot, u64 gfn)
1353 struct kvm_rmap_head *rmap_head;
1355 bool write_protected = false;
1357 for (i = PT_PAGE_TABLE_LEVEL; i <= PT_MAX_HUGEPAGE_LEVEL; ++i) {
1358 rmap_head = __gfn_to_rmap(gfn, i, slot);
1359 write_protected |= __rmap_write_protect(kvm, rmap_head, true);
1362 return write_protected;
1365 static bool rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
1367 struct kvm_memory_slot *slot;
1369 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
1370 return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn);
1373 static bool kvm_zap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head)
1376 struct rmap_iterator iter;
1379 while ((sptep = rmap_get_first(rmap_head, &iter))) {
1380 rmap_printk("%s: spte %p %llx.\n", __func__, sptep, *sptep);
1382 drop_spte(kvm, sptep);
1389 static int kvm_unmap_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1390 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1393 return kvm_zap_rmapp(kvm, rmap_head);
1396 static int kvm_set_pte_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1397 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1401 struct rmap_iterator iter;
1404 pte_t *ptep = (pte_t *)data;
1407 WARN_ON(pte_huge(*ptep));
1408 new_pfn = pte_pfn(*ptep);
1411 for_each_rmap_spte(rmap_head, &iter, sptep) {
1412 rmap_printk("kvm_set_pte_rmapp: spte %p %llx gfn %llx (%d)\n",
1413 sptep, *sptep, gfn, level);
1417 if (pte_write(*ptep)) {
1418 drop_spte(kvm, sptep);
1421 new_spte = *sptep & ~PT64_BASE_ADDR_MASK;
1422 new_spte |= (u64)new_pfn << PAGE_SHIFT;
1424 new_spte &= ~PT_WRITABLE_MASK;
1425 new_spte &= ~SPTE_HOST_WRITEABLE;
1426 new_spte &= ~shadow_accessed_mask;
1428 mmu_spte_clear_track_bits(sptep);
1429 mmu_spte_set(sptep, new_spte);
1434 kvm_flush_remote_tlbs(kvm);
1439 struct slot_rmap_walk_iterator {
1441 struct kvm_memory_slot *slot;
1447 /* output fields. */
1449 struct kvm_rmap_head *rmap;
1452 /* private field. */
1453 struct kvm_rmap_head *end_rmap;
1457 rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level)
1459 iterator->level = level;
1460 iterator->gfn = iterator->start_gfn;
1461 iterator->rmap = __gfn_to_rmap(iterator->gfn, level, iterator->slot);
1462 iterator->end_rmap = __gfn_to_rmap(iterator->end_gfn, level,
1467 slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator,
1468 struct kvm_memory_slot *slot, int start_level,
1469 int end_level, gfn_t start_gfn, gfn_t end_gfn)
1471 iterator->slot = slot;
1472 iterator->start_level = start_level;
1473 iterator->end_level = end_level;
1474 iterator->start_gfn = start_gfn;
1475 iterator->end_gfn = end_gfn;
1477 rmap_walk_init_level(iterator, iterator->start_level);
1480 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator)
1482 return !!iterator->rmap;
1485 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator)
1487 if (++iterator->rmap <= iterator->end_rmap) {
1488 iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level));
1492 if (++iterator->level > iterator->end_level) {
1493 iterator->rmap = NULL;
1497 rmap_walk_init_level(iterator, iterator->level);
1500 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1501 _start_gfn, _end_gfn, _iter_) \
1502 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1503 _end_level_, _start_gfn, _end_gfn); \
1504 slot_rmap_walk_okay(_iter_); \
1505 slot_rmap_walk_next(_iter_))
1507 static int kvm_handle_hva_range(struct kvm *kvm,
1508 unsigned long start,
1511 int (*handler)(struct kvm *kvm,
1512 struct kvm_rmap_head *rmap_head,
1513 struct kvm_memory_slot *slot,
1516 unsigned long data))
1518 struct kvm_memslots *slots;
1519 struct kvm_memory_slot *memslot;
1520 struct slot_rmap_walk_iterator iterator;
1524 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
1525 slots = __kvm_memslots(kvm, i);
1526 kvm_for_each_memslot(memslot, slots) {
1527 unsigned long hva_start, hva_end;
1528 gfn_t gfn_start, gfn_end;
1530 hva_start = max(start, memslot->userspace_addr);
1531 hva_end = min(end, memslot->userspace_addr +
1532 (memslot->npages << PAGE_SHIFT));
1533 if (hva_start >= hva_end)
1536 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1537 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1539 gfn_start = hva_to_gfn_memslot(hva_start, memslot);
1540 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
1542 for_each_slot_rmap_range(memslot, PT_PAGE_TABLE_LEVEL,
1543 PT_MAX_HUGEPAGE_LEVEL,
1544 gfn_start, gfn_end - 1,
1546 ret |= handler(kvm, iterator.rmap, memslot,
1547 iterator.gfn, iterator.level, data);
1554 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
1556 int (*handler)(struct kvm *kvm,
1557 struct kvm_rmap_head *rmap_head,
1558 struct kvm_memory_slot *slot,
1559 gfn_t gfn, int level,
1560 unsigned long data))
1562 return kvm_handle_hva_range(kvm, hva, hva + 1, data, handler);
1565 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1567 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
1570 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
1572 return kvm_handle_hva_range(kvm, start, end, 0, kvm_unmap_rmapp);
1575 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1577 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
1580 static int kvm_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1581 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1585 struct rmap_iterator uninitialized_var(iter);
1588 BUG_ON(!shadow_accessed_mask);
1590 for_each_rmap_spte(rmap_head, &iter, sptep) {
1591 if (*sptep & shadow_accessed_mask) {
1593 clear_bit((ffs(shadow_accessed_mask) - 1),
1594 (unsigned long *)sptep);
1598 trace_kvm_age_page(gfn, level, slot, young);
1602 static int kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1603 struct kvm_memory_slot *slot, gfn_t gfn,
1604 int level, unsigned long data)
1607 struct rmap_iterator iter;
1611 * If there's no access bit in the secondary pte set by the
1612 * hardware it's up to gup-fast/gup to set the access bit in
1613 * the primary pte or in the page structure.
1615 if (!shadow_accessed_mask)
1618 for_each_rmap_spte(rmap_head, &iter, sptep) {
1619 if (*sptep & shadow_accessed_mask) {
1628 #define RMAP_RECYCLE_THRESHOLD 1000
1630 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1632 struct kvm_rmap_head *rmap_head;
1633 struct kvm_mmu_page *sp;
1635 sp = page_header(__pa(spte));
1637 rmap_head = gfn_to_rmap(vcpu->kvm, gfn, sp);
1639 kvm_unmap_rmapp(vcpu->kvm, rmap_head, NULL, gfn, sp->role.level, 0);
1640 kvm_flush_remote_tlbs(vcpu->kvm);
1643 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
1646 * In case of absence of EPT Access and Dirty Bits supports,
1647 * emulate the accessed bit for EPT, by checking if this page has
1648 * an EPT mapping, and clearing it if it does. On the next access,
1649 * a new EPT mapping will be established.
1650 * This has some overhead, but not as much as the cost of swapping
1651 * out actively used pages or breaking up actively used hugepages.
1653 if (!shadow_accessed_mask) {
1655 * We are holding the kvm->mmu_lock, and we are blowing up
1656 * shadow PTEs. MMU notifier consumers need to be kept at bay.
1657 * This is correct as long as we don't decouple the mmu_lock
1658 * protected regions (like invalidate_range_start|end does).
1660 kvm->mmu_notifier_seq++;
1661 return kvm_handle_hva_range(kvm, start, end, 0,
1665 return kvm_handle_hva_range(kvm, start, end, 0, kvm_age_rmapp);
1668 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1670 return kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp);
1674 static int is_empty_shadow_page(u64 *spt)
1679 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
1680 if (is_shadow_present_pte(*pos)) {
1681 printk(KERN_ERR "%s: %p %llx\n", __func__,
1690 * This value is the sum of all of the kvm instances's
1691 * kvm->arch.n_used_mmu_pages values. We need a global,
1692 * aggregate version in order to make the slab shrinker
1695 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
1697 kvm->arch.n_used_mmu_pages += nr;
1698 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1701 static void kvm_mmu_free_page(struct kvm_mmu_page *sp)
1703 MMU_WARN_ON(!is_empty_shadow_page(sp->spt));
1704 hlist_del(&sp->hash_link);
1705 list_del(&sp->link);
1706 free_page((unsigned long)sp->spt);
1707 if (!sp->role.direct)
1708 free_page((unsigned long)sp->gfns);
1709 kmem_cache_free(mmu_page_header_cache, sp);
1712 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1714 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1717 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1718 struct kvm_mmu_page *sp, u64 *parent_pte)
1723 pte_list_add(vcpu, parent_pte, &sp->parent_ptes);
1726 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1729 pte_list_remove(parent_pte, &sp->parent_ptes);
1732 static void drop_parent_pte(struct kvm_mmu_page *sp,
1735 mmu_page_remove_parent_pte(sp, parent_pte);
1736 mmu_spte_clear_no_track(parent_pte);
1739 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, int direct)
1741 struct kvm_mmu_page *sp;
1743 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache);
1744 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache);
1746 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache);
1747 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1750 * The active_mmu_pages list is the FIFO list, do not move the
1751 * page until it is zapped. kvm_zap_obsolete_pages depends on
1752 * this feature. See the comments in kvm_zap_obsolete_pages().
1754 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1755 kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1759 static void mark_unsync(u64 *spte);
1760 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1763 struct rmap_iterator iter;
1765 for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) {
1770 static void mark_unsync(u64 *spte)
1772 struct kvm_mmu_page *sp;
1775 sp = page_header(__pa(spte));
1776 index = spte - sp->spt;
1777 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1779 if (sp->unsync_children++)
1781 kvm_mmu_mark_parents_unsync(sp);
1784 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1785 struct kvm_mmu_page *sp)
1790 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1794 static void nonpaging_update_pte(struct kvm_vcpu *vcpu,
1795 struct kvm_mmu_page *sp, u64 *spte,
1801 #define KVM_PAGE_ARRAY_NR 16
1803 struct kvm_mmu_pages {
1804 struct mmu_page_and_offset {
1805 struct kvm_mmu_page *sp;
1807 } page[KVM_PAGE_ARRAY_NR];
1811 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1817 for (i=0; i < pvec->nr; i++)
1818 if (pvec->page[i].sp == sp)
1821 pvec->page[pvec->nr].sp = sp;
1822 pvec->page[pvec->nr].idx = idx;
1824 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1827 static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx)
1829 --sp->unsync_children;
1830 WARN_ON((int)sp->unsync_children < 0);
1831 __clear_bit(idx, sp->unsync_child_bitmap);
1834 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1835 struct kvm_mmu_pages *pvec)
1837 int i, ret, nr_unsync_leaf = 0;
1839 for_each_set_bit(i, sp->unsync_child_bitmap, 512) {
1840 struct kvm_mmu_page *child;
1841 u64 ent = sp->spt[i];
1843 if (!is_shadow_present_pte(ent) || is_large_pte(ent)) {
1844 clear_unsync_child_bit(sp, i);
1848 child = page_header(ent & PT64_BASE_ADDR_MASK);
1850 if (child->unsync_children) {
1851 if (mmu_pages_add(pvec, child, i))
1854 ret = __mmu_unsync_walk(child, pvec);
1856 clear_unsync_child_bit(sp, i);
1858 } else if (ret > 0) {
1859 nr_unsync_leaf += ret;
1862 } else if (child->unsync) {
1864 if (mmu_pages_add(pvec, child, i))
1867 clear_unsync_child_bit(sp, i);
1870 return nr_unsync_leaf;
1873 #define INVALID_INDEX (-1)
1875 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1876 struct kvm_mmu_pages *pvec)
1879 if (!sp->unsync_children)
1882 mmu_pages_add(pvec, sp, INVALID_INDEX);
1883 return __mmu_unsync_walk(sp, pvec);
1886 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1888 WARN_ON(!sp->unsync);
1889 trace_kvm_mmu_sync_page(sp);
1891 --kvm->stat.mmu_unsync;
1894 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1895 struct list_head *invalid_list);
1896 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1897 struct list_head *invalid_list);
1900 * NOTE: we should pay more attention on the zapped-obsolete page
1901 * (is_obsolete_sp(sp) && sp->role.invalid) when you do hash list walk
1902 * since it has been deleted from active_mmu_pages but still can be found
1905 * for_each_gfn_indirect_valid_sp has skipped that kind of page and
1906 * kvm_mmu_get_page(), the only user of for_each_gfn_sp(), has skipped
1907 * all the obsolete pages.
1909 #define for_each_gfn_sp(_kvm, _sp, _gfn) \
1910 hlist_for_each_entry(_sp, \
1911 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)], hash_link) \
1912 if ((_sp)->gfn != (_gfn)) {} else
1914 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1915 for_each_gfn_sp(_kvm, _sp, _gfn) \
1916 if ((_sp)->role.direct || (_sp)->role.invalid) {} else
1918 /* @sp->gfn should be write-protected at the call site */
1919 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1920 struct list_head *invalid_list, bool clear_unsync)
1922 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1923 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1928 kvm_unlink_unsync_page(vcpu->kvm, sp);
1930 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1931 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1935 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1939 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1940 struct kvm_mmu_page *sp)
1942 LIST_HEAD(invalid_list);
1945 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1947 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1952 #ifdef CONFIG_KVM_MMU_AUDIT
1953 #include "mmu_audit.c"
1955 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { }
1956 static void mmu_audit_disable(void) { }
1959 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1960 struct list_head *invalid_list)
1962 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1965 /* @gfn should be write-protected at the call site */
1966 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1968 struct kvm_mmu_page *s;
1969 LIST_HEAD(invalid_list);
1972 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
1976 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1977 kvm_unlink_unsync_page(vcpu->kvm, s);
1978 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1979 (vcpu->arch.mmu.sync_page(vcpu, s))) {
1980 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1986 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1988 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
1991 struct mmu_page_path {
1992 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL];
1993 unsigned int idx[PT64_ROOT_LEVEL];
1996 #define for_each_sp(pvec, sp, parents, i) \
1997 for (i = mmu_pages_first(&pvec, &parents); \
1998 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1999 i = mmu_pages_next(&pvec, &parents, i))
2001 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
2002 struct mmu_page_path *parents,
2007 for (n = i+1; n < pvec->nr; n++) {
2008 struct kvm_mmu_page *sp = pvec->page[n].sp;
2009 unsigned idx = pvec->page[n].idx;
2010 int level = sp->role.level;
2012 parents->idx[level-1] = idx;
2013 if (level == PT_PAGE_TABLE_LEVEL)
2016 parents->parent[level-2] = sp;
2022 static int mmu_pages_first(struct kvm_mmu_pages *pvec,
2023 struct mmu_page_path *parents)
2025 struct kvm_mmu_page *sp;
2031 WARN_ON(pvec->page[0].idx != INVALID_INDEX);
2033 sp = pvec->page[0].sp;
2034 level = sp->role.level;
2035 WARN_ON(level == PT_PAGE_TABLE_LEVEL);
2037 parents->parent[level-2] = sp;
2039 /* Also set up a sentinel. Further entries in pvec are all
2040 * children of sp, so this element is never overwritten.
2042 parents->parent[level-1] = NULL;
2043 return mmu_pages_next(pvec, parents, 0);
2046 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
2048 struct kvm_mmu_page *sp;
2049 unsigned int level = 0;
2052 unsigned int idx = parents->idx[level];
2053 sp = parents->parent[level];
2057 WARN_ON(idx == INVALID_INDEX);
2058 clear_unsync_child_bit(sp, idx);
2060 } while (!sp->unsync_children);
2063 static void mmu_sync_children(struct kvm_vcpu *vcpu,
2064 struct kvm_mmu_page *parent)
2067 struct kvm_mmu_page *sp;
2068 struct mmu_page_path parents;
2069 struct kvm_mmu_pages pages;
2070 LIST_HEAD(invalid_list);
2072 while (mmu_unsync_walk(parent, &pages)) {
2073 bool protected = false;
2075 for_each_sp(pages, sp, parents, i)
2076 protected |= rmap_write_protect(vcpu, sp->gfn);
2079 kvm_flush_remote_tlbs(vcpu->kvm);
2081 for_each_sp(pages, sp, parents, i) {
2082 kvm_sync_page(vcpu, sp, &invalid_list);
2083 mmu_pages_clear_parents(&parents);
2085 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2086 cond_resched_lock(&vcpu->kvm->mmu_lock);
2090 static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp)
2092 atomic_set(&sp->write_flooding_count, 0);
2095 static void clear_sp_write_flooding_count(u64 *spte)
2097 struct kvm_mmu_page *sp = page_header(__pa(spte));
2099 __clear_sp_write_flooding_count(sp);
2102 static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp)
2104 return unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen);
2107 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
2114 union kvm_mmu_page_role role;
2116 struct kvm_mmu_page *sp;
2117 bool need_sync = false;
2119 role = vcpu->arch.mmu.base_role;
2121 role.direct = direct;
2124 role.access = access;
2125 if (!vcpu->arch.mmu.direct_map
2126 && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
2127 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
2128 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
2129 role.quadrant = quadrant;
2131 for_each_gfn_sp(vcpu->kvm, sp, gfn) {
2132 if (is_obsolete_sp(vcpu->kvm, sp))
2135 if (!need_sync && sp->unsync)
2138 if (sp->role.word != role.word)
2141 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
2144 if (sp->unsync_children)
2145 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
2147 __clear_sp_write_flooding_count(sp);
2148 trace_kvm_mmu_get_page(sp, false);
2152 ++vcpu->kvm->stat.mmu_cache_miss;
2154 sp = kvm_mmu_alloc_page(vcpu, direct);
2158 hlist_add_head(&sp->hash_link,
2159 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
2162 * we should do write protection before syncing pages
2163 * otherwise the content of the synced shadow page may
2164 * be inconsistent with guest page table.
2166 account_shadowed(vcpu->kvm, sp);
2167 if (level == PT_PAGE_TABLE_LEVEL &&
2168 rmap_write_protect(vcpu, gfn))
2169 kvm_flush_remote_tlbs(vcpu->kvm);
2171 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
2172 kvm_sync_pages(vcpu, gfn);
2174 sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen;
2175 clear_page(sp->spt);
2176 trace_kvm_mmu_get_page(sp, true);
2180 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
2181 struct kvm_vcpu *vcpu, u64 addr)
2183 iterator->addr = addr;
2184 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
2185 iterator->level = vcpu->arch.mmu.shadow_root_level;
2187 if (iterator->level == PT64_ROOT_LEVEL &&
2188 vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
2189 !vcpu->arch.mmu.direct_map)
2192 if (iterator->level == PT32E_ROOT_LEVEL) {
2193 iterator->shadow_addr
2194 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
2195 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
2197 if (!iterator->shadow_addr)
2198 iterator->level = 0;
2202 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
2204 if (iterator->level < PT_PAGE_TABLE_LEVEL)
2207 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
2208 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
2212 static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator,
2215 if (is_last_spte(spte, iterator->level)) {
2216 iterator->level = 0;
2220 iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK;
2224 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
2226 return __shadow_walk_next(iterator, *iterator->sptep);
2229 static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep,
2230 struct kvm_mmu_page *sp)
2234 BUILD_BUG_ON(VMX_EPT_READABLE_MASK != PT_PRESENT_MASK ||
2235 VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK);
2237 spte = __pa(sp->spt) | PT_PRESENT_MASK | PT_WRITABLE_MASK |
2238 shadow_user_mask | shadow_x_mask | shadow_accessed_mask;
2240 mmu_spte_set(sptep, spte);
2242 mmu_page_add_parent_pte(vcpu, sp, sptep);
2244 if (sp->unsync_children || sp->unsync)
2248 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2249 unsigned direct_access)
2251 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
2252 struct kvm_mmu_page *child;
2255 * For the direct sp, if the guest pte's dirty bit
2256 * changed form clean to dirty, it will corrupt the
2257 * sp's access: allow writable in the read-only sp,
2258 * so we should update the spte at this point to get
2259 * a new sp with the correct access.
2261 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
2262 if (child->role.access == direct_access)
2265 drop_parent_pte(child, sptep);
2266 kvm_flush_remote_tlbs(vcpu->kvm);
2270 static bool mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
2274 struct kvm_mmu_page *child;
2277 if (is_shadow_present_pte(pte)) {
2278 if (is_last_spte(pte, sp->role.level)) {
2279 drop_spte(kvm, spte);
2280 if (is_large_pte(pte))
2283 child = page_header(pte & PT64_BASE_ADDR_MASK);
2284 drop_parent_pte(child, spte);
2289 if (is_mmio_spte(pte))
2290 mmu_spte_clear_no_track(spte);
2295 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
2296 struct kvm_mmu_page *sp)
2300 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2301 mmu_page_zap_pte(kvm, sp, sp->spt + i);
2304 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
2307 struct rmap_iterator iter;
2309 while ((sptep = rmap_get_first(&sp->parent_ptes, &iter)))
2310 drop_parent_pte(sp, sptep);
2313 static int mmu_zap_unsync_children(struct kvm *kvm,
2314 struct kvm_mmu_page *parent,
2315 struct list_head *invalid_list)
2318 struct mmu_page_path parents;
2319 struct kvm_mmu_pages pages;
2321 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
2324 while (mmu_unsync_walk(parent, &pages)) {
2325 struct kvm_mmu_page *sp;
2327 for_each_sp(pages, sp, parents, i) {
2328 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2329 mmu_pages_clear_parents(&parents);
2337 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
2338 struct list_head *invalid_list)
2342 trace_kvm_mmu_prepare_zap_page(sp);
2343 ++kvm->stat.mmu_shadow_zapped;
2344 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
2345 kvm_mmu_page_unlink_children(kvm, sp);
2346 kvm_mmu_unlink_parents(kvm, sp);
2348 if (!sp->role.invalid && !sp->role.direct)
2349 unaccount_shadowed(kvm, sp);
2352 kvm_unlink_unsync_page(kvm, sp);
2353 if (!sp->root_count) {
2356 list_move(&sp->link, invalid_list);
2357 kvm_mod_used_mmu_pages(kvm, -1);
2359 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2362 * The obsolete pages can not be used on any vcpus.
2363 * See the comments in kvm_mmu_invalidate_zap_all_pages().
2365 if (!sp->role.invalid && !is_obsolete_sp(kvm, sp))
2366 kvm_reload_remote_mmus(kvm);
2369 sp->role.invalid = 1;
2373 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
2374 struct list_head *invalid_list)
2376 struct kvm_mmu_page *sp, *nsp;
2378 if (list_empty(invalid_list))
2382 * wmb: make sure everyone sees our modifications to the page tables
2383 * rmb: make sure we see changes to vcpu->mode
2388 * Wait for all vcpus to exit guest mode and/or lockless shadow
2391 kvm_flush_remote_tlbs(kvm);
2393 list_for_each_entry_safe(sp, nsp, invalid_list, link) {
2394 WARN_ON(!sp->role.invalid || sp->root_count);
2395 kvm_mmu_free_page(sp);
2399 static bool prepare_zap_oldest_mmu_page(struct kvm *kvm,
2400 struct list_head *invalid_list)
2402 struct kvm_mmu_page *sp;
2404 if (list_empty(&kvm->arch.active_mmu_pages))
2407 sp = list_last_entry(&kvm->arch.active_mmu_pages,
2408 struct kvm_mmu_page, link);
2409 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2415 * Changing the number of mmu pages allocated to the vm
2416 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2418 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
2420 LIST_HEAD(invalid_list);
2422 spin_lock(&kvm->mmu_lock);
2424 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
2425 /* Need to free some mmu pages to achieve the goal. */
2426 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages)
2427 if (!prepare_zap_oldest_mmu_page(kvm, &invalid_list))
2430 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2431 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
2434 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
2436 spin_unlock(&kvm->mmu_lock);
2439 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
2441 struct kvm_mmu_page *sp;
2442 LIST_HEAD(invalid_list);
2445 pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
2447 spin_lock(&kvm->mmu_lock);
2448 for_each_gfn_indirect_valid_sp(kvm, sp, gfn) {
2449 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
2452 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
2454 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2455 spin_unlock(&kvm->mmu_lock);
2459 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page);
2461 static void kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
2463 trace_kvm_mmu_unsync_page(sp);
2464 ++vcpu->kvm->stat.mmu_unsync;
2467 kvm_mmu_mark_parents_unsync(sp);
2470 static bool mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
2473 struct kvm_mmu_page *sp;
2475 if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE))
2478 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) {
2485 WARN_ON(sp->role.level != PT_PAGE_TABLE_LEVEL);
2486 kvm_unsync_page(vcpu, sp);
2492 static bool kvm_is_mmio_pfn(kvm_pfn_t pfn)
2495 return !is_zero_pfn(pfn) && PageReserved(pfn_to_page(pfn));
2500 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2501 unsigned pte_access, int level,
2502 gfn_t gfn, kvm_pfn_t pfn, bool speculative,
2503 bool can_unsync, bool host_writable)
2508 if (set_mmio_spte(vcpu, sptep, gfn, pfn, pte_access))
2511 spte = PT_PRESENT_MASK;
2513 spte |= shadow_accessed_mask;
2515 if (pte_access & ACC_EXEC_MASK)
2516 spte |= shadow_x_mask;
2518 spte |= shadow_nx_mask;
2520 if (pte_access & ACC_USER_MASK)
2521 spte |= shadow_user_mask;
2523 if (level > PT_PAGE_TABLE_LEVEL)
2524 spte |= PT_PAGE_SIZE_MASK;
2526 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
2527 kvm_is_mmio_pfn(pfn));
2530 spte |= SPTE_HOST_WRITEABLE;
2532 pte_access &= ~ACC_WRITE_MASK;
2534 spte |= (u64)pfn << PAGE_SHIFT;
2536 if (pte_access & ACC_WRITE_MASK) {
2539 * Other vcpu creates new sp in the window between
2540 * mapping_level() and acquiring mmu-lock. We can
2541 * allow guest to retry the access, the mapping can
2542 * be fixed if guest refault.
2544 if (level > PT_PAGE_TABLE_LEVEL &&
2545 mmu_gfn_lpage_is_disallowed(vcpu, gfn, level))
2548 spte |= PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE;
2551 * Optimization: for pte sync, if spte was writable the hash
2552 * lookup is unnecessary (and expensive). Write protection
2553 * is responsibility of mmu_get_page / kvm_sync_page.
2554 * Same reasoning can be applied to dirty page accounting.
2556 if (!can_unsync && is_writable_pte(*sptep))
2559 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2560 pgprintk("%s: found shadow page for %llx, marking ro\n",
2563 pte_access &= ~ACC_WRITE_MASK;
2564 spte &= ~(PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE);
2568 if (pte_access & ACC_WRITE_MASK) {
2569 kvm_vcpu_mark_page_dirty(vcpu, gfn);
2570 spte |= shadow_dirty_mask;
2574 if (mmu_spte_update(sptep, spte))
2575 kvm_flush_remote_tlbs(vcpu->kvm);
2580 static bool mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, unsigned pte_access,
2581 int write_fault, int level, gfn_t gfn, kvm_pfn_t pfn,
2582 bool speculative, bool host_writable)
2584 int was_rmapped = 0;
2586 bool emulate = false;
2588 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__,
2589 *sptep, write_fault, gfn);
2591 if (is_shadow_present_pte(*sptep)) {
2593 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2594 * the parent of the now unreachable PTE.
2596 if (level > PT_PAGE_TABLE_LEVEL &&
2597 !is_large_pte(*sptep)) {
2598 struct kvm_mmu_page *child;
2601 child = page_header(pte & PT64_BASE_ADDR_MASK);
2602 drop_parent_pte(child, sptep);
2603 kvm_flush_remote_tlbs(vcpu->kvm);
2604 } else if (pfn != spte_to_pfn(*sptep)) {
2605 pgprintk("hfn old %llx new %llx\n",
2606 spte_to_pfn(*sptep), pfn);
2607 drop_spte(vcpu->kvm, sptep);
2608 kvm_flush_remote_tlbs(vcpu->kvm);
2613 if (set_spte(vcpu, sptep, pte_access, level, gfn, pfn, speculative,
2614 true, host_writable)) {
2617 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2620 if (unlikely(is_mmio_spte(*sptep)))
2623 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2624 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2625 is_large_pte(*sptep)? "2MB" : "4kB",
2626 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2628 if (!was_rmapped && is_large_pte(*sptep))
2629 ++vcpu->kvm->stat.lpages;
2631 if (is_shadow_present_pte(*sptep)) {
2633 rmap_count = rmap_add(vcpu, sptep, gfn);
2634 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2635 rmap_recycle(vcpu, sptep, gfn);
2639 kvm_release_pfn_clean(pfn);
2644 static kvm_pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2647 struct kvm_memory_slot *slot;
2649 slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log);
2651 return KVM_PFN_ERR_FAULT;
2653 return gfn_to_pfn_memslot_atomic(slot, gfn);
2656 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2657 struct kvm_mmu_page *sp,
2658 u64 *start, u64 *end)
2660 struct page *pages[PTE_PREFETCH_NUM];
2661 struct kvm_memory_slot *slot;
2662 unsigned access = sp->role.access;
2666 gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2667 slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK);
2671 ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start);
2675 for (i = 0; i < ret; i++, gfn++, start++)
2676 mmu_set_spte(vcpu, start, access, 0, sp->role.level, gfn,
2677 page_to_pfn(pages[i]), true, true);
2682 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2683 struct kvm_mmu_page *sp, u64 *sptep)
2685 u64 *spte, *start = NULL;
2688 WARN_ON(!sp->role.direct);
2690 i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2693 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2694 if (is_shadow_present_pte(*spte) || spte == sptep) {
2697 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2705 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2707 struct kvm_mmu_page *sp;
2710 * Since it's no accessed bit on EPT, it's no way to
2711 * distinguish between actually accessed translations
2712 * and prefetched, so disable pte prefetch if EPT is
2715 if (!shadow_accessed_mask)
2718 sp = page_header(__pa(sptep));
2719 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2722 __direct_pte_prefetch(vcpu, sp, sptep);
2725 static int __direct_map(struct kvm_vcpu *vcpu, int write, int map_writable,
2726 int level, gfn_t gfn, kvm_pfn_t pfn, bool prefault)
2728 struct kvm_shadow_walk_iterator iterator;
2729 struct kvm_mmu_page *sp;
2733 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2736 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2737 if (iterator.level == level) {
2738 emulate = mmu_set_spte(vcpu, iterator.sptep, ACC_ALL,
2739 write, level, gfn, pfn, prefault,
2741 direct_pte_prefetch(vcpu, iterator.sptep);
2742 ++vcpu->stat.pf_fixed;
2746 drop_large_spte(vcpu, iterator.sptep);
2747 if (!is_shadow_present_pte(*iterator.sptep)) {
2748 u64 base_addr = iterator.addr;
2750 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2751 pseudo_gfn = base_addr >> PAGE_SHIFT;
2752 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2753 iterator.level - 1, 1, ACC_ALL);
2755 link_shadow_page(vcpu, iterator.sptep, sp);
2761 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2765 info.si_signo = SIGBUS;
2767 info.si_code = BUS_MCEERR_AR;
2768 info.si_addr = (void __user *)address;
2769 info.si_addr_lsb = PAGE_SHIFT;
2771 send_sig_info(SIGBUS, &info, tsk);
2774 static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn)
2777 * Do not cache the mmio info caused by writing the readonly gfn
2778 * into the spte otherwise read access on readonly gfn also can
2779 * caused mmio page fault and treat it as mmio access.
2780 * Return 1 to tell kvm to emulate it.
2782 if (pfn == KVM_PFN_ERR_RO_FAULT)
2785 if (pfn == KVM_PFN_ERR_HWPOISON) {
2786 kvm_send_hwpoison_signal(kvm_vcpu_gfn_to_hva(vcpu, gfn), current);
2793 static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu,
2794 gfn_t *gfnp, kvm_pfn_t *pfnp,
2797 kvm_pfn_t pfn = *pfnp;
2799 int level = *levelp;
2802 * Check if it's a transparent hugepage. If this would be an
2803 * hugetlbfs page, level wouldn't be set to
2804 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2807 if (!is_error_noslot_pfn(pfn) && !kvm_is_reserved_pfn(pfn) &&
2808 level == PT_PAGE_TABLE_LEVEL &&
2809 PageTransCompound(pfn_to_page(pfn)) &&
2810 !mmu_gfn_lpage_is_disallowed(vcpu, gfn, PT_DIRECTORY_LEVEL)) {
2813 * mmu_notifier_retry was successful and we hold the
2814 * mmu_lock here, so the pmd can't become splitting
2815 * from under us, and in turn
2816 * __split_huge_page_refcount() can't run from under
2817 * us and we can safely transfer the refcount from
2818 * PG_tail to PG_head as we switch the pfn to tail to
2821 *levelp = level = PT_DIRECTORY_LEVEL;
2822 mask = KVM_PAGES_PER_HPAGE(level) - 1;
2823 VM_BUG_ON((gfn & mask) != (pfn & mask));
2827 kvm_release_pfn_clean(pfn);
2835 static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn,
2836 kvm_pfn_t pfn, unsigned access, int *ret_val)
2838 /* The pfn is invalid, report the error! */
2839 if (unlikely(is_error_pfn(pfn))) {
2840 *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn);
2844 if (unlikely(is_noslot_pfn(pfn)))
2845 vcpu_cache_mmio_info(vcpu, gva, gfn, access);
2850 static bool page_fault_can_be_fast(u32 error_code)
2853 * Do not fix the mmio spte with invalid generation number which
2854 * need to be updated by slow page fault path.
2856 if (unlikely(error_code & PFERR_RSVD_MASK))
2860 * #PF can be fast only if the shadow page table is present and it
2861 * is caused by write-protect, that means we just need change the
2862 * W bit of the spte which can be done out of mmu-lock.
2864 if (!(error_code & PFERR_PRESENT_MASK) ||
2865 !(error_code & PFERR_WRITE_MASK))
2872 fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
2873 u64 *sptep, u64 spte)
2877 WARN_ON(!sp->role.direct);
2880 * The gfn of direct spte is stable since it is calculated
2883 gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt);
2886 * Theoretically we could also set dirty bit (and flush TLB) here in
2887 * order to eliminate unnecessary PML logging. See comments in
2888 * set_spte. But fast_page_fault is very unlikely to happen with PML
2889 * enabled, so we do not do this. This might result in the same GPA
2890 * to be logged in PML buffer again when the write really happens, and
2891 * eventually to be called by mark_page_dirty twice. But it's also no
2892 * harm. This also avoids the TLB flush needed after setting dirty bit
2893 * so non-PML cases won't be impacted.
2895 * Compare with set_spte where instead shadow_dirty_mask is set.
2897 if (cmpxchg64(sptep, spte, spte | PT_WRITABLE_MASK) == spte)
2898 kvm_vcpu_mark_page_dirty(vcpu, gfn);
2905 * - true: let the vcpu to access on the same address again.
2906 * - false: let the real page fault path to fix it.
2908 static bool fast_page_fault(struct kvm_vcpu *vcpu, gva_t gva, int level,
2911 struct kvm_shadow_walk_iterator iterator;
2912 struct kvm_mmu_page *sp;
2916 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2919 if (!page_fault_can_be_fast(error_code))
2922 walk_shadow_page_lockless_begin(vcpu);
2923 for_each_shadow_entry_lockless(vcpu, gva, iterator, spte)
2924 if (!is_shadow_present_pte(spte) || iterator.level < level)
2928 * If the mapping has been changed, let the vcpu fault on the
2929 * same address again.
2931 if (!is_shadow_present_pte(spte)) {
2936 sp = page_header(__pa(iterator.sptep));
2937 if (!is_last_spte(spte, sp->role.level))
2941 * Check if it is a spurious fault caused by TLB lazily flushed.
2943 * Need not check the access of upper level table entries since
2944 * they are always ACC_ALL.
2946 if (is_writable_pte(spte)) {
2952 * Currently, to simplify the code, only the spte write-protected
2953 * by dirty-log can be fast fixed.
2955 if (!spte_is_locklessly_modifiable(spte))
2959 * Do not fix write-permission on the large spte since we only dirty
2960 * the first page into the dirty-bitmap in fast_pf_fix_direct_spte()
2961 * that means other pages are missed if its slot is dirty-logged.
2963 * Instead, we let the slow page fault path create a normal spte to
2966 * See the comments in kvm_arch_commit_memory_region().
2968 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2972 * Currently, fast page fault only works for direct mapping since
2973 * the gfn is not stable for indirect shadow page.
2974 * See Documentation/virtual/kvm/locking.txt to get more detail.
2976 ret = fast_pf_fix_direct_spte(vcpu, sp, iterator.sptep, spte);
2978 trace_fast_page_fault(vcpu, gva, error_code, iterator.sptep,
2980 walk_shadow_page_lockless_end(vcpu);
2985 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
2986 gva_t gva, kvm_pfn_t *pfn, bool write, bool *writable);
2987 static void make_mmu_pages_available(struct kvm_vcpu *vcpu);
2989 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, u32 error_code,
2990 gfn_t gfn, bool prefault)
2994 bool force_pt_level = false;
2996 unsigned long mmu_seq;
2997 bool map_writable, write = error_code & PFERR_WRITE_MASK;
2999 level = mapping_level(vcpu, gfn, &force_pt_level);
3000 if (likely(!force_pt_level)) {
3002 * This path builds a PAE pagetable - so we can map
3003 * 2mb pages at maximum. Therefore check if the level
3004 * is larger than that.
3006 if (level > PT_DIRECTORY_LEVEL)
3007 level = PT_DIRECTORY_LEVEL;
3009 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
3012 if (fast_page_fault(vcpu, v, level, error_code))
3015 mmu_seq = vcpu->kvm->mmu_notifier_seq;
3018 if (try_async_pf(vcpu, prefault, gfn, v, &pfn, write, &map_writable))
3021 if (handle_abnormal_pfn(vcpu, v, gfn, pfn, ACC_ALL, &r))
3024 spin_lock(&vcpu->kvm->mmu_lock);
3025 if (mmu_notifier_retry(vcpu->kvm, mmu_seq))
3027 make_mmu_pages_available(vcpu);
3028 if (likely(!force_pt_level))
3029 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
3030 r = __direct_map(vcpu, write, map_writable, level, gfn, pfn, prefault);
3031 spin_unlock(&vcpu->kvm->mmu_lock);
3036 spin_unlock(&vcpu->kvm->mmu_lock);
3037 kvm_release_pfn_clean(pfn);
3042 static void mmu_free_roots(struct kvm_vcpu *vcpu)
3045 struct kvm_mmu_page *sp;
3046 LIST_HEAD(invalid_list);
3048 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3051 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
3052 (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
3053 vcpu->arch.mmu.direct_map)) {
3054 hpa_t root = vcpu->arch.mmu.root_hpa;
3056 spin_lock(&vcpu->kvm->mmu_lock);
3057 sp = page_header(root);
3059 if (!sp->root_count && sp->role.invalid) {
3060 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3061 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3063 spin_unlock(&vcpu->kvm->mmu_lock);
3064 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
3068 spin_lock(&vcpu->kvm->mmu_lock);
3069 for (i = 0; i < 4; ++i) {
3070 hpa_t root = vcpu->arch.mmu.pae_root[i];
3073 root &= PT64_BASE_ADDR_MASK;
3074 sp = page_header(root);
3076 if (!sp->root_count && sp->role.invalid)
3077 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3080 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3082 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3083 spin_unlock(&vcpu->kvm->mmu_lock);
3084 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
3087 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
3091 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
3092 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3099 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
3101 struct kvm_mmu_page *sp;
3104 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3105 spin_lock(&vcpu->kvm->mmu_lock);
3106 make_mmu_pages_available(vcpu);
3107 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL, 1, ACC_ALL);
3109 spin_unlock(&vcpu->kvm->mmu_lock);
3110 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
3111 } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
3112 for (i = 0; i < 4; ++i) {
3113 hpa_t root = vcpu->arch.mmu.pae_root[i];
3115 MMU_WARN_ON(VALID_PAGE(root));
3116 spin_lock(&vcpu->kvm->mmu_lock);
3117 make_mmu_pages_available(vcpu);
3118 sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT),
3119 i << 30, PT32_ROOT_LEVEL, 1, ACC_ALL);
3120 root = __pa(sp->spt);
3122 spin_unlock(&vcpu->kvm->mmu_lock);
3123 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
3125 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
3132 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
3134 struct kvm_mmu_page *sp;
3139 root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
3141 if (mmu_check_root(vcpu, root_gfn))
3145 * Do we shadow a long mode page table? If so we need to
3146 * write-protect the guests page table root.
3148 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
3149 hpa_t root = vcpu->arch.mmu.root_hpa;
3151 MMU_WARN_ON(VALID_PAGE(root));
3153 spin_lock(&vcpu->kvm->mmu_lock);
3154 make_mmu_pages_available(vcpu);
3155 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
3157 root = __pa(sp->spt);
3159 spin_unlock(&vcpu->kvm->mmu_lock);
3160 vcpu->arch.mmu.root_hpa = root;
3165 * We shadow a 32 bit page table. This may be a legacy 2-level
3166 * or a PAE 3-level page table. In either case we need to be aware that
3167 * the shadow page table may be a PAE or a long mode page table.
3169 pm_mask = PT_PRESENT_MASK;
3170 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
3171 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
3173 for (i = 0; i < 4; ++i) {
3174 hpa_t root = vcpu->arch.mmu.pae_root[i];
3176 MMU_WARN_ON(VALID_PAGE(root));
3177 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
3178 pdptr = vcpu->arch.mmu.get_pdptr(vcpu, i);
3179 if (!is_present_gpte(pdptr)) {
3180 vcpu->arch.mmu.pae_root[i] = 0;
3183 root_gfn = pdptr >> PAGE_SHIFT;
3184 if (mmu_check_root(vcpu, root_gfn))
3187 spin_lock(&vcpu->kvm->mmu_lock);
3188 make_mmu_pages_available(vcpu);
3189 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, PT32_ROOT_LEVEL,
3191 root = __pa(sp->spt);
3193 spin_unlock(&vcpu->kvm->mmu_lock);
3195 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
3197 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
3200 * If we shadow a 32 bit page table with a long mode page
3201 * table we enter this path.
3203 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3204 if (vcpu->arch.mmu.lm_root == NULL) {
3206 * The additional page necessary for this is only
3207 * allocated on demand.
3212 lm_root = (void*)get_zeroed_page(GFP_KERNEL);
3213 if (lm_root == NULL)
3216 lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
3218 vcpu->arch.mmu.lm_root = lm_root;
3221 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
3227 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
3229 if (vcpu->arch.mmu.direct_map)
3230 return mmu_alloc_direct_roots(vcpu);
3232 return mmu_alloc_shadow_roots(vcpu);
3235 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
3238 struct kvm_mmu_page *sp;
3240 if (vcpu->arch.mmu.direct_map)
3243 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3246 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
3247 kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC);
3248 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
3249 hpa_t root = vcpu->arch.mmu.root_hpa;
3250 sp = page_header(root);
3251 mmu_sync_children(vcpu, sp);
3252 kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
3255 for (i = 0; i < 4; ++i) {
3256 hpa_t root = vcpu->arch.mmu.pae_root[i];
3258 if (root && VALID_PAGE(root)) {
3259 root &= PT64_BASE_ADDR_MASK;
3260 sp = page_header(root);
3261 mmu_sync_children(vcpu, sp);
3264 kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
3267 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
3269 spin_lock(&vcpu->kvm->mmu_lock);
3270 mmu_sync_roots(vcpu);
3271 spin_unlock(&vcpu->kvm->mmu_lock);
3273 EXPORT_SYMBOL_GPL(kvm_mmu_sync_roots);
3275 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
3276 u32 access, struct x86_exception *exception)
3279 exception->error_code = 0;
3283 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
3285 struct x86_exception *exception)
3288 exception->error_code = 0;
3289 return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access, exception);
3293 __is_rsvd_bits_set(struct rsvd_bits_validate *rsvd_check, u64 pte, int level)
3295 int bit7 = (pte >> 7) & 1, low6 = pte & 0x3f;
3297 return (pte & rsvd_check->rsvd_bits_mask[bit7][level-1]) |
3298 ((rsvd_check->bad_mt_xwr & (1ull << low6)) != 0);
3301 static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
3303 return __is_rsvd_bits_set(&mmu->guest_rsvd_check, gpte, level);
3306 static bool is_shadow_zero_bits_set(struct kvm_mmu *mmu, u64 spte, int level)
3308 return __is_rsvd_bits_set(&mmu->shadow_zero_check, spte, level);
3311 static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3314 return vcpu_match_mmio_gpa(vcpu, addr);
3316 return vcpu_match_mmio_gva(vcpu, addr);
3319 /* return true if reserved bit is detected on spte. */
3321 walk_shadow_page_get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep)
3323 struct kvm_shadow_walk_iterator iterator;
3324 u64 sptes[PT64_ROOT_LEVEL], spte = 0ull;
3326 bool reserved = false;
3328 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3331 walk_shadow_page_lockless_begin(vcpu);
3333 for (shadow_walk_init(&iterator, vcpu, addr),
3334 leaf = root = iterator.level;
3335 shadow_walk_okay(&iterator);
3336 __shadow_walk_next(&iterator, spte)) {
3337 spte = mmu_spte_get_lockless(iterator.sptep);
3339 sptes[leaf - 1] = spte;
3342 if (!is_shadow_present_pte(spte))
3345 reserved |= is_shadow_zero_bits_set(&vcpu->arch.mmu, spte,
3349 walk_shadow_page_lockless_end(vcpu);
3352 pr_err("%s: detect reserved bits on spte, addr 0x%llx, dump hierarchy:\n",
3354 while (root > leaf) {
3355 pr_err("------ spte 0x%llx level %d.\n",
3356 sptes[root - 1], root);
3365 int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3370 if (mmio_info_in_cache(vcpu, addr, direct))
3371 return RET_MMIO_PF_EMULATE;
3373 reserved = walk_shadow_page_get_mmio_spte(vcpu, addr, &spte);
3374 if (WARN_ON(reserved))
3375 return RET_MMIO_PF_BUG;
3377 if (is_mmio_spte(spte)) {
3378 gfn_t gfn = get_mmio_spte_gfn(spte);
3379 unsigned access = get_mmio_spte_access(spte);
3381 if (!check_mmio_spte(vcpu, spte))
3382 return RET_MMIO_PF_INVALID;
3387 trace_handle_mmio_page_fault(addr, gfn, access);
3388 vcpu_cache_mmio_info(vcpu, addr, gfn, access);
3389 return RET_MMIO_PF_EMULATE;
3393 * If the page table is zapped by other cpus, let CPU fault again on
3396 return RET_MMIO_PF_RETRY;
3398 EXPORT_SYMBOL_GPL(handle_mmio_page_fault);
3400 static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu,
3401 u32 error_code, gfn_t gfn)
3403 if (unlikely(error_code & PFERR_RSVD_MASK))
3406 if (!(error_code & PFERR_PRESENT_MASK) ||
3407 !(error_code & PFERR_WRITE_MASK))
3411 * guest is writing the page which is write tracked which can
3412 * not be fixed by page fault handler.
3414 if (kvm_page_track_is_active(vcpu, gfn, KVM_PAGE_TRACK_WRITE))
3420 static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr)
3422 struct kvm_shadow_walk_iterator iterator;
3425 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3428 walk_shadow_page_lockless_begin(vcpu);
3429 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) {
3430 clear_sp_write_flooding_count(iterator.sptep);
3431 if (!is_shadow_present_pte(spte))
3434 walk_shadow_page_lockless_end(vcpu);
3437 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3438 u32 error_code, bool prefault)
3440 gfn_t gfn = gva >> PAGE_SHIFT;
3443 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
3445 if (page_fault_handle_page_track(vcpu, error_code, gfn))
3448 r = mmu_topup_memory_caches(vcpu);
3452 MMU_WARN_ON(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3455 return nonpaging_map(vcpu, gva & PAGE_MASK,
3456 error_code, gfn, prefault);
3459 static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn)
3461 struct kvm_arch_async_pf arch;
3463 arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
3465 arch.direct_map = vcpu->arch.mmu.direct_map;
3466 arch.cr3 = vcpu->arch.mmu.get_cr3(vcpu);
3468 return kvm_setup_async_pf(vcpu, gva, kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch);
3471 static bool can_do_async_pf(struct kvm_vcpu *vcpu)
3473 if (unlikely(!lapic_in_kernel(vcpu) ||
3474 kvm_event_needs_reinjection(vcpu)))
3477 return kvm_x86_ops->interrupt_allowed(vcpu);
3480 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
3481 gva_t gva, kvm_pfn_t *pfn, bool write, bool *writable)
3483 struct kvm_memory_slot *slot;
3486 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
3488 *pfn = __gfn_to_pfn_memslot(slot, gfn, false, &async, write, writable);
3490 return false; /* *pfn has correct page already */
3492 if (!prefault && can_do_async_pf(vcpu)) {
3493 trace_kvm_try_async_get_page(gva, gfn);
3494 if (kvm_find_async_pf_gfn(vcpu, gfn)) {
3495 trace_kvm_async_pf_doublefault(gva, gfn);
3496 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
3498 } else if (kvm_arch_setup_async_pf(vcpu, gva, gfn))
3502 *pfn = __gfn_to_pfn_memslot(slot, gfn, false, NULL, write, writable);
3507 check_hugepage_cache_consistency(struct kvm_vcpu *vcpu, gfn_t gfn, int level)
3509 int page_num = KVM_PAGES_PER_HPAGE(level);
3511 gfn &= ~(page_num - 1);
3513 return kvm_mtrr_check_gfn_range_consistency(vcpu, gfn, page_num);
3516 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code,
3522 bool force_pt_level;
3523 gfn_t gfn = gpa >> PAGE_SHIFT;
3524 unsigned long mmu_seq;
3525 int write = error_code & PFERR_WRITE_MASK;
3528 MMU_WARN_ON(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3530 if (page_fault_handle_page_track(vcpu, error_code, gfn))
3533 r = mmu_topup_memory_caches(vcpu);
3537 force_pt_level = !check_hugepage_cache_consistency(vcpu, gfn,
3538 PT_DIRECTORY_LEVEL);
3539 level = mapping_level(vcpu, gfn, &force_pt_level);
3540 if (likely(!force_pt_level)) {
3541 if (level > PT_DIRECTORY_LEVEL &&
3542 !check_hugepage_cache_consistency(vcpu, gfn, level))
3543 level = PT_DIRECTORY_LEVEL;
3544 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
3547 if (fast_page_fault(vcpu, gpa, level, error_code))
3550 mmu_seq = vcpu->kvm->mmu_notifier_seq;
3553 if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable))
3556 if (handle_abnormal_pfn(vcpu, 0, gfn, pfn, ACC_ALL, &r))
3559 spin_lock(&vcpu->kvm->mmu_lock);
3560 if (mmu_notifier_retry(vcpu->kvm, mmu_seq))
3562 make_mmu_pages_available(vcpu);
3563 if (likely(!force_pt_level))
3564 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
3565 r = __direct_map(vcpu, write, map_writable, level, gfn, pfn, prefault);
3566 spin_unlock(&vcpu->kvm->mmu_lock);
3571 spin_unlock(&vcpu->kvm->mmu_lock);
3572 kvm_release_pfn_clean(pfn);
3576 static void nonpaging_init_context(struct kvm_vcpu *vcpu,
3577 struct kvm_mmu *context)
3579 context->page_fault = nonpaging_page_fault;
3580 context->gva_to_gpa = nonpaging_gva_to_gpa;
3581 context->sync_page = nonpaging_sync_page;
3582 context->invlpg = nonpaging_invlpg;
3583 context->update_pte = nonpaging_update_pte;
3584 context->root_level = 0;
3585 context->shadow_root_level = PT32E_ROOT_LEVEL;
3586 context->root_hpa = INVALID_PAGE;
3587 context->direct_map = true;
3588 context->nx = false;
3591 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu)
3593 mmu_free_roots(vcpu);
3596 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
3598 return kvm_read_cr3(vcpu);
3601 static void inject_page_fault(struct kvm_vcpu *vcpu,
3602 struct x86_exception *fault)
3604 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
3607 static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
3608 unsigned access, int *nr_present)
3610 if (unlikely(is_mmio_spte(*sptep))) {
3611 if (gfn != get_mmio_spte_gfn(*sptep)) {
3612 mmu_spte_clear_no_track(sptep);
3617 mark_mmio_spte(vcpu, sptep, gfn, access);
3624 static inline bool is_last_gpte(struct kvm_mmu *mmu, unsigned level, unsigned gpte)
3629 index |= (gpte & PT_PAGE_SIZE_MASK) >> (PT_PAGE_SIZE_SHIFT - 2);
3630 return mmu->last_pte_bitmap & (1 << index);
3633 #define PTTYPE_EPT 18 /* arbitrary */
3634 #define PTTYPE PTTYPE_EPT
3635 #include "paging_tmpl.h"
3639 #include "paging_tmpl.h"
3643 #include "paging_tmpl.h"
3647 __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
3648 struct rsvd_bits_validate *rsvd_check,
3649 int maxphyaddr, int level, bool nx, bool gbpages,
3652 u64 exb_bit_rsvd = 0;
3653 u64 gbpages_bit_rsvd = 0;
3654 u64 nonleaf_bit8_rsvd = 0;
3656 rsvd_check->bad_mt_xwr = 0;
3659 exb_bit_rsvd = rsvd_bits(63, 63);
3661 gbpages_bit_rsvd = rsvd_bits(7, 7);
3664 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
3665 * leaf entries) on AMD CPUs only.
3668 nonleaf_bit8_rsvd = rsvd_bits(8, 8);
3671 case PT32_ROOT_LEVEL:
3672 /* no rsvd bits for 2 level 4K page table entries */
3673 rsvd_check->rsvd_bits_mask[0][1] = 0;
3674 rsvd_check->rsvd_bits_mask[0][0] = 0;
3675 rsvd_check->rsvd_bits_mask[1][0] =
3676 rsvd_check->rsvd_bits_mask[0][0];
3679 rsvd_check->rsvd_bits_mask[1][1] = 0;
3683 if (is_cpuid_PSE36())
3684 /* 36bits PSE 4MB page */
3685 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
3687 /* 32 bits PSE 4MB page */
3688 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
3690 case PT32E_ROOT_LEVEL:
3691 rsvd_check->rsvd_bits_mask[0][2] =
3692 rsvd_bits(maxphyaddr, 63) |
3693 rsvd_bits(5, 8) | rsvd_bits(1, 2); /* PDPTE */
3694 rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd |
3695 rsvd_bits(maxphyaddr, 62); /* PDE */
3696 rsvd_check->rsvd_bits_mask[0][0] = exb_bit_rsvd |
3697 rsvd_bits(maxphyaddr, 62); /* PTE */
3698 rsvd_check->rsvd_bits_mask[1][1] = exb_bit_rsvd |
3699 rsvd_bits(maxphyaddr, 62) |
3700 rsvd_bits(13, 20); /* large page */
3701 rsvd_check->rsvd_bits_mask[1][0] =
3702 rsvd_check->rsvd_bits_mask[0][0];
3704 case PT64_ROOT_LEVEL:
3705 rsvd_check->rsvd_bits_mask[0][3] = exb_bit_rsvd |
3706 nonleaf_bit8_rsvd | rsvd_bits(7, 7) |
3707 rsvd_bits(maxphyaddr, 51);
3708 rsvd_check->rsvd_bits_mask[0][2] = exb_bit_rsvd |
3709 nonleaf_bit8_rsvd | gbpages_bit_rsvd |
3710 rsvd_bits(maxphyaddr, 51);
3711 rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd |
3712 rsvd_bits(maxphyaddr, 51);
3713 rsvd_check->rsvd_bits_mask[0][0] = exb_bit_rsvd |
3714 rsvd_bits(maxphyaddr, 51);
3715 rsvd_check->rsvd_bits_mask[1][3] =
3716 rsvd_check->rsvd_bits_mask[0][3];
3717 rsvd_check->rsvd_bits_mask[1][2] = exb_bit_rsvd |
3718 gbpages_bit_rsvd | rsvd_bits(maxphyaddr, 51) |
3720 rsvd_check->rsvd_bits_mask[1][1] = exb_bit_rsvd |
3721 rsvd_bits(maxphyaddr, 51) |
3722 rsvd_bits(13, 20); /* large page */
3723 rsvd_check->rsvd_bits_mask[1][0] =
3724 rsvd_check->rsvd_bits_mask[0][0];
3729 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
3730 struct kvm_mmu *context)
3732 __reset_rsvds_bits_mask(vcpu, &context->guest_rsvd_check,
3733 cpuid_maxphyaddr(vcpu), context->root_level,
3734 context->nx, guest_cpuid_has_gbpages(vcpu),
3735 is_pse(vcpu), guest_cpuid_is_amd(vcpu));
3739 __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check,
3740 int maxphyaddr, bool execonly)
3744 rsvd_check->rsvd_bits_mask[0][3] =
3745 rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 7);
3746 rsvd_check->rsvd_bits_mask[0][2] =
3747 rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6);
3748 rsvd_check->rsvd_bits_mask[0][1] =
3749 rsvd_bits(maxphyaddr, 51) | rsvd_bits(3, 6);
3750 rsvd_check->rsvd_bits_mask[0][0] = rsvd_bits(maxphyaddr, 51);
3753 rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3];
3754 rsvd_check->rsvd_bits_mask[1][2] =
3755 rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 29);
3756 rsvd_check->rsvd_bits_mask[1][1] =
3757 rsvd_bits(maxphyaddr, 51) | rsvd_bits(12, 20);
3758 rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0];
3760 bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */
3761 bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */
3762 bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */
3763 bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */
3764 bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */
3766 /* bits 0..2 must not be 100 unless VMX capabilities allow it */
3767 bad_mt_xwr |= REPEAT_BYTE(1ull << 4);
3769 rsvd_check->bad_mt_xwr = bad_mt_xwr;
3772 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
3773 struct kvm_mmu *context, bool execonly)
3775 __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check,
3776 cpuid_maxphyaddr(vcpu), execonly);
3780 * the page table on host is the shadow page table for the page
3781 * table in guest or amd nested guest, its mmu features completely
3782 * follow the features in guest.
3785 reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
3788 * Passing "true" to the last argument is okay; it adds a check
3789 * on bit 8 of the SPTEs which KVM doesn't use anyway.
3791 __reset_rsvds_bits_mask(vcpu, &context->shadow_zero_check,
3792 boot_cpu_data.x86_phys_bits,
3793 context->shadow_root_level, context->nx,
3794 guest_cpuid_has_gbpages(vcpu), is_pse(vcpu),
3797 EXPORT_SYMBOL_GPL(reset_shadow_zero_bits_mask);
3799 static inline bool boot_cpu_is_amd(void)
3801 WARN_ON_ONCE(!tdp_enabled);
3802 return shadow_x_mask == 0;
3806 * the direct page table on host, use as much mmu features as
3807 * possible, however, kvm currently does not do execution-protection.
3810 reset_tdp_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
3811 struct kvm_mmu *context)
3813 if (boot_cpu_is_amd())
3814 __reset_rsvds_bits_mask(vcpu, &context->shadow_zero_check,
3815 boot_cpu_data.x86_phys_bits,
3816 context->shadow_root_level, false,
3817 cpu_has_gbpages, true, true);
3819 __reset_rsvds_bits_mask_ept(&context->shadow_zero_check,
3820 boot_cpu_data.x86_phys_bits,
3826 * as the comments in reset_shadow_zero_bits_mask() except it
3827 * is the shadow page table for intel nested guest.
3830 reset_ept_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
3831 struct kvm_mmu *context, bool execonly)
3833 __reset_rsvds_bits_mask_ept(&context->shadow_zero_check,
3834 boot_cpu_data.x86_phys_bits, execonly);
3837 static void update_permission_bitmask(struct kvm_vcpu *vcpu,
3838 struct kvm_mmu *mmu, bool ept)
3840 unsigned bit, byte, pfec;
3842 bool fault, x, w, u, wf, uf, ff, smapf, cr4_smap, cr4_smep, smap = 0;
3844 cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
3845 cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
3846 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
3849 wf = pfec & PFERR_WRITE_MASK;
3850 uf = pfec & PFERR_USER_MASK;
3851 ff = pfec & PFERR_FETCH_MASK;
3853 * PFERR_RSVD_MASK bit is set in PFEC if the access is not
3854 * subject to SMAP restrictions, and cleared otherwise. The
3855 * bit is only meaningful if the SMAP bit is set in CR4.
3857 smapf = !(pfec & PFERR_RSVD_MASK);
3858 for (bit = 0; bit < 8; ++bit) {
3859 x = bit & ACC_EXEC_MASK;
3860 w = bit & ACC_WRITE_MASK;
3861 u = bit & ACC_USER_MASK;
3864 /* Not really needed: !nx will cause pte.nx to fault */
3866 /* Allow supervisor writes if !cr0.wp */
3867 w |= !is_write_protection(vcpu) && !uf;
3868 /* Disallow supervisor fetches of user code if cr4.smep */
3869 x &= !(cr4_smep && u && !uf);
3872 * SMAP:kernel-mode data accesses from user-mode
3873 * mappings should fault. A fault is considered
3874 * as a SMAP violation if all of the following
3875 * conditions are ture:
3876 * - X86_CR4_SMAP is set in CR4
3877 * - An user page is accessed
3878 * - Page fault in kernel mode
3879 * - if CPL = 3 or X86_EFLAGS_AC is clear
3881 * Here, we cover the first three conditions.
3882 * The fourth is computed dynamically in
3883 * permission_fault() and is in smapf.
3885 * Also, SMAP does not affect instruction
3886 * fetches, add the !ff check here to make it
3889 smap = cr4_smap && u && !uf && !ff;
3891 /* Not really needed: no U/S accesses on ept */
3894 fault = (ff && !x) || (uf && !u) || (wf && !w) ||
3896 map |= fault << bit;
3898 mmu->permissions[byte] = map;
3902 static void update_last_pte_bitmap(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu)
3905 unsigned level, root_level = mmu->root_level;
3906 const unsigned ps_set_index = 1 << 2; /* bit 2 of index: ps */
3908 if (root_level == PT32E_ROOT_LEVEL)
3910 /* PT_PAGE_TABLE_LEVEL always terminates */
3911 map = 1 | (1 << ps_set_index);
3912 for (level = PT_DIRECTORY_LEVEL; level <= root_level; ++level) {
3913 if (level <= PT_PDPE_LEVEL
3914 && (mmu->root_level >= PT32E_ROOT_LEVEL || is_pse(vcpu)))
3915 map |= 1 << (ps_set_index | (level - 1));
3917 mmu->last_pte_bitmap = map;
3920 static void paging64_init_context_common(struct kvm_vcpu *vcpu,
3921 struct kvm_mmu *context,
3924 context->nx = is_nx(vcpu);
3925 context->root_level = level;
3927 reset_rsvds_bits_mask(vcpu, context);
3928 update_permission_bitmask(vcpu, context, false);
3929 update_last_pte_bitmap(vcpu, context);
3931 MMU_WARN_ON(!is_pae(vcpu));
3932 context->page_fault = paging64_page_fault;
3933 context->gva_to_gpa = paging64_gva_to_gpa;
3934 context->sync_page = paging64_sync_page;
3935 context->invlpg = paging64_invlpg;
3936 context->update_pte = paging64_update_pte;
3937 context->shadow_root_level = level;
3938 context->root_hpa = INVALID_PAGE;
3939 context->direct_map = false;
3942 static void paging64_init_context(struct kvm_vcpu *vcpu,
3943 struct kvm_mmu *context)
3945 paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
3948 static void paging32_init_context(struct kvm_vcpu *vcpu,
3949 struct kvm_mmu *context)
3951 context->nx = false;
3952 context->root_level = PT32_ROOT_LEVEL;
3954 reset_rsvds_bits_mask(vcpu, context);
3955 update_permission_bitmask(vcpu, context, false);
3956 update_last_pte_bitmap(vcpu, context);
3958 context->page_fault = paging32_page_fault;
3959 context->gva_to_gpa = paging32_gva_to_gpa;
3960 context->sync_page = paging32_sync_page;
3961 context->invlpg = paging32_invlpg;
3962 context->update_pte = paging32_update_pte;
3963 context->shadow_root_level = PT32E_ROOT_LEVEL;
3964 context->root_hpa = INVALID_PAGE;
3965 context->direct_map = false;
3968 static void paging32E_init_context(struct kvm_vcpu *vcpu,
3969 struct kvm_mmu *context)
3971 paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
3974 static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
3976 struct kvm_mmu *context = &vcpu->arch.mmu;
3978 context->base_role.word = 0;
3979 context->base_role.smm = is_smm(vcpu);
3980 context->page_fault = tdp_page_fault;
3981 context->sync_page = nonpaging_sync_page;
3982 context->invlpg = nonpaging_invlpg;
3983 context->update_pte = nonpaging_update_pte;
3984 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
3985 context->root_hpa = INVALID_PAGE;
3986 context->direct_map = true;
3987 context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
3988 context->get_cr3 = get_cr3;
3989 context->get_pdptr = kvm_pdptr_read;
3990 context->inject_page_fault = kvm_inject_page_fault;
3992 if (!is_paging(vcpu)) {
3993 context->nx = false;
3994 context->gva_to_gpa = nonpaging_gva_to_gpa;
3995 context->root_level = 0;
3996 } else if (is_long_mode(vcpu)) {
3997 context->nx = is_nx(vcpu);
3998 context->root_level = PT64_ROOT_LEVEL;
3999 reset_rsvds_bits_mask(vcpu, context);
4000 context->gva_to_gpa = paging64_gva_to_gpa;
4001 } else if (is_pae(vcpu)) {
4002 context->nx = is_nx(vcpu);
4003 context->root_level = PT32E_ROOT_LEVEL;
4004 reset_rsvds_bits_mask(vcpu, context);
4005 context->gva_to_gpa = paging64_gva_to_gpa;
4007 context->nx = false;
4008 context->root_level = PT32_ROOT_LEVEL;
4009 reset_rsvds_bits_mask(vcpu, context);
4010 context->gva_to_gpa = paging32_gva_to_gpa;
4013 update_permission_bitmask(vcpu, context, false);
4014 update_last_pte_bitmap(vcpu, context);
4015 reset_tdp_shadow_zero_bits_mask(vcpu, context);
4018 void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu)
4020 bool smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
4021 bool smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
4022 struct kvm_mmu *context = &vcpu->arch.mmu;
4024 MMU_WARN_ON(VALID_PAGE(context->root_hpa));
4026 if (!is_paging(vcpu))
4027 nonpaging_init_context(vcpu, context);
4028 else if (is_long_mode(vcpu))
4029 paging64_init_context(vcpu, context);
4030 else if (is_pae(vcpu))
4031 paging32E_init_context(vcpu, context);
4033 paging32_init_context(vcpu, context);
4035 context->base_role.nxe = is_nx(vcpu);
4036 context->base_role.cr4_pae = !!is_pae(vcpu);
4037 context->base_role.cr0_wp = is_write_protection(vcpu);
4038 context->base_role.smep_andnot_wp
4039 = smep && !is_write_protection(vcpu);
4040 context->base_role.smap_andnot_wp
4041 = smap && !is_write_protection(vcpu);
4042 context->base_role.smm = is_smm(vcpu);
4043 reset_shadow_zero_bits_mask(vcpu, context);
4045 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
4047 void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly)
4049 struct kvm_mmu *context = &vcpu->arch.mmu;
4051 MMU_WARN_ON(VALID_PAGE(context->root_hpa));
4053 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
4056 context->page_fault = ept_page_fault;
4057 context->gva_to_gpa = ept_gva_to_gpa;
4058 context->sync_page = ept_sync_page;
4059 context->invlpg = ept_invlpg;
4060 context->update_pte = ept_update_pte;
4061 context->root_level = context->shadow_root_level;
4062 context->root_hpa = INVALID_PAGE;
4063 context->direct_map = false;
4065 update_permission_bitmask(vcpu, context, true);
4066 reset_rsvds_bits_mask_ept(vcpu, context, execonly);
4067 reset_ept_shadow_zero_bits_mask(vcpu, context, execonly);
4069 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu);
4071 static void init_kvm_softmmu(struct kvm_vcpu *vcpu)
4073 struct kvm_mmu *context = &vcpu->arch.mmu;
4075 kvm_init_shadow_mmu(vcpu);
4076 context->set_cr3 = kvm_x86_ops->set_cr3;
4077 context->get_cr3 = get_cr3;
4078 context->get_pdptr = kvm_pdptr_read;
4079 context->inject_page_fault = kvm_inject_page_fault;
4082 static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
4084 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
4086 g_context->get_cr3 = get_cr3;
4087 g_context->get_pdptr = kvm_pdptr_read;
4088 g_context->inject_page_fault = kvm_inject_page_fault;
4091 * Note that arch.mmu.gva_to_gpa translates l2_gpa to l1_gpa using
4092 * L1's nested page tables (e.g. EPT12). The nested translation
4093 * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using
4094 * L2's page tables as the first level of translation and L1's
4095 * nested page tables as the second level of translation. Basically
4096 * the gva_to_gpa functions between mmu and nested_mmu are swapped.
4098 if (!is_paging(vcpu)) {
4099 g_context->nx = false;
4100 g_context->root_level = 0;
4101 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
4102 } else if (is_long_mode(vcpu)) {
4103 g_context->nx = is_nx(vcpu);
4104 g_context->root_level = PT64_ROOT_LEVEL;
4105 reset_rsvds_bits_mask(vcpu, g_context);
4106 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
4107 } else if (is_pae(vcpu)) {
4108 g_context->nx = is_nx(vcpu);
4109 g_context->root_level = PT32E_ROOT_LEVEL;
4110 reset_rsvds_bits_mask(vcpu, g_context);
4111 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
4113 g_context->nx = false;
4114 g_context->root_level = PT32_ROOT_LEVEL;
4115 reset_rsvds_bits_mask(vcpu, g_context);
4116 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
4119 update_permission_bitmask(vcpu, g_context, false);
4120 update_last_pte_bitmap(vcpu, g_context);
4123 static void init_kvm_mmu(struct kvm_vcpu *vcpu)
4125 if (mmu_is_nested(vcpu))
4126 init_kvm_nested_mmu(vcpu);
4127 else if (tdp_enabled)
4128 init_kvm_tdp_mmu(vcpu);
4130 init_kvm_softmmu(vcpu);
4133 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
4135 kvm_mmu_unload(vcpu);
4138 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
4140 int kvm_mmu_load(struct kvm_vcpu *vcpu)
4144 r = mmu_topup_memory_caches(vcpu);
4147 r = mmu_alloc_roots(vcpu);
4148 kvm_mmu_sync_roots(vcpu);
4151 /* set_cr3() should ensure TLB has been flushed */
4152 vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
4156 EXPORT_SYMBOL_GPL(kvm_mmu_load);
4158 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
4160 mmu_free_roots(vcpu);
4161 WARN_ON(VALID_PAGE(vcpu->arch.mmu.root_hpa));
4163 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
4165 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4166 struct kvm_mmu_page *sp, u64 *spte,
4169 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
4170 ++vcpu->kvm->stat.mmu_pde_zapped;
4174 ++vcpu->kvm->stat.mmu_pte_updated;
4175 vcpu->arch.mmu.update_pte(vcpu, sp, spte, new);
4178 static bool need_remote_flush(u64 old, u64 new)
4180 if (!is_shadow_present_pte(old))
4182 if (!is_shadow_present_pte(new))
4184 if ((old ^ new) & PT64_BASE_ADDR_MASK)
4186 old ^= shadow_nx_mask;
4187 new ^= shadow_nx_mask;
4188 return (old & ~new & PT64_PERM_MASK) != 0;
4191 static void kvm_mmu_flush_or_zap(struct kvm_vcpu *vcpu,
4192 struct list_head *invalid_list,
4193 bool remote_flush, bool local_flush)
4195 if (!list_empty(invalid_list)) {
4196 kvm_mmu_commit_zap_page(vcpu->kvm, invalid_list);
4201 kvm_flush_remote_tlbs(vcpu->kvm);
4202 else if (local_flush)
4203 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
4206 static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,
4207 const u8 *new, int *bytes)
4213 * Assume that the pte write on a page table of the same type
4214 * as the current vcpu paging mode since we update the sptes only
4215 * when they have the same mode.
4217 if (is_pae(vcpu) && *bytes == 4) {
4218 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
4221 r = kvm_vcpu_read_guest(vcpu, *gpa, &gentry, 8);
4224 new = (const u8 *)&gentry;
4229 gentry = *(const u32 *)new;
4232 gentry = *(const u64 *)new;
4243 * If we're seeing too many writes to a page, it may no longer be a page table,
4244 * or we may be forking, in which case it is better to unmap the page.
4246 static bool detect_write_flooding(struct kvm_mmu_page *sp)
4249 * Skip write-flooding detected for the sp whose level is 1, because
4250 * it can become unsync, then the guest page is not write-protected.
4252 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
4255 atomic_inc(&sp->write_flooding_count);
4256 return atomic_read(&sp->write_flooding_count) >= 3;
4260 * Misaligned accesses are too much trouble to fix up; also, they usually
4261 * indicate a page is not used as a page table.
4263 static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa,
4266 unsigned offset, pte_size, misaligned;
4268 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4269 gpa, bytes, sp->role.word);
4271 offset = offset_in_page(gpa);
4272 pte_size = sp->role.cr4_pae ? 8 : 4;
4275 * Sometimes, the OS only writes the last one bytes to update status
4276 * bits, for example, in linux, andb instruction is used in clear_bit().
4278 if (!(offset & (pte_size - 1)) && bytes == 1)
4281 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
4282 misaligned |= bytes < 4;
4287 static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte)
4289 unsigned page_offset, quadrant;
4293 page_offset = offset_in_page(gpa);
4294 level = sp->role.level;
4296 if (!sp->role.cr4_pae) {
4297 page_offset <<= 1; /* 32->64 */
4299 * A 32-bit pde maps 4MB while the shadow pdes map
4300 * only 2MB. So we need to double the offset again
4301 * and zap two pdes instead of one.
4303 if (level == PT32_ROOT_LEVEL) {
4304 page_offset &= ~7; /* kill rounding error */
4308 quadrant = page_offset >> PAGE_SHIFT;
4309 page_offset &= ~PAGE_MASK;
4310 if (quadrant != sp->role.quadrant)
4314 spte = &sp->spt[page_offset / sizeof(*spte)];
4318 static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
4319 const u8 *new, int bytes)
4321 gfn_t gfn = gpa >> PAGE_SHIFT;
4322 struct kvm_mmu_page *sp;
4323 LIST_HEAD(invalid_list);
4324 u64 entry, gentry, *spte;
4326 bool remote_flush, local_flush;
4327 union kvm_mmu_page_role mask = { };
4332 mask.smep_andnot_wp = 1;
4333 mask.smap_andnot_wp = 1;
4337 * If we don't have indirect shadow pages, it means no page is
4338 * write-protected, so we can exit simply.
4340 if (!ACCESS_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
4343 remote_flush = local_flush = false;
4345 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
4347 gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, new, &bytes);
4350 * No need to care whether allocation memory is successful
4351 * or not since pte prefetch is skiped if it does not have
4352 * enough objects in the cache.
4354 mmu_topup_memory_caches(vcpu);
4356 spin_lock(&vcpu->kvm->mmu_lock);
4357 ++vcpu->kvm->stat.mmu_pte_write;
4358 kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
4360 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) {
4361 if (detect_write_misaligned(sp, gpa, bytes) ||
4362 detect_write_flooding(sp)) {
4363 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
4364 ++vcpu->kvm->stat.mmu_flooded;
4368 spte = get_written_sptes(sp, gpa, &npte);
4375 mmu_page_zap_pte(vcpu->kvm, sp, spte);
4377 !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
4378 & mask.word) && rmap_can_add(vcpu))
4379 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
4380 if (need_remote_flush(entry, *spte))
4381 remote_flush = true;
4385 kvm_mmu_flush_or_zap(vcpu, &invalid_list, remote_flush, local_flush);
4386 kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
4387 spin_unlock(&vcpu->kvm->mmu_lock);
4390 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
4395 if (vcpu->arch.mmu.direct_map)
4398 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
4400 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4404 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
4406 static void make_mmu_pages_available(struct kvm_vcpu *vcpu)
4408 LIST_HEAD(invalid_list);
4410 if (likely(kvm_mmu_available_pages(vcpu->kvm) >= KVM_MIN_FREE_MMU_PAGES))
4413 while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES) {
4414 if (!prepare_zap_oldest_mmu_page(vcpu->kvm, &invalid_list))
4417 ++vcpu->kvm->stat.mmu_recycled;
4419 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
4422 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code,
4423 void *insn, int insn_len)
4425 int r, emulation_type = EMULTYPE_RETRY;
4426 enum emulation_result er;
4427 bool direct = vcpu->arch.mmu.direct_map || mmu_is_nested(vcpu);
4429 if (unlikely(error_code & PFERR_RSVD_MASK)) {
4430 r = handle_mmio_page_fault(vcpu, cr2, direct);
4431 if (r == RET_MMIO_PF_EMULATE) {
4435 if (r == RET_MMIO_PF_RETRY)
4441 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code, false);
4447 if (mmio_info_in_cache(vcpu, cr2, direct))
4450 er = x86_emulate_instruction(vcpu, cr2, emulation_type, insn, insn_len);
4455 case EMULATE_USER_EXIT:
4456 ++vcpu->stat.mmio_exits;
4464 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
4466 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
4468 vcpu->arch.mmu.invlpg(vcpu, gva);
4469 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
4470 ++vcpu->stat.invlpg;
4472 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
4474 void kvm_enable_tdp(void)
4478 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
4480 void kvm_disable_tdp(void)
4482 tdp_enabled = false;
4484 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
4486 static void free_mmu_pages(struct kvm_vcpu *vcpu)
4488 free_page((unsigned long)vcpu->arch.mmu.pae_root);
4489 if (vcpu->arch.mmu.lm_root != NULL)
4490 free_page((unsigned long)vcpu->arch.mmu.lm_root);
4493 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
4499 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
4500 * Therefore we need to allocate shadow page tables in the first
4501 * 4GB of memory, which happens to fit the DMA32 zone.
4503 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
4507 vcpu->arch.mmu.pae_root = page_address(page);
4508 for (i = 0; i < 4; ++i)
4509 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
4514 int kvm_mmu_create(struct kvm_vcpu *vcpu)
4516 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
4517 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4518 vcpu->arch.mmu.translate_gpa = translate_gpa;
4519 vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
4521 return alloc_mmu_pages(vcpu);
4524 void kvm_mmu_setup(struct kvm_vcpu *vcpu)
4526 MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu.root_hpa));
4531 void kvm_mmu_init_vm(struct kvm *kvm)
4533 struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;
4535 node->track_write = kvm_mmu_pte_write;
4536 kvm_page_track_register_notifier(kvm, node);
4539 void kvm_mmu_uninit_vm(struct kvm *kvm)
4541 struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;
4543 kvm_page_track_unregister_notifier(kvm, node);
4546 /* The return value indicates if tlb flush on all vcpus is needed. */
4547 typedef bool (*slot_level_handler) (struct kvm *kvm, struct kvm_rmap_head *rmap_head);
4549 /* The caller should hold mmu-lock before calling this function. */
4551 slot_handle_level_range(struct kvm *kvm, struct kvm_memory_slot *memslot,
4552 slot_level_handler fn, int start_level, int end_level,
4553 gfn_t start_gfn, gfn_t end_gfn, bool lock_flush_tlb)
4555 struct slot_rmap_walk_iterator iterator;
4558 for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn,
4559 end_gfn, &iterator) {
4561 flush |= fn(kvm, iterator.rmap);
4563 if (need_resched() || spin_needbreak(&kvm->mmu_lock)) {
4564 if (flush && lock_flush_tlb) {
4565 kvm_flush_remote_tlbs(kvm);
4568 cond_resched_lock(&kvm->mmu_lock);
4572 if (flush && lock_flush_tlb) {
4573 kvm_flush_remote_tlbs(kvm);
4581 slot_handle_level(struct kvm *kvm, struct kvm_memory_slot *memslot,
4582 slot_level_handler fn, int start_level, int end_level,
4583 bool lock_flush_tlb)
4585 return slot_handle_level_range(kvm, memslot, fn, start_level,
4586 end_level, memslot->base_gfn,
4587 memslot->base_gfn + memslot->npages - 1,
4592 slot_handle_all_level(struct kvm *kvm, struct kvm_memory_slot *memslot,
4593 slot_level_handler fn, bool lock_flush_tlb)
4595 return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL,
4596 PT_MAX_HUGEPAGE_LEVEL, lock_flush_tlb);
4600 slot_handle_large_level(struct kvm *kvm, struct kvm_memory_slot *memslot,
4601 slot_level_handler fn, bool lock_flush_tlb)
4603 return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL + 1,
4604 PT_MAX_HUGEPAGE_LEVEL, lock_flush_tlb);
4608 slot_handle_leaf(struct kvm *kvm, struct kvm_memory_slot *memslot,
4609 slot_level_handler fn, bool lock_flush_tlb)
4611 return slot_handle_level(kvm, memslot, fn, PT_PAGE_TABLE_LEVEL,
4612 PT_PAGE_TABLE_LEVEL, lock_flush_tlb);
4615 void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
4617 struct kvm_memslots *slots;
4618 struct kvm_memory_slot *memslot;
4621 spin_lock(&kvm->mmu_lock);
4622 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
4623 slots = __kvm_memslots(kvm, i);
4624 kvm_for_each_memslot(memslot, slots) {
4627 start = max(gfn_start, memslot->base_gfn);
4628 end = min(gfn_end, memslot->base_gfn + memslot->npages);
4632 slot_handle_level_range(kvm, memslot, kvm_zap_rmapp,
4633 PT_PAGE_TABLE_LEVEL, PT_MAX_HUGEPAGE_LEVEL,
4634 start, end - 1, true);
4638 spin_unlock(&kvm->mmu_lock);
4641 static bool slot_rmap_write_protect(struct kvm *kvm,
4642 struct kvm_rmap_head *rmap_head)
4644 return __rmap_write_protect(kvm, rmap_head, false);
4647 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
4648 struct kvm_memory_slot *memslot)
4652 spin_lock(&kvm->mmu_lock);
4653 flush = slot_handle_all_level(kvm, memslot, slot_rmap_write_protect,
4655 spin_unlock(&kvm->mmu_lock);
4658 * kvm_mmu_slot_remove_write_access() and kvm_vm_ioctl_get_dirty_log()
4659 * which do tlb flush out of mmu-lock should be serialized by
4660 * kvm->slots_lock otherwise tlb flush would be missed.
4662 lockdep_assert_held(&kvm->slots_lock);
4665 * We can flush all the TLBs out of the mmu lock without TLB
4666 * corruption since we just change the spte from writable to
4667 * readonly so that we only need to care the case of changing
4668 * spte from present to present (changing the spte from present
4669 * to nonpresent will flush all the TLBs immediately), in other
4670 * words, the only case we care is mmu_spte_update() where we
4671 * haved checked SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE
4672 * instead of PT_WRITABLE_MASK, that means it does not depend
4673 * on PT_WRITABLE_MASK anymore.
4676 kvm_flush_remote_tlbs(kvm);
4679 static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,
4680 struct kvm_rmap_head *rmap_head)
4683 struct rmap_iterator iter;
4684 int need_tlb_flush = 0;
4686 struct kvm_mmu_page *sp;
4689 for_each_rmap_spte(rmap_head, &iter, sptep) {
4690 sp = page_header(__pa(sptep));
4691 pfn = spte_to_pfn(*sptep);
4694 * We cannot do huge page mapping for indirect shadow pages,
4695 * which are found on the last rmap (level = 1) when not using
4696 * tdp; such shadow pages are synced with the page table in
4697 * the guest, and the guest page table is using 4K page size
4698 * mapping if the indirect sp has level = 1.
4700 if (sp->role.direct &&
4701 !kvm_is_reserved_pfn(pfn) &&
4702 PageTransCompound(pfn_to_page(pfn))) {
4703 drop_spte(kvm, sptep);
4709 return need_tlb_flush;
4712 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
4713 const struct kvm_memory_slot *memslot)
4715 /* FIXME: const-ify all uses of struct kvm_memory_slot. */
4716 spin_lock(&kvm->mmu_lock);
4717 slot_handle_leaf(kvm, (struct kvm_memory_slot *)memslot,
4718 kvm_mmu_zap_collapsible_spte, true);
4719 spin_unlock(&kvm->mmu_lock);
4722 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
4723 struct kvm_memory_slot *memslot)
4727 spin_lock(&kvm->mmu_lock);
4728 flush = slot_handle_leaf(kvm, memslot, __rmap_clear_dirty, false);
4729 spin_unlock(&kvm->mmu_lock);
4731 lockdep_assert_held(&kvm->slots_lock);
4734 * It's also safe to flush TLBs out of mmu lock here as currently this
4735 * function is only used for dirty logging, in which case flushing TLB
4736 * out of mmu lock also guarantees no dirty pages will be lost in
4740 kvm_flush_remote_tlbs(kvm);
4742 EXPORT_SYMBOL_GPL(kvm_mmu_slot_leaf_clear_dirty);
4744 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
4745 struct kvm_memory_slot *memslot)
4749 spin_lock(&kvm->mmu_lock);
4750 flush = slot_handle_large_level(kvm, memslot, slot_rmap_write_protect,
4752 spin_unlock(&kvm->mmu_lock);
4754 /* see kvm_mmu_slot_remove_write_access */
4755 lockdep_assert_held(&kvm->slots_lock);
4758 kvm_flush_remote_tlbs(kvm);
4760 EXPORT_SYMBOL_GPL(kvm_mmu_slot_largepage_remove_write_access);
4762 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
4763 struct kvm_memory_slot *memslot)
4767 spin_lock(&kvm->mmu_lock);
4768 flush = slot_handle_all_level(kvm, memslot, __rmap_set_dirty, false);
4769 spin_unlock(&kvm->mmu_lock);
4771 lockdep_assert_held(&kvm->slots_lock);
4773 /* see kvm_mmu_slot_leaf_clear_dirty */
4775 kvm_flush_remote_tlbs(kvm);
4777 EXPORT_SYMBOL_GPL(kvm_mmu_slot_set_dirty);
4779 #define BATCH_ZAP_PAGES 10
4780 static void kvm_zap_obsolete_pages(struct kvm *kvm)
4782 struct kvm_mmu_page *sp, *node;
4786 list_for_each_entry_safe_reverse(sp, node,
4787 &kvm->arch.active_mmu_pages, link) {
4791 * No obsolete page exists before new created page since
4792 * active_mmu_pages is the FIFO list.
4794 if (!is_obsolete_sp(kvm, sp))
4798 * Since we are reversely walking the list and the invalid
4799 * list will be moved to the head, skip the invalid page
4800 * can help us to avoid the infinity list walking.
4802 if (sp->role.invalid)
4806 * Need not flush tlb since we only zap the sp with invalid
4807 * generation number.
4809 if (batch >= BATCH_ZAP_PAGES &&
4810 cond_resched_lock(&kvm->mmu_lock)) {
4815 ret = kvm_mmu_prepare_zap_page(kvm, sp,
4816 &kvm->arch.zapped_obsolete_pages);
4824 * Should flush tlb before free page tables since lockless-walking
4825 * may use the pages.
4827 kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages);
4831 * Fast invalidate all shadow pages and use lock-break technique
4832 * to zap obsolete pages.
4834 * It's required when memslot is being deleted or VM is being
4835 * destroyed, in these cases, we should ensure that KVM MMU does
4836 * not use any resource of the being-deleted slot or all slots
4837 * after calling the function.
4839 void kvm_mmu_invalidate_zap_all_pages(struct kvm *kvm)
4841 spin_lock(&kvm->mmu_lock);
4842 trace_kvm_mmu_invalidate_zap_all_pages(kvm);
4843 kvm->arch.mmu_valid_gen++;
4846 * Notify all vcpus to reload its shadow page table
4847 * and flush TLB. Then all vcpus will switch to new
4848 * shadow page table with the new mmu_valid_gen.
4850 * Note: we should do this under the protection of
4851 * mmu-lock, otherwise, vcpu would purge shadow page
4852 * but miss tlb flush.
4854 kvm_reload_remote_mmus(kvm);
4856 kvm_zap_obsolete_pages(kvm);
4857 spin_unlock(&kvm->mmu_lock);
4860 static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)
4862 return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages));
4865 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots)
4868 * The very rare case: if the generation-number is round,
4869 * zap all shadow pages.
4871 if (unlikely((slots->generation & MMIO_GEN_MASK) == 0)) {
4872 printk_ratelimited(KERN_DEBUG "kvm: zapping shadow pages for mmio generation wraparound\n");
4873 kvm_mmu_invalidate_zap_all_pages(kvm);
4877 static unsigned long
4878 mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc)
4881 int nr_to_scan = sc->nr_to_scan;
4882 unsigned long freed = 0;
4884 spin_lock(&kvm_lock);
4886 list_for_each_entry(kvm, &vm_list, vm_list) {
4888 LIST_HEAD(invalid_list);
4891 * Never scan more than sc->nr_to_scan VM instances.
4892 * Will not hit this condition practically since we do not try
4893 * to shrink more than one VM and it is very unlikely to see
4894 * !n_used_mmu_pages so many times.
4899 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
4900 * here. We may skip a VM instance errorneosly, but we do not
4901 * want to shrink a VM that only started to populate its MMU
4904 if (!kvm->arch.n_used_mmu_pages &&
4905 !kvm_has_zapped_obsolete_pages(kvm))
4908 idx = srcu_read_lock(&kvm->srcu);
4909 spin_lock(&kvm->mmu_lock);
4911 if (kvm_has_zapped_obsolete_pages(kvm)) {
4912 kvm_mmu_commit_zap_page(kvm,
4913 &kvm->arch.zapped_obsolete_pages);
4917 if (prepare_zap_oldest_mmu_page(kvm, &invalid_list))
4919 kvm_mmu_commit_zap_page(kvm, &invalid_list);
4922 spin_unlock(&kvm->mmu_lock);
4923 srcu_read_unlock(&kvm->srcu, idx);
4926 * unfair on small ones
4927 * per-vm shrinkers cry out
4928 * sadness comes quickly
4930 list_move_tail(&kvm->vm_list, &vm_list);
4934 spin_unlock(&kvm_lock);
4938 static unsigned long
4939 mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc)
4941 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
4944 static struct shrinker mmu_shrinker = {
4945 .count_objects = mmu_shrink_count,
4946 .scan_objects = mmu_shrink_scan,
4947 .seeks = DEFAULT_SEEKS * 10,
4950 static void mmu_destroy_caches(void)
4952 if (pte_list_desc_cache)
4953 kmem_cache_destroy(pte_list_desc_cache);
4954 if (mmu_page_header_cache)
4955 kmem_cache_destroy(mmu_page_header_cache);
4958 int kvm_mmu_module_init(void)
4960 pte_list_desc_cache = kmem_cache_create("pte_list_desc",
4961 sizeof(struct pte_list_desc),
4963 if (!pte_list_desc_cache)
4966 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
4967 sizeof(struct kvm_mmu_page),
4969 if (!mmu_page_header_cache)
4972 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL))
4975 register_shrinker(&mmu_shrinker);
4980 mmu_destroy_caches();
4985 * Caculate mmu pages needed for kvm.
4987 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
4989 unsigned int nr_mmu_pages;
4990 unsigned int nr_pages = 0;
4991 struct kvm_memslots *slots;
4992 struct kvm_memory_slot *memslot;
4995 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
4996 slots = __kvm_memslots(kvm, i);
4998 kvm_for_each_memslot(memslot, slots)
4999 nr_pages += memslot->npages;
5002 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
5003 nr_mmu_pages = max(nr_mmu_pages,
5004 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
5006 return nr_mmu_pages;
5009 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
5011 kvm_mmu_unload(vcpu);
5012 free_mmu_pages(vcpu);
5013 mmu_free_memory_caches(vcpu);
5016 void kvm_mmu_module_exit(void)
5018 mmu_destroy_caches();
5019 percpu_counter_destroy(&kvm_total_used_mmu_pages);
5020 unregister_shrinker(&mmu_shrinker);
5021 mmu_audit_disable();