arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68
  69 #define CREATE_TRACE_POINTS
  70 #include "trace.h"
  71
  72 #define MAX_IO_MSRS 256
  73 #define KVM_MAX_MCE_BANKS 32
  74 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  75 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  76
  77 #define emul_to_vcpu(ctxt) \
  78         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  79
  80 /* EFER defaults:
  81  * - enable syscall per default because its emulated by KVM
  82  * - enable LME and LMA per default on 64 bit KVM
  83  */
  84 #ifdef CONFIG_X86_64
  85 static
  86 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  87 #else
  88 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  89 #endif
  90
  91 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  92 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  93
  94 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  95                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  96
  97 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  98 static void process_nmi(struct kvm_vcpu *vcpu);
  99 static void enter_smm(struct kvm_vcpu *vcpu);
 100 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 101
 102 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 103 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 104
 105 static bool __read_mostly ignore_msrs = 0;
 106 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 107
 108 unsigned int min_timer_period_us = 500;
 109 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 110
 111 static bool __read_mostly kvmclock_periodic_sync = true;
 112 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 113
 114 bool __read_mostly kvm_has_tsc_control;
 115 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 116 u32  __read_mostly kvm_max_guest_tsc_khz;
 117 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 118 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 119 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 120 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 121 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 122 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 123 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 124
 125 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 126 static u32 __read_mostly tsc_tolerance_ppm = 250;
 127 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 128
 129 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 130 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 131 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 132
 133 static bool __read_mostly vector_hashing = true;
 134 module_param(vector_hashing, bool, S_IRUGO);
 135
 136 static bool __read_mostly backwards_tsc_observed = false;
 137
 138 #define KVM_NR_SHARED_MSRS 16
 139
 140 struct kvm_shared_msrs_global {
 141         int nr;
 142         u32 msrs[KVM_NR_SHARED_MSRS];
 143 };
 144
 145 struct kvm_shared_msrs {
 146         struct user_return_notifier urn;
 147         bool registered;
 148         struct kvm_shared_msr_values {
 149                 u64 host;
 150                 u64 curr;
 151         } values[KVM_NR_SHARED_MSRS];
 152 };
 153
 154 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 155 static struct kvm_shared_msrs __percpu *shared_msrs;
 156
 157 struct kvm_stats_debugfs_item debugfs_entries[] = {
 158         { "pf_fixed", VCPU_STAT(pf_fixed) },
 159         { "pf_guest", VCPU_STAT(pf_guest) },
 160         { "tlb_flush", VCPU_STAT(tlb_flush) },
 161         { "invlpg", VCPU_STAT(invlpg) },
 162         { "exits", VCPU_STAT(exits) },
 163         { "io_exits", VCPU_STAT(io_exits) },
 164         { "mmio_exits", VCPU_STAT(mmio_exits) },
 165         { "signal_exits", VCPU_STAT(signal_exits) },
 166         { "irq_window", VCPU_STAT(irq_window_exits) },
 167         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 168         { "halt_exits", VCPU_STAT(halt_exits) },
 169         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 170         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 171         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 172         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 173         { "hypercalls", VCPU_STAT(hypercalls) },
 174         { "request_irq", VCPU_STAT(request_irq_exits) },
 175         { "irq_exits", VCPU_STAT(irq_exits) },
 176         { "host_state_reload", VCPU_STAT(host_state_reload) },
 177         { "efer_reload", VCPU_STAT(efer_reload) },
 178         { "fpu_reload", VCPU_STAT(fpu_reload) },
 179         { "insn_emulation", VCPU_STAT(insn_emulation) },
 180         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 181         { "irq_injections", VCPU_STAT(irq_injections) },
 182         { "nmi_injections", VCPU_STAT(nmi_injections) },
 183         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 184         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 185         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 186         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 187         { "mmu_flooded", VM_STAT(mmu_flooded) },
 188         { "mmu_recycled", VM_STAT(mmu_recycled) },
 189         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 190         { "mmu_unsync", VM_STAT(mmu_unsync) },
 191         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 192         { "largepages", VM_STAT(lpages) },
 193         { NULL }
 194 };
 195
 196 u64 __read_mostly host_xcr0;
 197
 198 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 199
 200 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 201 {
 202         int i;
 203         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 204                 vcpu->arch.apf.gfns[i] = ~0;
 205 }
 206
 207 static void kvm_on_user_return(struct user_return_notifier *urn)
 208 {
 209         unsigned slot;
 210         struct kvm_shared_msrs *locals
 211                 = container_of(urn, struct kvm_shared_msrs, urn);
 212         struct kvm_shared_msr_values *values;
 213
 214         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 215                 values = &locals->values[slot];
 216                 if (values->host != values->curr) {
 217                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 218                         values->curr = values->host;
 219                 }
 220         }
 221         locals->registered = false;
 222         user_return_notifier_unregister(urn);
 223 }
 224
 225 static void shared_msr_update(unsigned slot, u32 msr)
 226 {
 227         u64 value;
 228         unsigned int cpu = smp_processor_id();
 229         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 230
 231         /* only read, and nobody should modify it at this time,
 232          * so don't need lock */
 233         if (slot >= shared_msrs_global.nr) {
 234                 printk(KERN_ERR "kvm: invalid MSR slot!");
 235                 return;
 236         }
 237         rdmsrl_safe(msr, &value);
 238         smsr->values[slot].host = value;
 239         smsr->values[slot].curr = value;
 240 }
 241
 242 void kvm_define_shared_msr(unsigned slot, u32 msr)
 243 {
 244         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 245         shared_msrs_global.msrs[slot] = msr;
 246         if (slot >= shared_msrs_global.nr)
 247                 shared_msrs_global.nr = slot + 1;
 248 }
 249 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 250
 251 static void kvm_shared_msr_cpu_online(void)
 252 {
 253         unsigned i;
 254
 255         for (i = 0; i < shared_msrs_global.nr; ++i)
 256                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 257 }
 258
 259 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 260 {
 261         unsigned int cpu = smp_processor_id();
 262         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 263         int err;
 264
 265         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 266                 return 0;
 267         smsr->values[slot].curr = value;
 268         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 269         if (err)
 270                 return 1;
 271
 272         if (!smsr->registered) {
 273                 smsr->urn.on_user_return = kvm_on_user_return;
 274                 user_return_notifier_register(&smsr->urn);
 275                 smsr->registered = true;
 276         }
 277         return 0;
 278 }
 279 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 280
 281 static void drop_user_return_notifiers(void)
 282 {
 283         unsigned int cpu = smp_processor_id();
 284         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 285
 286         if (smsr->registered)
 287                 kvm_on_user_return(&smsr->urn);
 288 }
 289
 290 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 291 {
 292         return vcpu->arch.apic_base;
 293 }
 294 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 295
 296 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 297 {
 298         u64 old_state = vcpu->arch.apic_base &
 299                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 300         u64 new_state = msr_info->data &
 301                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 302         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 303                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 304
 305         if (!msr_info->host_initiated &&
 306             ((msr_info->data & reserved_bits) != 0 ||
 307              new_state == X2APIC_ENABLE ||
 308              (new_state == MSR_IA32_APICBASE_ENABLE &&
 309               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 310              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 311               old_state == 0)))
 312                 return 1;
 313
 314         kvm_lapic_set_base(vcpu, msr_info->data);
 315         return 0;
 316 }
 317 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 318
 319 asmlinkage __visible void kvm_spurious_fault(void)
 320 {
 321         /* Fault while not rebooting.  We want the trace. */
 322         BUG();
 323 }
 324 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 325
 326 #define EXCPT_BENIGN            0
 327 #define EXCPT_CONTRIBUTORY      1
 328 #define EXCPT_PF                2
 329
 330 static int exception_class(int vector)
 331 {
 332         switch (vector) {
 333         case PF_VECTOR:
 334                 return EXCPT_PF;
 335         case DE_VECTOR:
 336         case TS_VECTOR:
 337         case NP_VECTOR:
 338         case SS_VECTOR:
 339         case GP_VECTOR:
 340                 return EXCPT_CONTRIBUTORY;
 341         default:
 342                 break;
 343         }
 344         return EXCPT_BENIGN;
 345 }
 346
 347 #define EXCPT_FAULT             0
 348 #define EXCPT_TRAP              1
 349 #define EXCPT_ABORT             2
 350 #define EXCPT_INTERRUPT         3
 351
 352 static int exception_type(int vector)
 353 {
 354         unsigned int mask;
 355
 356         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 357                 return EXCPT_INTERRUPT;
 358
 359         mask = 1 << vector;
 360
 361         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 362         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 363                 return EXCPT_TRAP;
 364
 365         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 366                 return EXCPT_ABORT;
 367
 368         /* Reserved exceptions will result in fault */
 369         return EXCPT_FAULT;
 370 }
 371
 372 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 373                 unsigned nr, bool has_error, u32 error_code,
 374                 bool reinject)
 375 {
 376         u32 prev_nr;
 377         int class1, class2;
 378
 379         kvm_make_request(KVM_REQ_EVENT, vcpu);
 380
 381         if (!vcpu->arch.exception.pending) {
 382         queue:
 383                 if (has_error && !is_protmode(vcpu))
 384                         has_error = false;
 385                 vcpu->arch.exception.pending = true;
 386                 vcpu->arch.exception.has_error_code = has_error;
 387                 vcpu->arch.exception.nr = nr;
 388                 vcpu->arch.exception.error_code = error_code;
 389                 vcpu->arch.exception.reinject = reinject;
 390                 return;
 391         }
 392
 393         /* to check exception */
 394         prev_nr = vcpu->arch.exception.nr;
 395         if (prev_nr == DF_VECTOR) {
 396                 /* triple fault -> shutdown */
 397                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 398                 return;
 399         }
 400         class1 = exception_class(prev_nr);
 401         class2 = exception_class(nr);
 402         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 403                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 404                 /* generate double fault per SDM Table 5-5 */
 405                 vcpu->arch.exception.pending = true;
 406                 vcpu->arch.exception.has_error_code = true;
 407                 vcpu->arch.exception.nr = DF_VECTOR;
 408                 vcpu->arch.exception.error_code = 0;
 409         } else
 410                 /* replace previous exception with a new one in a hope
 411                    that instruction re-execution will regenerate lost
 412                    exception */
 413                 goto queue;
 414 }
 415
 416 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 417 {
 418         kvm_multiple_exception(vcpu, nr, false, 0, false);
 419 }
 420 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 421
 422 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 423 {
 424         kvm_multiple_exception(vcpu, nr, false, 0, true);
 425 }
 426 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 427
 428 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 429 {
 430         if (err)
 431                 kvm_inject_gp(vcpu, 0);
 432         else
 433                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 434 }
 435 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 436
 437 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 438 {
 439         ++vcpu->stat.pf_guest;
 440         vcpu->arch.cr2 = fault->address;
 441         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 442 }
 443 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 444
 445 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 446 {
 447         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 448                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 449         else
 450                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 451
 452         return fault->nested_page_fault;
 453 }
 454
 455 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 456 {
 457         atomic_inc(&vcpu->arch.nmi_queued);
 458         kvm_make_request(KVM_REQ_NMI, vcpu);
 459 }
 460 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 461
 462 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 463 {
 464         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 465 }
 466 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 467
 468 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 469 {
 470         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 471 }
 472 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 473
 474 /*
 475  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 476  * a #GP and return false.
 477  */
 478 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 479 {
 480         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 481                 return true;
 482         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 483         return false;
 484 }
 485 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 486
 487 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 488 {
 489         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 490                 return true;
 491
 492         kvm_queue_exception(vcpu, UD_VECTOR);
 493         return false;
 494 }
 495 EXPORT_SYMBOL_GPL(kvm_require_dr);
 496
 497 /*
 498  * This function will be used to read from the physical memory of the currently
 499  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 500  * can read from guest physical or from the guest's guest physical memory.
 501  */
 502 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 503                             gfn_t ngfn, void *data, int offset, int len,
 504                             u32 access)
 505 {
 506         struct x86_exception exception;
 507         gfn_t real_gfn;
 508         gpa_t ngpa;
 509
 510         ngpa     = gfn_to_gpa(ngfn);
 511         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 512         if (real_gfn == UNMAPPED_GVA)
 513                 return -EFAULT;
 514
 515         real_gfn = gpa_to_gfn(real_gfn);
 516
 517         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 518 }
 519 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 520
 521 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 522                                void *data, int offset, int len, u32 access)
 523 {
 524         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 525                                        data, offset, len, access);
 526 }
 527
 528 /*
 529  * Load the pae pdptrs.  Return true is they are all valid.
 530  */
 531 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 532 {
 533         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 534         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 535         int i;
 536         int ret;
 537         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 538
 539         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 540                                       offset * sizeof(u64), sizeof(pdpte),
 541                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 542         if (ret < 0) {
 543                 ret = 0;
 544                 goto out;
 545         }
 546         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 547                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 548                     (pdpte[i] &
 549                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 550                         ret = 0;
 551                         goto out;
 552                 }
 553         }
 554         ret = 1;
 555
 556         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 557         __set_bit(VCPU_EXREG_PDPTR,
 558                   (unsigned long *)&vcpu->arch.regs_avail);
 559         __set_bit(VCPU_EXREG_PDPTR,
 560                   (unsigned long *)&vcpu->arch.regs_dirty);
 561 out:
 562
 563         return ret;
 564 }
 565 EXPORT_SYMBOL_GPL(load_pdptrs);
 566
 567 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 568 {
 569         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 570         bool changed = true;
 571         int offset;
 572         gfn_t gfn;
 573         int r;
 574
 575         if (is_long_mode(vcpu) || !is_pae(vcpu))
 576                 return false;
 577
 578         if (!test_bit(VCPU_EXREG_PDPTR,
 579                       (unsigned long *)&vcpu->arch.regs_avail))
 580                 return true;
 581
 582         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 583         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 584         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 585                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 586         if (r < 0)
 587                 goto out;
 588         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 589 out:
 590
 591         return changed;
 592 }
 593
 594 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 595 {
 596         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 597         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 598
 599         cr0 |= X86_CR0_ET;
 600
 601 #ifdef CONFIG_X86_64
 602         if (cr0 & 0xffffffff00000000UL)
 603                 return 1;
 604 #endif
 605
 606         cr0 &= ~CR0_RESERVED_BITS;
 607
 608         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 609                 return 1;
 610
 611         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 612                 return 1;
 613
 614         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 615 #ifdef CONFIG_X86_64
 616                 if ((vcpu->arch.efer & EFER_LME)) {
 617                         int cs_db, cs_l;
 618
 619                         if (!is_pae(vcpu))
 620                                 return 1;
 621                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 622                         if (cs_l)
 623                                 return 1;
 624                 } else
 625 #endif
 626                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 627                                                  kvm_read_cr3(vcpu)))
 628                         return 1;
 629         }
 630
 631         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 632                 return 1;
 633
 634         kvm_x86_ops->set_cr0(vcpu, cr0);
 635
 636         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 637                 kvm_clear_async_pf_completion_queue(vcpu);
 638                 kvm_async_pf_hash_reset(vcpu);
 639         }
 640
 641         if ((cr0 ^ old_cr0) & update_bits)
 642                 kvm_mmu_reset_context(vcpu);
 643
 644         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 645             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 646             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 647                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 648
 649         return 0;
 650 }
 651 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 652
 653 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 654 {
 655         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 656 }
 657 EXPORT_SYMBOL_GPL(kvm_lmsw);
 658
 659 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 660 {
 661         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 662                         !vcpu->guest_xcr0_loaded) {
 663                 /* kvm_set_xcr() also depends on this */
 664                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 665                 vcpu->guest_xcr0_loaded = 1;
 666         }
 667 }
 668
 669 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 670 {
 671         if (vcpu->guest_xcr0_loaded) {
 672                 if (vcpu->arch.xcr0 != host_xcr0)
 673                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 674                 vcpu->guest_xcr0_loaded = 0;
 675         }
 676 }
 677
 678 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 679 {
 680         u64 xcr0 = xcr;
 681         u64 old_xcr0 = vcpu->arch.xcr0;
 682         u64 valid_bits;
 683
 684         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 685         if (index != XCR_XFEATURE_ENABLED_MASK)
 686                 return 1;
 687         if (!(xcr0 & XFEATURE_MASK_FP))
 688                 return 1;
 689         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 690                 return 1;
 691
 692         /*
 693          * Do not allow the guest to set bits that we do not support
 694          * saving.  However, xcr0 bit 0 is always set, even if the
 695          * emulated CPU does not support XSAVE (see fx_init).
 696          */
 697         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 698         if (xcr0 & ~valid_bits)
 699                 return 1;
 700
 701         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 702             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 703                 return 1;
 704
 705         if (xcr0 & XFEATURE_MASK_AVX512) {
 706                 if (!(xcr0 & XFEATURE_MASK_YMM))
 707                         return 1;
 708                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 709                         return 1;
 710         }
 711         vcpu->arch.xcr0 = xcr0;
 712
 713         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 714                 kvm_update_cpuid(vcpu);
 715         return 0;
 716 }
 717
 718 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 719 {
 720         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 721             __kvm_set_xcr(vcpu, index, xcr)) {
 722                 kvm_inject_gp(vcpu, 0);
 723                 return 1;
 724         }
 725         return 0;
 726 }
 727 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 728
 729 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 730 {
 731         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 732         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 733                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 734
 735         if (cr4 & CR4_RESERVED_BITS)
 736                 return 1;
 737
 738         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 739                 return 1;
 740
 741         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 742                 return 1;
 743
 744         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 745                 return 1;
 746
 747         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 748                 return 1;
 749
 750         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 751                 return 1;
 752
 753         if (is_long_mode(vcpu)) {
 754                 if (!(cr4 & X86_CR4_PAE))
 755                         return 1;
 756         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 757                    && ((cr4 ^ old_cr4) & pdptr_bits)
 758                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 759                                    kvm_read_cr3(vcpu)))
 760                 return 1;
 761
 762         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 763                 if (!guest_cpuid_has_pcid(vcpu))
 764                         return 1;
 765
 766                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 767                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 768                         return 1;
 769         }
 770
 771         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 772                 return 1;
 773
 774         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 775             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 776                 kvm_mmu_reset_context(vcpu);
 777
 778         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 779                 kvm_update_cpuid(vcpu);
 780
 781         return 0;
 782 }
 783 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 784
 785 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 786 {
 787 #ifdef CONFIG_X86_64
 788         cr3 &= ~CR3_PCID_INVD;
 789 #endif
 790
 791         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 792                 kvm_mmu_sync_roots(vcpu);
 793                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 794                 return 0;
 795         }
 796
 797         if (is_long_mode(vcpu)) {
 798                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 799                         return 1;
 800         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 801                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 802                 return 1;
 803
 804         vcpu->arch.cr3 = cr3;
 805         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 806         kvm_mmu_new_cr3(vcpu);
 807         return 0;
 808 }
 809 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 810
 811 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 812 {
 813         if (cr8 & CR8_RESERVED_BITS)
 814                 return 1;
 815         if (lapic_in_kernel(vcpu))
 816                 kvm_lapic_set_tpr(vcpu, cr8);
 817         else
 818                 vcpu->arch.cr8 = cr8;
 819         return 0;
 820 }
 821 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 822
 823 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 824 {
 825         if (lapic_in_kernel(vcpu))
 826                 return kvm_lapic_get_cr8(vcpu);
 827         else
 828                 return vcpu->arch.cr8;
 829 }
 830 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 831
 832 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 833 {
 834         int i;
 835
 836         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 837                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 838                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 839                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 840         }
 841 }
 842
 843 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 844 {
 845         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 846                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 847 }
 848
 849 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 850 {
 851         unsigned long dr7;
 852
 853         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 854                 dr7 = vcpu->arch.guest_debug_dr7;
 855         else
 856                 dr7 = vcpu->arch.dr7;
 857         kvm_x86_ops->set_dr7(vcpu, dr7);
 858         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 859         if (dr7 & DR7_BP_EN_MASK)
 860                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 861 }
 862
 863 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 864 {
 865         u64 fixed = DR6_FIXED_1;
 866
 867         if (!guest_cpuid_has_rtm(vcpu))
 868                 fixed |= DR6_RTM;
 869         return fixed;
 870 }
 871
 872 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 873 {
 874         switch (dr) {
 875         case 0 ... 3:
 876                 vcpu->arch.db[dr] = val;
 877                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 878                         vcpu->arch.eff_db[dr] = val;
 879                 break;
 880         case 4:
 881                 /* fall through */
 882         case 6:
 883                 if (val & 0xffffffff00000000ULL)
 884                         return -1; /* #GP */
 885                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 886                 kvm_update_dr6(vcpu);
 887                 break;
 888         case 5:
 889                 /* fall through */
 890         default: /* 7 */
 891                 if (val & 0xffffffff00000000ULL)
 892                         return -1; /* #GP */
 893                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 894                 kvm_update_dr7(vcpu);
 895                 break;
 896         }
 897
 898         return 0;
 899 }
 900
 901 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 902 {
 903         if (__kvm_set_dr(vcpu, dr, val)) {
 904                 kvm_inject_gp(vcpu, 0);
 905                 return 1;
 906         }
 907         return 0;
 908 }
 909 EXPORT_SYMBOL_GPL(kvm_set_dr);
 910
 911 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 912 {
 913         switch (dr) {
 914         case 0 ... 3:
 915                 *val = vcpu->arch.db[dr];
 916                 break;
 917         case 4:
 918                 /* fall through */
 919         case 6:
 920                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 921                         *val = vcpu->arch.dr6;
 922                 else
 923                         *val = kvm_x86_ops->get_dr6(vcpu);
 924                 break;
 925         case 5:
 926                 /* fall through */
 927         default: /* 7 */
 928                 *val = vcpu->arch.dr7;
 929                 break;
 930         }
 931         return 0;
 932 }
 933 EXPORT_SYMBOL_GPL(kvm_get_dr);
 934
 935 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 936 {
 937         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 938         u64 data;
 939         int err;
 940
 941         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 942         if (err)
 943                 return err;
 944         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 945         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 946         return err;
 947 }
 948 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 949
 950 /*
 951  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 952  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 953  *
 954  * This list is modified at module load time to reflect the
 955  * capabilities of the host cpu. This capabilities test skips MSRs that are
 956  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 957  * may depend on host virtualization features rather than host cpu features.
 958  */
 959
 960 static u32 msrs_to_save[] = {
 961         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 962         MSR_STAR,
 963 #ifdef CONFIG_X86_64
 964         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 965 #endif
 966         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 967         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 968 };
 969
 970 static unsigned num_msrs_to_save;
 971
 972 static u32 emulated_msrs[] = {
 973         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 974         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 975         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 976         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 977         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 978         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 979         HV_X64_MSR_RESET,
 980         HV_X64_MSR_VP_INDEX,
 981         HV_X64_MSR_VP_RUNTIME,
 982         HV_X64_MSR_SCONTROL,
 983         HV_X64_MSR_STIMER0_CONFIG,
 984         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 985         MSR_KVM_PV_EOI_EN,
 986
 987         MSR_IA32_TSC_ADJUST,
 988         MSR_IA32_TSCDEADLINE,
 989         MSR_IA32_MISC_ENABLE,
 990         MSR_IA32_MCG_STATUS,
 991         MSR_IA32_MCG_CTL,
 992         MSR_IA32_MCG_EXT_CTL,
 993         MSR_IA32_SMBASE,
 994 };
 995
 996 static unsigned num_emulated_msrs;
 997
 998 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 999 {
1000         if (efer & efer_reserved_bits)
1001                 return false;
1002
1003         if (efer & EFER_FFXSR) {
1004                 struct kvm_cpuid_entry2 *feat;
1005
1006                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1007                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1008                         return false;
1009         }
1010
1011         if (efer & EFER_SVME) {
1012                 struct kvm_cpuid_entry2 *feat;
1013
1014                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1015                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1016                         return false;
1017         }
1018
1019         return true;
1020 }
1021 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1022
1023 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1024 {
1025         u64 old_efer = vcpu->arch.efer;
1026
1027         if (!kvm_valid_efer(vcpu, efer))
1028                 return 1;
1029
1030         if (is_paging(vcpu)
1031             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1032                 return 1;
1033
1034         efer &= ~EFER_LMA;
1035         efer |= vcpu->arch.efer & EFER_LMA;
1036
1037         kvm_x86_ops->set_efer(vcpu, efer);
1038
1039         /* Update reserved bits */
1040         if ((efer ^ old_efer) & EFER_NX)
1041                 kvm_mmu_reset_context(vcpu);
1042
1043         return 0;
1044 }
1045
1046 void kvm_enable_efer_bits(u64 mask)
1047 {
1048        efer_reserved_bits &= ~mask;
1049 }
1050 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1051
1052 /*
1053  * Writes msr value into into the appropriate "register".
1054  * Returns 0 on success, non-0 otherwise.
1055  * Assumes vcpu_load() was already called.
1056  */
1057 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1058 {
1059         switch (msr->index) {
1060         case MSR_FS_BASE:
1061         case MSR_GS_BASE:
1062         case MSR_KERNEL_GS_BASE:
1063         case MSR_CSTAR:
1064         case MSR_LSTAR:
1065                 if (is_noncanonical_address(msr->data))
1066                         return 1;
1067                 break;
1068         case MSR_IA32_SYSENTER_EIP:
1069         case MSR_IA32_SYSENTER_ESP:
1070                 /*
1071                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1072                  * non-canonical address is written on Intel but not on
1073                  * AMD (which ignores the top 32-bits, because it does
1074                  * not implement 64-bit SYSENTER).
1075                  *
1076                  * 64-bit code should hence be able to write a non-canonical
1077                  * value on AMD.  Making the address canonical ensures that
1078                  * vmentry does not fail on Intel after writing a non-canonical
1079                  * value, and that something deterministic happens if the guest
1080                  * invokes 64-bit SYSENTER.
1081                  */
1082                 msr->data = get_canonical(msr->data);
1083         }
1084         return kvm_x86_ops->set_msr(vcpu, msr);
1085 }
1086 EXPORT_SYMBOL_GPL(kvm_set_msr);
1087
1088 /*
1089  * Adapt set_msr() to msr_io()'s calling convention
1090  */
1091 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1092 {
1093         struct msr_data msr;
1094         int r;
1095
1096         msr.index = index;
1097         msr.host_initiated = true;
1098         r = kvm_get_msr(vcpu, &msr);
1099         if (r)
1100                 return r;
1101
1102         *data = msr.data;
1103         return 0;
1104 }
1105
1106 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1107 {
1108         struct msr_data msr;
1109
1110         msr.data = *data;
1111         msr.index = index;
1112         msr.host_initiated = true;
1113         return kvm_set_msr(vcpu, &msr);
1114 }
1115
1116 #ifdef CONFIG_X86_64
1117 struct pvclock_gtod_data {
1118         seqcount_t      seq;
1119
1120         struct { /* extract of a clocksource struct */
1121                 int vclock_mode;
1122                 cycle_t cycle_last;
1123                 cycle_t mask;
1124                 u32     mult;
1125                 u32     shift;
1126         } clock;
1127
1128         u64             boot_ns;
1129         u64             nsec_base;
1130 };
1131
1132 static struct pvclock_gtod_data pvclock_gtod_data;
1133
1134 static void update_pvclock_gtod(struct timekeeper *tk)
1135 {
1136         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1137         u64 boot_ns;
1138
1139         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1140
1141         write_seqcount_begin(&vdata->seq);
1142
1143         /* copy pvclock gtod data */
1144         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1145         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1146         vdata->clock.mask               = tk->tkr_mono.mask;
1147         vdata->clock.mult               = tk->tkr_mono.mult;
1148         vdata->clock.shift              = tk->tkr_mono.shift;
1149
1150         vdata->boot_ns                  = boot_ns;
1151         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1152
1153         write_seqcount_end(&vdata->seq);
1154 }
1155 #endif
1156
1157 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1158 {
1159         /*
1160          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1161          * vcpu_enter_guest.  This function is only called from
1162          * the physical CPU that is running vcpu.
1163          */
1164         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1165 }
1166
1167 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1168 {
1169         int version;
1170         int r;
1171         struct pvclock_wall_clock wc;
1172         struct timespec64 boot;
1173
1174         if (!wall_clock)
1175                 return;
1176
1177         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1178         if (r)
1179                 return;
1180
1181         if (version & 1)
1182                 ++version;  /* first time write, random junk */
1183
1184         ++version;
1185
1186         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1187                 return;
1188
1189         /*
1190          * The guest calculates current wall clock time by adding
1191          * system time (updated by kvm_guest_time_update below) to the
1192          * wall clock specified here.  guest system time equals host
1193          * system time for us, thus we must fill in host boot time here.
1194          */
1195         getboottime64(&boot);
1196
1197         if (kvm->arch.kvmclock_offset) {
1198                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1199                 boot = timespec64_sub(boot, ts);
1200         }
1201         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1202         wc.nsec = boot.tv_nsec;
1203         wc.version = version;
1204
1205         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1206
1207         version++;
1208         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1209 }
1210
1211 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1212 {
1213         do_shl32_div32(dividend, divisor);
1214         return dividend;
1215 }
1216
1217 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1218                                s8 *pshift, u32 *pmultiplier)
1219 {
1220         uint64_t scaled64;
1221         int32_t  shift = 0;
1222         uint64_t tps64;
1223         uint32_t tps32;
1224
1225         tps64 = base_hz;
1226         scaled64 = scaled_hz;
1227         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1228                 tps64 >>= 1;
1229                 shift--;
1230         }
1231
1232         tps32 = (uint32_t)tps64;
1233         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1234                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1235                         scaled64 >>= 1;
1236                 else
1237                         tps32 <<= 1;
1238                 shift++;
1239         }
1240
1241         *pshift = shift;
1242         *pmultiplier = div_frac(scaled64, tps32);
1243
1244         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1245                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1246 }
1247
1248 #ifdef CONFIG_X86_64
1249 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1250 #endif
1251
1252 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1253 static unsigned long max_tsc_khz;
1254
1255 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1256 {
1257         u64 v = (u64)khz * (1000000 + ppm);
1258         do_div(v, 1000000);
1259         return v;
1260 }
1261
1262 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1263 {
1264         u64 ratio;
1265
1266         /* Guest TSC same frequency as host TSC? */
1267         if (!scale) {
1268                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1269                 return 0;
1270         }
1271
1272         /* TSC scaling supported? */
1273         if (!kvm_has_tsc_control) {
1274                 if (user_tsc_khz > tsc_khz) {
1275                         vcpu->arch.tsc_catchup = 1;
1276                         vcpu->arch.tsc_always_catchup = 1;
1277                         return 0;
1278                 } else {
1279                         WARN(1, "user requested TSC rate below hardware speed\n");
1280                         return -1;
1281                 }
1282         }
1283
1284         /* TSC scaling required  - calculate ratio */
1285         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1286                                 user_tsc_khz, tsc_khz);
1287
1288         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1289                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1290                           user_tsc_khz);
1291                 return -1;
1292         }
1293
1294         vcpu->arch.tsc_scaling_ratio = ratio;
1295         return 0;
1296 }
1297
1298 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1299 {
1300         u32 thresh_lo, thresh_hi;
1301         int use_scaling = 0;
1302
1303         /* tsc_khz can be zero if TSC calibration fails */
1304         if (user_tsc_khz == 0) {
1305                 /* set tsc_scaling_ratio to a safe value */
1306                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1307                 return -1;
1308         }
1309
1310         /* Compute a scale to convert nanoseconds in TSC cycles */
1311         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1312                            &vcpu->arch.virtual_tsc_shift,
1313                            &vcpu->arch.virtual_tsc_mult);
1314         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1315
1316         /*
1317          * Compute the variation in TSC rate which is acceptable
1318          * within the range of tolerance and decide if the
1319          * rate being applied is within that bounds of the hardware
1320          * rate.  If so, no scaling or compensation need be done.
1321          */
1322         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1323         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1324         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1325                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1326                 use_scaling = 1;
1327         }
1328         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1329 }
1330
1331 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1332 {
1333         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1334                                       vcpu->arch.virtual_tsc_mult,
1335                                       vcpu->arch.virtual_tsc_shift);
1336         tsc += vcpu->arch.this_tsc_write;
1337         return tsc;
1338 }
1339
1340 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1341 {
1342 #ifdef CONFIG_X86_64
1343         bool vcpus_matched;
1344         struct kvm_arch *ka = &vcpu->kvm->arch;
1345         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1346
1347         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1348                          atomic_read(&vcpu->kvm->online_vcpus));
1349
1350         /*
1351          * Once the masterclock is enabled, always perform request in
1352          * order to update it.
1353          *
1354          * In order to enable masterclock, the host clocksource must be TSC
1355          * and the vcpus need to have matched TSCs.  When that happens,
1356          * perform request to enable masterclock.
1357          */
1358         if (ka->use_master_clock ||
1359             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1360                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1361
1362         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1363                             atomic_read(&vcpu->kvm->online_vcpus),
1364                             ka->use_master_clock, gtod->clock.vclock_mode);
1365 #endif
1366 }
1367
1368 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1369 {
1370         u64 curr_offset = vcpu->arch.tsc_offset;
1371         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1372 }
1373
1374 /*
1375  * Multiply tsc by a fixed point number represented by ratio.
1376  *
1377  * The most significant 64-N bits (mult) of ratio represent the
1378  * integral part of the fixed point number; the remaining N bits
1379  * (frac) represent the fractional part, ie. ratio represents a fixed
1380  * point number (mult + frac * 2^(-N)).
1381  *
1382  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1383  */
1384 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1385 {
1386         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1387 }
1388
1389 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1390 {
1391         u64 _tsc = tsc;
1392         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1393
1394         if (ratio != kvm_default_tsc_scaling_ratio)
1395                 _tsc = __scale_tsc(ratio, tsc);
1396
1397         return _tsc;
1398 }
1399 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1400
1401 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1402 {
1403         u64 tsc;
1404
1405         tsc = kvm_scale_tsc(vcpu, rdtsc());
1406
1407         return target_tsc - tsc;
1408 }
1409
1410 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1411 {
1412         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1413 }
1414 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1415
1416 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1417 {
1418         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1419         vcpu->arch.tsc_offset = offset;
1420 }
1421
1422 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1423 {
1424         struct kvm *kvm = vcpu->kvm;
1425         u64 offset, ns, elapsed;
1426         unsigned long flags;
1427         s64 usdiff;
1428         bool matched;
1429         bool already_matched;
1430         u64 data = msr->data;
1431
1432         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1433         offset = kvm_compute_tsc_offset(vcpu, data);
1434         ns = get_kernel_ns();
1435         elapsed = ns - kvm->arch.last_tsc_nsec;
1436
1437         if (vcpu->arch.virtual_tsc_khz) {
1438                 int faulted = 0;
1439
1440                 /* n.b - signed multiplication and division required */
1441                 usdiff = data - kvm->arch.last_tsc_write;
1442 #ifdef CONFIG_X86_64
1443                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1444 #else
1445                 /* do_div() only does unsigned */
1446                 asm("1: idivl %[divisor]\n"
1447                     "2: xor %%edx, %%edx\n"
1448                     "   movl $0, %[faulted]\n"
1449                     "3:\n"
1450                     ".section .fixup,\"ax\"\n"
1451                     "4: movl $1, %[faulted]\n"
1452                     "   jmp  3b\n"
1453                     ".previous\n"
1454
1455                 _ASM_EXTABLE(1b, 4b)
1456
1457                 : "=A"(usdiff), [faulted] "=r" (faulted)
1458                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1459
1460 #endif
1461                 do_div(elapsed, 1000);
1462                 usdiff -= elapsed;
1463                 if (usdiff < 0)
1464                         usdiff = -usdiff;
1465
1466                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1467                 if (faulted)
1468                         usdiff = USEC_PER_SEC;
1469         } else
1470                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1471
1472         /*
1473          * Special case: TSC write with a small delta (1 second) of virtual
1474          * cycle time against real time is interpreted as an attempt to
1475          * synchronize the CPU.
1476          *
1477          * For a reliable TSC, we can match TSC offsets, and for an unstable
1478          * TSC, we add elapsed time in this computation.  We could let the
1479          * compensation code attempt to catch up if we fall behind, but
1480          * it's better to try to match offsets from the beginning.
1481          */
1482         if (usdiff < USEC_PER_SEC &&
1483             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1484                 if (!check_tsc_unstable()) {
1485                         offset = kvm->arch.cur_tsc_offset;
1486                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1487                 } else {
1488                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1489                         data += delta;
1490                         offset = kvm_compute_tsc_offset(vcpu, data);
1491                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1492                 }
1493                 matched = true;
1494                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1495         } else {
1496                 /*
1497                  * We split periods of matched TSC writes into generations.
1498                  * For each generation, we track the original measured
1499                  * nanosecond time, offset, and write, so if TSCs are in
1500                  * sync, we can match exact offset, and if not, we can match
1501                  * exact software computation in compute_guest_tsc()
1502                  *
1503                  * These values are tracked in kvm->arch.cur_xxx variables.
1504                  */
1505                 kvm->arch.cur_tsc_generation++;
1506                 kvm->arch.cur_tsc_nsec = ns;
1507                 kvm->arch.cur_tsc_write = data;
1508                 kvm->arch.cur_tsc_offset = offset;
1509                 matched = false;
1510                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1511                          kvm->arch.cur_tsc_generation, data);
1512         }
1513
1514         /*
1515          * We also track th most recent recorded KHZ, write and time to
1516          * allow the matching interval to be extended at each write.
1517          */
1518         kvm->arch.last_tsc_nsec = ns;
1519         kvm->arch.last_tsc_write = data;
1520         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1521
1522         vcpu->arch.last_guest_tsc = data;
1523
1524         /* Keep track of which generation this VCPU has synchronized to */
1525         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1526         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1527         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1528
1529         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1530                 update_ia32_tsc_adjust_msr(vcpu, offset);
1531         kvm_vcpu_write_tsc_offset(vcpu, offset);
1532         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1533
1534         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1535         if (!matched) {
1536                 kvm->arch.nr_vcpus_matched_tsc = 0;
1537         } else if (!already_matched) {
1538                 kvm->arch.nr_vcpus_matched_tsc++;
1539         }
1540
1541         kvm_track_tsc_matching(vcpu);
1542         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1543 }
1544
1545 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1546
1547 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1548                                            s64 adjustment)
1549 {
1550         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1551 }
1552
1553 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1554 {
1555         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1556                 WARN_ON(adjustment < 0);
1557         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1558         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1559 }
1560
1561 #ifdef CONFIG_X86_64
1562
1563 static cycle_t read_tsc(void)
1564 {
1565         cycle_t ret = (cycle_t)rdtsc_ordered();
1566         u64 last = pvclock_gtod_data.clock.cycle_last;
1567
1568         if (likely(ret >= last))
1569                 return ret;
1570
1571         /*
1572          * GCC likes to generate cmov here, but this branch is extremely
1573          * predictable (it's just a function of time and the likely is
1574          * very likely) and there's a data dependence, so force GCC
1575          * to generate a branch instead.  I don't barrier() because
1576          * we don't actually need a barrier, and if this function
1577          * ever gets inlined it will generate worse code.
1578          */
1579         asm volatile ("");
1580         return last;
1581 }
1582
1583 static inline u64 vgettsc(cycle_t *cycle_now)
1584 {
1585         long v;
1586         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1587
1588         *cycle_now = read_tsc();
1589
1590         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1591         return v * gtod->clock.mult;
1592 }
1593
1594 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1595 {
1596         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1597         unsigned long seq;
1598         int mode;
1599         u64 ns;
1600
1601         do {
1602                 seq = read_seqcount_begin(&gtod->seq);
1603                 mode = gtod->clock.vclock_mode;
1604                 ns = gtod->nsec_base;
1605                 ns += vgettsc(cycle_now);
1606                 ns >>= gtod->clock.shift;
1607                 ns += gtod->boot_ns;
1608         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1609         *t = ns;
1610
1611         return mode;
1612 }
1613
1614 /* returns true if host is using tsc clocksource */
1615 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1616 {
1617         /* checked again under seqlock below */
1618         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1619                 return false;
1620
1621         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1622 }
1623 #endif
1624
1625 /*
1626  *
1627  * Assuming a stable TSC across physical CPUS, and a stable TSC
1628  * across virtual CPUs, the following condition is possible.
1629  * Each numbered line represents an event visible to both
1630  * CPUs at the next numbered event.
1631  *
1632  * "timespecX" represents host monotonic time. "tscX" represents
1633  * RDTSC value.
1634  *
1635  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1636  *
1637  * 1.  read timespec0,tsc0
1638  * 2.                                   | timespec1 = timespec0 + N
1639  *                                      | tsc1 = tsc0 + M
1640  * 3. transition to guest               | transition to guest
1641  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1642  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1643  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1644  *
1645  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1646  *
1647  *      - ret0 < ret1
1648  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1649  *              ...
1650  *      - 0 < N - M => M < N
1651  *
1652  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1653  * always the case (the difference between two distinct xtime instances
1654  * might be smaller then the difference between corresponding TSC reads,
1655  * when updating guest vcpus pvclock areas).
1656  *
1657  * To avoid that problem, do not allow visibility of distinct
1658  * system_timestamp/tsc_timestamp values simultaneously: use a master
1659  * copy of host monotonic time values. Update that master copy
1660  * in lockstep.
1661  *
1662  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1663  *
1664  */
1665
1666 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1667 {
1668 #ifdef CONFIG_X86_64
1669         struct kvm_arch *ka = &kvm->arch;
1670         int vclock_mode;
1671         bool host_tsc_clocksource, vcpus_matched;
1672
1673         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1674                         atomic_read(&kvm->online_vcpus));
1675
1676         /*
1677          * If the host uses TSC clock, then passthrough TSC as stable
1678          * to the guest.
1679          */
1680         host_tsc_clocksource = kvm_get_time_and_clockread(
1681                                         &ka->master_kernel_ns,
1682                                         &ka->master_cycle_now);
1683
1684         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1685                                 && !backwards_tsc_observed
1686                                 && !ka->boot_vcpu_runs_old_kvmclock;
1687
1688         if (ka->use_master_clock)
1689                 atomic_set(&kvm_guest_has_master_clock, 1);
1690
1691         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1692         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1693                                         vcpus_matched);
1694 #endif
1695 }
1696
1697 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1698 {
1699         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1700 }
1701
1702 static void kvm_gen_update_masterclock(struct kvm *kvm)
1703 {
1704 #ifdef CONFIG_X86_64
1705         int i;
1706         struct kvm_vcpu *vcpu;
1707         struct kvm_arch *ka = &kvm->arch;
1708
1709         spin_lock(&ka->pvclock_gtod_sync_lock);
1710         kvm_make_mclock_inprogress_request(kvm);
1711         /* no guest entries from this point */
1712         pvclock_update_vm_gtod_copy(kvm);
1713
1714         kvm_for_each_vcpu(i, vcpu, kvm)
1715                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1716
1717         /* guest entries allowed */
1718         kvm_for_each_vcpu(i, vcpu, kvm)
1719                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1720
1721         spin_unlock(&ka->pvclock_gtod_sync_lock);
1722 #endif
1723 }
1724
1725 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1726 {
1727         struct kvm_vcpu_arch *vcpu = &v->arch;
1728         struct pvclock_vcpu_time_info guest_hv_clock;
1729
1730         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1731                 &guest_hv_clock, sizeof(guest_hv_clock))))
1732                 return;
1733
1734         /* This VCPU is paused, but it's legal for a guest to read another
1735          * VCPU's kvmclock, so we really have to follow the specification where
1736          * it says that version is odd if data is being modified, and even after
1737          * it is consistent.
1738          *
1739          * Version field updates must be kept separate.  This is because
1740          * kvm_write_guest_cached might use a "rep movs" instruction, and
1741          * writes within a string instruction are weakly ordered.  So there
1742          * are three writes overall.
1743          *
1744          * As a small optimization, only write the version field in the first
1745          * and third write.  The vcpu->pv_time cache is still valid, because the
1746          * version field is the first in the struct.
1747          */
1748         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1749
1750         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1751         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1752                                 &vcpu->hv_clock,
1753                                 sizeof(vcpu->hv_clock.version));
1754
1755         smp_wmb();
1756
1757         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1758         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1759
1760         if (vcpu->pvclock_set_guest_stopped_request) {
1761                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1762                 vcpu->pvclock_set_guest_stopped_request = false;
1763         }
1764
1765         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1766
1767         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1768                                 &vcpu->hv_clock,
1769                                 sizeof(vcpu->hv_clock));
1770
1771         smp_wmb();
1772
1773         vcpu->hv_clock.version++;
1774         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1775                                 &vcpu->hv_clock,
1776                                 sizeof(vcpu->hv_clock.version));
1777 }
1778
1779 static int kvm_guest_time_update(struct kvm_vcpu *v)
1780 {
1781         unsigned long flags, tgt_tsc_khz;
1782         struct kvm_vcpu_arch *vcpu = &v->arch;
1783         struct kvm_arch *ka = &v->kvm->arch;
1784         s64 kernel_ns;
1785         u64 tsc_timestamp, host_tsc;
1786         u8 pvclock_flags;
1787         bool use_master_clock;
1788
1789         kernel_ns = 0;
1790         host_tsc = 0;
1791
1792         /*
1793          * If the host uses TSC clock, then passthrough TSC as stable
1794          * to the guest.
1795          */
1796         spin_lock(&ka->pvclock_gtod_sync_lock);
1797         use_master_clock = ka->use_master_clock;
1798         if (use_master_clock) {
1799                 host_tsc = ka->master_cycle_now;
1800                 kernel_ns = ka->master_kernel_ns;
1801         }
1802         spin_unlock(&ka->pvclock_gtod_sync_lock);
1803
1804         /* Keep irq disabled to prevent changes to the clock */
1805         local_irq_save(flags);
1806         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1807         if (unlikely(tgt_tsc_khz == 0)) {
1808                 local_irq_restore(flags);
1809                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1810                 return 1;
1811         }
1812         if (!use_master_clock) {
1813                 host_tsc = rdtsc();
1814                 kernel_ns = get_kernel_ns();
1815         }
1816
1817         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1818
1819         /*
1820          * We may have to catch up the TSC to match elapsed wall clock
1821          * time for two reasons, even if kvmclock is used.
1822          *   1) CPU could have been running below the maximum TSC rate
1823          *   2) Broken TSC compensation resets the base at each VCPU
1824          *      entry to avoid unknown leaps of TSC even when running
1825          *      again on the same CPU.  This may cause apparent elapsed
1826          *      time to disappear, and the guest to stand still or run
1827          *      very slowly.
1828          */
1829         if (vcpu->tsc_catchup) {
1830                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1831                 if (tsc > tsc_timestamp) {
1832                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1833                         tsc_timestamp = tsc;
1834                 }
1835         }
1836
1837         local_irq_restore(flags);
1838
1839         /* With all the info we got, fill in the values */
1840
1841         if (kvm_has_tsc_control)
1842                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1843
1844         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1845                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1846                                    &vcpu->hv_clock.tsc_shift,
1847                                    &vcpu->hv_clock.tsc_to_system_mul);
1848                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1849         }
1850
1851         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1852         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1853         vcpu->last_guest_tsc = tsc_timestamp;
1854
1855         /* If the host uses TSC clocksource, then it is stable */
1856         pvclock_flags = 0;
1857         if (use_master_clock)
1858                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1859
1860         vcpu->hv_clock.flags = pvclock_flags;
1861
1862         if (!vcpu->pv_time_enabled)
1863                 return 0;
1864
1865         kvm_setup_pvclock_page(v);
1866         return 0;
1867 }
1868
1869 /*
1870  * kvmclock updates which are isolated to a given vcpu, such as
1871  * vcpu->cpu migration, should not allow system_timestamp from
1872  * the rest of the vcpus to remain static. Otherwise ntp frequency
1873  * correction applies to one vcpu's system_timestamp but not
1874  * the others.
1875  *
1876  * So in those cases, request a kvmclock update for all vcpus.
1877  * We need to rate-limit these requests though, as they can
1878  * considerably slow guests that have a large number of vcpus.
1879  * The time for a remote vcpu to update its kvmclock is bound
1880  * by the delay we use to rate-limit the updates.
1881  */
1882
1883 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1884
1885 static void kvmclock_update_fn(struct work_struct *work)
1886 {
1887         int i;
1888         struct delayed_work *dwork = to_delayed_work(work);
1889         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1890                                            kvmclock_update_work);
1891         struct kvm *kvm = container_of(ka, struct kvm, arch);
1892         struct kvm_vcpu *vcpu;
1893
1894         kvm_for_each_vcpu(i, vcpu, kvm) {
1895                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1896                 kvm_vcpu_kick(vcpu);
1897         }
1898 }
1899
1900 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1901 {
1902         struct kvm *kvm = v->kvm;
1903
1904         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1905         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1906                                         KVMCLOCK_UPDATE_DELAY);
1907 }
1908
1909 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1910
1911 static void kvmclock_sync_fn(struct work_struct *work)
1912 {
1913         struct delayed_work *dwork = to_delayed_work(work);
1914         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1915                                            kvmclock_sync_work);
1916         struct kvm *kvm = container_of(ka, struct kvm, arch);
1917
1918         if (!kvmclock_periodic_sync)
1919                 return;
1920
1921         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1922         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1923                                         KVMCLOCK_SYNC_PERIOD);
1924 }
1925
1926 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1927 {
1928         u64 mcg_cap = vcpu->arch.mcg_cap;
1929         unsigned bank_num = mcg_cap & 0xff;
1930
1931         switch (msr) {
1932         case MSR_IA32_MCG_STATUS:
1933                 vcpu->arch.mcg_status = data;
1934                 break;
1935         case MSR_IA32_MCG_CTL:
1936                 if (!(mcg_cap & MCG_CTL_P))
1937                         return 1;
1938                 if (data != 0 && data != ~(u64)0)
1939                         return -1;
1940                 vcpu->arch.mcg_ctl = data;
1941                 break;
1942         default:
1943                 if (msr >= MSR_IA32_MC0_CTL &&
1944                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1945                         u32 offset = msr - MSR_IA32_MC0_CTL;
1946                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1947                          * some Linux kernels though clear bit 10 in bank 4 to
1948                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1949                          * this to avoid an uncatched #GP in the guest
1950                          */
1951                         if ((offset & 0x3) == 0 &&
1952                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1953                                 return -1;
1954                         vcpu->arch.mce_banks[offset] = data;
1955                         break;
1956                 }
1957                 return 1;
1958         }
1959         return 0;
1960 }
1961
1962 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1963 {
1964         struct kvm *kvm = vcpu->kvm;
1965         int lm = is_long_mode(vcpu);
1966         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1967                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1968         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1969                 : kvm->arch.xen_hvm_config.blob_size_32;
1970         u32 page_num = data & ~PAGE_MASK;
1971         u64 page_addr = data & PAGE_MASK;
1972         u8 *page;
1973         int r;
1974
1975         r = -E2BIG;
1976         if (page_num >= blob_size)
1977                 goto out;
1978         r = -ENOMEM;
1979         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1980         if (IS_ERR(page)) {
1981                 r = PTR_ERR(page);
1982                 goto out;
1983         }
1984         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1985                 goto out_free;
1986         r = 0;
1987 out_free:
1988         kfree(page);
1989 out:
1990         return r;
1991 }
1992
1993 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1994 {
1995         gpa_t gpa = data & ~0x3f;
1996
1997         /* Bits 2:5 are reserved, Should be zero */
1998         if (data & 0x3c)
1999                 return 1;
2000
2001         vcpu->arch.apf.msr_val = data;
2002
2003         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2004                 kvm_clear_async_pf_completion_queue(vcpu);
2005                 kvm_async_pf_hash_reset(vcpu);
2006                 return 0;
2007         }
2008
2009         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2010                                         sizeof(u32)))
2011                 return 1;
2012
2013         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2014         kvm_async_pf_wakeup_all(vcpu);
2015         return 0;
2016 }
2017
2018 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2019 {
2020         vcpu->arch.pv_time_enabled = false;
2021 }
2022
2023 static void record_steal_time(struct kvm_vcpu *vcpu)
2024 {
2025         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2026                 return;
2027
2028         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2029                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2030                 return;
2031
2032         if (vcpu->arch.st.steal.version & 1)
2033                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2034
2035         vcpu->arch.st.steal.version += 1;
2036
2037         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2038                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2039
2040         smp_wmb();
2041
2042         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2043                 vcpu->arch.st.last_steal;
2044         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2045
2046         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2047                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2048
2049         smp_wmb();
2050
2051         vcpu->arch.st.steal.version += 1;
2052
2053         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2054                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2055 }
2056
2057 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2058 {
2059         bool pr = false;
2060         u32 msr = msr_info->index;
2061         u64 data = msr_info->data;
2062
2063         switch (msr) {
2064         case MSR_AMD64_NB_CFG:
2065         case MSR_IA32_UCODE_REV:
2066         case MSR_IA32_UCODE_WRITE:
2067         case MSR_VM_HSAVE_PA:
2068         case MSR_AMD64_PATCH_LOADER:
2069         case MSR_AMD64_BU_CFG2:
2070                 break;
2071
2072         case MSR_EFER:
2073                 return set_efer(vcpu, data);
2074         case MSR_K7_HWCR:
2075                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2076                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2077                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2078                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2079                 if (data != 0) {
2080                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2081                                     data);
2082                         return 1;
2083                 }
2084                 break;
2085         case MSR_FAM10H_MMIO_CONF_BASE:
2086                 if (data != 0) {
2087                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2088                                     "0x%llx\n", data);
2089                         return 1;
2090                 }
2091                 break;
2092         case MSR_IA32_DEBUGCTLMSR:
2093                 if (!data) {
2094                         /* We support the non-activated case already */
2095                         break;
2096                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2097                         /* Values other than LBR and BTF are vendor-specific,
2098                            thus reserved and should throw a #GP */
2099                         return 1;
2100                 }
2101                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2102                             __func__, data);
2103                 break;
2104         case 0x200 ... 0x2ff:
2105                 return kvm_mtrr_set_msr(vcpu, msr, data);
2106         case MSR_IA32_APICBASE:
2107                 return kvm_set_apic_base(vcpu, msr_info);
2108         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2109                 return kvm_x2apic_msr_write(vcpu, msr, data);
2110         case MSR_IA32_TSCDEADLINE:
2111                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2112                 break;
2113         case MSR_IA32_TSC_ADJUST:
2114                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2115                         if (!msr_info->host_initiated) {
2116                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2117                                 adjust_tsc_offset_guest(vcpu, adj);
2118                         }
2119                         vcpu->arch.ia32_tsc_adjust_msr = data;
2120                 }
2121                 break;
2122         case MSR_IA32_MISC_ENABLE:
2123                 vcpu->arch.ia32_misc_enable_msr = data;
2124                 break;
2125         case MSR_IA32_SMBASE:
2126                 if (!msr_info->host_initiated)
2127                         return 1;
2128                 vcpu->arch.smbase = data;
2129                 break;
2130         case MSR_KVM_WALL_CLOCK_NEW:
2131         case MSR_KVM_WALL_CLOCK:
2132                 vcpu->kvm->arch.wall_clock = data;
2133                 kvm_write_wall_clock(vcpu->kvm, data);
2134                 break;
2135         case MSR_KVM_SYSTEM_TIME_NEW:
2136         case MSR_KVM_SYSTEM_TIME: {
2137                 u64 gpa_offset;
2138                 struct kvm_arch *ka = &vcpu->kvm->arch;
2139
2140                 kvmclock_reset(vcpu);
2141
2142                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2143                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2144
2145                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2146                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2147                                         &vcpu->requests);
2148
2149                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2150                 }
2151
2152                 vcpu->arch.time = data;
2153                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2154
2155                 /* we verify if the enable bit is set... */
2156                 if (!(data & 1))
2157                         break;
2158
2159                 gpa_offset = data & ~(PAGE_MASK | 1);
2160
2161                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2162                      &vcpu->arch.pv_time, data & ~1ULL,
2163                      sizeof(struct pvclock_vcpu_time_info)))
2164                         vcpu->arch.pv_time_enabled = false;
2165                 else
2166                         vcpu->arch.pv_time_enabled = true;
2167
2168                 break;
2169         }
2170         case MSR_KVM_ASYNC_PF_EN:
2171                 if (kvm_pv_enable_async_pf(vcpu, data))
2172                         return 1;
2173                 break;
2174         case MSR_KVM_STEAL_TIME:
2175
2176                 if (unlikely(!sched_info_on()))
2177                         return 1;
2178
2179                 if (data & KVM_STEAL_RESERVED_MASK)
2180                         return 1;
2181
2182                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2183                                                 data & KVM_STEAL_VALID_BITS,
2184                                                 sizeof(struct kvm_steal_time)))
2185                         return 1;
2186
2187                 vcpu->arch.st.msr_val = data;
2188
2189                 if (!(data & KVM_MSR_ENABLED))
2190                         break;
2191
2192                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2193
2194                 break;
2195         case MSR_KVM_PV_EOI_EN:
2196                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2197                         return 1;
2198                 break;
2199
2200         case MSR_IA32_MCG_CTL:
2201         case MSR_IA32_MCG_STATUS:
2202         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2203                 return set_msr_mce(vcpu, msr, data);
2204
2205         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2206         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2207                 pr = true; /* fall through */
2208         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2209         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2210                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2211                         return kvm_pmu_set_msr(vcpu, msr_info);
2212
2213                 if (pr || data != 0)
2214                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2215                                     "0x%x data 0x%llx\n", msr, data);
2216                 break;
2217         case MSR_K7_CLK_CTL:
2218                 /*
2219                  * Ignore all writes to this no longer documented MSR.
2220                  * Writes are only relevant for old K7 processors,
2221                  * all pre-dating SVM, but a recommended workaround from
2222                  * AMD for these chips. It is possible to specify the
2223                  * affected processor models on the command line, hence
2224                  * the need to ignore the workaround.
2225                  */
2226                 break;
2227         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2228         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2229         case HV_X64_MSR_CRASH_CTL:
2230         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2231                 return kvm_hv_set_msr_common(vcpu, msr, data,
2232                                              msr_info->host_initiated);
2233         case MSR_IA32_BBL_CR_CTL3:
2234                 /* Drop writes to this legacy MSR -- see rdmsr
2235                  * counterpart for further detail.
2236                  */
2237                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2238                 break;
2239         case MSR_AMD64_OSVW_ID_LENGTH:
2240                 if (!guest_cpuid_has_osvw(vcpu))
2241                         return 1;
2242                 vcpu->arch.osvw.length = data;
2243                 break;
2244         case MSR_AMD64_OSVW_STATUS:
2245                 if (!guest_cpuid_has_osvw(vcpu))
2246                         return 1;
2247                 vcpu->arch.osvw.status = data;
2248                 break;
2249         default:
2250                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2251                         return xen_hvm_config(vcpu, data);
2252                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2253                         return kvm_pmu_set_msr(vcpu, msr_info);
2254                 if (!ignore_msrs) {
2255                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2256                                     msr, data);
2257                         return 1;
2258                 } else {
2259                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2260                                     msr, data);
2261                         break;
2262                 }
2263         }
2264         return 0;
2265 }
2266 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2267
2268
2269 /*
2270  * Reads an msr value (of 'msr_index') into 'pdata'.
2271  * Returns 0 on success, non-0 otherwise.
2272  * Assumes vcpu_load() was already called.
2273  */
2274 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2275 {
2276         return kvm_x86_ops->get_msr(vcpu, msr);
2277 }
2278 EXPORT_SYMBOL_GPL(kvm_get_msr);
2279
2280 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2281 {
2282         u64 data;
2283         u64 mcg_cap = vcpu->arch.mcg_cap;
2284         unsigned bank_num = mcg_cap & 0xff;
2285
2286         switch (msr) {
2287         case MSR_IA32_P5_MC_ADDR:
2288         case MSR_IA32_P5_MC_TYPE:
2289                 data = 0;
2290                 break;
2291         case MSR_IA32_MCG_CAP:
2292                 data = vcpu->arch.mcg_cap;
2293                 break;
2294         case MSR_IA32_MCG_CTL:
2295                 if (!(mcg_cap & MCG_CTL_P))
2296                         return 1;
2297                 data = vcpu->arch.mcg_ctl;
2298                 break;
2299         case MSR_IA32_MCG_STATUS:
2300                 data = vcpu->arch.mcg_status;
2301                 break;
2302         default:
2303                 if (msr >= MSR_IA32_MC0_CTL &&
2304                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2305                         u32 offset = msr - MSR_IA32_MC0_CTL;
2306                         data = vcpu->arch.mce_banks[offset];
2307                         break;
2308                 }
2309                 return 1;
2310         }
2311         *pdata = data;
2312         return 0;
2313 }
2314
2315 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2316 {
2317         switch (msr_info->index) {
2318         case MSR_IA32_PLATFORM_ID:
2319         case MSR_IA32_EBL_CR_POWERON:
2320         case MSR_IA32_DEBUGCTLMSR:
2321         case MSR_IA32_LASTBRANCHFROMIP:
2322         case MSR_IA32_LASTBRANCHTOIP:
2323         case MSR_IA32_LASTINTFROMIP:
2324         case MSR_IA32_LASTINTTOIP:
2325         case MSR_K8_SYSCFG:
2326         case MSR_K8_TSEG_ADDR:
2327         case MSR_K8_TSEG_MASK:
2328         case MSR_K7_HWCR:
2329         case MSR_VM_HSAVE_PA:
2330         case MSR_K8_INT_PENDING_MSG:
2331         case MSR_AMD64_NB_CFG:
2332         case MSR_FAM10H_MMIO_CONF_BASE:
2333         case MSR_AMD64_BU_CFG2:
2334         case MSR_IA32_PERF_CTL:
2335                 msr_info->data = 0;
2336                 break;
2337         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2338         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2339         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2340         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2341                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2342                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2343                 msr_info->data = 0;
2344                 break;
2345         case MSR_IA32_UCODE_REV:
2346                 msr_info->data = 0x100000000ULL;
2347                 break;
2348         case MSR_MTRRcap:
2349         case 0x200 ... 0x2ff:
2350                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2351         case 0xcd: /* fsb frequency */
2352                 msr_info->data = 3;
2353                 break;
2354                 /*
2355                  * MSR_EBC_FREQUENCY_ID
2356                  * Conservative value valid for even the basic CPU models.
2357                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2358                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2359                  * and 266MHz for model 3, or 4. Set Core Clock
2360                  * Frequency to System Bus Frequency Ratio to 1 (bits
2361                  * 31:24) even though these are only valid for CPU
2362                  * models > 2, however guests may end up dividing or
2363                  * multiplying by zero otherwise.
2364                  */
2365         case MSR_EBC_FREQUENCY_ID:
2366                 msr_info->data = 1 << 24;
2367                 break;
2368         case MSR_IA32_APICBASE:
2369                 msr_info->data = kvm_get_apic_base(vcpu);
2370                 break;
2371         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2372                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2373                 break;
2374         case MSR_IA32_TSCDEADLINE:
2375                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2376                 break;
2377         case MSR_IA32_TSC_ADJUST:
2378                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2379                 break;
2380         case MSR_IA32_MISC_ENABLE:
2381                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2382                 break;
2383         case MSR_IA32_SMBASE:
2384                 if (!msr_info->host_initiated)
2385                         return 1;
2386                 msr_info->data = vcpu->arch.smbase;
2387                 break;
2388         case MSR_IA32_PERF_STATUS:
2389                 /* TSC increment by tick */
2390                 msr_info->data = 1000ULL;
2391                 /* CPU multiplier */
2392                 msr_info->data |= (((uint64_t)4ULL) << 40);
2393                 break;
2394         case MSR_EFER:
2395                 msr_info->data = vcpu->arch.efer;
2396                 break;
2397         case MSR_KVM_WALL_CLOCK:
2398         case MSR_KVM_WALL_CLOCK_NEW:
2399                 msr_info->data = vcpu->kvm->arch.wall_clock;
2400                 break;
2401         case MSR_KVM_SYSTEM_TIME:
2402         case MSR_KVM_SYSTEM_TIME_NEW:
2403                 msr_info->data = vcpu->arch.time;
2404                 break;
2405         case MSR_KVM_ASYNC_PF_EN:
2406                 msr_info->data = vcpu->arch.apf.msr_val;
2407                 break;
2408         case MSR_KVM_STEAL_TIME:
2409                 msr_info->data = vcpu->arch.st.msr_val;
2410                 break;
2411         case MSR_KVM_PV_EOI_EN:
2412                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2413                 break;
2414         case MSR_IA32_P5_MC_ADDR:
2415         case MSR_IA32_P5_MC_TYPE:
2416         case MSR_IA32_MCG_CAP:
2417         case MSR_IA32_MCG_CTL:
2418         case MSR_IA32_MCG_STATUS:
2419         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2420                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2421         case MSR_K7_CLK_CTL:
2422                 /*
2423                  * Provide expected ramp-up count for K7. All other
2424                  * are set to zero, indicating minimum divisors for
2425                  * every field.
2426                  *
2427                  * This prevents guest kernels on AMD host with CPU
2428                  * type 6, model 8 and higher from exploding due to
2429                  * the rdmsr failing.
2430                  */
2431                 msr_info->data = 0x20000000;
2432                 break;
2433         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2434         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2435         case HV_X64_MSR_CRASH_CTL:
2436         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2437                 return kvm_hv_get_msr_common(vcpu,
2438                                              msr_info->index, &msr_info->data);
2439                 break;
2440         case MSR_IA32_BBL_CR_CTL3:
2441                 /* This legacy MSR exists but isn't fully documented in current
2442                  * silicon.  It is however accessed by winxp in very narrow
2443                  * scenarios where it sets bit #19, itself documented as
2444                  * a "reserved" bit.  Best effort attempt to source coherent
2445                  * read data here should the balance of the register be
2446                  * interpreted by the guest:
2447                  *
2448                  * L2 cache control register 3: 64GB range, 256KB size,
2449                  * enabled, latency 0x1, configured
2450                  */
2451                 msr_info->data = 0xbe702111;
2452                 break;
2453         case MSR_AMD64_OSVW_ID_LENGTH:
2454                 if (!guest_cpuid_has_osvw(vcpu))
2455                         return 1;
2456                 msr_info->data = vcpu->arch.osvw.length;
2457                 break;
2458         case MSR_AMD64_OSVW_STATUS:
2459                 if (!guest_cpuid_has_osvw(vcpu))
2460                         return 1;
2461                 msr_info->data = vcpu->arch.osvw.status;
2462                 break;
2463         default:
2464                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2465                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2466                 if (!ignore_msrs) {
2467                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2468                         return 1;
2469                 } else {
2470                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2471                         msr_info->data = 0;
2472                 }
2473                 break;
2474         }
2475         return 0;
2476 }
2477 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2478
2479 /*
2480  * Read or write a bunch of msrs. All parameters are kernel addresses.
2481  *
2482  * @return number of msrs set successfully.
2483  */
2484 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2485                     struct kvm_msr_entry *entries,
2486                     int (*do_msr)(struct kvm_vcpu *vcpu,
2487                                   unsigned index, u64 *data))
2488 {
2489         int i, idx;
2490
2491         idx = srcu_read_lock(&vcpu->kvm->srcu);
2492         for (i = 0; i < msrs->nmsrs; ++i)
2493                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2494                         break;
2495         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2496
2497         return i;
2498 }
2499
2500 /*
2501  * Read or write a bunch of msrs. Parameters are user addresses.
2502  *
2503  * @return number of msrs set successfully.
2504  */
2505 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2506                   int (*do_msr)(struct kvm_vcpu *vcpu,
2507                                 unsigned index, u64 *data),
2508                   int writeback)
2509 {
2510         struct kvm_msrs msrs;
2511         struct kvm_msr_entry *entries;
2512         int r, n;
2513         unsigned size;
2514
2515         r = -EFAULT;
2516         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2517                 goto out;
2518
2519         r = -E2BIG;
2520         if (msrs.nmsrs >= MAX_IO_MSRS)
2521                 goto out;
2522
2523         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2524         entries = memdup_user(user_msrs->entries, size);
2525         if (IS_ERR(entries)) {
2526                 r = PTR_ERR(entries);
2527                 goto out;
2528         }
2529
2530         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2531         if (r < 0)
2532                 goto out_free;
2533
2534         r = -EFAULT;
2535         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2536                 goto out_free;
2537
2538         r = n;
2539
2540 out_free:
2541         kfree(entries);
2542 out:
2543         return r;
2544 }
2545
2546 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2547 {
2548         int r;
2549
2550         switch (ext) {
2551         case KVM_CAP_IRQCHIP:
2552         case KVM_CAP_HLT:
2553         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2554         case KVM_CAP_SET_TSS_ADDR:
2555         case KVM_CAP_EXT_CPUID:
2556         case KVM_CAP_EXT_EMUL_CPUID:
2557         case KVM_CAP_CLOCKSOURCE:
2558         case KVM_CAP_PIT:
2559         case KVM_CAP_NOP_IO_DELAY:
2560         case KVM_CAP_MP_STATE:
2561         case KVM_CAP_SYNC_MMU:
2562         case KVM_CAP_USER_NMI:
2563         case KVM_CAP_REINJECT_CONTROL:
2564         case KVM_CAP_IRQ_INJECT_STATUS:
2565         case KVM_CAP_IOEVENTFD:
2566         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2567         case KVM_CAP_PIT2:
2568         case KVM_CAP_PIT_STATE2:
2569         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2570         case KVM_CAP_XEN_HVM:
2571         case KVM_CAP_ADJUST_CLOCK:
2572         case KVM_CAP_VCPU_EVENTS:
2573         case KVM_CAP_HYPERV:
2574         case KVM_CAP_HYPERV_VAPIC:
2575         case KVM_CAP_HYPERV_SPIN:
2576         case KVM_CAP_HYPERV_SYNIC:
2577         case KVM_CAP_PCI_SEGMENT:
2578         case KVM_CAP_DEBUGREGS:
2579         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2580         case KVM_CAP_XSAVE:
2581         case KVM_CAP_ASYNC_PF:
2582         case KVM_CAP_GET_TSC_KHZ:
2583         case KVM_CAP_KVMCLOCK_CTRL:
2584         case KVM_CAP_READONLY_MEM:
2585         case KVM_CAP_HYPERV_TIME:
2586         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2587         case KVM_CAP_TSC_DEADLINE_TIMER:
2588         case KVM_CAP_ENABLE_CAP_VM:
2589         case KVM_CAP_DISABLE_QUIRKS:
2590         case KVM_CAP_SET_BOOT_CPU_ID:
2591         case KVM_CAP_SPLIT_IRQCHIP:
2592 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2593         case KVM_CAP_ASSIGN_DEV_IRQ:
2594         case KVM_CAP_PCI_2_3:
2595 #endif
2596                 r = 1;
2597                 break;
2598         case KVM_CAP_X86_SMM:
2599                 /* SMBASE is usually relocated above 1M on modern chipsets,
2600                  * and SMM handlers might indeed rely on 4G segment limits,
2601                  * so do not report SMM to be available if real mode is
2602                  * emulated via vm86 mode.  Still, do not go to great lengths
2603                  * to avoid userspace's usage of the feature, because it is a
2604                  * fringe case that is not enabled except via specific settings
2605                  * of the module parameters.
2606                  */
2607                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2608                 break;
2609         case KVM_CAP_COALESCED_MMIO:
2610                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2611                 break;
2612         case KVM_CAP_VAPIC:
2613                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2614                 break;
2615         case KVM_CAP_NR_VCPUS:
2616                 r = KVM_SOFT_MAX_VCPUS;
2617                 break;
2618         case KVM_CAP_MAX_VCPUS:
2619                 r = KVM_MAX_VCPUS;
2620                 break;
2621         case KVM_CAP_NR_MEMSLOTS:
2622                 r = KVM_USER_MEM_SLOTS;
2623                 break;
2624         case KVM_CAP_PV_MMU:    /* obsolete */
2625                 r = 0;
2626                 break;
2627 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2628         case KVM_CAP_IOMMU:
2629                 r = iommu_present(&pci_bus_type);
2630                 break;
2631 #endif
2632         case KVM_CAP_MCE:
2633                 r = KVM_MAX_MCE_BANKS;
2634                 break;
2635         case KVM_CAP_XCRS:
2636                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2637                 break;
2638         case KVM_CAP_TSC_CONTROL:
2639                 r = kvm_has_tsc_control;
2640                 break;
2641         case KVM_CAP_X2APIC_API:
2642                 r = KVM_X2APIC_API_VALID_FLAGS;
2643                 break;
2644         default:
2645                 r = 0;
2646                 break;
2647         }
2648         return r;
2649
2650 }
2651
2652 long kvm_arch_dev_ioctl(struct file *filp,
2653                         unsigned int ioctl, unsigned long arg)
2654 {
2655         void __user *argp = (void __user *)arg;
2656         long r;
2657
2658         switch (ioctl) {
2659         case KVM_GET_MSR_INDEX_LIST: {
2660                 struct kvm_msr_list __user *user_msr_list = argp;
2661                 struct kvm_msr_list msr_list;
2662                 unsigned n;
2663
2664                 r = -EFAULT;
2665                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2666                         goto out;
2667                 n = msr_list.nmsrs;
2668                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2669                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2670                         goto out;
2671                 r = -E2BIG;
2672                 if (n < msr_list.nmsrs)
2673                         goto out;
2674                 r = -EFAULT;
2675                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2676                                  num_msrs_to_save * sizeof(u32)))
2677                         goto out;
2678                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2679                                  &emulated_msrs,
2680                                  num_emulated_msrs * sizeof(u32)))
2681                         goto out;
2682                 r = 0;
2683                 break;
2684         }
2685         case KVM_GET_SUPPORTED_CPUID:
2686         case KVM_GET_EMULATED_CPUID: {
2687                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2688                 struct kvm_cpuid2 cpuid;
2689
2690                 r = -EFAULT;
2691                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2692                         goto out;
2693
2694                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2695                                             ioctl);
2696                 if (r)
2697                         goto out;
2698
2699                 r = -EFAULT;
2700                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2701                         goto out;
2702                 r = 0;
2703                 break;
2704         }
2705         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2706                 r = -EFAULT;
2707                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2708                                  sizeof(kvm_mce_cap_supported)))
2709                         goto out;
2710                 r = 0;
2711                 break;
2712         }
2713         default:
2714                 r = -EINVAL;
2715         }
2716 out:
2717         return r;
2718 }
2719
2720 static void wbinvd_ipi(void *garbage)
2721 {
2722         wbinvd();
2723 }
2724
2725 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2726 {
2727         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2728 }
2729
2730 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2731 {
2732         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2733 }
2734
2735 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2736 {
2737         /* Address WBINVD may be executed by guest */
2738         if (need_emulate_wbinvd(vcpu)) {
2739                 if (kvm_x86_ops->has_wbinvd_exit())
2740                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2741                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2742                         smp_call_function_single(vcpu->cpu,
2743                                         wbinvd_ipi, NULL, 1);
2744         }
2745
2746         kvm_x86_ops->vcpu_load(vcpu, cpu);
2747
2748         /* Apply any externally detected TSC adjustments (due to suspend) */
2749         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2750                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2751                 vcpu->arch.tsc_offset_adjustment = 0;
2752                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2753         }
2754
2755         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2756                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2757                                 rdtsc() - vcpu->arch.last_host_tsc;
2758                 if (tsc_delta < 0)
2759                         mark_tsc_unstable("KVM discovered backwards TSC");
2760
2761                 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2762                                 kvm_x86_ops->set_hv_timer(vcpu,
2763                                         kvm_get_lapic_tscdeadline_msr(vcpu)))
2764                         kvm_lapic_switch_to_sw_timer(vcpu);
2765                 if (check_tsc_unstable()) {
2766                         u64 offset = kvm_compute_tsc_offset(vcpu,
2767                                                 vcpu->arch.last_guest_tsc);
2768                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2769                         vcpu->arch.tsc_catchup = 1;
2770                 }
2771                 /*
2772                  * On a host with synchronized TSC, there is no need to update
2773                  * kvmclock on vcpu->cpu migration
2774                  */
2775                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2776                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2777                 if (vcpu->cpu != cpu)
2778                         kvm_migrate_timers(vcpu);
2779                 vcpu->cpu = cpu;
2780         }
2781
2782         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2783 }
2784
2785 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2786 {
2787         kvm_x86_ops->vcpu_put(vcpu);
2788         kvm_put_guest_fpu(vcpu);
2789         vcpu->arch.last_host_tsc = rdtsc();
2790 }
2791
2792 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2793                                     struct kvm_lapic_state *s)
2794 {
2795         if (vcpu->arch.apicv_active)
2796                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2797
2798         return kvm_apic_get_state(vcpu, s);
2799 }
2800
2801 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2802                                     struct kvm_lapic_state *s)
2803 {
2804         int r;
2805
2806         r = kvm_apic_set_state(vcpu, s);
2807         if (r)
2808                 return r;
2809         update_cr8_intercept(vcpu);
2810
2811         return 0;
2812 }
2813
2814 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2815 {
2816         return (!lapic_in_kernel(vcpu) ||
2817                 kvm_apic_accept_pic_intr(vcpu));
2818 }
2819
2820 /*
2821  * if userspace requested an interrupt window, check that the
2822  * interrupt window is open.
2823  *
2824  * No need to exit to userspace if we already have an interrupt queued.
2825  */
2826 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2827 {
2828         return kvm_arch_interrupt_allowed(vcpu) &&
2829                 !kvm_cpu_has_interrupt(vcpu) &&
2830                 !kvm_event_needs_reinjection(vcpu) &&
2831                 kvm_cpu_accept_dm_intr(vcpu);
2832 }
2833
2834 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2835                                     struct kvm_interrupt *irq)
2836 {
2837         if (irq->irq >= KVM_NR_INTERRUPTS)
2838                 return -EINVAL;
2839
2840         if (!irqchip_in_kernel(vcpu->kvm)) {
2841                 kvm_queue_interrupt(vcpu, irq->irq, false);
2842                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2843                 return 0;
2844         }
2845
2846         /*
2847          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2848          * fail for in-kernel 8259.
2849          */
2850         if (pic_in_kernel(vcpu->kvm))
2851                 return -ENXIO;
2852
2853         if (vcpu->arch.pending_external_vector != -1)
2854                 return -EEXIST;
2855
2856         vcpu->arch.pending_external_vector = irq->irq;
2857         kvm_make_request(KVM_REQ_EVENT, vcpu);
2858         return 0;
2859 }
2860
2861 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2862 {
2863         kvm_inject_nmi(vcpu);
2864
2865         return 0;
2866 }
2867
2868 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2869 {
2870         kvm_make_request(KVM_REQ_SMI, vcpu);
2871
2872         return 0;
2873 }
2874
2875 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2876                                            struct kvm_tpr_access_ctl *tac)
2877 {
2878         if (tac->flags)
2879                 return -EINVAL;
2880         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2881         return 0;
2882 }
2883
2884 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2885                                         u64 mcg_cap)
2886 {
2887         int r;
2888         unsigned bank_num = mcg_cap & 0xff, bank;
2889
2890         r = -EINVAL;
2891         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2892                 goto out;
2893         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
2894                 goto out;
2895         r = 0;
2896         vcpu->arch.mcg_cap = mcg_cap;
2897         /* Init IA32_MCG_CTL to all 1s */
2898         if (mcg_cap & MCG_CTL_P)
2899                 vcpu->arch.mcg_ctl = ~(u64)0;
2900         /* Init IA32_MCi_CTL to all 1s */
2901         for (bank = 0; bank < bank_num; bank++)
2902                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2903
2904         if (kvm_x86_ops->setup_mce)
2905                 kvm_x86_ops->setup_mce(vcpu);
2906 out:
2907         return r;
2908 }
2909
2910 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2911                                       struct kvm_x86_mce *mce)
2912 {
2913         u64 mcg_cap = vcpu->arch.mcg_cap;
2914         unsigned bank_num = mcg_cap & 0xff;
2915         u64 *banks = vcpu->arch.mce_banks;
2916
2917         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2918                 return -EINVAL;
2919         /*
2920          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2921          * reporting is disabled
2922          */
2923         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2924             vcpu->arch.mcg_ctl != ~(u64)0)
2925                 return 0;
2926         banks += 4 * mce->bank;
2927         /*
2928          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2929          * reporting is disabled for the bank
2930          */
2931         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2932                 return 0;
2933         if (mce->status & MCI_STATUS_UC) {
2934                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2935                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2936                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2937                         return 0;
2938                 }
2939                 if (banks[1] & MCI_STATUS_VAL)
2940                         mce->status |= MCI_STATUS_OVER;
2941                 banks[2] = mce->addr;
2942                 banks[3] = mce->misc;
2943                 vcpu->arch.mcg_status = mce->mcg_status;
2944                 banks[1] = mce->status;
2945                 kvm_queue_exception(vcpu, MC_VECTOR);
2946         } else if (!(banks[1] & MCI_STATUS_VAL)
2947                    || !(banks[1] & MCI_STATUS_UC)) {
2948                 if (banks[1] & MCI_STATUS_VAL)
2949                         mce->status |= MCI_STATUS_OVER;
2950                 banks[2] = mce->addr;
2951                 banks[3] = mce->misc;
2952                 banks[1] = mce->status;
2953         } else
2954                 banks[1] |= MCI_STATUS_OVER;
2955         return 0;
2956 }
2957
2958 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2959                                                struct kvm_vcpu_events *events)
2960 {
2961         process_nmi(vcpu);
2962         events->exception.injected =
2963                 vcpu->arch.exception.pending &&
2964                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2965         events->exception.nr = vcpu->arch.exception.nr;
2966         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2967         events->exception.pad = 0;
2968         events->exception.error_code = vcpu->arch.exception.error_code;
2969
2970         events->interrupt.injected =
2971                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2972         events->interrupt.nr = vcpu->arch.interrupt.nr;
2973         events->interrupt.soft = 0;
2974         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2975
2976         events->nmi.injected = vcpu->arch.nmi_injected;
2977         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2978         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2979         events->nmi.pad = 0;
2980
2981         events->sipi_vector = 0; /* never valid when reporting to user space */
2982
2983         events->smi.smm = is_smm(vcpu);
2984         events->smi.pending = vcpu->arch.smi_pending;
2985         events->smi.smm_inside_nmi =
2986                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2987         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2988
2989         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2990                          | KVM_VCPUEVENT_VALID_SHADOW
2991                          | KVM_VCPUEVENT_VALID_SMM);
2992         memset(&events->reserved, 0, sizeof(events->reserved));
2993 }
2994
2995 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2996                                               struct kvm_vcpu_events *events)
2997 {
2998         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2999                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3000                               | KVM_VCPUEVENT_VALID_SHADOW
3001                               | KVM_VCPUEVENT_VALID_SMM))
3002                 return -EINVAL;
3003
3004         if (events->exception.injected &&
3005             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3006                 return -EINVAL;
3007
3008         process_nmi(vcpu);
3009         vcpu->arch.exception.pending = events->exception.injected;
3010         vcpu->arch.exception.nr = events->exception.nr;
3011         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3012         vcpu->arch.exception.error_code = events->exception.error_code;
3013
3014         vcpu->arch.interrupt.pending = events->interrupt.injected;
3015         vcpu->arch.interrupt.nr = events->interrupt.nr;
3016         vcpu->arch.interrupt.soft = events->interrupt.soft;
3017         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3018                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3019                                                   events->interrupt.shadow);
3020
3021         vcpu->arch.nmi_injected = events->nmi.injected;
3022         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3023                 vcpu->arch.nmi_pending = events->nmi.pending;
3024         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3025
3026         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3027             lapic_in_kernel(vcpu))
3028                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3029
3030         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3031                 if (events->smi.smm)
3032                         vcpu->arch.hflags |= HF_SMM_MASK;
3033                 else
3034                         vcpu->arch.hflags &= ~HF_SMM_MASK;
3035                 vcpu->arch.smi_pending = events->smi.pending;
3036                 if (events->smi.smm_inside_nmi)
3037                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3038                 else
3039                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3040                 if (lapic_in_kernel(vcpu)) {
3041                         if (events->smi.latched_init)
3042                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3043                         else
3044                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3045                 }
3046         }
3047
3048         kvm_make_request(KVM_REQ_EVENT, vcpu);
3049
3050         return 0;
3051 }
3052
3053 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3054                                              struct kvm_debugregs *dbgregs)
3055 {
3056         unsigned long val;
3057
3058         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3059         kvm_get_dr(vcpu, 6, &val);
3060         dbgregs->dr6 = val;
3061         dbgregs->dr7 = vcpu->arch.dr7;
3062         dbgregs->flags = 0;
3063         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3064 }
3065
3066 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3067                                             struct kvm_debugregs *dbgregs)
3068 {
3069         if (dbgregs->flags)
3070                 return -EINVAL;
3071
3072         if (dbgregs->dr6 & ~0xffffffffull)
3073                 return -EINVAL;
3074         if (dbgregs->dr7 & ~0xffffffffull)
3075                 return -EINVAL;
3076
3077         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3078         kvm_update_dr0123(vcpu);
3079         vcpu->arch.dr6 = dbgregs->dr6;
3080         kvm_update_dr6(vcpu);
3081         vcpu->arch.dr7 = dbgregs->dr7;
3082         kvm_update_dr7(vcpu);
3083
3084         return 0;
3085 }
3086
3087 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3088
3089 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3090 {
3091         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3092         u64 xstate_bv = xsave->header.xfeatures;
3093         u64 valid;
3094
3095         /*
3096          * Copy legacy XSAVE area, to avoid complications with CPUID
3097          * leaves 0 and 1 in the loop below.
3098          */
3099         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3100
3101         /* Set XSTATE_BV */
3102         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3103
3104         /*
3105          * Copy each region from the possibly compacted offset to the
3106          * non-compacted offset.
3107          */
3108         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3109         while (valid) {
3110                 u64 feature = valid & -valid;
3111                 int index = fls64(feature) - 1;
3112                 void *src = get_xsave_addr(xsave, feature);
3113
3114                 if (src) {
3115                         u32 size, offset, ecx, edx;
3116                         cpuid_count(XSTATE_CPUID, index,
3117                                     &size, &offset, &ecx, &edx);
3118                         memcpy(dest + offset, src, size);
3119                 }
3120
3121                 valid -= feature;
3122         }
3123 }
3124
3125 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3126 {
3127         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3128         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3129         u64 valid;
3130
3131         /*
3132          * Copy legacy XSAVE area, to avoid complications with CPUID
3133          * leaves 0 and 1 in the loop below.
3134          */
3135         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3136
3137         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3138         xsave->header.xfeatures = xstate_bv;
3139         if (boot_cpu_has(X86_FEATURE_XSAVES))
3140                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3141
3142         /*
3143          * Copy each region from the non-compacted offset to the
3144          * possibly compacted offset.
3145          */
3146         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3147         while (valid) {
3148                 u64 feature = valid & -valid;
3149                 int index = fls64(feature) - 1;
3150                 void *dest = get_xsave_addr(xsave, feature);
3151
3152                 if (dest) {
3153                         u32 size, offset, ecx, edx;
3154                         cpuid_count(XSTATE_CPUID, index,
3155                                     &size, &offset, &ecx, &edx);
3156                         memcpy(dest, src + offset, size);
3157                 }
3158
3159                 valid -= feature;
3160         }
3161 }
3162
3163 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3164                                          struct kvm_xsave *guest_xsave)
3165 {
3166         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3167                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3168                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3169         } else {
3170                 memcpy(guest_xsave->region,
3171                         &vcpu->arch.guest_fpu.state.fxsave,
3172                         sizeof(struct fxregs_state));
3173                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3174                         XFEATURE_MASK_FPSSE;
3175         }
3176 }
3177
3178 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3179                                         struct kvm_xsave *guest_xsave)
3180 {
3181         u64 xstate_bv =
3182                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3183
3184         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3185                 /*
3186                  * Here we allow setting states that are not present in
3187                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3188                  * with old userspace.
3189                  */
3190                 if (xstate_bv & ~kvm_supported_xcr0())
3191                         return -EINVAL;
3192                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3193         } else {
3194                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3195                         return -EINVAL;
3196                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3197                         guest_xsave->region, sizeof(struct fxregs_state));
3198         }
3199         return 0;
3200 }
3201
3202 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3203                                         struct kvm_xcrs *guest_xcrs)
3204 {
3205         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3206                 guest_xcrs->nr_xcrs = 0;
3207                 return;
3208         }
3209
3210         guest_xcrs->nr_xcrs = 1;
3211         guest_xcrs->flags = 0;
3212         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3213         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3214 }
3215
3216 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3217                                        struct kvm_xcrs *guest_xcrs)
3218 {
3219         int i, r = 0;
3220
3221         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3222                 return -EINVAL;
3223
3224         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3225                 return -EINVAL;
3226
3227         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3228                 /* Only support XCR0 currently */
3229                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3230                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3231                                 guest_xcrs->xcrs[i].value);
3232                         break;
3233                 }
3234         if (r)
3235                 r = -EINVAL;
3236         return r;
3237 }
3238
3239 /*
3240  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3241  * stopped by the hypervisor.  This function will be called from the host only.
3242  * EINVAL is returned when the host attempts to set the flag for a guest that
3243  * does not support pv clocks.
3244  */
3245 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3246 {
3247         if (!vcpu->arch.pv_time_enabled)
3248                 return -EINVAL;
3249         vcpu->arch.pvclock_set_guest_stopped_request = true;
3250         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3251         return 0;
3252 }
3253
3254 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3255                                      struct kvm_enable_cap *cap)
3256 {
3257         if (cap->flags)
3258                 return -EINVAL;
3259
3260         switch (cap->cap) {
3261         case KVM_CAP_HYPERV_SYNIC:
3262                 return kvm_hv_activate_synic(vcpu);
3263         default:
3264                 return -EINVAL;
3265         }
3266 }
3267
3268 long kvm_arch_vcpu_ioctl(struct file *filp,
3269                          unsigned int ioctl, unsigned long arg)
3270 {
3271         struct kvm_vcpu *vcpu = filp->private_data;
3272         void __user *argp = (void __user *)arg;
3273         int r;
3274         union {
3275                 struct kvm_lapic_state *lapic;
3276                 struct kvm_xsave *xsave;
3277                 struct kvm_xcrs *xcrs;
3278                 void *buffer;
3279         } u;
3280
3281         u.buffer = NULL;
3282         switch (ioctl) {
3283         case KVM_GET_LAPIC: {
3284                 r = -EINVAL;
3285                 if (!lapic_in_kernel(vcpu))
3286                         goto out;
3287                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3288
3289                 r = -ENOMEM;
3290                 if (!u.lapic)
3291                         goto out;
3292                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3293                 if (r)
3294                         goto out;
3295                 r = -EFAULT;
3296                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3297                         goto out;
3298                 r = 0;
3299                 break;
3300         }
3301         case KVM_SET_LAPIC: {
3302                 r = -EINVAL;
3303                 if (!lapic_in_kernel(vcpu))
3304                         goto out;
3305                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3306                 if (IS_ERR(u.lapic))
3307                         return PTR_ERR(u.lapic);
3308
3309                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3310                 break;
3311         }
3312         case KVM_INTERRUPT: {
3313                 struct kvm_interrupt irq;
3314
3315                 r = -EFAULT;
3316                 if (copy_from_user(&irq, argp, sizeof irq))
3317                         goto out;
3318                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3319                 break;
3320         }
3321         case KVM_NMI: {
3322                 r = kvm_vcpu_ioctl_nmi(vcpu);
3323                 break;
3324         }
3325         case KVM_SMI: {
3326                 r = kvm_vcpu_ioctl_smi(vcpu);
3327                 break;
3328         }
3329         case KVM_SET_CPUID: {
3330                 struct kvm_cpuid __user *cpuid_arg = argp;
3331                 struct kvm_cpuid cpuid;
3332
3333                 r = -EFAULT;
3334                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3335                         goto out;
3336                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3337                 break;
3338         }
3339         case KVM_SET_CPUID2: {
3340                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3341                 struct kvm_cpuid2 cpuid;
3342
3343                 r = -EFAULT;
3344                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3345                         goto out;
3346                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3347                                               cpuid_arg->entries);
3348                 break;
3349         }
3350         case KVM_GET_CPUID2: {
3351                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3352                 struct kvm_cpuid2 cpuid;
3353
3354                 r = -EFAULT;
3355                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3356                         goto out;
3357                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3358                                               cpuid_arg->entries);
3359                 if (r)
3360                         goto out;
3361                 r = -EFAULT;
3362                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3363                         goto out;
3364                 r = 0;
3365                 break;
3366         }
3367         case KVM_GET_MSRS:
3368                 r = msr_io(vcpu, argp, do_get_msr, 1);
3369                 break;
3370         case KVM_SET_MSRS:
3371                 r = msr_io(vcpu, argp, do_set_msr, 0);
3372                 break;
3373         case KVM_TPR_ACCESS_REPORTING: {
3374                 struct kvm_tpr_access_ctl tac;
3375
3376                 r = -EFAULT;
3377                 if (copy_from_user(&tac, argp, sizeof tac))
3378                         goto out;
3379                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3380                 if (r)
3381                         goto out;
3382                 r = -EFAULT;
3383                 if (copy_to_user(argp, &tac, sizeof tac))
3384                         goto out;
3385                 r = 0;
3386                 break;
3387         };
3388         case KVM_SET_VAPIC_ADDR: {
3389                 struct kvm_vapic_addr va;
3390
3391                 r = -EINVAL;
3392                 if (!lapic_in_kernel(vcpu))
3393                         goto out;
3394                 r = -EFAULT;
3395                 if (copy_from_user(&va, argp, sizeof va))
3396                         goto out;
3397                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3398                 break;
3399         }
3400         case KVM_X86_SETUP_MCE: {
3401                 u64 mcg_cap;
3402
3403                 r = -EFAULT;
3404                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3405                         goto out;
3406                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3407                 break;
3408         }
3409         case KVM_X86_SET_MCE: {
3410                 struct kvm_x86_mce mce;
3411
3412                 r = -EFAULT;
3413                 if (copy_from_user(&mce, argp, sizeof mce))
3414                         goto out;
3415                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3416                 break;
3417         }
3418         case KVM_GET_VCPU_EVENTS: {
3419                 struct kvm_vcpu_events events;
3420
3421                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3422
3423                 r = -EFAULT;
3424                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3425                         break;
3426                 r = 0;
3427                 break;
3428         }
3429         case KVM_SET_VCPU_EVENTS: {
3430                 struct kvm_vcpu_events events;
3431
3432                 r = -EFAULT;
3433                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3434                         break;
3435
3436                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3437                 break;
3438         }
3439         case KVM_GET_DEBUGREGS: {
3440                 struct kvm_debugregs dbgregs;
3441
3442                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3443
3444                 r = -EFAULT;
3445                 if (copy_to_user(argp, &dbgregs,
3446                                  sizeof(struct kvm_debugregs)))
3447                         break;
3448                 r = 0;
3449                 break;
3450         }
3451         case KVM_SET_DEBUGREGS: {
3452                 struct kvm_debugregs dbgregs;
3453
3454                 r = -EFAULT;
3455                 if (copy_from_user(&dbgregs, argp,
3456                                    sizeof(struct kvm_debugregs)))
3457                         break;
3458
3459                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3460                 break;
3461         }
3462         case KVM_GET_XSAVE: {
3463                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3464                 r = -ENOMEM;
3465                 if (!u.xsave)
3466                         break;
3467
3468                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3469
3470                 r = -EFAULT;
3471                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3472                         break;
3473                 r = 0;
3474                 break;
3475         }
3476         case KVM_SET_XSAVE: {
3477                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3478                 if (IS_ERR(u.xsave))
3479                         return PTR_ERR(u.xsave);
3480
3481                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3482                 break;
3483         }
3484         case KVM_GET_XCRS: {
3485                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3486                 r = -ENOMEM;
3487                 if (!u.xcrs)
3488                         break;
3489
3490                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3491
3492                 r = -EFAULT;
3493                 if (copy_to_user(argp, u.xcrs,
3494                                  sizeof(struct kvm_xcrs)))
3495                         break;
3496                 r = 0;
3497                 break;
3498         }
3499         case KVM_SET_XCRS: {
3500                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3501                 if (IS_ERR(u.xcrs))
3502                         return PTR_ERR(u.xcrs);
3503
3504                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3505                 break;
3506         }
3507         case KVM_SET_TSC_KHZ: {
3508                 u32 user_tsc_khz;
3509
3510                 r = -EINVAL;
3511                 user_tsc_khz = (u32)arg;
3512
3513                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3514                         goto out;
3515
3516                 if (user_tsc_khz == 0)
3517                         user_tsc_khz = tsc_khz;
3518
3519                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3520                         r = 0;
3521
3522                 goto out;
3523         }
3524         case KVM_GET_TSC_KHZ: {
3525                 r = vcpu->arch.virtual_tsc_khz;
3526                 goto out;
3527         }
3528         case KVM_KVMCLOCK_CTRL: {
3529                 r = kvm_set_guest_paused(vcpu);
3530                 goto out;
3531         }
3532         case KVM_ENABLE_CAP: {
3533                 struct kvm_enable_cap cap;
3534
3535                 r = -EFAULT;
3536                 if (copy_from_user(&cap, argp, sizeof(cap)))
3537                         goto out;
3538                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3539                 break;
3540         }
3541         default:
3542                 r = -EINVAL;
3543         }
3544 out:
3545         kfree(u.buffer);
3546         return r;
3547 }
3548
3549 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3550 {
3551         return VM_FAULT_SIGBUS;
3552 }
3553
3554 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3555 {
3556         int ret;
3557
3558         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3559                 return -EINVAL;
3560         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3561         return ret;
3562 }
3563
3564 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3565                                               u64 ident_addr)
3566 {
3567         kvm->arch.ept_identity_map_addr = ident_addr;
3568         return 0;
3569 }
3570
3571 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3572                                           u32 kvm_nr_mmu_pages)
3573 {
3574         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3575                 return -EINVAL;
3576
3577         mutex_lock(&kvm->slots_lock);
3578
3579         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3580         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3581
3582         mutex_unlock(&kvm->slots_lock);
3583         return 0;
3584 }
3585
3586 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3587 {
3588         return kvm->arch.n_max_mmu_pages;
3589 }
3590
3591 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3592 {
3593         int r;
3594
3595         r = 0;
3596         switch (chip->chip_id) {
3597         case KVM_IRQCHIP_PIC_MASTER:
3598                 memcpy(&chip->chip.pic,
3599                         &pic_irqchip(kvm)->pics[0],
3600                         sizeof(struct kvm_pic_state));
3601                 break;
3602         case KVM_IRQCHIP_PIC_SLAVE:
3603                 memcpy(&chip->chip.pic,
3604                         &pic_irqchip(kvm)->pics[1],
3605                         sizeof(struct kvm_pic_state));
3606                 break;
3607         case KVM_IRQCHIP_IOAPIC:
3608                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3609                 break;
3610         default:
3611                 r = -EINVAL;
3612                 break;
3613         }
3614         return r;
3615 }
3616
3617 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3618 {
3619         int r;
3620
3621         r = 0;
3622         switch (chip->chip_id) {
3623         case KVM_IRQCHIP_PIC_MASTER:
3624                 spin_lock(&pic_irqchip(kvm)->lock);
3625                 memcpy(&pic_irqchip(kvm)->pics[0],
3626                         &chip->chip.pic,
3627                         sizeof(struct kvm_pic_state));
3628                 spin_unlock(&pic_irqchip(kvm)->lock);
3629                 break;
3630         case KVM_IRQCHIP_PIC_SLAVE:
3631                 spin_lock(&pic_irqchip(kvm)->lock);
3632                 memcpy(&pic_irqchip(kvm)->pics[1],
3633                         &chip->chip.pic,
3634                         sizeof(struct kvm_pic_state));
3635                 spin_unlock(&pic_irqchip(kvm)->lock);
3636                 break;
3637         case KVM_IRQCHIP_IOAPIC:
3638                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3639                 break;
3640         default:
3641                 r = -EINVAL;
3642                 break;
3643         }
3644         kvm_pic_update_irq(pic_irqchip(kvm));
3645         return r;
3646 }
3647
3648 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3649 {
3650         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3651
3652         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3653
3654         mutex_lock(&kps->lock);
3655         memcpy(ps, &kps->channels, sizeof(*ps));
3656         mutex_unlock(&kps->lock);
3657         return 0;
3658 }
3659
3660 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3661 {
3662         int i;
3663         struct kvm_pit *pit = kvm->arch.vpit;
3664
3665         mutex_lock(&pit->pit_state.lock);
3666         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3667         for (i = 0; i < 3; i++)
3668                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3669         mutex_unlock(&pit->pit_state.lock);
3670         return 0;
3671 }
3672
3673 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3674 {
3675         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3676         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3677                 sizeof(ps->channels));
3678         ps->flags = kvm->arch.vpit->pit_state.flags;
3679         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3680         memset(&ps->reserved, 0, sizeof(ps->reserved));
3681         return 0;
3682 }
3683
3684 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3685 {
3686         int start = 0;
3687         int i;
3688         u32 prev_legacy, cur_legacy;
3689         struct kvm_pit *pit = kvm->arch.vpit;
3690
3691         mutex_lock(&pit->pit_state.lock);
3692         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3693         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3694         if (!prev_legacy && cur_legacy)
3695                 start = 1;
3696         memcpy(&pit->pit_state.channels, &ps->channels,
3697                sizeof(pit->pit_state.channels));
3698         pit->pit_state.flags = ps->flags;
3699         for (i = 0; i < 3; i++)
3700                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3701                                    start && i == 0);
3702         mutex_unlock(&pit->pit_state.lock);
3703         return 0;
3704 }
3705
3706 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3707                                  struct kvm_reinject_control *control)
3708 {
3709         struct kvm_pit *pit = kvm->arch.vpit;
3710
3711         if (!pit)
3712                 return -ENXIO;
3713
3714         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3715          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3716          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3717          */
3718         mutex_lock(&pit->pit_state.lock);
3719         kvm_pit_set_reinject(pit, control->pit_reinject);
3720         mutex_unlock(&pit->pit_state.lock);
3721
3722         return 0;
3723 }
3724
3725 /**
3726  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3727  * @kvm: kvm instance
3728  * @log: slot id and address to which we copy the log
3729  *
3730  * Steps 1-4 below provide general overview of dirty page logging. See
3731  * kvm_get_dirty_log_protect() function description for additional details.
3732  *
3733  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3734  * always flush the TLB (step 4) even if previous step failed  and the dirty
3735  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3736  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3737  * writes will be marked dirty for next log read.
3738  *
3739  *   1. Take a snapshot of the bit and clear it if needed.
3740  *   2. Write protect the corresponding page.
3741  *   3. Copy the snapshot to the userspace.
3742  *   4. Flush TLB's if needed.
3743  */
3744 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3745 {
3746         bool is_dirty = false;
3747         int r;
3748
3749         mutex_lock(&kvm->slots_lock);
3750
3751         /*
3752          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3753          */
3754         if (kvm_x86_ops->flush_log_dirty)
3755                 kvm_x86_ops->flush_log_dirty(kvm);
3756
3757         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3758
3759         /*
3760          * All the TLBs can be flushed out of mmu lock, see the comments in
3761          * kvm_mmu_slot_remove_write_access().
3762          */
3763         lockdep_assert_held(&kvm->slots_lock);
3764         if (is_dirty)
3765                 kvm_flush_remote_tlbs(kvm);
3766
3767         mutex_unlock(&kvm->slots_lock);
3768         return r;
3769 }
3770
3771 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3772                         bool line_status)
3773 {
3774         if (!irqchip_in_kernel(kvm))
3775                 return -ENXIO;
3776
3777         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3778                                         irq_event->irq, irq_event->level,
3779                                         line_status);
3780         return 0;
3781 }
3782
3783 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3784                                    struct kvm_enable_cap *cap)
3785 {
3786         int r;
3787
3788         if (cap->flags)
3789                 return -EINVAL;
3790
3791         switch (cap->cap) {
3792         case KVM_CAP_DISABLE_QUIRKS:
3793                 kvm->arch.disabled_quirks = cap->args[0];
3794                 r = 0;
3795                 break;
3796         case KVM_CAP_SPLIT_IRQCHIP: {
3797                 mutex_lock(&kvm->lock);
3798                 r = -EINVAL;
3799                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3800                         goto split_irqchip_unlock;
3801                 r = -EEXIST;
3802                 if (irqchip_in_kernel(kvm))
3803                         goto split_irqchip_unlock;
3804                 if (kvm->created_vcpus)
3805                         goto split_irqchip_unlock;
3806                 r = kvm_setup_empty_irq_routing(kvm);
3807                 if (r)
3808                         goto split_irqchip_unlock;
3809                 /* Pairs with irqchip_in_kernel. */
3810                 smp_wmb();
3811                 kvm->arch.irqchip_split = true;
3812                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3813                 r = 0;
3814 split_irqchip_unlock:
3815                 mutex_unlock(&kvm->lock);
3816                 break;
3817         }
3818         case KVM_CAP_X2APIC_API:
3819                 r = -EINVAL;
3820                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3821                         break;
3822
3823                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3824                         kvm->arch.x2apic_format = true;
3825                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
3826                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
3827
3828                 r = 0;
3829                 break;
3830         default:
3831                 r = -EINVAL;
3832                 break;
3833         }
3834         return r;
3835 }
3836
3837 long kvm_arch_vm_ioctl(struct file *filp,
3838                        unsigned int ioctl, unsigned long arg)
3839 {
3840         struct kvm *kvm = filp->private_data;
3841         void __user *argp = (void __user *)arg;
3842         int r = -ENOTTY;
3843         /*
3844          * This union makes it completely explicit to gcc-3.x
3845          * that these two variables' stack usage should be
3846          * combined, not added together.
3847          */
3848         union {
3849                 struct kvm_pit_state ps;
3850                 struct kvm_pit_state2 ps2;
3851                 struct kvm_pit_config pit_config;
3852         } u;
3853
3854         switch (ioctl) {
3855         case KVM_SET_TSS_ADDR:
3856                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3857                 break;
3858         case KVM_SET_IDENTITY_MAP_ADDR: {
3859                 u64 ident_addr;
3860
3861                 r = -EFAULT;
3862                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3863                         goto out;
3864                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3865                 break;
3866         }
3867         case KVM_SET_NR_MMU_PAGES:
3868                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3869                 break;
3870         case KVM_GET_NR_MMU_PAGES:
3871                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3872                 break;
3873         case KVM_CREATE_IRQCHIP: {
3874                 struct kvm_pic *vpic;
3875
3876                 mutex_lock(&kvm->lock);
3877                 r = -EEXIST;
3878                 if (kvm->arch.vpic)
3879                         goto create_irqchip_unlock;
3880                 r = -EINVAL;
3881                 if (kvm->created_vcpus)
3882                         goto create_irqchip_unlock;
3883                 r = -ENOMEM;
3884                 vpic = kvm_create_pic(kvm);
3885                 if (vpic) {
3886                         r = kvm_ioapic_init(kvm);
3887                         if (r) {
3888                                 mutex_lock(&kvm->slots_lock);
3889                                 kvm_destroy_pic(vpic);
3890                                 mutex_unlock(&kvm->slots_lock);
3891                                 goto create_irqchip_unlock;
3892                         }
3893                 } else
3894                         goto create_irqchip_unlock;
3895                 r = kvm_setup_default_irq_routing(kvm);
3896                 if (r) {
3897                         mutex_lock(&kvm->slots_lock);
3898                         mutex_lock(&kvm->irq_lock);
3899                         kvm_ioapic_destroy(kvm);
3900                         kvm_destroy_pic(vpic);
3901                         mutex_unlock(&kvm->irq_lock);
3902                         mutex_unlock(&kvm->slots_lock);
3903                         goto create_irqchip_unlock;
3904                 }
3905                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3906                 smp_wmb();
3907                 kvm->arch.vpic = vpic;
3908         create_irqchip_unlock:
3909                 mutex_unlock(&kvm->lock);
3910                 break;
3911         }
3912         case KVM_CREATE_PIT:
3913                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3914                 goto create_pit;
3915         case KVM_CREATE_PIT2:
3916                 r = -EFAULT;
3917                 if (copy_from_user(&u.pit_config, argp,
3918                                    sizeof(struct kvm_pit_config)))
3919                         goto out;
3920         create_pit:
3921                 mutex_lock(&kvm->lock);
3922                 r = -EEXIST;
3923                 if (kvm->arch.vpit)
3924                         goto create_pit_unlock;
3925                 r = -ENOMEM;
3926                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3927                 if (kvm->arch.vpit)
3928                         r = 0;
3929         create_pit_unlock:
3930                 mutex_unlock(&kvm->lock);
3931                 break;
3932         case KVM_GET_IRQCHIP: {
3933                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3934                 struct kvm_irqchip *chip;
3935
3936                 chip = memdup_user(argp, sizeof(*chip));
3937                 if (IS_ERR(chip)) {
3938                         r = PTR_ERR(chip);
3939                         goto out;
3940                 }
3941
3942                 r = -ENXIO;
3943                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3944                         goto get_irqchip_out;
3945                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3946                 if (r)
3947                         goto get_irqchip_out;
3948                 r = -EFAULT;
3949                 if (copy_to_user(argp, chip, sizeof *chip))
3950                         goto get_irqchip_out;
3951                 r = 0;
3952         get_irqchip_out:
3953                 kfree(chip);
3954                 break;
3955         }
3956         case KVM_SET_IRQCHIP: {
3957                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3958                 struct kvm_irqchip *chip;
3959
3960                 chip = memdup_user(argp, sizeof(*chip));
3961                 if (IS_ERR(chip)) {
3962                         r = PTR_ERR(chip);
3963                         goto out;
3964                 }
3965
3966                 r = -ENXIO;
3967                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3968                         goto set_irqchip_out;
3969                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3970                 if (r)
3971                         goto set_irqchip_out;
3972                 r = 0;
3973         set_irqchip_out:
3974                 kfree(chip);
3975                 break;
3976         }
3977         case KVM_GET_PIT: {
3978                 r = -EFAULT;
3979                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3980                         goto out;
3981                 r = -ENXIO;
3982                 if (!kvm->arch.vpit)
3983                         goto out;
3984                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3985                 if (r)
3986                         goto out;
3987                 r = -EFAULT;
3988                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3989                         goto out;
3990                 r = 0;
3991                 break;
3992         }
3993         case KVM_SET_PIT: {
3994                 r = -EFAULT;
3995                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3996                         goto out;
3997                 r = -ENXIO;
3998                 if (!kvm->arch.vpit)
3999                         goto out;
4000                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4001                 break;
4002         }
4003         case KVM_GET_PIT2: {
4004                 r = -ENXIO;
4005                 if (!kvm->arch.vpit)
4006                         goto out;
4007                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4008                 if (r)
4009                         goto out;
4010                 r = -EFAULT;
4011                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4012                         goto out;
4013                 r = 0;
4014                 break;
4015         }
4016         case KVM_SET_PIT2: {
4017                 r = -EFAULT;
4018                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4019                         goto out;
4020                 r = -ENXIO;
4021                 if (!kvm->arch.vpit)
4022                         goto out;
4023                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4024                 break;
4025         }
4026         case KVM_REINJECT_CONTROL: {
4027                 struct kvm_reinject_control control;
4028                 r =  -EFAULT;
4029                 if (copy_from_user(&control, argp, sizeof(control)))
4030                         goto out;
4031                 r = kvm_vm_ioctl_reinject(kvm, &control);
4032                 break;
4033         }
4034         case KVM_SET_BOOT_CPU_ID:
4035                 r = 0;
4036                 mutex_lock(&kvm->lock);
4037                 if (kvm->created_vcpus)
4038                         r = -EBUSY;
4039                 else
4040                         kvm->arch.bsp_vcpu_id = arg;
4041                 mutex_unlock(&kvm->lock);
4042                 break;
4043         case KVM_XEN_HVM_CONFIG: {
4044                 r = -EFAULT;
4045                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4046                                    sizeof(struct kvm_xen_hvm_config)))
4047                         goto out;
4048                 r = -EINVAL;
4049                 if (kvm->arch.xen_hvm_config.flags)
4050                         goto out;
4051                 r = 0;
4052                 break;
4053         }
4054         case KVM_SET_CLOCK: {
4055                 struct kvm_clock_data user_ns;
4056                 u64 now_ns;
4057                 s64 delta;
4058
4059                 r = -EFAULT;
4060                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4061                         goto out;
4062
4063                 r = -EINVAL;
4064                 if (user_ns.flags)
4065                         goto out;
4066
4067                 r = 0;
4068                 local_irq_disable();
4069                 now_ns = get_kernel_ns();
4070                 delta = user_ns.clock - now_ns;
4071                 local_irq_enable();
4072                 kvm->arch.kvmclock_offset = delta;
4073                 kvm_gen_update_masterclock(kvm);
4074                 break;
4075         }
4076         case KVM_GET_CLOCK: {
4077                 struct kvm_clock_data user_ns;
4078                 u64 now_ns;
4079
4080                 local_irq_disable();
4081                 now_ns = get_kernel_ns();
4082                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4083                 local_irq_enable();
4084                 user_ns.flags = 0;
4085                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4086
4087                 r = -EFAULT;
4088                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4089                         goto out;
4090                 r = 0;
4091                 break;
4092         }
4093         case KVM_ENABLE_CAP: {
4094                 struct kvm_enable_cap cap;
4095
4096                 r = -EFAULT;
4097                 if (copy_from_user(&cap, argp, sizeof(cap)))
4098                         goto out;
4099                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4100                 break;
4101         }
4102         default:
4103                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4104         }
4105 out:
4106         return r;
4107 }
4108
4109 static void kvm_init_msr_list(void)
4110 {
4111         u32 dummy[2];
4112         unsigned i, j;
4113
4114         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4115                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4116                         continue;
4117
4118                 /*
4119                  * Even MSRs that are valid in the host may not be exposed
4120                  * to the guests in some cases.
4121                  */
4122                 switch (msrs_to_save[i]) {
4123                 case MSR_IA32_BNDCFGS:
4124                         if (!kvm_x86_ops->mpx_supported())
4125                                 continue;
4126                         break;
4127                 case MSR_TSC_AUX:
4128                         if (!kvm_x86_ops->rdtscp_supported())
4129                                 continue;
4130                         break;
4131                 default:
4132                         break;
4133                 }
4134
4135                 if (j < i)
4136                         msrs_to_save[j] = msrs_to_save[i];
4137                 j++;
4138         }
4139         num_msrs_to_save = j;
4140
4141         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4142                 switch (emulated_msrs[i]) {
4143                 case MSR_IA32_SMBASE:
4144                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4145                                 continue;
4146                         break;
4147                 default:
4148                         break;
4149                 }
4150
4151                 if (j < i)
4152                         emulated_msrs[j] = emulated_msrs[i];
4153                 j++;
4154         }
4155         num_emulated_msrs = j;
4156 }
4157
4158 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4159                            const void *v)
4160 {
4161         int handled = 0;
4162         int n;
4163
4164         do {
4165                 n = min(len, 8);
4166                 if (!(lapic_in_kernel(vcpu) &&
4167                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4168                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4169                         break;
4170                 handled += n;
4171                 addr += n;
4172                 len -= n;
4173                 v += n;
4174         } while (len);
4175
4176         return handled;
4177 }
4178
4179 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4180 {
4181         int handled = 0;
4182         int n;
4183
4184         do {
4185                 n = min(len, 8);
4186                 if (!(lapic_in_kernel(vcpu) &&
4187                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4188                                          addr, n, v))
4189                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4190                         break;
4191                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4192                 handled += n;
4193                 addr += n;
4194                 len -= n;
4195                 v += n;
4196         } while (len);
4197
4198         return handled;
4199 }
4200
4201 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4202                         struct kvm_segment *var, int seg)
4203 {
4204         kvm_x86_ops->set_segment(vcpu, var, seg);
4205 }
4206
4207 void kvm_get_segment(struct kvm_vcpu *vcpu,
4208                      struct kvm_segment *var, int seg)
4209 {
4210         kvm_x86_ops->get_segment(vcpu, var, seg);
4211 }
4212
4213 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4214                            struct x86_exception *exception)
4215 {
4216         gpa_t t_gpa;
4217
4218         BUG_ON(!mmu_is_nested(vcpu));
4219
4220         /* NPT walks are always user-walks */
4221         access |= PFERR_USER_MASK;
4222         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4223
4224         return t_gpa;
4225 }
4226
4227 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4228                               struct x86_exception *exception)
4229 {
4230         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4231         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4232 }
4233
4234  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4235                                 struct x86_exception *exception)
4236 {
4237         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4238         access |= PFERR_FETCH_MASK;
4239         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4240 }
4241
4242 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4243                                struct x86_exception *exception)
4244 {
4245         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4246         access |= PFERR_WRITE_MASK;
4247         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4248 }
4249
4250 /* uses this to access any guest's mapped memory without checking CPL */
4251 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4252                                 struct x86_exception *exception)
4253 {
4254         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4255 }
4256
4257 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4258                                       struct kvm_vcpu *vcpu, u32 access,
4259                                       struct x86_exception *exception)
4260 {
4261         void *data = val;
4262         int r = X86EMUL_CONTINUE;
4263
4264         while (bytes) {
4265                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4266                                                             exception);
4267                 unsigned offset = addr & (PAGE_SIZE-1);
4268                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4269                 int ret;
4270
4271                 if (gpa == UNMAPPED_GVA)
4272                         return X86EMUL_PROPAGATE_FAULT;
4273                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4274                                                offset, toread);
4275                 if (ret < 0) {
4276                         r = X86EMUL_IO_NEEDED;
4277                         goto out;
4278                 }
4279
4280                 bytes -= toread;
4281                 data += toread;
4282                 addr += toread;
4283         }
4284 out:
4285         return r;
4286 }
4287
4288 /* used for instruction fetching */
4289 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4290                                 gva_t addr, void *val, unsigned int bytes,
4291                                 struct x86_exception *exception)
4292 {
4293         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4294         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4295         unsigned offset;
4296         int ret;
4297
4298         /* Inline kvm_read_guest_virt_helper for speed.  */
4299         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4300                                                     exception);
4301         if (unlikely(gpa == UNMAPPED_GVA))
4302                 return X86EMUL_PROPAGATE_FAULT;
4303
4304         offset = addr & (PAGE_SIZE-1);
4305         if (WARN_ON(offset + bytes > PAGE_SIZE))
4306                 bytes = (unsigned)PAGE_SIZE - offset;
4307         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4308                                        offset, bytes);
4309         if (unlikely(ret < 0))
4310                 return X86EMUL_IO_NEEDED;
4311
4312         return X86EMUL_CONTINUE;
4313 }
4314
4315 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4316                                gva_t addr, void *val, unsigned int bytes,
4317                                struct x86_exception *exception)
4318 {
4319         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4320         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4321
4322         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4323                                           exception);
4324 }
4325 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4326
4327 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4328                                       gva_t addr, void *val, unsigned int bytes,
4329                                       struct x86_exception *exception)
4330 {
4331         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4332         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4333 }
4334
4335 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4336                 unsigned long addr, void *val, unsigned int bytes)
4337 {
4338         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4339         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4340
4341         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4342 }
4343
4344 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4345                                        gva_t addr, void *val,
4346                                        unsigned int bytes,
4347                                        struct x86_exception *exception)
4348 {
4349         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4350         void *data = val;
4351         int r = X86EMUL_CONTINUE;
4352
4353         while (bytes) {
4354                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4355                                                              PFERR_WRITE_MASK,
4356                                                              exception);
4357                 unsigned offset = addr & (PAGE_SIZE-1);
4358                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4359                 int ret;
4360
4361                 if (gpa == UNMAPPED_GVA)
4362                         return X86EMUL_PROPAGATE_FAULT;
4363                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4364                 if (ret < 0) {
4365                         r = X86EMUL_IO_NEEDED;
4366                         goto out;
4367                 }
4368
4369                 bytes -= towrite;
4370                 data += towrite;
4371                 addr += towrite;
4372         }
4373 out:
4374         return r;
4375 }
4376 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4377
4378 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4379                                 gpa_t *gpa, struct x86_exception *exception,
4380                                 bool write)
4381 {
4382         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4383                 | (write ? PFERR_WRITE_MASK : 0);
4384
4385         /*
4386          * currently PKRU is only applied to ept enabled guest so
4387          * there is no pkey in EPT page table for L1 guest or EPT
4388          * shadow page table for L2 guest.
4389          */
4390         if (vcpu_match_mmio_gva(vcpu, gva)
4391             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4392                                  vcpu->arch.access, 0, access)) {
4393                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4394                                         (gva & (PAGE_SIZE - 1));
4395                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4396                 return 1;
4397         }
4398
4399         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4400
4401         if (*gpa == UNMAPPED_GVA)
4402                 return -1;
4403
4404         /* For APIC access vmexit */
4405         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4406                 return 1;
4407
4408         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4409                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4410                 return 1;
4411         }
4412
4413         return 0;
4414 }
4415
4416 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4417                         const void *val, int bytes)
4418 {
4419         int ret;
4420
4421         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4422         if (ret < 0)
4423                 return 0;
4424         kvm_page_track_write(vcpu, gpa, val, bytes);
4425         return 1;
4426 }
4427
4428 struct read_write_emulator_ops {
4429         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4430                                   int bytes);
4431         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4432                                   void *val, int bytes);
4433         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4434                                int bytes, void *val);
4435         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4436                                     void *val, int bytes);
4437         bool write;
4438 };
4439
4440 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4441 {
4442         if (vcpu->mmio_read_completed) {
4443                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4444                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4445                 vcpu->mmio_read_completed = 0;
4446                 return 1;
4447         }
4448
4449         return 0;
4450 }
4451
4452 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4453                         void *val, int bytes)
4454 {
4455         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4456 }
4457
4458 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4459                          void *val, int bytes)
4460 {
4461         return emulator_write_phys(vcpu, gpa, val, bytes);
4462 }
4463
4464 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4465 {
4466         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4467         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4468 }
4469
4470 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4471                           void *val, int bytes)
4472 {
4473         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4474         return X86EMUL_IO_NEEDED;
4475 }
4476
4477 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4478                            void *val, int bytes)
4479 {
4480         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4481
4482         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4483         return X86EMUL_CONTINUE;
4484 }
4485
4486 static const struct read_write_emulator_ops read_emultor = {
4487         .read_write_prepare = read_prepare,
4488         .read_write_emulate = read_emulate,
4489         .read_write_mmio = vcpu_mmio_read,
4490         .read_write_exit_mmio = read_exit_mmio,
4491 };
4492
4493 static const struct read_write_emulator_ops write_emultor = {
4494         .read_write_emulate = write_emulate,
4495         .read_write_mmio = write_mmio,
4496         .read_write_exit_mmio = write_exit_mmio,
4497         .write = true,
4498 };
4499
4500 static int emulator_read_write_onepage(unsigned long addr, void *val,
4501                                        unsigned int bytes,
4502                                        struct x86_exception *exception,
4503                                        struct kvm_vcpu *vcpu,
4504                                        const struct read_write_emulator_ops *ops)
4505 {
4506         gpa_t gpa;
4507         int handled, ret;
4508         bool write = ops->write;
4509         struct kvm_mmio_fragment *frag;
4510
4511         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4512
4513         if (ret < 0)
4514                 return X86EMUL_PROPAGATE_FAULT;
4515
4516         /* For APIC access vmexit */
4517         if (ret)
4518                 goto mmio;
4519
4520         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4521                 return X86EMUL_CONTINUE;
4522
4523 mmio:
4524         /*
4525          * Is this MMIO handled locally?
4526          */
4527         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4528         if (handled == bytes)
4529                 return X86EMUL_CONTINUE;
4530
4531         gpa += handled;
4532         bytes -= handled;
4533         val += handled;
4534
4535         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4536         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4537         frag->gpa = gpa;
4538         frag->data = val;
4539         frag->len = bytes;
4540         return X86EMUL_CONTINUE;
4541 }
4542
4543 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4544                         unsigned long addr,
4545                         void *val, unsigned int bytes,
4546                         struct x86_exception *exception,
4547                         const struct read_write_emulator_ops *ops)
4548 {
4549         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4550         gpa_t gpa;
4551         int rc;
4552
4553         if (ops->read_write_prepare &&
4554                   ops->read_write_prepare(vcpu, val, bytes))
4555                 return X86EMUL_CONTINUE;
4556
4557         vcpu->mmio_nr_fragments = 0;
4558
4559         /* Crossing a page boundary? */
4560         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4561                 int now;
4562
4563                 now = -addr & ~PAGE_MASK;
4564                 rc = emulator_read_write_onepage(addr, val, now, exception,
4565                                                  vcpu, ops);
4566
4567                 if (rc != X86EMUL_CONTINUE)
4568                         return rc;
4569                 addr += now;
4570                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4571                         addr = (u32)addr;
4572                 val += now;
4573                 bytes -= now;
4574         }
4575
4576         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4577                                          vcpu, ops);
4578         if (rc != X86EMUL_CONTINUE)
4579                 return rc;
4580
4581         if (!vcpu->mmio_nr_fragments)
4582                 return rc;
4583
4584         gpa = vcpu->mmio_fragments[0].gpa;
4585
4586         vcpu->mmio_needed = 1;
4587         vcpu->mmio_cur_fragment = 0;
4588
4589         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4590         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4591         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4592         vcpu->run->mmio.phys_addr = gpa;
4593
4594         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4595 }
4596
4597 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4598                                   unsigned long addr,
4599                                   void *val,
4600                                   unsigned int bytes,
4601                                   struct x86_exception *exception)
4602 {
4603         return emulator_read_write(ctxt, addr, val, bytes,
4604                                    exception, &read_emultor);
4605 }
4606
4607 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4608                             unsigned long addr,
4609                             const void *val,
4610                             unsigned int bytes,
4611                             struct x86_exception *exception)
4612 {
4613         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4614                                    exception, &write_emultor);
4615 }
4616
4617 #define CMPXCHG_TYPE(t, ptr, old, new) \
4618         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4619
4620 #ifdef CONFIG_X86_64
4621 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4622 #else
4623 #  define CMPXCHG64(ptr, old, new) \
4624         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4625 #endif
4626
4627 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4628                                      unsigned long addr,
4629                                      const void *old,
4630                                      const void *new,
4631                                      unsigned int bytes,
4632                                      struct x86_exception *exception)
4633 {
4634         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4635         gpa_t gpa;
4636         struct page *page;
4637         char *kaddr;
4638         bool exchanged;
4639
4640         /* guests cmpxchg8b have to be emulated atomically */
4641         if (bytes > 8 || (bytes & (bytes - 1)))
4642                 goto emul_write;
4643
4644         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4645
4646         if (gpa == UNMAPPED_GVA ||
4647             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4648                 goto emul_write;
4649
4650         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4651                 goto emul_write;
4652
4653         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4654         if (is_error_page(page))
4655                 goto emul_write;
4656
4657         kaddr = kmap_atomic(page);
4658         kaddr += offset_in_page(gpa);
4659         switch (bytes) {
4660         case 1:
4661                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4662                 break;
4663         case 2:
4664                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4665                 break;
4666         case 4:
4667                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4668                 break;
4669         case 8:
4670                 exchanged = CMPXCHG64(kaddr, old, new);
4671                 break;
4672         default:
4673                 BUG();
4674         }
4675         kunmap_atomic(kaddr);
4676         kvm_release_page_dirty(page);
4677
4678         if (!exchanged)
4679                 return X86EMUL_CMPXCHG_FAILED;
4680
4681         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4682         kvm_page_track_write(vcpu, gpa, new, bytes);
4683
4684         return X86EMUL_CONTINUE;
4685
4686 emul_write:
4687         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4688
4689         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4690 }
4691
4692 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4693 {
4694         /* TODO: String I/O for in kernel device */
4695         int r;
4696
4697         if (vcpu->arch.pio.in)
4698                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4699                                     vcpu->arch.pio.size, pd);
4700         else
4701                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4702                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4703                                      pd);
4704         return r;
4705 }
4706
4707 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4708                                unsigned short port, void *val,
4709                                unsigned int count, bool in)
4710 {
4711         vcpu->arch.pio.port = port;
4712         vcpu->arch.pio.in = in;
4713         vcpu->arch.pio.count  = count;
4714         vcpu->arch.pio.size = size;
4715
4716         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4717                 vcpu->arch.pio.count = 0;
4718                 return 1;
4719         }
4720
4721         vcpu->run->exit_reason = KVM_EXIT_IO;
4722         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4723         vcpu->run->io.size = size;
4724         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4725         vcpu->run->io.count = count;
4726         vcpu->run->io.port = port;
4727
4728         return 0;
4729 }
4730
4731 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4732                                     int size, unsigned short port, void *val,
4733                                     unsigned int count)
4734 {
4735         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4736         int ret;
4737
4738         if (vcpu->arch.pio.count)
4739                 goto data_avail;
4740
4741         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4742         if (ret) {
4743 data_avail:
4744                 memcpy(val, vcpu->arch.pio_data, size * count);
4745                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4746                 vcpu->arch.pio.count = 0;
4747                 return 1;
4748         }
4749
4750         return 0;
4751 }
4752
4753 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4754                                      int size, unsigned short port,
4755                                      const void *val, unsigned int count)
4756 {
4757         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4758
4759         memcpy(vcpu->arch.pio_data, val, size * count);
4760         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4761         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4762 }
4763
4764 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4765 {
4766         return kvm_x86_ops->get_segment_base(vcpu, seg);
4767 }
4768
4769 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4770 {
4771         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4772 }
4773
4774 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4775 {
4776         if (!need_emulate_wbinvd(vcpu))
4777                 return X86EMUL_CONTINUE;
4778
4779         if (kvm_x86_ops->has_wbinvd_exit()) {
4780                 int cpu = get_cpu();
4781
4782                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4783                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4784                                 wbinvd_ipi, NULL, 1);
4785                 put_cpu();
4786                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4787         } else
4788                 wbinvd();
4789         return X86EMUL_CONTINUE;
4790 }
4791
4792 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4793 {
4794         kvm_x86_ops->skip_emulated_instruction(vcpu);
4795         return kvm_emulate_wbinvd_noskip(vcpu);
4796 }
4797 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4798
4799
4800
4801 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4802 {
4803         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4804 }
4805
4806 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4807                            unsigned long *dest)
4808 {
4809         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4810 }
4811
4812 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4813                            unsigned long value)
4814 {
4815
4816         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4817 }
4818
4819 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4820 {
4821         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4822 }
4823
4824 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4825 {
4826         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4827         unsigned long value;
4828
4829         switch (cr) {
4830         case 0:
4831                 value = kvm_read_cr0(vcpu);
4832                 break;
4833         case 2:
4834                 value = vcpu->arch.cr2;
4835                 break;
4836         case 3:
4837                 value = kvm_read_cr3(vcpu);
4838                 break;
4839         case 4:
4840                 value = kvm_read_cr4(vcpu);
4841                 break;
4842         case 8:
4843                 value = kvm_get_cr8(vcpu);
4844                 break;
4845         default:
4846                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4847                 return 0;
4848         }
4849
4850         return value;
4851 }
4852
4853 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4854 {
4855         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4856         int res = 0;
4857
4858         switch (cr) {
4859         case 0:
4860                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4861                 break;
4862         case 2:
4863                 vcpu->arch.cr2 = val;
4864                 break;
4865         case 3:
4866                 res = kvm_set_cr3(vcpu, val);
4867                 break;
4868         case 4:
4869                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4870                 break;
4871         case 8:
4872                 res = kvm_set_cr8(vcpu, val);
4873                 break;
4874         default:
4875                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4876                 res = -1;
4877         }
4878
4879         return res;
4880 }
4881
4882 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4883 {
4884         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4885 }
4886
4887 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4888 {
4889         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4890 }
4891
4892 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4893 {
4894         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4895 }
4896
4897 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4898 {
4899         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4900 }
4901
4902 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4903 {
4904         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4905 }
4906
4907 static unsigned long emulator_get_cached_segment_base(
4908         struct x86_emulate_ctxt *ctxt, int seg)
4909 {
4910         return get_segment_base(emul_to_vcpu(ctxt), seg);
4911 }
4912
4913 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4914                                  struct desc_struct *desc, u32 *base3,
4915                                  int seg)
4916 {
4917         struct kvm_segment var;
4918
4919         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4920         *selector = var.selector;
4921
4922         if (var.unusable) {
4923                 memset(desc, 0, sizeof(*desc));
4924                 return false;
4925         }
4926
4927         if (var.g)
4928                 var.limit >>= 12;
4929         set_desc_limit(desc, var.limit);
4930         set_desc_base(desc, (unsigned long)var.base);
4931 #ifdef CONFIG_X86_64
4932         if (base3)
4933                 *base3 = var.base >> 32;
4934 #endif
4935         desc->type = var.type;
4936         desc->s = var.s;
4937         desc->dpl = var.dpl;
4938         desc->p = var.present;
4939         desc->avl = var.avl;
4940         desc->l = var.l;
4941         desc->d = var.db;
4942         desc->g = var.g;
4943
4944         return true;
4945 }
4946
4947 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4948                                  struct desc_struct *desc, u32 base3,
4949                                  int seg)
4950 {
4951         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4952         struct kvm_segment var;
4953
4954         var.selector = selector;
4955         var.base = get_desc_base(desc);
4956 #ifdef CONFIG_X86_64
4957         var.base |= ((u64)base3) << 32;
4958 #endif
4959         var.limit = get_desc_limit(desc);
4960         if (desc->g)
4961                 var.limit = (var.limit << 12) | 0xfff;
4962         var.type = desc->type;
4963         var.dpl = desc->dpl;
4964         var.db = desc->d;
4965         var.s = desc->s;
4966         var.l = desc->l;
4967         var.g = desc->g;
4968         var.avl = desc->avl;
4969         var.present = desc->p;
4970         var.unusable = !var.present;
4971         var.padding = 0;
4972
4973         kvm_set_segment(vcpu, &var, seg);
4974         return;
4975 }
4976
4977 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4978                             u32 msr_index, u64 *pdata)
4979 {
4980         struct msr_data msr;
4981         int r;
4982
4983         msr.index = msr_index;
4984         msr.host_initiated = false;
4985         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4986         if (r)
4987                 return r;
4988
4989         *pdata = msr.data;
4990         return 0;
4991 }
4992
4993 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4994                             u32 msr_index, u64 data)
4995 {
4996         struct msr_data msr;
4997
4998         msr.data = data;
4999         msr.index = msr_index;
5000         msr.host_initiated = false;
5001         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5002 }
5003
5004 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5005 {
5006         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5007
5008         return vcpu->arch.smbase;
5009 }
5010
5011 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5012 {
5013         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5014
5015         vcpu->arch.smbase = smbase;
5016 }
5017
5018 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5019                               u32 pmc)
5020 {
5021         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5022 }
5023
5024 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5025                              u32 pmc, u64 *pdata)
5026 {
5027         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5028 }
5029
5030 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5031 {
5032         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5033 }
5034
5035 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5036 {
5037         preempt_disable();
5038         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5039         /*
5040          * CR0.TS may reference the host fpu state, not the guest fpu state,
5041          * so it may be clear at this point.
5042          */
5043         clts();
5044 }
5045
5046 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5047 {
5048         preempt_enable();
5049 }
5050
5051 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5052                               struct x86_instruction_info *info,
5053                               enum x86_intercept_stage stage)
5054 {
5055         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5056 }
5057
5058 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5059                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5060 {
5061         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5062 }
5063
5064 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5065 {
5066         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5067 }
5068
5069 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5070 {
5071         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5072 }
5073
5074 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5075 {
5076         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5077 }
5078
5079 static const struct x86_emulate_ops emulate_ops = {
5080         .read_gpr            = emulator_read_gpr,
5081         .write_gpr           = emulator_write_gpr,
5082         .read_std            = kvm_read_guest_virt_system,
5083         .write_std           = kvm_write_guest_virt_system,
5084         .read_phys           = kvm_read_guest_phys_system,
5085         .fetch               = kvm_fetch_guest_virt,
5086         .read_emulated       = emulator_read_emulated,
5087         .write_emulated      = emulator_write_emulated,
5088         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5089         .invlpg              = emulator_invlpg,
5090         .pio_in_emulated     = emulator_pio_in_emulated,
5091         .pio_out_emulated    = emulator_pio_out_emulated,
5092         .get_segment         = emulator_get_segment,
5093         .set_segment         = emulator_set_segment,
5094         .get_cached_segment_base = emulator_get_cached_segment_base,
5095         .get_gdt             = emulator_get_gdt,
5096         .get_idt             = emulator_get_idt,
5097         .set_gdt             = emulator_set_gdt,
5098         .set_idt             = emulator_set_idt,
5099         .get_cr              = emulator_get_cr,
5100         .set_cr              = emulator_set_cr,
5101         .cpl                 = emulator_get_cpl,
5102         .get_dr              = emulator_get_dr,
5103         .set_dr              = emulator_set_dr,
5104         .get_smbase          = emulator_get_smbase,
5105         .set_smbase          = emulator_set_smbase,
5106         .set_msr             = emulator_set_msr,
5107         .get_msr             = emulator_get_msr,
5108         .check_pmc           = emulator_check_pmc,
5109         .read_pmc            = emulator_read_pmc,
5110         .halt                = emulator_halt,
5111         .wbinvd              = emulator_wbinvd,
5112         .fix_hypercall       = emulator_fix_hypercall,
5113         .get_fpu             = emulator_get_fpu,
5114         .put_fpu             = emulator_put_fpu,
5115         .intercept           = emulator_intercept,
5116         .get_cpuid           = emulator_get_cpuid,
5117         .set_nmi_mask        = emulator_set_nmi_mask,
5118 };
5119
5120 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5121 {
5122         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5123         /*
5124          * an sti; sti; sequence only disable interrupts for the first
5125          * instruction. So, if the last instruction, be it emulated or
5126          * not, left the system with the INT_STI flag enabled, it
5127          * means that the last instruction is an sti. We should not
5128          * leave the flag on in this case. The same goes for mov ss
5129          */
5130         if (int_shadow & mask)
5131                 mask = 0;
5132         if (unlikely(int_shadow || mask)) {
5133                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5134                 if (!mask)
5135                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5136         }
5137 }
5138
5139 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5140 {
5141         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5142         if (ctxt->exception.vector == PF_VECTOR)
5143                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5144
5145         if (ctxt->exception.error_code_valid)
5146                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5147                                       ctxt->exception.error_code);
5148         else
5149                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5150         return false;
5151 }
5152
5153 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5154 {
5155         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5156         int cs_db, cs_l;
5157
5158         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5159
5160         ctxt->eflags = kvm_get_rflags(vcpu);
5161         ctxt->eip = kvm_rip_read(vcpu);
5162         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5163                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5164                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5165                      cs_db                              ? X86EMUL_MODE_PROT32 :
5166                                                           X86EMUL_MODE_PROT16;
5167         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5168         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5169         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5170         ctxt->emul_flags = vcpu->arch.hflags;
5171
5172         init_decode_cache(ctxt);
5173         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5174 }
5175
5176 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5177 {
5178         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5179         int ret;
5180
5181         init_emulate_ctxt(vcpu);
5182
5183         ctxt->op_bytes = 2;
5184         ctxt->ad_bytes = 2;
5185         ctxt->_eip = ctxt->eip + inc_eip;
5186         ret = emulate_int_real(ctxt, irq);
5187
5188         if (ret != X86EMUL_CONTINUE)
5189                 return EMULATE_FAIL;
5190
5191         ctxt->eip = ctxt->_eip;
5192         kvm_rip_write(vcpu, ctxt->eip);
5193         kvm_set_rflags(vcpu, ctxt->eflags);
5194
5195         if (irq == NMI_VECTOR)
5196                 vcpu->arch.nmi_pending = 0;
5197         else
5198                 vcpu->arch.interrupt.pending = false;
5199
5200         return EMULATE_DONE;
5201 }
5202 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5203
5204 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5205 {
5206         int r = EMULATE_DONE;
5207
5208         ++vcpu->stat.insn_emulation_fail;
5209         trace_kvm_emulate_insn_failed(vcpu);
5210         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5211                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5212                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5213                 vcpu->run->internal.ndata = 0;
5214                 r = EMULATE_FAIL;
5215         }
5216         kvm_queue_exception(vcpu, UD_VECTOR);
5217
5218         return r;
5219 }
5220
5221 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5222                                   bool write_fault_to_shadow_pgtable,
5223                                   int emulation_type)
5224 {
5225         gpa_t gpa = cr2;
5226         kvm_pfn_t pfn;
5227
5228         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5229                 return false;
5230
5231         if (!vcpu->arch.mmu.direct_map) {
5232                 /*
5233                  * Write permission should be allowed since only
5234                  * write access need to be emulated.
5235                  */
5236                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5237
5238                 /*
5239                  * If the mapping is invalid in guest, let cpu retry
5240                  * it to generate fault.
5241                  */
5242                 if (gpa == UNMAPPED_GVA)
5243                         return true;
5244         }
5245
5246         /*
5247          * Do not retry the unhandleable instruction if it faults on the
5248          * readonly host memory, otherwise it will goto a infinite loop:
5249          * retry instruction -> write #PF -> emulation fail -> retry
5250          * instruction -> ...
5251          */
5252         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5253
5254         /*
5255          * If the instruction failed on the error pfn, it can not be fixed,
5256          * report the error to userspace.
5257          */
5258         if (is_error_noslot_pfn(pfn))
5259                 return false;
5260
5261         kvm_release_pfn_clean(pfn);
5262
5263         /* The instructions are well-emulated on direct mmu. */
5264         if (vcpu->arch.mmu.direct_map) {
5265                 unsigned int indirect_shadow_pages;
5266
5267                 spin_lock(&vcpu->kvm->mmu_lock);
5268                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5269                 spin_unlock(&vcpu->kvm->mmu_lock);
5270
5271                 if (indirect_shadow_pages)
5272                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5273
5274                 return true;
5275         }
5276
5277         /*
5278          * if emulation was due to access to shadowed page table
5279          * and it failed try to unshadow page and re-enter the
5280          * guest to let CPU execute the instruction.
5281          */
5282         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5283
5284         /*
5285          * If the access faults on its page table, it can not
5286          * be fixed by unprotecting shadow page and it should
5287          * be reported to userspace.
5288          */
5289         return !write_fault_to_shadow_pgtable;
5290 }
5291
5292 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5293                               unsigned long cr2,  int emulation_type)
5294 {
5295         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5296         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5297
5298         last_retry_eip = vcpu->arch.last_retry_eip;
5299         last_retry_addr = vcpu->arch.last_retry_addr;
5300
5301         /*
5302          * If the emulation is caused by #PF and it is non-page_table
5303          * writing instruction, it means the VM-EXIT is caused by shadow
5304          * page protected, we can zap the shadow page and retry this
5305          * instruction directly.
5306          *
5307          * Note: if the guest uses a non-page-table modifying instruction
5308          * on the PDE that points to the instruction, then we will unmap
5309          * the instruction and go to an infinite loop. So, we cache the
5310          * last retried eip and the last fault address, if we meet the eip
5311          * and the address again, we can break out of the potential infinite
5312          * loop.
5313          */
5314         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5315
5316         if (!(emulation_type & EMULTYPE_RETRY))
5317                 return false;
5318
5319         if (x86_page_table_writing_insn(ctxt))
5320                 return false;
5321
5322         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5323                 return false;
5324
5325         vcpu->arch.last_retry_eip = ctxt->eip;
5326         vcpu->arch.last_retry_addr = cr2;
5327
5328         if (!vcpu->arch.mmu.direct_map)
5329                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5330
5331         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5332
5333         return true;
5334 }
5335
5336 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5337 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5338
5339 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5340 {
5341         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5342                 /* This is a good place to trace that we are exiting SMM.  */
5343                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5344
5345                 /* Process a latched INIT or SMI, if any.  */
5346                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5347         }
5348
5349         kvm_mmu_reset_context(vcpu);
5350 }
5351
5352 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5353 {
5354         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5355
5356         vcpu->arch.hflags = emul_flags;
5357
5358         if (changed & HF_SMM_MASK)
5359                 kvm_smm_changed(vcpu);
5360 }
5361
5362 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5363                                 unsigned long *db)
5364 {
5365         u32 dr6 = 0;
5366         int i;
5367         u32 enable, rwlen;
5368
5369         enable = dr7;
5370         rwlen = dr7 >> 16;
5371         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5372                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5373                         dr6 |= (1 << i);
5374         return dr6;
5375 }
5376
5377 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5378 {
5379         struct kvm_run *kvm_run = vcpu->run;
5380
5381         /*
5382          * rflags is the old, "raw" value of the flags.  The new value has
5383          * not been saved yet.
5384          *
5385          * This is correct even for TF set by the guest, because "the
5386          * processor will not generate this exception after the instruction
5387          * that sets the TF flag".
5388          */
5389         if (unlikely(rflags & X86_EFLAGS_TF)) {
5390                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5391                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5392                                                   DR6_RTM;
5393                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5394                         kvm_run->debug.arch.exception = DB_VECTOR;
5395                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5396                         *r = EMULATE_USER_EXIT;
5397                 } else {
5398                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5399                         /*
5400                          * "Certain debug exceptions may clear bit 0-3.  The
5401                          * remaining contents of the DR6 register are never
5402                          * cleared by the processor".
5403                          */
5404                         vcpu->arch.dr6 &= ~15;
5405                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5406                         kvm_queue_exception(vcpu, DB_VECTOR);
5407                 }
5408         }
5409 }
5410
5411 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5412 {
5413         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5414             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5415                 struct kvm_run *kvm_run = vcpu->run;
5416                 unsigned long eip = kvm_get_linear_rip(vcpu);
5417                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5418                                            vcpu->arch.guest_debug_dr7,
5419                                            vcpu->arch.eff_db);
5420
5421                 if (dr6 != 0) {
5422                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5423                         kvm_run->debug.arch.pc = eip;
5424                         kvm_run->debug.arch.exception = DB_VECTOR;
5425                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5426                         *r = EMULATE_USER_EXIT;
5427                         return true;
5428                 }
5429         }
5430
5431         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5432             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5433                 unsigned long eip = kvm_get_linear_rip(vcpu);
5434                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5435                                            vcpu->arch.dr7,
5436                                            vcpu->arch.db);
5437
5438                 if (dr6 != 0) {
5439                         vcpu->arch.dr6 &= ~15;
5440                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5441                         kvm_queue_exception(vcpu, DB_VECTOR);
5442                         *r = EMULATE_DONE;
5443                         return true;
5444                 }
5445         }
5446
5447         return false;
5448 }
5449
5450 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5451                             unsigned long cr2,
5452                             int emulation_type,
5453                             void *insn,
5454                             int insn_len)
5455 {
5456         int r;
5457         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5458         bool writeback = true;
5459         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5460
5461         /*
5462          * Clear write_fault_to_shadow_pgtable here to ensure it is
5463          * never reused.
5464          */
5465         vcpu->arch.write_fault_to_shadow_pgtable = false;
5466         kvm_clear_exception_queue(vcpu);
5467
5468         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5469                 init_emulate_ctxt(vcpu);
5470
5471                 /*
5472                  * We will reenter on the same instruction since
5473                  * we do not set complete_userspace_io.  This does not
5474                  * handle watchpoints yet, those would be handled in
5475                  * the emulate_ops.
5476                  */
5477                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5478                         return r;
5479
5480                 ctxt->interruptibility = 0;
5481                 ctxt->have_exception = false;
5482                 ctxt->exception.vector = -1;
5483                 ctxt->perm_ok = false;
5484
5485                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5486
5487                 r = x86_decode_insn(ctxt, insn, insn_len);
5488
5489                 trace_kvm_emulate_insn_start(vcpu);
5490                 ++vcpu->stat.insn_emulation;
5491                 if (r != EMULATION_OK)  {
5492                         if (emulation_type & EMULTYPE_TRAP_UD)
5493                                 return EMULATE_FAIL;
5494                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5495                                                 emulation_type))
5496                                 return EMULATE_DONE;
5497                         if (emulation_type & EMULTYPE_SKIP)
5498                                 return EMULATE_FAIL;
5499                         return handle_emulation_failure(vcpu);
5500                 }
5501         }
5502
5503         if (emulation_type & EMULTYPE_SKIP) {
5504                 kvm_rip_write(vcpu, ctxt->_eip);
5505                 if (ctxt->eflags & X86_EFLAGS_RF)
5506                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5507                 return EMULATE_DONE;
5508         }
5509
5510         if (retry_instruction(ctxt, cr2, emulation_type))
5511                 return EMULATE_DONE;
5512
5513         /* this is needed for vmware backdoor interface to work since it
5514            changes registers values  during IO operation */
5515         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5516                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5517                 emulator_invalidate_register_cache(ctxt);
5518         }
5519
5520 restart:
5521         r = x86_emulate_insn(ctxt);
5522
5523         if (r == EMULATION_INTERCEPTED)
5524                 return EMULATE_DONE;
5525
5526         if (r == EMULATION_FAILED) {
5527                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5528                                         emulation_type))
5529                         return EMULATE_DONE;
5530
5531                 return handle_emulation_failure(vcpu);
5532         }
5533
5534         if (ctxt->have_exception) {
5535                 r = EMULATE_DONE;
5536                 if (inject_emulated_exception(vcpu))
5537                         return r;
5538         } else if (vcpu->arch.pio.count) {
5539                 if (!vcpu->arch.pio.in) {
5540                         /* FIXME: return into emulator if single-stepping.  */
5541                         vcpu->arch.pio.count = 0;
5542                 } else {
5543                         writeback = false;
5544                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5545                 }
5546                 r = EMULATE_USER_EXIT;
5547         } else if (vcpu->mmio_needed) {
5548                 if (!vcpu->mmio_is_write)
5549                         writeback = false;
5550                 r = EMULATE_USER_EXIT;
5551                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5552         } else if (r == EMULATION_RESTART)
5553                 goto restart;
5554         else
5555                 r = EMULATE_DONE;
5556
5557         if (writeback) {
5558                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5559                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5560                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5561                 if (vcpu->arch.hflags != ctxt->emul_flags)
5562                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5563                 kvm_rip_write(vcpu, ctxt->eip);
5564                 if (r == EMULATE_DONE)
5565                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5566                 if (!ctxt->have_exception ||
5567                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5568                         __kvm_set_rflags(vcpu, ctxt->eflags);
5569
5570                 /*
5571                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5572                  * do nothing, and it will be requested again as soon as
5573                  * the shadow expires.  But we still need to check here,
5574                  * because POPF has no interrupt shadow.
5575                  */
5576                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5577                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5578         } else
5579                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5580
5581         return r;
5582 }
5583 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5584
5585 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5586 {
5587         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5588         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5589                                             size, port, &val, 1);
5590         /* do not return to emulator after return from userspace */
5591         vcpu->arch.pio.count = 0;
5592         return ret;
5593 }
5594 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5595
5596 static int kvmclock_cpu_down_prep(unsigned int cpu)
5597 {
5598         __this_cpu_write(cpu_tsc_khz, 0);
5599         return 0;
5600 }
5601
5602 static void tsc_khz_changed(void *data)
5603 {
5604         struct cpufreq_freqs *freq = data;
5605         unsigned long khz = 0;
5606
5607         if (data)
5608                 khz = freq->new;
5609         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5610                 khz = cpufreq_quick_get(raw_smp_processor_id());
5611         if (!khz)
5612                 khz = tsc_khz;
5613         __this_cpu_write(cpu_tsc_khz, khz);
5614 }
5615
5616 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5617                                      void *data)
5618 {
5619         struct cpufreq_freqs *freq = data;
5620         struct kvm *kvm;
5621         struct kvm_vcpu *vcpu;
5622         int i, send_ipi = 0;
5623
5624         /*
5625          * We allow guests to temporarily run on slowing clocks,
5626          * provided we notify them after, or to run on accelerating
5627          * clocks, provided we notify them before.  Thus time never
5628          * goes backwards.
5629          *
5630          * However, we have a problem.  We can't atomically update
5631          * the frequency of a given CPU from this function; it is
5632          * merely a notifier, which can be called from any CPU.
5633          * Changing the TSC frequency at arbitrary points in time
5634          * requires a recomputation of local variables related to
5635          * the TSC for each VCPU.  We must flag these local variables
5636          * to be updated and be sure the update takes place with the
5637          * new frequency before any guests proceed.
5638          *
5639          * Unfortunately, the combination of hotplug CPU and frequency
5640          * change creates an intractable locking scenario; the order
5641          * of when these callouts happen is undefined with respect to
5642          * CPU hotplug, and they can race with each other.  As such,
5643          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5644          * undefined; you can actually have a CPU frequency change take
5645          * place in between the computation of X and the setting of the
5646          * variable.  To protect against this problem, all updates of
5647          * the per_cpu tsc_khz variable are done in an interrupt
5648          * protected IPI, and all callers wishing to update the value
5649          * must wait for a synchronous IPI to complete (which is trivial
5650          * if the caller is on the CPU already).  This establishes the
5651          * necessary total order on variable updates.
5652          *
5653          * Note that because a guest time update may take place
5654          * anytime after the setting of the VCPU's request bit, the
5655          * correct TSC value must be set before the request.  However,
5656          * to ensure the update actually makes it to any guest which
5657          * starts running in hardware virtualization between the set
5658          * and the acquisition of the spinlock, we must also ping the
5659          * CPU after setting the request bit.
5660          *
5661          */
5662
5663         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5664                 return 0;
5665         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5666                 return 0;
5667
5668         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5669
5670         spin_lock(&kvm_lock);
5671         list_for_each_entry(kvm, &vm_list, vm_list) {
5672                 kvm_for_each_vcpu(i, vcpu, kvm) {
5673                         if (vcpu->cpu != freq->cpu)
5674                                 continue;
5675                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5676                         if (vcpu->cpu != smp_processor_id())
5677                                 send_ipi = 1;
5678                 }
5679         }
5680         spin_unlock(&kvm_lock);
5681
5682         if (freq->old < freq->new && send_ipi) {
5683                 /*
5684                  * We upscale the frequency.  Must make the guest
5685                  * doesn't see old kvmclock values while running with
5686                  * the new frequency, otherwise we risk the guest sees
5687                  * time go backwards.
5688                  *
5689                  * In case we update the frequency for another cpu
5690                  * (which might be in guest context) send an interrupt
5691                  * to kick the cpu out of guest context.  Next time
5692                  * guest context is entered kvmclock will be updated,
5693                  * so the guest will not see stale values.
5694                  */
5695                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5696         }
5697         return 0;
5698 }
5699
5700 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5701         .notifier_call  = kvmclock_cpufreq_notifier
5702 };
5703
5704 static int kvmclock_cpu_online(unsigned int cpu)
5705 {
5706         tsc_khz_changed(NULL);
5707         return 0;
5708 }
5709
5710 static void kvm_timer_init(void)
5711 {
5712         int cpu;
5713
5714         max_tsc_khz = tsc_khz;
5715
5716         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5717 #ifdef CONFIG_CPU_FREQ
5718                 struct cpufreq_policy policy;
5719                 memset(&policy, 0, sizeof(policy));
5720                 cpu = get_cpu();
5721                 cpufreq_get_policy(&policy, cpu);
5722                 if (policy.cpuinfo.max_freq)
5723                         max_tsc_khz = policy.cpuinfo.max_freq;
5724                 put_cpu();
5725 #endif
5726                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5727                                           CPUFREQ_TRANSITION_NOTIFIER);
5728         }
5729         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5730
5731         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "AP_X86_KVM_CLK_ONLINE",
5732                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
5733 }
5734
5735 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5736
5737 int kvm_is_in_guest(void)
5738 {
5739         return __this_cpu_read(current_vcpu) != NULL;
5740 }
5741
5742 static int kvm_is_user_mode(void)
5743 {
5744         int user_mode = 3;
5745
5746         if (__this_cpu_read(current_vcpu))
5747                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5748
5749         return user_mode != 0;
5750 }
5751
5752 static unsigned long kvm_get_guest_ip(void)
5753 {
5754         unsigned long ip = 0;
5755
5756         if (__this_cpu_read(current_vcpu))
5757                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5758
5759         return ip;
5760 }
5761
5762 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5763         .is_in_guest            = kvm_is_in_guest,
5764         .is_user_mode           = kvm_is_user_mode,
5765         .get_guest_ip           = kvm_get_guest_ip,
5766 };
5767
5768 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5769 {
5770         __this_cpu_write(current_vcpu, vcpu);
5771 }
5772 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5773
5774 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5775 {
5776         __this_cpu_write(current_vcpu, NULL);
5777 }
5778 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5779
5780 static void kvm_set_mmio_spte_mask(void)
5781 {
5782         u64 mask;
5783         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5784
5785         /*
5786          * Set the reserved bits and the present bit of an paging-structure
5787          * entry to generate page fault with PFER.RSV = 1.
5788          */
5789          /* Mask the reserved physical address bits. */
5790         mask = rsvd_bits(maxphyaddr, 51);
5791
5792         /* Bit 62 is always reserved for 32bit host. */
5793         mask |= 0x3ull << 62;
5794
5795         /* Set the present bit. */
5796         mask |= 1ull;
5797
5798 #ifdef CONFIG_X86_64
5799         /*
5800          * If reserved bit is not supported, clear the present bit to disable
5801          * mmio page fault.
5802          */
5803         if (maxphyaddr == 52)
5804                 mask &= ~1ull;
5805 #endif
5806
5807         kvm_mmu_set_mmio_spte_mask(mask);
5808 }
5809
5810 #ifdef CONFIG_X86_64
5811 static void pvclock_gtod_update_fn(struct work_struct *work)
5812 {
5813         struct kvm *kvm;
5814
5815         struct kvm_vcpu *vcpu;
5816         int i;
5817
5818         spin_lock(&kvm_lock);
5819         list_for_each_entry(kvm, &vm_list, vm_list)
5820                 kvm_for_each_vcpu(i, vcpu, kvm)
5821                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5822         atomic_set(&kvm_guest_has_master_clock, 0);
5823         spin_unlock(&kvm_lock);
5824 }
5825
5826 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5827
5828 /*
5829  * Notification about pvclock gtod data update.
5830  */
5831 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5832                                void *priv)
5833 {
5834         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5835         struct timekeeper *tk = priv;
5836
5837         update_pvclock_gtod(tk);
5838
5839         /* disable master clock if host does not trust, or does not
5840          * use, TSC clocksource
5841          */
5842         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5843             atomic_read(&kvm_guest_has_master_clock) != 0)
5844                 queue_work(system_long_wq, &pvclock_gtod_work);
5845
5846         return 0;
5847 }
5848
5849 static struct notifier_block pvclock_gtod_notifier = {
5850         .notifier_call = pvclock_gtod_notify,
5851 };
5852 #endif
5853
5854 int kvm_arch_init(void *opaque)
5855 {
5856         int r;
5857         struct kvm_x86_ops *ops = opaque;
5858
5859         if (kvm_x86_ops) {
5860                 printk(KERN_ERR "kvm: already loaded the other module\n");
5861                 r = -EEXIST;
5862                 goto out;
5863         }
5864
5865         if (!ops->cpu_has_kvm_support()) {
5866                 printk(KERN_ERR "kvm: no hardware support\n");
5867                 r = -EOPNOTSUPP;
5868                 goto out;
5869         }
5870         if (ops->disabled_by_bios()) {
5871                 printk(KERN_ERR "kvm: disabled by bios\n");
5872                 r = -EOPNOTSUPP;
5873                 goto out;
5874         }
5875
5876         r = -ENOMEM;
5877         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5878         if (!shared_msrs) {
5879                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5880                 goto out;
5881         }
5882
5883         r = kvm_mmu_module_init();
5884         if (r)
5885                 goto out_free_percpu;
5886
5887         kvm_set_mmio_spte_mask();
5888
5889         kvm_x86_ops = ops;
5890
5891         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5892                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
5893                         PT_PRESENT_MASK);
5894         kvm_timer_init();
5895
5896         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5897
5898         if (boot_cpu_has(X86_FEATURE_XSAVE))
5899                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5900
5901         kvm_lapic_init();
5902 #ifdef CONFIG_X86_64
5903         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5904 #endif
5905
5906         return 0;
5907
5908 out_free_percpu:
5909         free_percpu(shared_msrs);
5910 out:
5911         return r;
5912 }
5913
5914 void kvm_arch_exit(void)
5915 {
5916         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5917
5918         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5919                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5920                                             CPUFREQ_TRANSITION_NOTIFIER);
5921         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
5922 #ifdef CONFIG_X86_64
5923         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5924 #endif
5925         kvm_x86_ops = NULL;
5926         kvm_mmu_module_exit();
5927         free_percpu(shared_msrs);
5928 }
5929
5930 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5931 {
5932         ++vcpu->stat.halt_exits;
5933         if (lapic_in_kernel(vcpu)) {
5934                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5935                 return 1;
5936         } else {
5937                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5938                 return 0;
5939         }
5940 }
5941 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5942
5943 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5944 {
5945         kvm_x86_ops->skip_emulated_instruction(vcpu);
5946         return kvm_vcpu_halt(vcpu);
5947 }
5948 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5949
5950 /*
5951  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5952  *
5953  * @apicid - apicid of vcpu to be kicked.
5954  */
5955 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5956 {
5957         struct kvm_lapic_irq lapic_irq;
5958
5959         lapic_irq.shorthand = 0;
5960         lapic_irq.dest_mode = 0;
5961         lapic_irq.dest_id = apicid;
5962         lapic_irq.msi_redir_hint = false;
5963
5964         lapic_irq.delivery_mode = APIC_DM_REMRD;
5965         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5966 }
5967
5968 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
5969 {
5970         vcpu->arch.apicv_active = false;
5971         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
5972 }
5973
5974 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5975 {
5976         unsigned long nr, a0, a1, a2, a3, ret;
5977         int op_64_bit, r = 1;
5978
5979         kvm_x86_ops->skip_emulated_instruction(vcpu);
5980
5981         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5982                 return kvm_hv_hypercall(vcpu);
5983
5984         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5985         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5986         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5987         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5988         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5989
5990         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5991
5992         op_64_bit = is_64_bit_mode(vcpu);
5993         if (!op_64_bit) {
5994                 nr &= 0xFFFFFFFF;
5995                 a0 &= 0xFFFFFFFF;
5996                 a1 &= 0xFFFFFFFF;
5997                 a2 &= 0xFFFFFFFF;
5998                 a3 &= 0xFFFFFFFF;
5999         }
6000
6001         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6002                 ret = -KVM_EPERM;
6003                 goto out;
6004         }
6005
6006         switch (nr) {
6007         case KVM_HC_VAPIC_POLL_IRQ:
6008                 ret = 0;
6009                 break;
6010         case KVM_HC_KICK_CPU:
6011                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6012                 ret = 0;
6013                 break;
6014         default:
6015                 ret = -KVM_ENOSYS;
6016                 break;
6017         }
6018 out:
6019         if (!op_64_bit)
6020                 ret = (u32)ret;
6021         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6022         ++vcpu->stat.hypercalls;
6023         return r;
6024 }
6025 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6026
6027 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6028 {
6029         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6030         char instruction[3];
6031         unsigned long rip = kvm_rip_read(vcpu);
6032
6033         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6034
6035         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
6036 }
6037
6038 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6039 {
6040         return vcpu->run->request_interrupt_window &&
6041                 likely(!pic_in_kernel(vcpu->kvm));
6042 }
6043
6044 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6045 {
6046         struct kvm_run *kvm_run = vcpu->run;
6047
6048         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6049         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6050         kvm_run->cr8 = kvm_get_cr8(vcpu);
6051         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6052         kvm_run->ready_for_interrupt_injection =
6053                 pic_in_kernel(vcpu->kvm) ||
6054                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6055 }
6056
6057 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6058 {
6059         int max_irr, tpr;
6060
6061         if (!kvm_x86_ops->update_cr8_intercept)
6062                 return;
6063
6064         if (!lapic_in_kernel(vcpu))
6065                 return;
6066
6067         if (vcpu->arch.apicv_active)
6068                 return;
6069
6070         if (!vcpu->arch.apic->vapic_addr)
6071                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6072         else
6073                 max_irr = -1;
6074
6075         if (max_irr != -1)
6076                 max_irr >>= 4;
6077
6078         tpr = kvm_lapic_get_cr8(vcpu);
6079
6080         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6081 }
6082
6083 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6084 {
6085         int r;
6086
6087         /* try to reinject previous events if any */
6088         if (vcpu->arch.exception.pending) {
6089                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6090                                         vcpu->arch.exception.has_error_code,
6091                                         vcpu->arch.exception.error_code);
6092
6093                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6094                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6095                                              X86_EFLAGS_RF);
6096
6097                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6098                     (vcpu->arch.dr7 & DR7_GD)) {
6099                         vcpu->arch.dr7 &= ~DR7_GD;
6100                         kvm_update_dr7(vcpu);
6101                 }
6102
6103                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6104                                           vcpu->arch.exception.has_error_code,
6105                                           vcpu->arch.exception.error_code,
6106                                           vcpu->arch.exception.reinject);
6107                 return 0;
6108         }
6109
6110         if (vcpu->arch.nmi_injected) {
6111                 kvm_x86_ops->set_nmi(vcpu);
6112                 return 0;
6113         }
6114
6115         if (vcpu->arch.interrupt.pending) {
6116                 kvm_x86_ops->set_irq(vcpu);
6117                 return 0;
6118         }
6119
6120         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6121                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6122                 if (r != 0)
6123                         return r;
6124         }
6125
6126         /* try to inject new event if pending */
6127         if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6128                 vcpu->arch.smi_pending = false;
6129                 enter_smm(vcpu);
6130         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6131                 --vcpu->arch.nmi_pending;
6132                 vcpu->arch.nmi_injected = true;
6133                 kvm_x86_ops->set_nmi(vcpu);
6134         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6135                 /*
6136                  * Because interrupts can be injected asynchronously, we are
6137                  * calling check_nested_events again here to avoid a race condition.
6138                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6139                  * proposal and current concerns.  Perhaps we should be setting
6140                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6141                  */
6142                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6143                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6144                         if (r != 0)
6145                                 return r;
6146                 }
6147                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6148                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6149                                             false);
6150                         kvm_x86_ops->set_irq(vcpu);
6151                 }
6152         }
6153
6154         return 0;
6155 }
6156
6157 static void process_nmi(struct kvm_vcpu *vcpu)
6158 {
6159         unsigned limit = 2;
6160
6161         /*
6162          * x86 is limited to one NMI running, and one NMI pending after it.
6163          * If an NMI is already in progress, limit further NMIs to just one.
6164          * Otherwise, allow two (and we'll inject the first one immediately).
6165          */
6166         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6167                 limit = 1;
6168
6169         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6170         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6171         kvm_make_request(KVM_REQ_EVENT, vcpu);
6172 }
6173
6174 #define put_smstate(type, buf, offset, val)                       \
6175         *(type *)((buf) + (offset) - 0x7e00) = val
6176
6177 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6178 {
6179         u32 flags = 0;
6180         flags |= seg->g       << 23;
6181         flags |= seg->db      << 22;
6182         flags |= seg->l       << 21;
6183         flags |= seg->avl     << 20;
6184         flags |= seg->present << 15;
6185         flags |= seg->dpl     << 13;
6186         flags |= seg->s       << 12;
6187         flags |= seg->type    << 8;
6188         return flags;
6189 }
6190
6191 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6192 {
6193         struct kvm_segment seg;
6194         int offset;
6195
6196         kvm_get_segment(vcpu, &seg, n);
6197         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6198
6199         if (n < 3)
6200                 offset = 0x7f84 + n * 12;
6201         else
6202                 offset = 0x7f2c + (n - 3) * 12;
6203
6204         put_smstate(u32, buf, offset + 8, seg.base);
6205         put_smstate(u32, buf, offset + 4, seg.limit);
6206         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6207 }
6208
6209 #ifdef CONFIG_X86_64
6210 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6211 {
6212         struct kvm_segment seg;
6213         int offset;
6214         u16 flags;
6215
6216         kvm_get_segment(vcpu, &seg, n);
6217         offset = 0x7e00 + n * 16;
6218
6219         flags = enter_smm_get_segment_flags(&seg) >> 8;
6220         put_smstate(u16, buf, offset, seg.selector);
6221         put_smstate(u16, buf, offset + 2, flags);
6222         put_smstate(u32, buf, offset + 4, seg.limit);
6223         put_smstate(u64, buf, offset + 8, seg.base);
6224 }
6225 #endif
6226
6227 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6228 {
6229         struct desc_ptr dt;
6230         struct kvm_segment seg;
6231         unsigned long val;
6232         int i;
6233
6234         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6235         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6236         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6237         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6238
6239         for (i = 0; i < 8; i++)
6240                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6241
6242         kvm_get_dr(vcpu, 6, &val);
6243         put_smstate(u32, buf, 0x7fcc, (u32)val);
6244         kvm_get_dr(vcpu, 7, &val);
6245         put_smstate(u32, buf, 0x7fc8, (u32)val);
6246
6247         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6248         put_smstate(u32, buf, 0x7fc4, seg.selector);
6249         put_smstate(u32, buf, 0x7f64, seg.base);
6250         put_smstate(u32, buf, 0x7f60, seg.limit);
6251         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6252
6253         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6254         put_smstate(u32, buf, 0x7fc0, seg.selector);
6255         put_smstate(u32, buf, 0x7f80, seg.base);
6256         put_smstate(u32, buf, 0x7f7c, seg.limit);
6257         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6258
6259         kvm_x86_ops->get_gdt(vcpu, &dt);
6260         put_smstate(u32, buf, 0x7f74, dt.address);
6261         put_smstate(u32, buf, 0x7f70, dt.size);
6262
6263         kvm_x86_ops->get_idt(vcpu, &dt);
6264         put_smstate(u32, buf, 0x7f58, dt.address);
6265         put_smstate(u32, buf, 0x7f54, dt.size);
6266
6267         for (i = 0; i < 6; i++)
6268                 enter_smm_save_seg_32(vcpu, buf, i);
6269
6270         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6271
6272         /* revision id */
6273         put_smstate(u32, buf, 0x7efc, 0x00020000);
6274         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6275 }
6276
6277 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6278 {
6279 #ifdef CONFIG_X86_64
6280         struct desc_ptr dt;
6281         struct kvm_segment seg;
6282         unsigned long val;
6283         int i;
6284
6285         for (i = 0; i < 16; i++)
6286                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6287
6288         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6289         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6290
6291         kvm_get_dr(vcpu, 6, &val);
6292         put_smstate(u64, buf, 0x7f68, val);
6293         kvm_get_dr(vcpu, 7, &val);
6294         put_smstate(u64, buf, 0x7f60, val);
6295
6296         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6297         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6298         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6299
6300         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6301
6302         /* revision id */
6303         put_smstate(u32, buf, 0x7efc, 0x00020064);
6304
6305         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6306
6307         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6308         put_smstate(u16, buf, 0x7e90, seg.selector);
6309         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6310         put_smstate(u32, buf, 0x7e94, seg.limit);
6311         put_smstate(u64, buf, 0x7e98, seg.base);
6312
6313         kvm_x86_ops->get_idt(vcpu, &dt);
6314         put_smstate(u32, buf, 0x7e84, dt.size);
6315         put_smstate(u64, buf, 0x7e88, dt.address);
6316
6317         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6318         put_smstate(u16, buf, 0x7e70, seg.selector);
6319         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6320         put_smstate(u32, buf, 0x7e74, seg.limit);
6321         put_smstate(u64, buf, 0x7e78, seg.base);
6322
6323         kvm_x86_ops->get_gdt(vcpu, &dt);
6324         put_smstate(u32, buf, 0x7e64, dt.size);
6325         put_smstate(u64, buf, 0x7e68, dt.address);
6326
6327         for (i = 0; i < 6; i++)
6328                 enter_smm_save_seg_64(vcpu, buf, i);
6329 #else
6330         WARN_ON_ONCE(1);
6331 #endif
6332 }
6333
6334 static void enter_smm(struct kvm_vcpu *vcpu)
6335 {
6336         struct kvm_segment cs, ds;
6337         struct desc_ptr dt;
6338         char buf[512];
6339         u32 cr0;
6340
6341         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6342         vcpu->arch.hflags |= HF_SMM_MASK;
6343         memset(buf, 0, 512);
6344         if (guest_cpuid_has_longmode(vcpu))
6345                 enter_smm_save_state_64(vcpu, buf);
6346         else
6347                 enter_smm_save_state_32(vcpu, buf);
6348
6349         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6350
6351         if (kvm_x86_ops->get_nmi_mask(vcpu))
6352                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6353         else
6354                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6355
6356         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6357         kvm_rip_write(vcpu, 0x8000);
6358
6359         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6360         kvm_x86_ops->set_cr0(vcpu, cr0);
6361         vcpu->arch.cr0 = cr0;
6362
6363         kvm_x86_ops->set_cr4(vcpu, 0);
6364
6365         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6366         dt.address = dt.size = 0;
6367         kvm_x86_ops->set_idt(vcpu, &dt);
6368
6369         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6370
6371         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6372         cs.base = vcpu->arch.smbase;
6373
6374         ds.selector = 0;
6375         ds.base = 0;
6376
6377         cs.limit    = ds.limit = 0xffffffff;
6378         cs.type     = ds.type = 0x3;
6379         cs.dpl      = ds.dpl = 0;
6380         cs.db       = ds.db = 0;
6381         cs.s        = ds.s = 1;
6382         cs.l        = ds.l = 0;
6383         cs.g        = ds.g = 1;
6384         cs.avl      = ds.avl = 0;
6385         cs.present  = ds.present = 1;
6386         cs.unusable = ds.unusable = 0;
6387         cs.padding  = ds.padding = 0;
6388
6389         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6390         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6391         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6392         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6393         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6394         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6395
6396         if (guest_cpuid_has_longmode(vcpu))
6397                 kvm_x86_ops->set_efer(vcpu, 0);
6398
6399         kvm_update_cpuid(vcpu);
6400         kvm_mmu_reset_context(vcpu);
6401 }
6402
6403 static void process_smi(struct kvm_vcpu *vcpu)
6404 {
6405         vcpu->arch.smi_pending = true;
6406         kvm_make_request(KVM_REQ_EVENT, vcpu);
6407 }
6408
6409 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6410 {
6411         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6412 }
6413
6414 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6415 {
6416         u64 eoi_exit_bitmap[4];
6417
6418         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6419                 return;
6420
6421         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6422
6423         if (irqchip_split(vcpu->kvm))
6424                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6425         else {
6426                 if (vcpu->arch.apicv_active)
6427                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6428                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6429         }
6430         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6431                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6432         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6433 }
6434
6435 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6436 {
6437         ++vcpu->stat.tlb_flush;
6438         kvm_x86_ops->tlb_flush(vcpu);
6439 }
6440
6441 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6442 {
6443         struct page *page = NULL;
6444
6445         if (!lapic_in_kernel(vcpu))
6446                 return;
6447
6448         if (!kvm_x86_ops->set_apic_access_page_addr)
6449                 return;
6450
6451         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6452         if (is_error_page(page))
6453                 return;
6454         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6455
6456         /*
6457          * Do not pin apic access page in memory, the MMU notifier
6458          * will call us again if it is migrated or swapped out.
6459          */
6460         put_page(page);
6461 }
6462 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6463
6464 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6465                                            unsigned long address)
6466 {
6467         /*
6468          * The physical address of apic access page is stored in the VMCS.
6469          * Update it when it becomes invalid.
6470          */
6471         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6472                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6473 }
6474
6475 /*
6476  * Returns 1 to let vcpu_run() continue the guest execution loop without
6477  * exiting to the userspace.  Otherwise, the value will be returned to the
6478  * userspace.
6479  */
6480 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6481 {
6482         int r;
6483         bool req_int_win =
6484                 dm_request_for_irq_injection(vcpu) &&
6485                 kvm_cpu_accept_dm_intr(vcpu);
6486
6487         bool req_immediate_exit = false;
6488
6489         if (vcpu->requests) {
6490                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6491                         kvm_mmu_unload(vcpu);
6492                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6493                         __kvm_migrate_timers(vcpu);
6494                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6495                         kvm_gen_update_masterclock(vcpu->kvm);
6496                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6497                         kvm_gen_kvmclock_update(vcpu);
6498                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6499                         r = kvm_guest_time_update(vcpu);
6500                         if (unlikely(r))
6501                                 goto out;
6502                 }
6503                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6504                         kvm_mmu_sync_roots(vcpu);
6505                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6506                         kvm_vcpu_flush_tlb(vcpu);
6507                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6508                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6509                         r = 0;
6510                         goto out;
6511                 }
6512                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6513                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6514                         r = 0;
6515                         goto out;
6516                 }
6517                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6518                         vcpu->fpu_active = 0;
6519                         kvm_x86_ops->fpu_deactivate(vcpu);
6520                 }
6521                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6522                         /* Page is swapped out. Do synthetic halt */
6523                         vcpu->arch.apf.halted = true;
6524                         r = 1;
6525                         goto out;
6526                 }
6527                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6528                         record_steal_time(vcpu);
6529                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6530                         process_smi(vcpu);
6531                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6532                         process_nmi(vcpu);
6533                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6534                         kvm_pmu_handle_event(vcpu);
6535                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6536                         kvm_pmu_deliver_pmi(vcpu);
6537                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6538                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6539                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6540                                      vcpu->arch.ioapic_handled_vectors)) {
6541                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6542                                 vcpu->run->eoi.vector =
6543                                                 vcpu->arch.pending_ioapic_eoi;
6544                                 r = 0;
6545                                 goto out;
6546                         }
6547                 }
6548                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6549                         vcpu_scan_ioapic(vcpu);
6550                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6551                         kvm_vcpu_reload_apic_access_page(vcpu);
6552                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6553                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6554                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6555                         r = 0;
6556                         goto out;
6557                 }
6558                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6559                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6560                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6561                         r = 0;
6562                         goto out;
6563                 }
6564                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6565                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6566                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6567                         r = 0;
6568                         goto out;
6569                 }
6570
6571                 /*
6572                  * KVM_REQ_HV_STIMER has to be processed after
6573                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6574                  * depend on the guest clock being up-to-date
6575                  */
6576                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6577                         kvm_hv_process_stimers(vcpu);
6578         }
6579
6580         /*
6581          * KVM_REQ_EVENT is not set when posted interrupts are set by
6582          * VT-d hardware, so we have to update RVI unconditionally.
6583          */
6584         if (kvm_lapic_enabled(vcpu)) {
6585                 /*
6586                  * Update architecture specific hints for APIC
6587                  * virtual interrupt delivery.
6588                  */
6589                 if (vcpu->arch.apicv_active)
6590                         kvm_x86_ops->hwapic_irr_update(vcpu,
6591                                 kvm_lapic_find_highest_irr(vcpu));
6592         }
6593
6594         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6595                 kvm_apic_accept_events(vcpu);
6596                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6597                         r = 1;
6598                         goto out;
6599                 }
6600
6601                 if (inject_pending_event(vcpu, req_int_win) != 0)
6602                         req_immediate_exit = true;
6603                 else {
6604                         /* Enable NMI/IRQ window open exits if needed.
6605                          *
6606                          * SMIs have two cases: 1) they can be nested, and
6607                          * then there is nothing to do here because RSM will
6608                          * cause a vmexit anyway; 2) or the SMI can be pending
6609                          * because inject_pending_event has completed the
6610                          * injection of an IRQ or NMI from the previous vmexit,
6611                          * and then we request an immediate exit to inject the SMI.
6612                          */
6613                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6614                                 req_immediate_exit = true;
6615                         if (vcpu->arch.nmi_pending)
6616                                 kvm_x86_ops->enable_nmi_window(vcpu);
6617                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6618                                 kvm_x86_ops->enable_irq_window(vcpu);
6619                 }
6620
6621                 if (kvm_lapic_enabled(vcpu)) {
6622                         update_cr8_intercept(vcpu);
6623                         kvm_lapic_sync_to_vapic(vcpu);
6624                 }
6625         }
6626
6627         r = kvm_mmu_reload(vcpu);
6628         if (unlikely(r)) {
6629                 goto cancel_injection;
6630         }
6631
6632         preempt_disable();
6633
6634         kvm_x86_ops->prepare_guest_switch(vcpu);
6635         if (vcpu->fpu_active)
6636                 kvm_load_guest_fpu(vcpu);
6637         vcpu->mode = IN_GUEST_MODE;
6638
6639         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6640
6641         /*
6642          * We should set ->mode before check ->requests,
6643          * Please see the comment in kvm_make_all_cpus_request.
6644          * This also orders the write to mode from any reads
6645          * to the page tables done while the VCPU is running.
6646          * Please see the comment in kvm_flush_remote_tlbs.
6647          */
6648         smp_mb__after_srcu_read_unlock();
6649
6650         local_irq_disable();
6651
6652         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6653             || need_resched() || signal_pending(current)) {
6654                 vcpu->mode = OUTSIDE_GUEST_MODE;
6655                 smp_wmb();
6656                 local_irq_enable();
6657                 preempt_enable();
6658                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6659                 r = 1;
6660                 goto cancel_injection;
6661         }
6662
6663         kvm_load_guest_xcr0(vcpu);
6664
6665         if (req_immediate_exit) {
6666                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6667                 smp_send_reschedule(vcpu->cpu);
6668         }
6669
6670         trace_kvm_entry(vcpu->vcpu_id);
6671         wait_lapic_expire(vcpu);
6672         guest_enter_irqoff();
6673
6674         if (unlikely(vcpu->arch.switch_db_regs)) {
6675                 set_debugreg(0, 7);
6676                 set_debugreg(vcpu->arch.eff_db[0], 0);
6677                 set_debugreg(vcpu->arch.eff_db[1], 1);
6678                 set_debugreg(vcpu->arch.eff_db[2], 2);
6679                 set_debugreg(vcpu->arch.eff_db[3], 3);
6680                 set_debugreg(vcpu->arch.dr6, 6);
6681                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6682         }
6683
6684         kvm_x86_ops->run(vcpu);
6685
6686         /*
6687          * Do this here before restoring debug registers on the host.  And
6688          * since we do this before handling the vmexit, a DR access vmexit
6689          * can (a) read the correct value of the debug registers, (b) set
6690          * KVM_DEBUGREG_WONT_EXIT again.
6691          */
6692         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6693                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6694                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6695                 kvm_update_dr0123(vcpu);
6696                 kvm_update_dr6(vcpu);
6697                 kvm_update_dr7(vcpu);
6698                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6699         }
6700
6701         /*
6702          * If the guest has used debug registers, at least dr7
6703          * will be disabled while returning to the host.
6704          * If we don't have active breakpoints in the host, we don't
6705          * care about the messed up debug address registers. But if
6706          * we have some of them active, restore the old state.
6707          */
6708         if (hw_breakpoint_active())
6709                 hw_breakpoint_restore();
6710
6711         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6712
6713         vcpu->mode = OUTSIDE_GUEST_MODE;
6714         smp_wmb();
6715
6716         kvm_put_guest_xcr0(vcpu);
6717
6718         kvm_x86_ops->handle_external_intr(vcpu);
6719
6720         ++vcpu->stat.exits;
6721
6722         guest_exit_irqoff();
6723
6724         local_irq_enable();
6725         preempt_enable();
6726
6727         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6728
6729         /*
6730          * Profile KVM exit RIPs:
6731          */
6732         if (unlikely(prof_on == KVM_PROFILING)) {
6733                 unsigned long rip = kvm_rip_read(vcpu);
6734                 profile_hit(KVM_PROFILING, (void *)rip);
6735         }
6736
6737         if (unlikely(vcpu->arch.tsc_always_catchup))
6738                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6739
6740         if (vcpu->arch.apic_attention)
6741                 kvm_lapic_sync_from_vapic(vcpu);
6742
6743         r = kvm_x86_ops->handle_exit(vcpu);
6744         return r;
6745
6746 cancel_injection:
6747         kvm_x86_ops->cancel_injection(vcpu);
6748         if (unlikely(vcpu->arch.apic_attention))
6749                 kvm_lapic_sync_from_vapic(vcpu);
6750 out:
6751         return r;
6752 }
6753
6754 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6755 {
6756         if (!kvm_arch_vcpu_runnable(vcpu) &&
6757             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6758                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6759                 kvm_vcpu_block(vcpu);
6760                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6761
6762                 if (kvm_x86_ops->post_block)
6763                         kvm_x86_ops->post_block(vcpu);
6764
6765                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6766                         return 1;
6767         }
6768
6769         kvm_apic_accept_events(vcpu);
6770         switch(vcpu->arch.mp_state) {
6771         case KVM_MP_STATE_HALTED:
6772                 vcpu->arch.pv.pv_unhalted = false;
6773                 vcpu->arch.mp_state =
6774                         KVM_MP_STATE_RUNNABLE;
6775         case KVM_MP_STATE_RUNNABLE:
6776                 vcpu->arch.apf.halted = false;
6777                 break;
6778         case KVM_MP_STATE_INIT_RECEIVED:
6779                 break;
6780         default:
6781                 return -EINTR;
6782                 break;
6783         }
6784         return 1;
6785 }
6786
6787 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6788 {
6789         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6790                 !vcpu->arch.apf.halted);
6791 }
6792
6793 static int vcpu_run(struct kvm_vcpu *vcpu)
6794 {
6795         int r;
6796         struct kvm *kvm = vcpu->kvm;
6797
6798         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6799
6800         for (;;) {
6801                 if (kvm_vcpu_running(vcpu)) {
6802                         r = vcpu_enter_guest(vcpu);
6803                 } else {
6804                         r = vcpu_block(kvm, vcpu);
6805                 }
6806
6807                 if (r <= 0)
6808                         break;
6809
6810                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6811                 if (kvm_cpu_has_pending_timer(vcpu))
6812                         kvm_inject_pending_timer_irqs(vcpu);
6813
6814                 if (dm_request_for_irq_injection(vcpu) &&
6815                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6816                         r = 0;
6817                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6818                         ++vcpu->stat.request_irq_exits;
6819                         break;
6820                 }
6821
6822                 kvm_check_async_pf_completion(vcpu);
6823
6824                 if (signal_pending(current)) {
6825                         r = -EINTR;
6826                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6827                         ++vcpu->stat.signal_exits;
6828                         break;
6829                 }
6830                 if (need_resched()) {
6831                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6832                         cond_resched();
6833                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6834                 }
6835         }
6836
6837         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6838
6839         return r;
6840 }
6841
6842 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6843 {
6844         int r;
6845         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6846         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6847         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6848         if (r != EMULATE_DONE)
6849                 return 0;
6850         return 1;
6851 }
6852
6853 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6854 {
6855         BUG_ON(!vcpu->arch.pio.count);
6856
6857         return complete_emulated_io(vcpu);
6858 }
6859
6860 /*
6861  * Implements the following, as a state machine:
6862  *
6863  * read:
6864  *   for each fragment
6865  *     for each mmio piece in the fragment
6866  *       write gpa, len
6867  *       exit
6868  *       copy data
6869  *   execute insn
6870  *
6871  * write:
6872  *   for each fragment
6873  *     for each mmio piece in the fragment
6874  *       write gpa, len
6875  *       copy data
6876  *       exit
6877  */
6878 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6879 {
6880         struct kvm_run *run = vcpu->run;
6881         struct kvm_mmio_fragment *frag;
6882         unsigned len;
6883
6884         BUG_ON(!vcpu->mmio_needed);
6885
6886         /* Complete previous fragment */
6887         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6888         len = min(8u, frag->len);
6889         if (!vcpu->mmio_is_write)
6890                 memcpy(frag->data, run->mmio.data, len);
6891
6892         if (frag->len <= 8) {
6893                 /* Switch to the next fragment. */
6894                 frag++;
6895                 vcpu->mmio_cur_fragment++;
6896         } else {
6897                 /* Go forward to the next mmio piece. */
6898                 frag->data += len;
6899                 frag->gpa += len;
6900                 frag->len -= len;
6901         }
6902
6903         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6904                 vcpu->mmio_needed = 0;
6905
6906                 /* FIXME: return into emulator if single-stepping.  */
6907                 if (vcpu->mmio_is_write)
6908                         return 1;
6909                 vcpu->mmio_read_completed = 1;
6910                 return complete_emulated_io(vcpu);
6911         }
6912
6913         run->exit_reason = KVM_EXIT_MMIO;
6914         run->mmio.phys_addr = frag->gpa;
6915         if (vcpu->mmio_is_write)
6916                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6917         run->mmio.len = min(8u, frag->len);
6918         run->mmio.is_write = vcpu->mmio_is_write;
6919         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6920         return 0;
6921 }
6922
6923
6924 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6925 {
6926         struct fpu *fpu = &current->thread.fpu;
6927         int r;
6928         sigset_t sigsaved;
6929
6930         fpu__activate_curr(fpu);
6931
6932         if (vcpu->sigset_active)
6933                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6934
6935         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6936                 kvm_vcpu_block(vcpu);
6937                 kvm_apic_accept_events(vcpu);
6938                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6939                 r = -EAGAIN;
6940                 goto out;
6941         }
6942
6943         /* re-sync apic's tpr */
6944         if (!lapic_in_kernel(vcpu)) {
6945                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6946                         r = -EINVAL;
6947                         goto out;
6948                 }
6949         }
6950
6951         if (unlikely(vcpu->arch.complete_userspace_io)) {
6952                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6953                 vcpu->arch.complete_userspace_io = NULL;
6954                 r = cui(vcpu);
6955                 if (r <= 0)
6956                         goto out;
6957         } else
6958                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6959
6960         r = vcpu_run(vcpu);
6961
6962 out:
6963         post_kvm_run_save(vcpu);
6964         if (vcpu->sigset_active)
6965                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6966
6967         return r;
6968 }
6969
6970 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6971 {
6972         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6973                 /*
6974                  * We are here if userspace calls get_regs() in the middle of
6975                  * instruction emulation. Registers state needs to be copied
6976                  * back from emulation context to vcpu. Userspace shouldn't do
6977                  * that usually, but some bad designed PV devices (vmware
6978                  * backdoor interface) need this to work
6979                  */
6980                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6981                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6982         }
6983         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6984         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6985         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6986         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6987         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6988         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6989         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6990         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6991 #ifdef CONFIG_X86_64
6992         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6993         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6994         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6995         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6996         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6997         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6998         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6999         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7000 #endif
7001
7002         regs->rip = kvm_rip_read(vcpu);
7003         regs->rflags = kvm_get_rflags(vcpu);
7004
7005         return 0;
7006 }
7007
7008 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7009 {
7010         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7011         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7012
7013         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7014         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7015         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7016         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7017         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7018         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7019         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7020         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7021 #ifdef CONFIG_X86_64
7022         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7023         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7024         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7025         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7026         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7027         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7028         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7029         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7030 #endif
7031
7032         kvm_rip_write(vcpu, regs->rip);
7033         kvm_set_rflags(vcpu, regs->rflags);
7034
7035         vcpu->arch.exception.pending = false;
7036
7037         kvm_make_request(KVM_REQ_EVENT, vcpu);
7038
7039         return 0;
7040 }
7041
7042 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7043 {
7044         struct kvm_segment cs;
7045
7046         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7047         *db = cs.db;
7048         *l = cs.l;
7049 }
7050 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7051
7052 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7053                                   struct kvm_sregs *sregs)
7054 {
7055         struct desc_ptr dt;
7056
7057         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7058         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7059         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7060         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7061         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7062         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7063
7064         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7065         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7066
7067         kvm_x86_ops->get_idt(vcpu, &dt);
7068         sregs->idt.limit = dt.size;
7069         sregs->idt.base = dt.address;
7070         kvm_x86_ops->get_gdt(vcpu, &dt);
7071         sregs->gdt.limit = dt.size;
7072         sregs->gdt.base = dt.address;
7073
7074         sregs->cr0 = kvm_read_cr0(vcpu);
7075         sregs->cr2 = vcpu->arch.cr2;
7076         sregs->cr3 = kvm_read_cr3(vcpu);
7077         sregs->cr4 = kvm_read_cr4(vcpu);
7078         sregs->cr8 = kvm_get_cr8(vcpu);
7079         sregs->efer = vcpu->arch.efer;
7080         sregs->apic_base = kvm_get_apic_base(vcpu);
7081
7082         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7083
7084         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7085                 set_bit(vcpu->arch.interrupt.nr,
7086                         (unsigned long *)sregs->interrupt_bitmap);
7087
7088         return 0;
7089 }
7090
7091 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7092                                     struct kvm_mp_state *mp_state)
7093 {
7094         kvm_apic_accept_events(vcpu);
7095         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7096                                         vcpu->arch.pv.pv_unhalted)
7097                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7098         else
7099                 mp_state->mp_state = vcpu->arch.mp_state;
7100
7101         return 0;
7102 }
7103
7104 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7105                                     struct kvm_mp_state *mp_state)
7106 {
7107         if (!lapic_in_kernel(vcpu) &&
7108             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7109                 return -EINVAL;
7110
7111         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7112                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7113                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7114         } else
7115                 vcpu->arch.mp_state = mp_state->mp_state;
7116         kvm_make_request(KVM_REQ_EVENT, vcpu);
7117         return 0;
7118 }
7119
7120 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7121                     int reason, bool has_error_code, u32 error_code)
7122 {
7123         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7124         int ret;
7125
7126         init_emulate_ctxt(vcpu);
7127
7128         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7129                                    has_error_code, error_code);
7130
7131         if (ret)
7132                 return EMULATE_FAIL;
7133
7134         kvm_rip_write(vcpu, ctxt->eip);
7135         kvm_set_rflags(vcpu, ctxt->eflags);
7136         kvm_make_request(KVM_REQ_EVENT, vcpu);
7137         return EMULATE_DONE;
7138 }
7139 EXPORT_SYMBOL_GPL(kvm_task_switch);
7140
7141 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7142                                   struct kvm_sregs *sregs)
7143 {
7144         struct msr_data apic_base_msr;
7145         int mmu_reset_needed = 0;
7146         int pending_vec, max_bits, idx;
7147         struct desc_ptr dt;
7148
7149         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7150                 return -EINVAL;
7151
7152         dt.size = sregs->idt.limit;
7153         dt.address = sregs->idt.base;
7154         kvm_x86_ops->set_idt(vcpu, &dt);
7155         dt.size = sregs->gdt.limit;
7156         dt.address = sregs->gdt.base;
7157         kvm_x86_ops->set_gdt(vcpu, &dt);
7158
7159         vcpu->arch.cr2 = sregs->cr2;
7160         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7161         vcpu->arch.cr3 = sregs->cr3;
7162         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7163
7164         kvm_set_cr8(vcpu, sregs->cr8);
7165
7166         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7167         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7168         apic_base_msr.data = sregs->apic_base;
7169         apic_base_msr.host_initiated = true;
7170         kvm_set_apic_base(vcpu, &apic_base_msr);
7171
7172         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7173         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7174         vcpu->arch.cr0 = sregs->cr0;
7175
7176         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7177         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7178         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7179                 kvm_update_cpuid(vcpu);
7180
7181         idx = srcu_read_lock(&vcpu->kvm->srcu);
7182         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7183                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7184                 mmu_reset_needed = 1;
7185         }
7186         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7187
7188         if (mmu_reset_needed)
7189                 kvm_mmu_reset_context(vcpu);
7190
7191         max_bits = KVM_NR_INTERRUPTS;
7192         pending_vec = find_first_bit(
7193                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7194         if (pending_vec < max_bits) {
7195                 kvm_queue_interrupt(vcpu, pending_vec, false);
7196                 pr_debug("Set back pending irq %d\n", pending_vec);
7197         }
7198
7199         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7200         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7201         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7202         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7203         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7204         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7205
7206         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7207         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7208
7209         update_cr8_intercept(vcpu);
7210
7211         /* Older userspace won't unhalt the vcpu on reset. */
7212         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7213             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7214             !is_protmode(vcpu))
7215                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7216
7217         kvm_make_request(KVM_REQ_EVENT, vcpu);
7218
7219         return 0;
7220 }
7221
7222 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7223                                         struct kvm_guest_debug *dbg)
7224 {
7225         unsigned long rflags;
7226         int i, r;
7227
7228         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7229                 r = -EBUSY;
7230                 if (vcpu->arch.exception.pending)
7231                         goto out;
7232                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7233                         kvm_queue_exception(vcpu, DB_VECTOR);
7234                 else
7235                         kvm_queue_exception(vcpu, BP_VECTOR);
7236         }
7237
7238         /*
7239          * Read rflags as long as potentially injected trace flags are still
7240          * filtered out.
7241          */
7242         rflags = kvm_get_rflags(vcpu);
7243
7244         vcpu->guest_debug = dbg->control;
7245         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7246                 vcpu->guest_debug = 0;
7247
7248         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7249                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7250                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7251                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7252         } else {
7253                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7254                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7255         }
7256         kvm_update_dr7(vcpu);
7257
7258         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7259                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7260                         get_segment_base(vcpu, VCPU_SREG_CS);
7261
7262         /*
7263          * Trigger an rflags update that will inject or remove the trace
7264          * flags.
7265          */
7266         kvm_set_rflags(vcpu, rflags);
7267
7268         kvm_x86_ops->update_bp_intercept(vcpu);
7269
7270         r = 0;
7271
7272 out:
7273
7274         return r;
7275 }
7276
7277 /*
7278  * Translate a guest virtual address to a guest physical address.
7279  */
7280 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7281                                     struct kvm_translation *tr)
7282 {
7283         unsigned long vaddr = tr->linear_address;
7284         gpa_t gpa;
7285         int idx;
7286
7287         idx = srcu_read_lock(&vcpu->kvm->srcu);
7288         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7289         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7290         tr->physical_address = gpa;
7291         tr->valid = gpa != UNMAPPED_GVA;
7292         tr->writeable = 1;
7293         tr->usermode = 0;
7294
7295         return 0;
7296 }
7297
7298 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7299 {
7300         struct fxregs_state *fxsave =
7301                         &vcpu->arch.guest_fpu.state.fxsave;
7302
7303         memcpy(fpu->fpr, fxsave->st_space, 128);
7304         fpu->fcw = fxsave->cwd;
7305         fpu->fsw = fxsave->swd;
7306         fpu->ftwx = fxsave->twd;
7307         fpu->last_opcode = fxsave->fop;
7308         fpu->last_ip = fxsave->rip;
7309         fpu->last_dp = fxsave->rdp;
7310         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7311
7312         return 0;
7313 }
7314
7315 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7316 {
7317         struct fxregs_state *fxsave =
7318                         &vcpu->arch.guest_fpu.state.fxsave;
7319
7320         memcpy(fxsave->st_space, fpu->fpr, 128);
7321         fxsave->cwd = fpu->fcw;
7322         fxsave->swd = fpu->fsw;
7323         fxsave->twd = fpu->ftwx;
7324         fxsave->fop = fpu->last_opcode;
7325         fxsave->rip = fpu->last_ip;
7326         fxsave->rdp = fpu->last_dp;
7327         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7328
7329         return 0;
7330 }
7331
7332 static void fx_init(struct kvm_vcpu *vcpu)
7333 {
7334         fpstate_init(&vcpu->arch.guest_fpu.state);
7335         if (boot_cpu_has(X86_FEATURE_XSAVES))
7336                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7337                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7338
7339         /*
7340          * Ensure guest xcr0 is valid for loading
7341          */
7342         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7343
7344         vcpu->arch.cr0 |= X86_CR0_ET;
7345 }
7346
7347 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7348 {
7349         if (vcpu->guest_fpu_loaded)
7350                 return;
7351
7352         /*
7353          * Restore all possible states in the guest,
7354          * and assume host would use all available bits.
7355          * Guest xcr0 would be loaded later.
7356          */
7357         vcpu->guest_fpu_loaded = 1;
7358         __kernel_fpu_begin();
7359         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7360         trace_kvm_fpu(1);
7361 }
7362
7363 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7364 {
7365         if (!vcpu->guest_fpu_loaded) {
7366                 vcpu->fpu_counter = 0;
7367                 return;
7368         }
7369
7370         vcpu->guest_fpu_loaded = 0;
7371         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7372         __kernel_fpu_end();
7373         ++vcpu->stat.fpu_reload;
7374         /*
7375          * If using eager FPU mode, or if the guest is a frequent user
7376          * of the FPU, just leave the FPU active for next time.
7377          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7378          * the FPU in bursts will revert to loading it on demand.
7379          */
7380         if (!use_eager_fpu()) {
7381                 if (++vcpu->fpu_counter < 5)
7382                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7383         }
7384         trace_kvm_fpu(0);
7385 }
7386
7387 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7388 {
7389         kvmclock_reset(vcpu);
7390
7391         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7392         kvm_x86_ops->vcpu_free(vcpu);
7393 }
7394
7395 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7396                                                 unsigned int id)
7397 {
7398         struct kvm_vcpu *vcpu;
7399
7400         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7401                 printk_once(KERN_WARNING
7402                 "kvm: SMP vm created on host with unstable TSC; "
7403                 "guest TSC will not be reliable\n");
7404
7405         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7406
7407         return vcpu;
7408 }
7409
7410 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7411 {
7412         int r;
7413
7414         kvm_vcpu_mtrr_init(vcpu);
7415         r = vcpu_load(vcpu);
7416         if (r)
7417                 return r;
7418         kvm_vcpu_reset(vcpu, false);
7419         kvm_mmu_setup(vcpu);
7420         vcpu_put(vcpu);
7421         return r;
7422 }
7423
7424 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7425 {
7426         struct msr_data msr;
7427         struct kvm *kvm = vcpu->kvm;
7428
7429         if (vcpu_load(vcpu))
7430                 return;
7431         msr.data = 0x0;
7432         msr.index = MSR_IA32_TSC;
7433         msr.host_initiated = true;
7434         kvm_write_tsc(vcpu, &msr);
7435         vcpu_put(vcpu);
7436
7437         if (!kvmclock_periodic_sync)
7438                 return;
7439
7440         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7441                                         KVMCLOCK_SYNC_PERIOD);
7442 }
7443
7444 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7445 {
7446         int r;
7447         vcpu->arch.apf.msr_val = 0;
7448
7449         r = vcpu_load(vcpu);
7450         BUG_ON(r);
7451         kvm_mmu_unload(vcpu);
7452         vcpu_put(vcpu);
7453
7454         kvm_x86_ops->vcpu_free(vcpu);
7455 }
7456
7457 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7458 {
7459         vcpu->arch.hflags = 0;
7460
7461         vcpu->arch.smi_pending = 0;
7462         atomic_set(&vcpu->arch.nmi_queued, 0);
7463         vcpu->arch.nmi_pending = 0;
7464         vcpu->arch.nmi_injected = false;
7465         kvm_clear_interrupt_queue(vcpu);
7466         kvm_clear_exception_queue(vcpu);
7467
7468         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7469         kvm_update_dr0123(vcpu);
7470         vcpu->arch.dr6 = DR6_INIT;
7471         kvm_update_dr6(vcpu);
7472         vcpu->arch.dr7 = DR7_FIXED_1;
7473         kvm_update_dr7(vcpu);
7474
7475         vcpu->arch.cr2 = 0;
7476
7477         kvm_make_request(KVM_REQ_EVENT, vcpu);
7478         vcpu->arch.apf.msr_val = 0;
7479         vcpu->arch.st.msr_val = 0;
7480
7481         kvmclock_reset(vcpu);
7482
7483         kvm_clear_async_pf_completion_queue(vcpu);
7484         kvm_async_pf_hash_reset(vcpu);
7485         vcpu->arch.apf.halted = false;
7486
7487         if (!init_event) {
7488                 kvm_pmu_reset(vcpu);
7489                 vcpu->arch.smbase = 0x30000;
7490         }
7491
7492         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7493         vcpu->arch.regs_avail = ~0;
7494         vcpu->arch.regs_dirty = ~0;
7495
7496         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7497 }
7498
7499 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7500 {
7501         struct kvm_segment cs;
7502
7503         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7504         cs.selector = vector << 8;
7505         cs.base = vector << 12;
7506         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7507         kvm_rip_write(vcpu, 0);
7508 }
7509
7510 int kvm_arch_hardware_enable(void)
7511 {
7512         struct kvm *kvm;
7513         struct kvm_vcpu *vcpu;
7514         int i;
7515         int ret;
7516         u64 local_tsc;
7517         u64 max_tsc = 0;
7518         bool stable, backwards_tsc = false;
7519
7520         kvm_shared_msr_cpu_online();
7521         ret = kvm_x86_ops->hardware_enable();
7522         if (ret != 0)
7523                 return ret;
7524
7525         local_tsc = rdtsc();
7526         stable = !check_tsc_unstable();
7527         list_for_each_entry(kvm, &vm_list, vm_list) {
7528                 kvm_for_each_vcpu(i, vcpu, kvm) {
7529                         if (!stable && vcpu->cpu == smp_processor_id())
7530                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7531                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7532                                 backwards_tsc = true;
7533                                 if (vcpu->arch.last_host_tsc > max_tsc)
7534                                         max_tsc = vcpu->arch.last_host_tsc;
7535                         }
7536                 }
7537         }
7538
7539         /*
7540          * Sometimes, even reliable TSCs go backwards.  This happens on
7541          * platforms that reset TSC during suspend or hibernate actions, but
7542          * maintain synchronization.  We must compensate.  Fortunately, we can
7543          * detect that condition here, which happens early in CPU bringup,
7544          * before any KVM threads can be running.  Unfortunately, we can't
7545          * bring the TSCs fully up to date with real time, as we aren't yet far
7546          * enough into CPU bringup that we know how much real time has actually
7547          * elapsed; our helper function, get_kernel_ns() will be using boot
7548          * variables that haven't been updated yet.
7549          *
7550          * So we simply find the maximum observed TSC above, then record the
7551          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7552          * the adjustment will be applied.  Note that we accumulate
7553          * adjustments, in case multiple suspend cycles happen before some VCPU
7554          * gets a chance to run again.  In the event that no KVM threads get a
7555          * chance to run, we will miss the entire elapsed period, as we'll have
7556          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7557          * loose cycle time.  This isn't too big a deal, since the loss will be
7558          * uniform across all VCPUs (not to mention the scenario is extremely
7559          * unlikely). It is possible that a second hibernate recovery happens
7560          * much faster than a first, causing the observed TSC here to be
7561          * smaller; this would require additional padding adjustment, which is
7562          * why we set last_host_tsc to the local tsc observed here.
7563          *
7564          * N.B. - this code below runs only on platforms with reliable TSC,
7565          * as that is the only way backwards_tsc is set above.  Also note
7566          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7567          * have the same delta_cyc adjustment applied if backwards_tsc
7568          * is detected.  Note further, this adjustment is only done once,
7569          * as we reset last_host_tsc on all VCPUs to stop this from being
7570          * called multiple times (one for each physical CPU bringup).
7571          *
7572          * Platforms with unreliable TSCs don't have to deal with this, they
7573          * will be compensated by the logic in vcpu_load, which sets the TSC to
7574          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7575          * guarantee that they stay in perfect synchronization.
7576          */
7577         if (backwards_tsc) {
7578                 u64 delta_cyc = max_tsc - local_tsc;
7579                 backwards_tsc_observed = true;
7580                 list_for_each_entry(kvm, &vm_list, vm_list) {
7581                         kvm_for_each_vcpu(i, vcpu, kvm) {
7582                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7583                                 vcpu->arch.last_host_tsc = local_tsc;
7584                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7585                         }
7586
7587                         /*
7588                          * We have to disable TSC offset matching.. if you were
7589                          * booting a VM while issuing an S4 host suspend....
7590                          * you may have some problem.  Solving this issue is
7591                          * left as an exercise to the reader.
7592                          */
7593                         kvm->arch.last_tsc_nsec = 0;
7594                         kvm->arch.last_tsc_write = 0;
7595                 }
7596
7597         }
7598         return 0;
7599 }
7600
7601 void kvm_arch_hardware_disable(void)
7602 {
7603         kvm_x86_ops->hardware_disable();
7604         drop_user_return_notifiers();
7605 }
7606
7607 int kvm_arch_hardware_setup(void)
7608 {
7609         int r;
7610
7611         r = kvm_x86_ops->hardware_setup();
7612         if (r != 0)
7613                 return r;
7614
7615         if (kvm_has_tsc_control) {
7616                 /*
7617                  * Make sure the user can only configure tsc_khz values that
7618                  * fit into a signed integer.
7619                  * A min value is not calculated needed because it will always
7620                  * be 1 on all machines.
7621                  */
7622                 u64 max = min(0x7fffffffULL,
7623                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7624                 kvm_max_guest_tsc_khz = max;
7625
7626                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7627         }
7628
7629         kvm_init_msr_list();
7630         return 0;
7631 }
7632
7633 void kvm_arch_hardware_unsetup(void)
7634 {
7635         kvm_x86_ops->hardware_unsetup();
7636 }
7637
7638 void kvm_arch_check_processor_compat(void *rtn)
7639 {
7640         kvm_x86_ops->check_processor_compatibility(rtn);
7641 }
7642
7643 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7644 {
7645         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7646 }
7647 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7648
7649 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7650 {
7651         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7652 }
7653
7654 struct static_key kvm_no_apic_vcpu __read_mostly;
7655 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7656
7657 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7658 {
7659         struct page *page;
7660         struct kvm *kvm;
7661         int r;
7662
7663         BUG_ON(vcpu->kvm == NULL);
7664         kvm = vcpu->kvm;
7665
7666         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7667         vcpu->arch.pv.pv_unhalted = false;
7668         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7669         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7670                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7671         else
7672                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7673
7674         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7675         if (!page) {
7676                 r = -ENOMEM;
7677                 goto fail;
7678         }
7679         vcpu->arch.pio_data = page_address(page);
7680
7681         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7682
7683         r = kvm_mmu_create(vcpu);
7684         if (r < 0)
7685                 goto fail_free_pio_data;
7686
7687         if (irqchip_in_kernel(kvm)) {
7688                 r = kvm_create_lapic(vcpu);
7689                 if (r < 0)
7690                         goto fail_mmu_destroy;
7691         } else
7692                 static_key_slow_inc(&kvm_no_apic_vcpu);
7693
7694         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7695                                        GFP_KERNEL);
7696         if (!vcpu->arch.mce_banks) {
7697                 r = -ENOMEM;
7698                 goto fail_free_lapic;
7699         }
7700         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7701
7702         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7703                 r = -ENOMEM;
7704                 goto fail_free_mce_banks;
7705         }
7706
7707         fx_init(vcpu);
7708
7709         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7710         vcpu->arch.pv_time_enabled = false;
7711
7712         vcpu->arch.guest_supported_xcr0 = 0;
7713         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7714
7715         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7716
7717         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7718
7719         kvm_async_pf_hash_reset(vcpu);
7720         kvm_pmu_init(vcpu);
7721
7722         vcpu->arch.pending_external_vector = -1;
7723
7724         kvm_hv_vcpu_init(vcpu);
7725
7726         return 0;
7727
7728 fail_free_mce_banks:
7729         kfree(vcpu->arch.mce_banks);
7730 fail_free_lapic:
7731         kvm_free_lapic(vcpu);
7732 fail_mmu_destroy:
7733         kvm_mmu_destroy(vcpu);
7734 fail_free_pio_data:
7735         free_page((unsigned long)vcpu->arch.pio_data);
7736 fail:
7737         return r;
7738 }
7739
7740 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7741 {
7742         int idx;
7743
7744         kvm_hv_vcpu_uninit(vcpu);
7745         kvm_pmu_destroy(vcpu);
7746         kfree(vcpu->arch.mce_banks);
7747         kvm_free_lapic(vcpu);
7748         idx = srcu_read_lock(&vcpu->kvm->srcu);
7749         kvm_mmu_destroy(vcpu);
7750         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7751         free_page((unsigned long)vcpu->arch.pio_data);
7752         if (!lapic_in_kernel(vcpu))
7753                 static_key_slow_dec(&kvm_no_apic_vcpu);
7754 }
7755
7756 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7757 {
7758         kvm_x86_ops->sched_in(vcpu, cpu);
7759 }
7760
7761 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7762 {
7763         if (type)
7764                 return -EINVAL;
7765
7766         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7767         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7768         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7769         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7770         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7771
7772         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7773         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7774         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7775         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7776                 &kvm->arch.irq_sources_bitmap);
7777
7778         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7779         mutex_init(&kvm->arch.apic_map_lock);
7780         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7781
7782         kvm->arch.kvmclock_offset = -get_kernel_ns();
7783         pvclock_update_vm_gtod_copy(kvm);
7784
7785         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7786         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7787
7788         kvm_page_track_init(kvm);
7789         kvm_mmu_init_vm(kvm);
7790
7791         if (kvm_x86_ops->vm_init)
7792                 return kvm_x86_ops->vm_init(kvm);
7793
7794         return 0;
7795 }
7796
7797 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7798 {
7799         int r;
7800         r = vcpu_load(vcpu);
7801         BUG_ON(r);
7802         kvm_mmu_unload(vcpu);
7803         vcpu_put(vcpu);
7804 }
7805
7806 static void kvm_free_vcpus(struct kvm *kvm)
7807 {
7808         unsigned int i;
7809         struct kvm_vcpu *vcpu;
7810
7811         /*
7812          * Unpin any mmu pages first.
7813          */
7814         kvm_for_each_vcpu(i, vcpu, kvm) {
7815                 kvm_clear_async_pf_completion_queue(vcpu);
7816                 kvm_unload_vcpu_mmu(vcpu);
7817         }
7818         kvm_for_each_vcpu(i, vcpu, kvm)
7819                 kvm_arch_vcpu_free(vcpu);
7820
7821         mutex_lock(&kvm->lock);
7822         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7823                 kvm->vcpus[i] = NULL;
7824
7825         atomic_set(&kvm->online_vcpus, 0);
7826         mutex_unlock(&kvm->lock);
7827 }
7828
7829 void kvm_arch_sync_events(struct kvm *kvm)
7830 {
7831         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7832         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7833         kvm_free_all_assigned_devices(kvm);
7834         kvm_free_pit(kvm);
7835 }
7836
7837 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7838 {
7839         int i, r;
7840         unsigned long hva;
7841         struct kvm_memslots *slots = kvm_memslots(kvm);
7842         struct kvm_memory_slot *slot, old;
7843
7844         /* Called with kvm->slots_lock held.  */
7845         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7846                 return -EINVAL;
7847
7848         slot = id_to_memslot(slots, id);
7849         if (size) {
7850                 if (slot->npages)
7851                         return -EEXIST;
7852
7853                 /*
7854                  * MAP_SHARED to prevent internal slot pages from being moved
7855                  * by fork()/COW.
7856                  */
7857                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7858                               MAP_SHARED | MAP_ANONYMOUS, 0);
7859                 if (IS_ERR((void *)hva))
7860                         return PTR_ERR((void *)hva);
7861         } else {
7862                 if (!slot->npages)
7863                         return 0;
7864
7865                 hva = 0;
7866         }
7867
7868         old = *slot;
7869         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7870                 struct kvm_userspace_memory_region m;
7871
7872                 m.slot = id | (i << 16);
7873                 m.flags = 0;
7874                 m.guest_phys_addr = gpa;
7875                 m.userspace_addr = hva;
7876                 m.memory_size = size;
7877                 r = __kvm_set_memory_region(kvm, &m);
7878                 if (r < 0)
7879                         return r;
7880         }
7881
7882         if (!size) {
7883                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7884                 WARN_ON(r < 0);
7885         }
7886
7887         return 0;
7888 }
7889 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7890
7891 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7892 {
7893         int r;
7894
7895         mutex_lock(&kvm->slots_lock);
7896         r = __x86_set_memory_region(kvm, id, gpa, size);
7897         mutex_unlock(&kvm->slots_lock);
7898
7899         return r;
7900 }
7901 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7902
7903 void kvm_arch_destroy_vm(struct kvm *kvm)
7904 {
7905         if (current->mm == kvm->mm) {
7906                 /*
7907                  * Free memory regions allocated on behalf of userspace,
7908                  * unless the the memory map has changed due to process exit
7909                  * or fd copying.
7910                  */
7911                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7912                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7913                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7914         }
7915         if (kvm_x86_ops->vm_destroy)
7916                 kvm_x86_ops->vm_destroy(kvm);
7917         kvm_iommu_unmap_guest(kvm);
7918         kfree(kvm->arch.vpic);
7919         kfree(kvm->arch.vioapic);
7920         kvm_free_vcpus(kvm);
7921         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7922         kvm_mmu_uninit_vm(kvm);
7923 }
7924
7925 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7926                            struct kvm_memory_slot *dont)
7927 {
7928         int i;
7929
7930         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7931                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7932                         kvfree(free->arch.rmap[i]);
7933                         free->arch.rmap[i] = NULL;
7934                 }
7935                 if (i == 0)
7936                         continue;
7937
7938                 if (!dont || free->arch.lpage_info[i - 1] !=
7939                              dont->arch.lpage_info[i - 1]) {
7940                         kvfree(free->arch.lpage_info[i - 1]);
7941                         free->arch.lpage_info[i - 1] = NULL;
7942                 }
7943         }
7944
7945         kvm_page_track_free_memslot(free, dont);
7946 }
7947
7948 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7949                             unsigned long npages)
7950 {
7951         int i;
7952
7953         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7954                 struct kvm_lpage_info *linfo;
7955                 unsigned long ugfn;
7956                 int lpages;
7957                 int level = i + 1;
7958
7959                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7960                                       slot->base_gfn, level) + 1;
7961
7962                 slot->arch.rmap[i] =
7963                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7964                 if (!slot->arch.rmap[i])
7965                         goto out_free;
7966                 if (i == 0)
7967                         continue;
7968
7969                 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
7970                 if (!linfo)
7971                         goto out_free;
7972
7973                 slot->arch.lpage_info[i - 1] = linfo;
7974
7975                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7976                         linfo[0].disallow_lpage = 1;
7977                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7978                         linfo[lpages - 1].disallow_lpage = 1;
7979                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7980                 /*
7981                  * If the gfn and userspace address are not aligned wrt each
7982                  * other, or if explicitly asked to, disable large page
7983                  * support for this slot
7984                  */
7985                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7986                     !kvm_largepages_enabled()) {
7987                         unsigned long j;
7988
7989                         for (j = 0; j < lpages; ++j)
7990                                 linfo[j].disallow_lpage = 1;
7991                 }
7992         }
7993
7994         if (kvm_page_track_create_memslot(slot, npages))
7995                 goto out_free;
7996
7997         return 0;
7998
7999 out_free:
8000         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8001                 kvfree(slot->arch.rmap[i]);
8002                 slot->arch.rmap[i] = NULL;
8003                 if (i == 0)
8004                         continue;
8005
8006                 kvfree(slot->arch.lpage_info[i - 1]);
8007                 slot->arch.lpage_info[i - 1] = NULL;
8008         }
8009         return -ENOMEM;
8010 }
8011
8012 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8013 {
8014         /*
8015          * memslots->generation has been incremented.
8016          * mmio generation may have reached its maximum value.
8017          */
8018         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8019 }
8020
8021 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8022                                 struct kvm_memory_slot *memslot,
8023                                 const struct kvm_userspace_memory_region *mem,
8024                                 enum kvm_mr_change change)
8025 {
8026         return 0;
8027 }
8028
8029 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8030                                      struct kvm_memory_slot *new)
8031 {
8032         /* Still write protect RO slot */
8033         if (new->flags & KVM_MEM_READONLY) {
8034                 kvm_mmu_slot_remove_write_access(kvm, new);
8035                 return;
8036         }
8037
8038         /*
8039          * Call kvm_x86_ops dirty logging hooks when they are valid.
8040          *
8041          * kvm_x86_ops->slot_disable_log_dirty is called when:
8042          *
8043          *  - KVM_MR_CREATE with dirty logging is disabled
8044          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8045          *
8046          * The reason is, in case of PML, we need to set D-bit for any slots
8047          * with dirty logging disabled in order to eliminate unnecessary GPA
8048          * logging in PML buffer (and potential PML buffer full VMEXT). This
8049          * guarantees leaving PML enabled during guest's lifetime won't have
8050          * any additonal overhead from PML when guest is running with dirty
8051          * logging disabled for memory slots.
8052          *
8053          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8054          * to dirty logging mode.
8055          *
8056          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8057          *
8058          * In case of write protect:
8059          *
8060          * Write protect all pages for dirty logging.
8061          *
8062          * All the sptes including the large sptes which point to this
8063          * slot are set to readonly. We can not create any new large
8064          * spte on this slot until the end of the logging.
8065          *
8066          * See the comments in fast_page_fault().
8067          */
8068         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8069                 if (kvm_x86_ops->slot_enable_log_dirty)
8070                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8071                 else
8072                         kvm_mmu_slot_remove_write_access(kvm, new);
8073         } else {
8074                 if (kvm_x86_ops->slot_disable_log_dirty)
8075                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8076         }
8077 }
8078
8079 void kvm_arch_commit_memory_region(struct kvm *kvm,
8080                                 const struct kvm_userspace_memory_region *mem,
8081                                 const struct kvm_memory_slot *old,
8082                                 const struct kvm_memory_slot *new,
8083                                 enum kvm_mr_change change)
8084 {
8085         int nr_mmu_pages = 0;
8086
8087         if (!kvm->arch.n_requested_mmu_pages)
8088                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8089
8090         if (nr_mmu_pages)
8091                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8092
8093         /*
8094          * Dirty logging tracks sptes in 4k granularity, meaning that large
8095          * sptes have to be split.  If live migration is successful, the guest
8096          * in the source machine will be destroyed and large sptes will be
8097          * created in the destination. However, if the guest continues to run
8098          * in the source machine (for example if live migration fails), small
8099          * sptes will remain around and cause bad performance.
8100          *
8101          * Scan sptes if dirty logging has been stopped, dropping those
8102          * which can be collapsed into a single large-page spte.  Later
8103          * page faults will create the large-page sptes.
8104          */
8105         if ((change != KVM_MR_DELETE) &&
8106                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8107                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8108                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8109
8110         /*
8111          * Set up write protection and/or dirty logging for the new slot.
8112          *
8113          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8114          * been zapped so no dirty logging staff is needed for old slot. For
8115          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8116          * new and it's also covered when dealing with the new slot.
8117          *
8118          * FIXME: const-ify all uses of struct kvm_memory_slot.
8119          */
8120         if (change != KVM_MR_DELETE)
8121                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8122 }
8123
8124 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8125 {
8126         kvm_mmu_invalidate_zap_all_pages(kvm);
8127 }
8128
8129 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8130                                    struct kvm_memory_slot *slot)
8131 {
8132         kvm_mmu_invalidate_zap_all_pages(kvm);
8133 }
8134
8135 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8136 {
8137         if (!list_empty_careful(&vcpu->async_pf.done))
8138                 return true;
8139
8140         if (kvm_apic_has_events(vcpu))
8141                 return true;
8142
8143         if (vcpu->arch.pv.pv_unhalted)
8144                 return true;
8145
8146         if (atomic_read(&vcpu->arch.nmi_queued))
8147                 return true;
8148
8149         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8150                 return true;
8151
8152         if (kvm_arch_interrupt_allowed(vcpu) &&
8153             kvm_cpu_has_interrupt(vcpu))
8154                 return true;
8155
8156         if (kvm_hv_has_stimer_pending(vcpu))
8157                 return true;
8158
8159         return false;
8160 }
8161
8162 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8163 {
8164         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8165                 kvm_x86_ops->check_nested_events(vcpu, false);
8166
8167         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8168 }
8169
8170 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8171 {
8172         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8173 }
8174
8175 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8176 {
8177         return kvm_x86_ops->interrupt_allowed(vcpu);
8178 }
8179
8180 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8181 {
8182         if (is_64_bit_mode(vcpu))
8183                 return kvm_rip_read(vcpu);
8184         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8185                      kvm_rip_read(vcpu));
8186 }
8187 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8188
8189 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8190 {
8191         return kvm_get_linear_rip(vcpu) == linear_rip;
8192 }
8193 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8194
8195 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8196 {
8197         unsigned long rflags;
8198
8199         rflags = kvm_x86_ops->get_rflags(vcpu);
8200         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8201                 rflags &= ~X86_EFLAGS_TF;
8202         return rflags;
8203 }
8204 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8205
8206 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8207 {
8208         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8209             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8210                 rflags |= X86_EFLAGS_TF;
8211         kvm_x86_ops->set_rflags(vcpu, rflags);
8212 }
8213
8214 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8215 {
8216         __kvm_set_rflags(vcpu, rflags);
8217         kvm_make_request(KVM_REQ_EVENT, vcpu);
8218 }
8219 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8220
8221 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8222 {
8223         int r;
8224
8225         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8226               work->wakeup_all)
8227                 return;
8228
8229         r = kvm_mmu_reload(vcpu);
8230         if (unlikely(r))
8231                 return;
8232
8233         if (!vcpu->arch.mmu.direct_map &&
8234               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8235                 return;
8236
8237         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8238 }
8239
8240 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8241 {
8242         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8243 }
8244
8245 static inline u32 kvm_async_pf_next_probe(u32 key)
8246 {
8247         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8248 }
8249
8250 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8251 {
8252         u32 key = kvm_async_pf_hash_fn(gfn);
8253
8254         while (vcpu->arch.apf.gfns[key] != ~0)
8255                 key = kvm_async_pf_next_probe(key);
8256
8257         vcpu->arch.apf.gfns[key] = gfn;
8258 }
8259
8260 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8261 {
8262         int i;
8263         u32 key = kvm_async_pf_hash_fn(gfn);
8264
8265         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8266                      (vcpu->arch.apf.gfns[key] != gfn &&
8267                       vcpu->arch.apf.gfns[key] != ~0); i++)
8268                 key = kvm_async_pf_next_probe(key);
8269
8270         return key;
8271 }
8272
8273 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8274 {
8275         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8276 }
8277
8278 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8279 {
8280         u32 i, j, k;
8281
8282         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8283         while (true) {
8284                 vcpu->arch.apf.gfns[i] = ~0;
8285                 do {
8286                         j = kvm_async_pf_next_probe(j);
8287                         if (vcpu->arch.apf.gfns[j] == ~0)
8288                                 return;
8289                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8290                         /*
8291                          * k lies cyclically in ]i,j]
8292                          * |    i.k.j |
8293                          * |....j i.k.| or  |.k..j i...|
8294                          */
8295                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8296                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8297                 i = j;
8298         }
8299 }
8300
8301 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8302 {
8303
8304         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8305                                       sizeof(val));
8306 }
8307
8308 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8309                                      struct kvm_async_pf *work)
8310 {
8311         struct x86_exception fault;
8312
8313         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8314         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8315
8316         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8317             (vcpu->arch.apf.send_user_only &&
8318              kvm_x86_ops->get_cpl(vcpu) == 0))
8319                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8320         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8321                 fault.vector = PF_VECTOR;
8322                 fault.error_code_valid = true;
8323                 fault.error_code = 0;
8324                 fault.nested_page_fault = false;
8325                 fault.address = work->arch.token;
8326                 kvm_inject_page_fault(vcpu, &fault);
8327         }
8328 }
8329
8330 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8331                                  struct kvm_async_pf *work)
8332 {
8333         struct x86_exception fault;
8334
8335         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8336         if (work->wakeup_all)
8337                 work->arch.token = ~0; /* broadcast wakeup */
8338         else
8339                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8340
8341         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8342             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8343                 fault.vector = PF_VECTOR;
8344                 fault.error_code_valid = true;
8345                 fault.error_code = 0;
8346                 fault.nested_page_fault = false;
8347                 fault.address = work->arch.token;
8348                 kvm_inject_page_fault(vcpu, &fault);
8349         }
8350         vcpu->arch.apf.halted = false;
8351         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8352 }
8353
8354 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8355 {
8356         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8357                 return true;
8358         else
8359                 return !kvm_event_needs_reinjection(vcpu) &&
8360                         kvm_x86_ops->interrupt_allowed(vcpu);
8361 }
8362
8363 void kvm_arch_start_assignment(struct kvm *kvm)
8364 {
8365         atomic_inc(&kvm->arch.assigned_device_count);
8366 }
8367 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8368
8369 void kvm_arch_end_assignment(struct kvm *kvm)
8370 {
8371         atomic_dec(&kvm->arch.assigned_device_count);
8372 }
8373 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8374
8375 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8376 {
8377         return atomic_read(&kvm->arch.assigned_device_count);
8378 }
8379 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8380
8381 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8382 {
8383         atomic_inc(&kvm->arch.noncoherent_dma_count);
8384 }
8385 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8386
8387 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8388 {
8389         atomic_dec(&kvm->arch.noncoherent_dma_count);
8390 }
8391 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8392
8393 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8394 {
8395         return atomic_read(&kvm->arch.noncoherent_dma_count);
8396 }
8397 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8398
8399 bool kvm_arch_has_irq_bypass(void)
8400 {
8401         return kvm_x86_ops->update_pi_irte != NULL;
8402 }
8403
8404 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8405                                       struct irq_bypass_producer *prod)
8406 {
8407         struct kvm_kernel_irqfd *irqfd =
8408                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8409
8410         irqfd->producer = prod;
8411
8412         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8413                                            prod->irq, irqfd->gsi, 1);
8414 }
8415
8416 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8417                                       struct irq_bypass_producer *prod)
8418 {
8419         int ret;
8420         struct kvm_kernel_irqfd *irqfd =
8421                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8422
8423         WARN_ON(irqfd->producer != prod);
8424         irqfd->producer = NULL;
8425
8426         /*
8427          * When producer of consumer is unregistered, we change back to
8428          * remapped mode, so we can re-use the current implementation
8429          * when the irq is masked/disabled or the consumer side (KVM
8430          * int this case doesn't want to receive the interrupts.
8431         */
8432         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8433         if (ret)
8434                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8435                        " fails: %d\n", irqfd->consumer.token, ret);
8436 }
8437
8438 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8439                                    uint32_t guest_irq, bool set)
8440 {
8441         if (!kvm_x86_ops->update_pi_irte)
8442                 return -EINVAL;
8443
8444         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8445 }
8446
8447 bool kvm_vector_hashing_enabled(void)
8448 {
8449         return vector_hashing;
8450 }
8451 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8452
8453 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8454 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8455 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8456 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8457 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8458 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8459 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8460 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8461 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8462 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8463 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8464 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8465 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8466 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8467 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8468 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8469 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8470 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8471 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);