2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
10 #include <linux/interrupt.h>
11 #include <linux/seq_file.h>
12 #include <linux/debugfs.h>
13 #include <linux/pfn.h>
14 #include <linux/percpu.h>
15 #include <linux/gfp.h>
16 #include <linux/pci.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
29 * The current flushing context - we pass it instead of 5 arguments:
39 unsigned force_split : 1;
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
50 static DEFINE_SPINLOCK(cpa_lock);
52 #define CPA_FLUSHTLB 1
54 #define CPA_PAGES_ARRAY 4
57 static unsigned long direct_pages_count[PG_LEVEL_NUM];
59 void update_page_count(int level, unsigned long pages)
61 /* Protect against CPA */
63 direct_pages_count[level] += pages;
64 spin_unlock(&pgd_lock);
67 static void split_page_count(int level)
69 direct_pages_count[level]--;
70 direct_pages_count[level - 1] += PTRS_PER_PTE;
73 void arch_report_meminfo(struct seq_file *m)
75 seq_printf(m, "DirectMap4k: %8lu kB\n",
76 direct_pages_count[PG_LEVEL_4K] << 2);
77 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
78 seq_printf(m, "DirectMap2M: %8lu kB\n",
79 direct_pages_count[PG_LEVEL_2M] << 11);
81 seq_printf(m, "DirectMap4M: %8lu kB\n",
82 direct_pages_count[PG_LEVEL_2M] << 12);
86 seq_printf(m, "DirectMap1G: %8lu kB\n",
87 direct_pages_count[PG_LEVEL_1G] << 20);
91 static inline void split_page_count(int level) { }
96 static inline unsigned long highmap_start_pfn(void)
98 return __pa_symbol(_text) >> PAGE_SHIFT;
101 static inline unsigned long highmap_end_pfn(void)
103 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
108 #ifdef CONFIG_DEBUG_PAGEALLOC
109 # define debug_pagealloc 1
111 # define debug_pagealloc 0
115 within(unsigned long addr, unsigned long start, unsigned long end)
117 return addr >= start && addr < end;
125 * clflush_cache_range - flush a cache range with clflush
126 * @vaddr: virtual start address
127 * @size: number of bytes to flush
129 * clflushopt is an unordered instruction which needs fencing with mfence or
130 * sfence to avoid ordering issues.
132 void clflush_cache_range(void *vaddr, unsigned int size)
134 void *vend = vaddr + size - 1;
138 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
141 * Flush any possible final partial cacheline:
147 EXPORT_SYMBOL_GPL(clflush_cache_range);
149 static void __cpa_flush_all(void *arg)
151 unsigned long cache = (unsigned long)arg;
154 * Flush all to work around Errata in early athlons regarding
155 * large page flushing.
159 if (cache && boot_cpu_data.x86 >= 4)
163 static void cpa_flush_all(unsigned long cache)
165 BUG_ON(irqs_disabled());
167 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
170 static void __cpa_flush_range(void *arg)
173 * We could optimize that further and do individual per page
174 * tlb invalidates for a low number of pages. Caveat: we must
175 * flush the high aliases on 64bit as well.
180 static void cpa_flush_range(unsigned long start, int numpages, int cache)
182 unsigned int i, level;
185 BUG_ON(irqs_disabled());
186 WARN_ON(PAGE_ALIGN(start) != start);
188 on_each_cpu(__cpa_flush_range, NULL, 1);
194 * We only need to flush on one CPU,
195 * clflush is a MESI-coherent instruction that
196 * will cause all other CPUs to flush the same
199 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
200 pte_t *pte = lookup_address(addr, &level);
203 * Only flush present addresses:
205 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
206 clflush_cache_range((void *) addr, PAGE_SIZE);
210 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
211 int in_flags, struct page **pages)
213 unsigned int i, level;
214 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
216 BUG_ON(irqs_disabled());
218 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
220 if (!cache || do_wbinvd)
224 * We only need to flush on one CPU,
225 * clflush is a MESI-coherent instruction that
226 * will cause all other CPUs to flush the same
229 for (i = 0; i < numpages; i++) {
233 if (in_flags & CPA_PAGES_ARRAY)
234 addr = (unsigned long)page_address(pages[i]);
238 pte = lookup_address(addr, &level);
241 * Only flush present addresses:
243 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
244 clflush_cache_range((void *)addr, PAGE_SIZE);
249 * Certain areas of memory on x86 require very specific protection flags,
250 * for example the BIOS area or kernel text. Callers don't always get this
251 * right (again, ioremap() on BIOS memory is not uncommon) so this function
252 * checks and fixes these known static required protection bits.
254 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
257 pgprot_t forbidden = __pgprot(0);
260 * The BIOS area between 640k and 1Mb needs to be executable for
261 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
263 #ifdef CONFIG_PCI_BIOS
264 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
265 pgprot_val(forbidden) |= _PAGE_NX;
269 * The kernel text needs to be executable for obvious reasons
270 * Does not cover __inittext since that is gone later on. On
271 * 64bit we do not enforce !NX on the low mapping
273 if (within(address, (unsigned long)_text, (unsigned long)_etext))
274 pgprot_val(forbidden) |= _PAGE_NX;
277 * The .rodata section needs to be read-only. Using the pfn
278 * catches all aliases.
280 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
281 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
282 pgprot_val(forbidden) |= _PAGE_RW;
284 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
286 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
287 * kernel text mappings for the large page aligned text, rodata sections
288 * will be always read-only. For the kernel identity mappings covering
289 * the holes caused by this alignment can be anything that user asks.
291 * This will preserve the large page mappings for kernel text/data
294 if (kernel_set_to_readonly &&
295 within(address, (unsigned long)_text,
296 (unsigned long)__end_rodata_hpage_align)) {
300 * Don't enforce the !RW mapping for the kernel text mapping,
301 * if the current mapping is already using small page mapping.
302 * No need to work hard to preserve large page mappings in this
305 * This also fixes the Linux Xen paravirt guest boot failure
306 * (because of unexpected read-only mappings for kernel identity
307 * mappings). In this paravirt guest case, the kernel text
308 * mapping and the kernel identity mapping share the same
309 * page-table pages. Thus we can't really use different
310 * protections for the kernel text and identity mappings. Also,
311 * these shared mappings are made of small page mappings.
312 * Thus this don't enforce !RW mapping for small page kernel
313 * text mapping logic will help Linux Xen parvirt guest boot
316 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
317 pgprot_val(forbidden) |= _PAGE_RW;
321 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
327 * Lookup the page table entry for a virtual address in a specific pgd.
328 * Return a pointer to the entry and the level of the mapping.
330 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
336 *level = PG_LEVEL_NONE;
341 pud = pud_offset(pgd, address);
345 *level = PG_LEVEL_1G;
346 if (pud_large(*pud) || !pud_present(*pud))
349 pmd = pmd_offset(pud, address);
353 *level = PG_LEVEL_2M;
354 if (pmd_large(*pmd) || !pmd_present(*pmd))
357 *level = PG_LEVEL_4K;
359 return pte_offset_kernel(pmd, address);
363 * Lookup the page table entry for a virtual address. Return a pointer
364 * to the entry and the level of the mapping.
366 * Note: We return pud and pmd either when the entry is marked large
367 * or when the present bit is not set. Otherwise we would return a
368 * pointer to a nonexisting mapping.
370 pte_t *lookup_address(unsigned long address, unsigned int *level)
372 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
374 EXPORT_SYMBOL_GPL(lookup_address);
376 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
380 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
383 return lookup_address(address, level);
387 * This is necessary because __pa() does not work on some
388 * kinds of memory, like vmalloc() or the alloc_remap()
389 * areas on 32-bit NUMA systems. The percpu areas can
390 * end up in this kind of memory, for instance.
392 * This could be optimized, but it is only intended to be
393 * used at inititalization time, and keeping it
394 * unoptimized should increase the testing coverage for
395 * the more obscure platforms.
397 phys_addr_t slow_virt_to_phys(void *__virt_addr)
399 unsigned long virt_addr = (unsigned long)__virt_addr;
400 phys_addr_t phys_addr;
401 unsigned long offset;
407 pte = lookup_address(virt_addr, &level);
409 psize = page_level_size(level);
410 pmask = page_level_mask(level);
411 offset = virt_addr & ~pmask;
412 phys_addr = pte_pfn(*pte) << PAGE_SHIFT;
413 return (phys_addr | offset);
415 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
418 * Set the new pmd in all the pgds we know about:
420 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
423 set_pte_atomic(kpte, pte);
425 if (!SHARED_KERNEL_PMD) {
428 list_for_each_entry(page, &pgd_list, lru) {
433 pgd = (pgd_t *)page_address(page) + pgd_index(address);
434 pud = pud_offset(pgd, address);
435 pmd = pmd_offset(pud, address);
436 set_pte_atomic((pte_t *)pmd, pte);
443 try_preserve_large_page(pte_t *kpte, unsigned long address,
444 struct cpa_data *cpa)
446 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
447 pte_t new_pte, old_pte, *tmp;
448 pgprot_t old_prot, new_prot, req_prot;
452 if (cpa->force_split)
455 spin_lock(&pgd_lock);
457 * Check for races, another CPU might have split this page
460 tmp = _lookup_address_cpa(cpa, address, &level);
469 psize = page_level_size(level);
470 pmask = page_level_mask(level);
478 * Calculate the number of pages, which fit into this large
479 * page starting at address:
481 nextpage_addr = (address + psize) & pmask;
482 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
483 if (numpages < cpa->numpages)
484 cpa->numpages = numpages;
487 * We are safe now. Check whether the new pgprot is the same:
490 old_prot = req_prot = pte_pgprot(old_pte);
492 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
493 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
496 * Set the PSE and GLOBAL flags only if the PRESENT flag is
497 * set otherwise pmd_present/pmd_huge will return true even on
498 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
499 * for the ancient hardware that doesn't support it.
501 if (pgprot_val(req_prot) & _PAGE_PRESENT)
502 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
504 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
506 req_prot = canon_pgprot(req_prot);
509 * old_pte points to the large page base address. So we need
510 * to add the offset of the virtual address:
512 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
515 new_prot = static_protections(req_prot, address, pfn);
518 * We need to check the full range, whether
519 * static_protection() requires a different pgprot for one of
520 * the pages in the range we try to preserve:
522 addr = address & pmask;
523 pfn = pte_pfn(old_pte);
524 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
525 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
527 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
532 * If there are no changes, return. maxpages has been updated
535 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
541 * We need to change the attributes. Check, whether we can
542 * change the large page in one go. We request a split, when
543 * the address is not aligned and the number of pages is
544 * smaller than the number of pages in the large page. Note
545 * that we limited the number of possible pages already to
546 * the number of pages in the large page.
548 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
550 * The address is aligned and the number of pages
551 * covers the full page.
553 new_pte = pfn_pte(pte_pfn(old_pte), new_prot);
554 __set_pmd_pte(kpte, address, new_pte);
555 cpa->flags |= CPA_FLUSHTLB;
560 spin_unlock(&pgd_lock);
566 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
569 pte_t *pbase = (pte_t *)page_address(base);
570 unsigned long pfn, pfninc = 1;
571 unsigned int i, level;
575 spin_lock(&pgd_lock);
577 * Check for races, another CPU might have split this page
580 tmp = _lookup_address_cpa(cpa, address, &level);
582 spin_unlock(&pgd_lock);
586 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
587 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
589 * If we ever want to utilize the PAT bit, we need to
590 * update this function to make sure it's converted from
591 * bit 12 to bit 7 when we cross from the 2MB level to
594 WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
597 if (level == PG_LEVEL_1G) {
598 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
600 * Set the PSE flags only if the PRESENT flag is set
601 * otherwise pmd_present/pmd_huge will return true
602 * even on a non present pmd.
604 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
605 pgprot_val(ref_prot) |= _PAGE_PSE;
607 pgprot_val(ref_prot) &= ~_PAGE_PSE;
612 * Set the GLOBAL flags only if the PRESENT flag is set
613 * otherwise pmd/pte_present will return true even on a non
614 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
615 * for the ancient hardware that doesn't support it.
617 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
618 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
620 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
623 * Get the target pfn from the original entry:
625 pfn = pte_pfn(*kpte);
626 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
627 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
629 if (pfn_range_is_mapped(PFN_DOWN(__pa(address)),
630 PFN_DOWN(__pa(address)) + 1))
631 split_page_count(level);
634 * Install the new, split up pagetable.
636 * We use the standard kernel pagetable protections for the new
637 * pagetable protections, the actual ptes set above control the
638 * primary protection behavior:
640 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
643 * Intel Atom errata AAH41 workaround.
645 * The real fix should be in hw or in a microcode update, but
646 * we also probabilistically try to reduce the window of having
647 * a large TLB mixed with 4K TLBs while instruction fetches are
651 spin_unlock(&pgd_lock);
656 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
657 unsigned long address)
661 if (!debug_pagealloc)
662 spin_unlock(&cpa_lock);
663 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
664 if (!debug_pagealloc)
665 spin_lock(&cpa_lock);
669 if (__split_large_page(cpa, kpte, address, base))
675 static bool try_to_free_pte_page(pte_t *pte)
679 for (i = 0; i < PTRS_PER_PTE; i++)
680 if (!pte_none(pte[i]))
683 free_page((unsigned long)pte);
687 static bool try_to_free_pmd_page(pmd_t *pmd)
691 for (i = 0; i < PTRS_PER_PMD; i++)
692 if (!pmd_none(pmd[i]))
695 free_page((unsigned long)pmd);
699 static bool try_to_free_pud_page(pud_t *pud)
703 for (i = 0; i < PTRS_PER_PUD; i++)
704 if (!pud_none(pud[i]))
707 free_page((unsigned long)pud);
711 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
713 pte_t *pte = pte_offset_kernel(pmd, start);
715 while (start < end) {
716 set_pte(pte, __pte(0));
722 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
729 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
730 unsigned long start, unsigned long end)
732 if (unmap_pte_range(pmd, start, end))
733 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
737 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
739 pmd_t *pmd = pmd_offset(pud, start);
742 * Not on a 2MB page boundary?
744 if (start & (PMD_SIZE - 1)) {
745 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
746 unsigned long pre_end = min_t(unsigned long, end, next_page);
748 __unmap_pmd_range(pud, pmd, start, pre_end);
755 * Try to unmap in 2M chunks.
757 while (end - start >= PMD_SIZE) {
761 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
771 return __unmap_pmd_range(pud, pmd, start, end);
774 * Try again to free the PMD page if haven't succeeded above.
777 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
781 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
783 pud_t *pud = pud_offset(pgd, start);
786 * Not on a GB page boundary?
788 if (start & (PUD_SIZE - 1)) {
789 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
790 unsigned long pre_end = min_t(unsigned long, end, next_page);
792 unmap_pmd_range(pud, start, pre_end);
799 * Try to unmap in 1G chunks?
801 while (end - start >= PUD_SIZE) {
806 unmap_pmd_range(pud, start, start + PUD_SIZE);
816 unmap_pmd_range(pud, start, end);
819 * No need to try to free the PUD page because we'll free it in
820 * populate_pgd's error path
824 static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
826 pgd_t *pgd_entry = root + pgd_index(addr);
828 unmap_pud_range(pgd_entry, addr, end);
830 if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
831 pgd_clear(pgd_entry);
834 static int alloc_pte_page(pmd_t *pmd)
836 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
840 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
844 static int alloc_pmd_page(pud_t *pud)
846 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
850 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
854 static void populate_pte(struct cpa_data *cpa,
855 unsigned long start, unsigned long end,
856 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
860 pte = pte_offset_kernel(pmd, start);
862 while (num_pages-- && start < end) {
864 /* deal with the NX bit */
865 if (!(pgprot_val(pgprot) & _PAGE_NX))
866 cpa->pfn &= ~_PAGE_NX;
868 set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
871 cpa->pfn += PAGE_SIZE;
876 static int populate_pmd(struct cpa_data *cpa,
877 unsigned long start, unsigned long end,
878 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
880 unsigned int cur_pages = 0;
884 * Not on a 2M boundary?
886 if (start & (PMD_SIZE - 1)) {
887 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
888 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
890 pre_end = min_t(unsigned long, pre_end, next_page);
891 cur_pages = (pre_end - start) >> PAGE_SHIFT;
892 cur_pages = min_t(unsigned int, num_pages, cur_pages);
897 pmd = pmd_offset(pud, start);
899 if (alloc_pte_page(pmd))
902 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
908 * We mapped them all?
910 if (num_pages == cur_pages)
913 while (end - start >= PMD_SIZE) {
916 * We cannot use a 1G page so allocate a PMD page if needed.
919 if (alloc_pmd_page(pud))
922 pmd = pmd_offset(pud, start);
924 set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE | massage_pgprot(pgprot)));
927 cpa->pfn += PMD_SIZE;
928 cur_pages += PMD_SIZE >> PAGE_SHIFT;
932 * Map trailing 4K pages.
935 pmd = pmd_offset(pud, start);
937 if (alloc_pte_page(pmd))
940 populate_pte(cpa, start, end, num_pages - cur_pages,
946 static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
953 end = start + (cpa->numpages << PAGE_SHIFT);
956 * Not on a Gb page boundary? => map everything up to it with
959 if (start & (PUD_SIZE - 1)) {
960 unsigned long pre_end;
961 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
963 pre_end = min_t(unsigned long, end, next_page);
964 cur_pages = (pre_end - start) >> PAGE_SHIFT;
965 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
967 pud = pud_offset(pgd, start);
973 if (alloc_pmd_page(pud))
976 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
984 /* We mapped them all? */
985 if (cpa->numpages == cur_pages)
988 pud = pud_offset(pgd, start);
991 * Map everything starting from the Gb boundary, possibly with 1G pages
993 while (end - start >= PUD_SIZE) {
994 set_pud(pud, __pud(cpa->pfn | _PAGE_PSE | massage_pgprot(pgprot)));
997 cpa->pfn += PUD_SIZE;
998 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1002 /* Map trailing leftover */
1006 pud = pud_offset(pgd, start);
1008 if (alloc_pmd_page(pud))
1011 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1022 * Restrictions for kernel page table do not necessarily apply when mapping in
1025 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1027 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1028 pud_t *pud = NULL; /* shut up gcc */
1032 pgd_entry = cpa->pgd + pgd_index(addr);
1035 * Allocate a PUD page and hand it down for mapping.
1037 if (pgd_none(*pgd_entry)) {
1038 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1042 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1045 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1046 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1048 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1050 unmap_pgd_range(cpa->pgd, addr,
1051 addr + (cpa->numpages << PAGE_SHIFT));
1055 cpa->numpages = ret;
1059 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1063 return populate_pgd(cpa, vaddr);
1066 * Ignore all non primary paths.
1072 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1074 * Also set numpages to '1' indicating that we processed cpa req for
1075 * one virtual address page and its pfn. TBD: numpages can be set based
1076 * on the initial value and the level returned by lookup_address().
1078 if (within(vaddr, PAGE_OFFSET,
1079 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1081 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1084 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1085 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1092 static int __change_page_attr(struct cpa_data *cpa, int primary)
1094 unsigned long address;
1097 pte_t *kpte, old_pte;
1099 if (cpa->flags & CPA_PAGES_ARRAY) {
1100 struct page *page = cpa->pages[cpa->curpage];
1101 if (unlikely(PageHighMem(page)))
1103 address = (unsigned long)page_address(page);
1104 } else if (cpa->flags & CPA_ARRAY)
1105 address = cpa->vaddr[cpa->curpage];
1107 address = *cpa->vaddr;
1109 kpte = _lookup_address_cpa(cpa, address, &level);
1111 return __cpa_process_fault(cpa, address, primary);
1114 if (!pte_val(old_pte))
1115 return __cpa_process_fault(cpa, address, primary);
1117 if (level == PG_LEVEL_4K) {
1119 pgprot_t new_prot = pte_pgprot(old_pte);
1120 unsigned long pfn = pte_pfn(old_pte);
1122 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1123 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1125 new_prot = static_protections(new_prot, address, pfn);
1128 * Set the GLOBAL flags only if the PRESENT flag is
1129 * set otherwise pte_present will return true even on
1130 * a non present pte. The canon_pgprot will clear
1131 * _PAGE_GLOBAL for the ancient hardware that doesn't
1134 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1135 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1137 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1140 * We need to keep the pfn from the existing PTE,
1141 * after all we're only going to change it's attributes
1142 * not the memory it points to
1144 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1147 * Do we really change anything ?
1149 if (pte_val(old_pte) != pte_val(new_pte)) {
1150 set_pte_atomic(kpte, new_pte);
1151 cpa->flags |= CPA_FLUSHTLB;
1158 * Check, whether we can keep the large page intact
1159 * and just change the pte:
1161 do_split = try_preserve_large_page(kpte, address, cpa);
1163 * When the range fits into the existing large page,
1164 * return. cp->numpages and cpa->tlbflush have been updated in
1171 * We have to split the large page:
1173 err = split_large_page(cpa, kpte, address);
1176 * Do a global flush tlb after splitting the large page
1177 * and before we do the actual change page attribute in the PTE.
1179 * With out this, we violate the TLB application note, that says
1180 * "The TLBs may contain both ordinary and large-page
1181 * translations for a 4-KByte range of linear addresses. This
1182 * may occur if software modifies the paging structures so that
1183 * the page size used for the address range changes. If the two
1184 * translations differ with respect to page frame or attributes
1185 * (e.g., permissions), processor behavior is undefined and may
1186 * be implementation-specific."
1188 * We do this global tlb flush inside the cpa_lock, so that we
1189 * don't allow any other cpu, with stale tlb entries change the
1190 * page attribute in parallel, that also falls into the
1191 * just split large page entry.
1200 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1202 static int cpa_process_alias(struct cpa_data *cpa)
1204 struct cpa_data alias_cpa;
1205 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1206 unsigned long vaddr;
1209 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1213 * No need to redo, when the primary call touched the direct
1216 if (cpa->flags & CPA_PAGES_ARRAY) {
1217 struct page *page = cpa->pages[cpa->curpage];
1218 if (unlikely(PageHighMem(page)))
1220 vaddr = (unsigned long)page_address(page);
1221 } else if (cpa->flags & CPA_ARRAY)
1222 vaddr = cpa->vaddr[cpa->curpage];
1224 vaddr = *cpa->vaddr;
1226 if (!(within(vaddr, PAGE_OFFSET,
1227 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1230 alias_cpa.vaddr = &laddr;
1231 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1233 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1238 #ifdef CONFIG_X86_64
1240 * If the primary call didn't touch the high mapping already
1241 * and the physical address is inside the kernel map, we need
1242 * to touch the high mapped kernel as well:
1244 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1245 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1246 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1247 __START_KERNEL_map - phys_base;
1249 alias_cpa.vaddr = &temp_cpa_vaddr;
1250 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1253 * The high mapping range is imprecise, so ignore the
1256 __change_page_attr_set_clr(&alias_cpa, 0);
1263 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1265 int ret, numpages = cpa->numpages;
1269 * Store the remaining nr of pages for the large page
1270 * preservation check.
1272 cpa->numpages = numpages;
1273 /* for array changes, we can't use large page */
1274 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1277 if (!debug_pagealloc)
1278 spin_lock(&cpa_lock);
1279 ret = __change_page_attr(cpa, checkalias);
1280 if (!debug_pagealloc)
1281 spin_unlock(&cpa_lock);
1286 ret = cpa_process_alias(cpa);
1292 * Adjust the number of pages with the result of the
1293 * CPA operation. Either a large page has been
1294 * preserved or a single page update happened.
1296 BUG_ON(cpa->numpages > numpages);
1297 numpages -= cpa->numpages;
1298 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1301 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1307 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1308 pgprot_t mask_set, pgprot_t mask_clr,
1309 int force_split, int in_flag,
1310 struct page **pages)
1312 struct cpa_data cpa;
1313 int ret, cache, checkalias;
1314 unsigned long baddr = 0;
1316 memset(&cpa, 0, sizeof(cpa));
1319 * Check, if we are requested to change a not supported
1322 mask_set = canon_pgprot(mask_set);
1323 mask_clr = canon_pgprot(mask_clr);
1324 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1327 /* Ensure we are PAGE_SIZE aligned */
1328 if (in_flag & CPA_ARRAY) {
1330 for (i = 0; i < numpages; i++) {
1331 if (addr[i] & ~PAGE_MASK) {
1332 addr[i] &= PAGE_MASK;
1336 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1338 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1339 * No need to cehck in that case
1341 if (*addr & ~PAGE_MASK) {
1344 * People should not be passing in unaligned addresses:
1349 * Save address for cache flush. *addr is modified in the call
1350 * to __change_page_attr_set_clr() below.
1355 /* Must avoid aliasing mappings in the highmem code */
1356 kmap_flush_unused();
1362 cpa.numpages = numpages;
1363 cpa.mask_set = mask_set;
1364 cpa.mask_clr = mask_clr;
1367 cpa.force_split = force_split;
1369 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1370 cpa.flags |= in_flag;
1372 /* No alias checking for _NX bit modifications */
1373 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1375 ret = __change_page_attr_set_clr(&cpa, checkalias);
1378 * Check whether we really changed something:
1380 if (!(cpa.flags & CPA_FLUSHTLB))
1384 * No need to flush, when we did not set any of the caching
1387 cache = !!pgprot2cachemode(mask_set);
1390 * On success we use CLFLUSH, when the CPU supports it to
1391 * avoid the WBINVD. If the CPU does not support it and in the
1392 * error case we fall back to cpa_flush_all (which uses
1395 if (!ret && cpu_has_clflush) {
1396 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1397 cpa_flush_array(addr, numpages, cache,
1400 cpa_flush_range(baddr, numpages, cache);
1402 cpa_flush_all(cache);
1408 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1409 pgprot_t mask, int array)
1411 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1412 (array ? CPA_ARRAY : 0), NULL);
1415 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1416 pgprot_t mask, int array)
1418 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1419 (array ? CPA_ARRAY : 0), NULL);
1422 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1425 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1426 CPA_PAGES_ARRAY, pages);
1429 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1432 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1433 CPA_PAGES_ARRAY, pages);
1436 int _set_memory_uc(unsigned long addr, int numpages)
1439 * for now UC MINUS. see comments in ioremap_nocache()
1441 return change_page_attr_set(&addr, numpages,
1442 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1446 int set_memory_uc(unsigned long addr, int numpages)
1451 * for now UC MINUS. see comments in ioremap_nocache()
1453 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1454 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1458 ret = _set_memory_uc(addr, numpages);
1465 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1469 EXPORT_SYMBOL(set_memory_uc);
1471 static int _set_memory_array(unsigned long *addr, int addrinarray,
1472 enum page_cache_mode new_type)
1478 * for now UC MINUS. see comments in ioremap_nocache()
1480 for (i = 0; i < addrinarray; i++) {
1481 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1487 ret = change_page_attr_set(addr, addrinarray,
1488 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1491 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1492 ret = change_page_attr_set_clr(addr, addrinarray,
1494 _PAGE_CACHE_MODE_WC),
1495 __pgprot(_PAGE_CACHE_MASK),
1496 0, CPA_ARRAY, NULL);
1503 for (j = 0; j < i; j++)
1504 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1509 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1511 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1513 EXPORT_SYMBOL(set_memory_array_uc);
1515 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1517 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1519 EXPORT_SYMBOL(set_memory_array_wc);
1521 int _set_memory_wc(unsigned long addr, int numpages)
1524 unsigned long addr_copy = addr;
1526 ret = change_page_attr_set(&addr, numpages,
1527 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1530 ret = change_page_attr_set_clr(&addr_copy, numpages,
1532 _PAGE_CACHE_MODE_WC),
1533 __pgprot(_PAGE_CACHE_MASK),
1539 int set_memory_wc(unsigned long addr, int numpages)
1544 return set_memory_uc(addr, numpages);
1546 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1547 _PAGE_CACHE_MODE_WC, NULL);
1551 ret = _set_memory_wc(addr, numpages);
1558 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1562 EXPORT_SYMBOL(set_memory_wc);
1564 int _set_memory_wb(unsigned long addr, int numpages)
1566 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1567 return change_page_attr_clear(&addr, numpages,
1568 __pgprot(_PAGE_CACHE_MASK), 0);
1571 int set_memory_wb(unsigned long addr, int numpages)
1575 ret = _set_memory_wb(addr, numpages);
1579 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1582 EXPORT_SYMBOL(set_memory_wb);
1584 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1589 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1590 ret = change_page_attr_clear(addr, addrinarray,
1591 __pgprot(_PAGE_CACHE_MASK), 1);
1595 for (i = 0; i < addrinarray; i++)
1596 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1600 EXPORT_SYMBOL(set_memory_array_wb);
1602 int set_memory_x(unsigned long addr, int numpages)
1604 if (!(__supported_pte_mask & _PAGE_NX))
1607 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1609 EXPORT_SYMBOL(set_memory_x);
1611 int set_memory_nx(unsigned long addr, int numpages)
1613 if (!(__supported_pte_mask & _PAGE_NX))
1616 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1618 EXPORT_SYMBOL(set_memory_nx);
1620 int set_memory_ro(unsigned long addr, int numpages)
1622 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1624 EXPORT_SYMBOL_GPL(set_memory_ro);
1626 int set_memory_rw(unsigned long addr, int numpages)
1628 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1630 EXPORT_SYMBOL_GPL(set_memory_rw);
1632 int set_memory_np(unsigned long addr, int numpages)
1634 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1637 int set_memory_4k(unsigned long addr, int numpages)
1639 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1640 __pgprot(0), 1, 0, NULL);
1643 int set_pages_uc(struct page *page, int numpages)
1645 unsigned long addr = (unsigned long)page_address(page);
1647 return set_memory_uc(addr, numpages);
1649 EXPORT_SYMBOL(set_pages_uc);
1651 static int _set_pages_array(struct page **pages, int addrinarray,
1652 enum page_cache_mode new_type)
1654 unsigned long start;
1660 for (i = 0; i < addrinarray; i++) {
1661 if (PageHighMem(pages[i]))
1663 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1664 end = start + PAGE_SIZE;
1665 if (reserve_memtype(start, end, new_type, NULL))
1669 ret = cpa_set_pages_array(pages, addrinarray,
1670 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS));
1671 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1672 ret = change_page_attr_set_clr(NULL, addrinarray,
1674 _PAGE_CACHE_MODE_WC),
1675 __pgprot(_PAGE_CACHE_MASK),
1676 0, CPA_PAGES_ARRAY, pages);
1679 return 0; /* Success */
1682 for (i = 0; i < free_idx; i++) {
1683 if (PageHighMem(pages[i]))
1685 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1686 end = start + PAGE_SIZE;
1687 free_memtype(start, end);
1692 int set_pages_array_uc(struct page **pages, int addrinarray)
1694 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1696 EXPORT_SYMBOL(set_pages_array_uc);
1698 int set_pages_array_wc(struct page **pages, int addrinarray)
1700 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1702 EXPORT_SYMBOL(set_pages_array_wc);
1704 int set_pages_wb(struct page *page, int numpages)
1706 unsigned long addr = (unsigned long)page_address(page);
1708 return set_memory_wb(addr, numpages);
1710 EXPORT_SYMBOL(set_pages_wb);
1712 int set_pages_array_wb(struct page **pages, int addrinarray)
1715 unsigned long start;
1719 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1720 retval = cpa_clear_pages_array(pages, addrinarray,
1721 __pgprot(_PAGE_CACHE_MASK));
1725 for (i = 0; i < addrinarray; i++) {
1726 if (PageHighMem(pages[i]))
1728 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1729 end = start + PAGE_SIZE;
1730 free_memtype(start, end);
1735 EXPORT_SYMBOL(set_pages_array_wb);
1737 int set_pages_x(struct page *page, int numpages)
1739 unsigned long addr = (unsigned long)page_address(page);
1741 return set_memory_x(addr, numpages);
1743 EXPORT_SYMBOL(set_pages_x);
1745 int set_pages_nx(struct page *page, int numpages)
1747 unsigned long addr = (unsigned long)page_address(page);
1749 return set_memory_nx(addr, numpages);
1751 EXPORT_SYMBOL(set_pages_nx);
1753 int set_pages_ro(struct page *page, int numpages)
1755 unsigned long addr = (unsigned long)page_address(page);
1757 return set_memory_ro(addr, numpages);
1760 int set_pages_rw(struct page *page, int numpages)
1762 unsigned long addr = (unsigned long)page_address(page);
1764 return set_memory_rw(addr, numpages);
1767 #ifdef CONFIG_DEBUG_PAGEALLOC
1769 static int __set_pages_p(struct page *page, int numpages)
1771 unsigned long tempaddr = (unsigned long) page_address(page);
1772 struct cpa_data cpa = { .vaddr = &tempaddr,
1774 .numpages = numpages,
1775 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1776 .mask_clr = __pgprot(0),
1780 * No alias checking needed for setting present flag. otherwise,
1781 * we may need to break large pages for 64-bit kernel text
1782 * mappings (this adds to complexity if we want to do this from
1783 * atomic context especially). Let's keep it simple!
1785 return __change_page_attr_set_clr(&cpa, 0);
1788 static int __set_pages_np(struct page *page, int numpages)
1790 unsigned long tempaddr = (unsigned long) page_address(page);
1791 struct cpa_data cpa = { .vaddr = &tempaddr,
1793 .numpages = numpages,
1794 .mask_set = __pgprot(0),
1795 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1799 * No alias checking needed for setting not present flag. otherwise,
1800 * we may need to break large pages for 64-bit kernel text
1801 * mappings (this adds to complexity if we want to do this from
1802 * atomic context especially). Let's keep it simple!
1804 return __change_page_attr_set_clr(&cpa, 0);
1807 void kernel_map_pages(struct page *page, int numpages, int enable)
1809 if (PageHighMem(page))
1812 debug_check_no_locks_freed(page_address(page),
1813 numpages * PAGE_SIZE);
1817 * The return value is ignored as the calls cannot fail.
1818 * Large pages for identity mappings are not used at boot time
1819 * and hence no memory allocations during large page split.
1822 __set_pages_p(page, numpages);
1824 __set_pages_np(page, numpages);
1827 * We should perform an IPI and flush all tlbs,
1828 * but that can deadlock->flush only current cpu:
1832 arch_flush_lazy_mmu_mode();
1835 #ifdef CONFIG_HIBERNATION
1837 bool kernel_page_present(struct page *page)
1842 if (PageHighMem(page))
1845 pte = lookup_address((unsigned long)page_address(page), &level);
1846 return (pte_val(*pte) & _PAGE_PRESENT);
1849 #endif /* CONFIG_HIBERNATION */
1851 #endif /* CONFIG_DEBUG_PAGEALLOC */
1853 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1854 unsigned numpages, unsigned long page_flags)
1856 int retval = -EINVAL;
1858 struct cpa_data cpa = {
1862 .numpages = numpages,
1863 .mask_set = __pgprot(0),
1864 .mask_clr = __pgprot(0),
1868 if (!(__supported_pte_mask & _PAGE_NX))
1871 if (!(page_flags & _PAGE_NX))
1872 cpa.mask_clr = __pgprot(_PAGE_NX);
1874 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1876 retval = __change_page_attr_set_clr(&cpa, 0);
1883 void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1886 unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1890 * The testcases use internal knowledge of the implementation that shouldn't
1891 * be exposed to the rest of the kernel. Include these directly here.
1893 #ifdef CONFIG_CPA_DEBUG
1894 #include "pageattr-test.c"