4 * Copyright (C) 2014 Atmel
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
15 #include <linux/clk-provider.h>
16 #include <linux/clkdev.h>
17 #include <linux/clk/at91_pmc.h>
18 #include <linux/delay.h>
20 #include <linux/of_address.h>
21 #include <linux/of_irq.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/sched.h>
26 #include <linux/wait.h>
27 #include <linux/regmap.h>
28 #include <linux/mfd/syscon.h>
32 #define H32MX_MAX_FREQ 90000000
34 struct clk_sama5d4_h32mx {
36 struct regmap *regmap;
39 #define to_clk_sama5d4_h32mx(hw) container_of(hw, struct clk_sama5d4_h32mx, hw)
41 static unsigned long clk_sama5d4_h32mx_recalc_rate(struct clk_hw *hw,
42 unsigned long parent_rate)
44 struct clk_sama5d4_h32mx *h32mxclk = to_clk_sama5d4_h32mx(hw);
47 regmap_read(h32mxclk->regmap, AT91_PMC_MCKR, &mckr);
48 if (mckr & AT91_PMC_H32MXDIV)
49 return parent_rate / 2;
51 if (parent_rate > H32MX_MAX_FREQ)
52 pr_warn("H32MX clock is too fast\n");
56 static long clk_sama5d4_h32mx_round_rate(struct clk_hw *hw, unsigned long rate,
57 unsigned long *parent_rate)
61 if (rate > *parent_rate)
63 div = *parent_rate / 2;
67 if (rate - div < *parent_rate - rate)
73 static int clk_sama5d4_h32mx_set_rate(struct clk_hw *hw, unsigned long rate,
74 unsigned long parent_rate)
76 struct clk_sama5d4_h32mx *h32mxclk = to_clk_sama5d4_h32mx(hw);
79 if (parent_rate != rate && (parent_rate / 2) != rate)
82 if ((parent_rate / 2) == rate)
83 mckr = AT91_PMC_H32MXDIV;
85 regmap_update_bits(h32mxclk->regmap, AT91_PMC_MCKR,
86 AT91_PMC_H32MXDIV, mckr);
91 static const struct clk_ops h32mx_ops = {
92 .recalc_rate = clk_sama5d4_h32mx_recalc_rate,
93 .round_rate = clk_sama5d4_h32mx_round_rate,
94 .set_rate = clk_sama5d4_h32mx_set_rate,
97 static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np)
99 struct clk_sama5d4_h32mx *h32mxclk;
100 struct clk_init_data init;
101 const char *parent_name;
102 struct regmap *regmap;
105 regmap = syscon_node_to_regmap(of_get_parent(np));
109 h32mxclk = kzalloc(sizeof(*h32mxclk), GFP_KERNEL);
113 parent_name = of_clk_get_parent_name(np, 0);
115 init.name = np->name;
116 init.ops = &h32mx_ops;
117 init.parent_names = parent_name ? &parent_name : NULL;
118 init.num_parents = parent_name ? 1 : 0;
119 init.flags = CLK_SET_RATE_GATE;
121 h32mxclk->hw.init = &init;
122 h32mxclk->regmap = regmap;
124 clk = clk_register(NULL, &h32mxclk->hw);
130 of_clk_add_provider(np, of_clk_src_simple_get, clk);
132 CLK_OF_DECLARE(of_sama5d4_clk_h32mx_setup, "atmel,sama5d4-clk-h32mx",
133 of_sama5d4_clk_h32mx_setup);