2 * Copyright (C) 2013 Google, Inc.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * Based on code obtained from Analogix Inc with copyright:
14 * Copyright(c) 2012, Analogix Semiconductor. All rights reserved.
18 #include <linux/delay.h>
19 #include <linux/device.h>
20 #include <linux/i2c.h>
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/of_gpio.h>
24 #include <linux/regulator/consumer.h>
26 #include "anx7808regs.h"
28 #define ANX7808_DEVICE_ID 0x7808
29 #define AUX_WAIT_MS 100
30 #define AUX_BUFFER_SIZE 0x10
38 struct regulator *vdd_mydp;
39 struct i2c_client *tx_p0;
40 struct i2c_client *tx_p1;
41 struct i2c_client *tx_p2;
42 struct i2c_client *rx_p0;
43 struct i2c_client *rx_p1;
45 struct work_struct work;
48 static struct i2c_client *anx7808_addr_to_client(struct anx7808_data *anx7808,
53 return anx7808->tx_p0;
55 return anx7808->tx_p1;
57 return anx7808->tx_p2;
59 return anx7808->rx_p0;
61 return anx7808->rx_p1;
65 DRM_ERROR("Invalid i2c address %04x.\n", addr);
69 static int anx7808_read_reg(struct anx7808_data *anx7808, uint16_t addr,
73 struct i2c_client *client = anx7808_addr_to_client(anx7808, addr);
80 ret = i2c_smbus_read_byte_data(client, addr & 0xFF);
82 DRM_ERROR("Failed to read i2c addr=%04x.\n", addr);
90 static int anx7808_write_reg(struct anx7808_data *anx7808, uint16_t addr,
94 struct i2c_client *client = anx7808_addr_to_client(anx7808, addr);
99 ret = i2c_smbus_write_byte_data(client, addr & 0xFF, value);
101 DRM_ERROR("Failed to write i2c addr=%04x.\n", addr);
107 static int anx7808_set_bits(struct anx7808_data *anx7808, uint16_t addr,
112 ret = anx7808_read_reg(anx7808, addr, &c);
115 return anx7808_write_reg(anx7808, addr, c | bits);
118 static int anx7808_clear_bits(struct anx7808_data *anx7808, uint16_t addr,
123 ret = anx7808_read_reg(anx7808, addr, &c);
126 return anx7808_write_reg(anx7808, addr, c & (~bits));
129 static int anx7808_power_on(struct anx7808_data *anx7808)
133 DRM_INFO("Powering on ANX7808.\n");
135 gpio_set_value(anx7808->reset_gpio, 0);
136 usleep_range(1000, 2000);
137 gpio_set_value(anx7808->pd_gpio, 0);
138 usleep_range(2000, 4000);
139 ret = regulator_enable(anx7808->vdd_mydp);
141 DRM_ERROR("Failed to power on ANX7808: %d", ret);
145 gpio_set_value(anx7808->reset_gpio, 1);
149 static int anx7808_power_off(struct anx7808_data *anx7808)
153 DRM_INFO("Powering off ANX7808.\n");
155 gpio_set_value(anx7808->reset_gpio, 0);
156 usleep_range(1000, 2000);
157 ret = regulator_disable(anx7808->vdd_mydp);
159 DRM_ERROR("Failed to power off ANX7808: %d", ret);
162 usleep_range(5000, 10000);
163 gpio_set_value(anx7808->pd_gpio, 1);
164 usleep_range(1000, 2000);
168 static int anx7808_chip_located(struct anx7808_data *anx7808)
172 uint8_t idh = 0, idl = 0;
173 ret |= anx7808_read_reg(anx7808, SP_TX_DEV_IDL_REG, &idl);
174 ret |= anx7808_read_reg(anx7808, SP_TX_DEV_IDH_REG, &idh);
177 id = idl | (idh << 8);
178 if (id != ANX7808_DEVICE_ID) {
179 DRM_ERROR("ANX7808 not found. ID reg contains: %04x\n", id);
182 DRM_INFO("ANX7808 found.\n");
186 static int anx7808_vbus_power_on(struct anx7808_data *anx7808)
190 anx7808_set_bits(anx7808, SP_TX_PLL_FILTER_CTRL6,
191 P5V_PROTECT_PD | SHORT_PROTECT_PD);
192 anx7808_clear_bits(anx7808, SP_TX_PLL_FILTER_CTRL11, V33_SWITCH_ON);
193 anx7808_set_bits(anx7808, SP_TX_PLL_FILTER_CTRL11, V33_SWITCH_ON);
195 anx7808_read_reg(anx7808, SP_TX_PLL_FILTER_CTRL6, &status);
196 if (status & (P5V_PROTECT | SHORT_PROTECT)) {
197 DRM_ERROR("Failed to enable VBUS: 0x%02x.\n", status);
200 DRM_DEBUG_KMS("Enabled VBUS.\n");
204 static int anx7808_aux_wait(struct anx7808_data *anx7808)
208 unsigned long start = jiffies;
210 while ((jiffies - start) <= msecs_to_jiffies(AUX_WAIT_MS)) {
211 err = anx7808_read_reg(anx7808, SP_TX_AUX_STATUS, &status);
214 if (!(status & AUX_BUSY))
216 usleep_range(100, 200);
220 DRM_ERROR("Failed to read AUX channel: 0x%02x\n", status);
226 static int anx7808_aux_read(struct anx7808_data *anx7808, uint32_t addr,
227 uint8_t cmd, uint8_t count, uint8_t *pBuf)
231 int addrl = (addr >> 0) & 0xFF;
232 int addrm = (addr >> 8) & 0xFF;
233 int addrh = (addr >> 16) & 0x0F;
235 if (count > AUX_BUFFER_SIZE)
238 err |= anx7808_write_reg(anx7808, SP_TX_BUF_DATA_COUNT_REG, BUF_CLR);
239 err |= anx7808_write_reg(anx7808, SP_TX_AUX_CTRL_REG,
240 ((count - 1) << 4) | cmd);
241 err |= anx7808_write_reg(anx7808, SP_TX_AUX_ADDR_7_0_REG, addrl);
242 err |= anx7808_write_reg(anx7808, SP_TX_AUX_ADDR_15_8_REG, addrm);
243 err |= anx7808_write_reg(anx7808, SP_TX_AUX_ADDR_19_16_REG, addrh);
244 err |= anx7808_set_bits(anx7808, SP_TX_AUX_CTRL_REG2, AUX_OP_EN);
247 usleep_range(2000, 4000);
249 err = anx7808_aux_wait(anx7808);
253 for (i = 0; i < count; i++)
254 err |= anx7808_read_reg(anx7808, SP_TX_BUF_DATA_0_REG + i,
262 static int anx7808_aux_dpcd_read(struct anx7808_data *anx7808, uint32_t addr,
263 uint8_t count, uint8_t *pBuf)
265 return anx7808_aux_read(anx7808, addr, AUX_DPCD, count, pBuf);
268 static void anx7808_rx_initialization(struct anx7808_data *anx7808)
270 DRM_DEBUG_KMS("Initializing ANX7808 receiver.\n");
272 anx7808_write_reg(anx7808, HDMI_RX_HDMI_MUTE_CTRL_REG,
273 AUD_MUTE | VID_MUTE);
274 anx7808_set_bits(anx7808, HDMI_RX_CHIP_CTRL_REG,
275 MAN_HDMI5V_DET | PLLLOCK_CKDT_EN | DIGITAL_CKDT_EN);
276 anx7808_set_bits(anx7808, HDMI_RX_AEC_CTRL_REG, AVC_OE);
277 anx7808_set_bits(anx7808, HDMI_RX_SRST_REG, HDCP_MAN_RST);
278 usleep_range(1000, 2000);
279 anx7808_clear_bits(anx7808, HDMI_RX_SRST_REG, HDCP_MAN_RST);
280 anx7808_set_bits(anx7808, HDMI_RX_SRST_REG, SW_MAN_RST);
281 usleep_range(1000, 2000);
282 anx7808_clear_bits(anx7808, HDMI_RX_SRST_REG, SW_MAN_RST);
283 anx7808_set_bits(anx7808, HDMI_RX_SRST_REG, TMDS_RST);
284 anx7808_write_reg(anx7808, HDMI_RX_AEC_EN0_REG,
285 AEC_EN07 | AEC_EN06 | AEC_EN05 | AEC_EN02);
286 anx7808_write_reg(anx7808, HDMI_RX_AEC_EN1_REG,
287 AEC_EN12 | AEC_EN10 | AEC_EN09 | AEC_EN08);
288 anx7808_write_reg(anx7808, HDMI_RX_AEC_EN2_REG,
289 AEC_EN23 | AEC_EN22 | AEC_EN21 | AEC_EN20);
290 anx7808_set_bits(anx7808, HDMI_RX_AEC_CTRL_REG, AVC_EN);
291 anx7808_clear_bits(anx7808, HDMI_RX_SYS_PWDN1_REG, PWDN_CTRL);
293 anx7808_write_reg(anx7808, HDMI_RX_INT_MASK1_REG, 0x00);
294 anx7808_write_reg(anx7808, HDMI_RX_INT_MASK2_REG, 0x00);
295 anx7808_write_reg(anx7808, HDMI_RX_INT_MASK3_REG, 0x00);
296 anx7808_write_reg(anx7808, HDMI_RX_INT_MASK4_REG, 0x00);
297 anx7808_write_reg(anx7808, HDMI_RX_INT_MASK5_REG, 0x00);
298 anx7808_write_reg(anx7808, HDMI_RX_INT_MASK6_REG, 0x00);
299 anx7808_write_reg(anx7808, HDMI_RX_INT_MASK7_REG, 0x00);
301 anx7808_set_bits(anx7808, HDMI_RX_VID_DATA_RNG_CTRL_REG,
303 anx7808_write_reg(anx7808, HDMI_RX_CEC_CTRL_REG, CEC_RST);
304 anx7808_write_reg(anx7808, HDMI_RX_CEC_SPEED_CTRL_REG, CEC_SPEED_27M);
305 anx7808_write_reg(anx7808, HDMI_RX_CEC_CTRL_REG, CEC_RX_EN);
307 anx7808_write_reg(anx7808, HDMI_RX_TMDS_CTRL_REG2, 0x00);
308 anx7808_write_reg(anx7808, HDMI_RX_TMDS_CTRL_REG4, 0x28);
309 anx7808_write_reg(anx7808, HDMI_RX_TMDS_CTRL_REG5, 0xE3);
310 anx7808_write_reg(anx7808, HDMI_RX_TMDS_CTRL_REG7, 0x70);
311 anx7808_write_reg(anx7808, HDMI_RX_TMDS_CTRL_REG19, 0x00);
312 anx7808_write_reg(anx7808, HDMI_RX_TMDS_CTRL_REG21, 0x04);
313 anx7808_write_reg(anx7808, HDMI_RX_TMDS_CTRL_REG22, 0x38);
315 DRM_DEBUG_KMS("Issuing HPD low.\n");
316 anx7808_clear_bits(anx7808, SP_TX_VID_CTRL3_REG, HPD_OUT);
317 anx7808_set_bits(anx7808, HDMI_RX_TMDS_CTRL_REG6, TERM_PD);
320 static void anx7808_tx_initialization(struct anx7808_data *anx7808)
322 DRM_DEBUG_KMS("Initializing ANX7808 transmitter.\n");
324 anx7808_write_reg(anx7808, SP_TX_EXTRA_ADDR_REG, I2C_EXTRA_ADDR);
325 anx7808_set_bits(anx7808, SP_TX_HDCP_CTRL, LINK_POLLING);
326 anx7808_clear_bits(anx7808, SP_TX_HDCP_CTRL, AUTO_START | AUTO_EN);
327 anx7808_set_bits(anx7808, SP_TX_LINK_DEBUG_REG, M_VID_DEBUG);
328 anx7808_set_bits(anx7808, SP_TX_DEBUG_REG1,
329 FORCE_HPD | FORCE_PLL_LOCK | POLLING_EN);
330 anx7808_set_bits(anx7808, SP_TX_PLL_FILTER_CTRL11, AUX_TERM_50OHM);
331 anx7808_clear_bits(anx7808, SP_TX_PLL_FILTER_CTRL6,
332 P5V_PROTECT_PD | SHORT_PROTECT_PD);
333 anx7808_set_bits(anx7808, SP_TX_ANALOG_DEBUG_REG2, POWERON_TIME_1P5MS);
334 anx7808_set_bits(anx7808, SP_TX_HDCP_CTRL0_REG,
335 BKSV_SRM_PASS | KSVLIST_VLD);
337 anx7808_write_reg(anx7808, SP_TX_ANALOG_CTRL, 0xC5);
338 anx7808_write_reg(anx7808, I2C_GEN_10US_TIMER0, 0x0E);
339 anx7808_write_reg(anx7808, I2C_GEN_10US_TIMER1, 0x01);
341 anx7808_write_reg(anx7808, SP_TX_DP_POLLING_CTRL_REG,
342 AUTO_POLLING_DISABLE);
343 anx7808_write_reg(anx7808, SP_TX_LINK_CHK_TIMER, 0x1D);
345 anx7808_set_bits(anx7808, SP_TX_MISC_CTRL_REG, EQ_TRAINING_LOOP);
347 anx7808_write_reg(anx7808, SP_COMMON_INT_MASK1, 0x00);
348 anx7808_write_reg(anx7808, SP_COMMON_INT_MASK2, 0x00);
349 anx7808_write_reg(anx7808, SP_COMMON_INT_MASK3, 0x00);
350 anx7808_write_reg(anx7808, SP_COMMON_INT_MASK4, 0x00);
351 anx7808_write_reg(anx7808, SP_INT_MASK, 0x90);
352 anx7808_write_reg(anx7808, SP_TX_INT_CTRL_REG, 0x01);
354 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG0, 0x19);
355 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG4, 0x1B);
356 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG7, 0x22);
357 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG9, 0x23);
358 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG14, 0x09);
359 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG17, 0x16);
360 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG19, 0x1F);
361 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG1, 0x26);
362 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG5, 0x28);
363 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG8, 0x2F);
364 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG15, 0x10);
365 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG18, 0x1F);
366 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG2, 0x36);
367 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG6, 0x3C);
368 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG16, 0x18);
369 anx7808_write_reg(anx7808, SP_TX_LT_CTRL_REG3, 0x3F);
372 static int anx7808_cable_plug(struct anx7808_data *anx7808)
377 anx7808_power_on(anx7808);
378 anx7808_clear_bits(anx7808, SP_POWERD_CTRL_REG, REGISTER_PD);
379 anx7808_clear_bits(anx7808, SP_POWERD_CTRL_REG, TOTAL_PD);
381 anx7808_rx_initialization(anx7808);
382 anx7808_tx_initialization(anx7808);
384 anx7808_vbus_power_on(anx7808);
387 DRM_DEBUG_KMS("Issuing HPD high.\n");
388 anx7808_set_bits(anx7808, SP_TX_VID_CTRL3_REG, HPD_OUT);
389 anx7808_clear_bits(anx7808, HDMI_RX_TMDS_CTRL_REG6, TERM_PD);
391 err = anx7808_aux_dpcd_read(anx7808, DOWN_STREAM_STATUS_1, 1, &status);
394 if (((~status) & (DOWN_R_TERM_DET | DOWN_STRM_HPD))) {
395 DRM_INFO("HDMI connection not found: 0x%02x\n", status);
402 void anx7808_work(struct work_struct *work)
404 struct anx7808_data *anx7808 =
405 container_of(work, struct anx7808_data, work);
406 anx7808_cable_plug(anx7808);
409 static irqreturn_t anx7808_cable_det_isr(int irq, void *data)
411 struct anx7808_data *anx7808 = data;
412 DRM_INFO("Detected cable insertion.\n");
413 schedule_work(&anx7808->work);
418 static void anx7808_free_gpios(struct anx7808_data *anx7808)
420 gpio_free(anx7808->cable_det_gpio);
421 gpio_free(anx7808->intp_gpio);
422 gpio_free(anx7808->reset_gpio);
423 gpio_free(anx7808->pd_gpio);
426 static void unregister_i2c_clients(struct anx7808_data *anx7808)
429 i2c_unregister_device(anx7808->rx_p1);
431 i2c_unregister_device(anx7808->rx_p0);
433 i2c_unregister_device(anx7808->tx_p2);
435 i2c_unregister_device(anx7808->tx_p1);
438 static int anx7808_probe(struct i2c_client *client,
439 const struct i2c_device_id *id)
442 struct device_node *node = client->dev.of_node;
443 struct anx7808_data *anx7808;
445 anx7808 = devm_kzalloc(&client->dev, sizeof(struct anx7808_data),
448 DRM_ERROR("Failed to allocate platform_data.\n");
451 i2c_set_clientdata(client, anx7808);
453 anx7808->vdd_mydp = regulator_get(&client->dev, "vdd_mydp");
454 if (IS_ERR(anx7808->vdd_mydp)) {
455 DRM_ERROR("Failed to find regulator vdd_mydp.\n");
456 return PTR_ERR(anx7808->vdd_mydp);
459 anx7808->pd_gpio = of_get_named_gpio(node, "pd-gpio", 0);
460 if (!gpio_is_valid(anx7808->pd_gpio)) {
461 DRM_ERROR("Failed to locate pd-gpio.\n");
462 ret = anx7808->pd_gpio;
466 anx7808->reset_gpio = of_get_named_gpio(node, "reset-gpio", 0);
467 if (!gpio_is_valid(anx7808->reset_gpio)) {
468 DRM_ERROR("Failed to locate reset-gpio.\n");
469 ret = anx7808->reset_gpio;
473 anx7808->intp_gpio = of_get_named_gpio(node, "intp-gpio", 0);
474 if (!gpio_is_valid(anx7808->intp_gpio)) {
475 DRM_ERROR("Failed to locate intp-gpio.\n");
476 ret = anx7808->intp_gpio;
480 anx7808->cable_det_gpio = of_get_named_gpio(node, "cable-det-gpio", 0);
481 if (!gpio_is_valid(anx7808->cable_det_gpio)) {
482 DRM_ERROR("Failed to locate cable-det-gpio.\n");
483 ret = anx7808->cable_det_gpio;
487 ret = gpio_request_one(anx7808->pd_gpio, GPIOF_OUT_INIT_HIGH,
490 DRM_ERROR("Failed to request pd_gpio.\n");
494 ret = gpio_request_one(anx7808->reset_gpio, GPIOF_OUT_INIT_LOW,
495 "anx7808_reset_gpio");
497 DRM_ERROR("Failed to request reset_gpio.\n");
501 ret = gpio_request_one(anx7808->intp_gpio, GPIOF_DIR_IN,
502 "anx7808_intp_gpio");
504 DRM_ERROR("Failed to request intp_gpio.\n");
508 ret = gpio_request_one(anx7808->cable_det_gpio, GPIOF_DIR_IN,
509 "anx7808_cable_det_gpio");
511 DRM_ERROR("Failed to request cable_det_gpio.\n");
515 anx7808->tx_p0 = client;
516 if (!((anx7808->tx_p0->addr) == TX_P0 >> 1)) {
517 DRM_ERROR("I2C client address %02x != expected value %02x.\n",
518 anx7808->tx_p0->addr, TX_P0 >> 1);
521 anx7808->tx_p1 = i2c_new_dummy(client->adapter, TX_P1 >> 1);
522 if (!anx7808->tx_p1) {
523 DRM_ERROR("Failed to reserve i2c bus %02x.\n", TX_P1 >> 1);
527 anx7808->tx_p2 = i2c_new_dummy(client->adapter, TX_P2 >> 1);
528 if (!anx7808->tx_p2) {
529 DRM_ERROR("Failed to reserve i2c bus %02x.\n", TX_P2 >> 1);
533 anx7808->rx_p0 = i2c_new_dummy(client->adapter, RX_P0 >> 1);
534 if (!anx7808->rx_p0) {
535 DRM_ERROR("Failed to reserve i2c bus %02x.\n", RX_P0 >> 1);
539 anx7808->rx_p1 = i2c_new_dummy(client->adapter, RX_P1 >> 1);
540 if (!anx7808->rx_p1) {
541 DRM_ERROR("Failed to reserve i2c bus %02x.\n", RX_P1 >> 1);
546 anx7808_power_on(anx7808);
547 ret = anx7808_chip_located(anx7808);
548 anx7808_power_off(anx7808);
552 anx7808->cable_det_irq = gpio_to_irq(anx7808->cable_det_gpio);
553 if (anx7808->cable_det_irq < 0) {
554 DRM_ERROR("Failed to get irq: %d\n", anx7808->cable_det_irq);
558 INIT_WORK(&anx7808->work, anx7808_work);
560 ret = devm_request_irq(&client->dev,
561 anx7808->cable_det_irq,
562 anx7808_cable_det_isr,
567 DRM_ERROR("Failed to request irq: %d\n", ret);
571 DRM_INFO("ANX7808 initialization successful.\n");
575 unregister_i2c_clients(anx7808);
577 anx7808_free_gpios(anx7808);
579 regulator_put(anx7808->vdd_mydp);
583 static int anx7808_remove(struct i2c_client *client)
585 struct anx7808_data *anx7808 = i2c_get_clientdata(client);
586 unregister_i2c_clients(anx7808);
587 anx7808_free_gpios(anx7808);
588 regulator_put(anx7808->vdd_mydp);
592 static const struct i2c_device_id anx7808_id[] = {
597 MODULE_DEVICE_TABLE(i2c, anx7808_id);
599 static struct i2c_driver anx7808_driver = {
602 .owner = THIS_MODULE,
604 .probe = anx7808_probe,
605 .remove = anx7808_remove,
606 .id_table = anx7808_id,
609 static int __init anx7808_init(void)
613 ret = i2c_add_driver(&anx7808_driver);
615 DRM_ERROR("Failed to register anx7808 i2c driver.\n");
619 static void __exit anx7808_exit(void)
621 i2c_del_driver(&anx7808_driver);
624 module_init(anx7808_init);
625 module_exit(anx7808_exit);
627 MODULE_DESCRIPTION("ANX7808 driver");
628 MODULE_AUTHOR("Jeremy Thorpe <jeremyt@chromium.org>");
629 MODULE_LICENSE("GPL");