drivers/infiniband/hw/mlx4/mad.c

   1 /*
   2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <rdma/ib_mad.h>
  34 #include <rdma/ib_smi.h>
  35 #include <rdma/ib_sa.h>
  36 #include <rdma/ib_cache.h>
  37
  38 #include <linux/random.h>
  39 #include <linux/mlx4/cmd.h>
  40 #include <linux/gfp.h>
  41 #include <rdma/ib_pma.h>
  42
  43 #include "mlx4_ib.h"
  44
  45 enum {
  46         MLX4_IB_VENDOR_CLASS1 = 0x9,
  47         MLX4_IB_VENDOR_CLASS2 = 0xa
  48 };
  49
  50 #define MLX4_TUN_SEND_WRID_SHIFT 34
  51 #define MLX4_TUN_QPN_SHIFT 32
  52 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
  53 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
  54
  55 #define MLX4_TUN_IS_RECV(a)  (((a) >>  MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
  56 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
  57
  58  /* Port mgmt change event handling */
  59
  60 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
  61 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
  62 #define NUM_IDX_IN_PKEY_TBL_BLK 32
  63 #define GUID_TBL_ENTRY_SIZE 8      /* size in bytes */
  64 #define GUID_TBL_BLK_NUM_ENTRIES 8
  65 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
  66
  67 struct mlx4_mad_rcv_buf {
  68         struct ib_grh grh;
  69         u8 payload[256];
  70 } __packed;
  71
  72 struct mlx4_mad_snd_buf {
  73         u8 payload[256];
  74 } __packed;
  75
  76 struct mlx4_tunnel_mad {
  77         struct ib_grh grh;
  78         struct mlx4_ib_tunnel_header hdr;
  79         struct ib_mad mad;
  80 } __packed;
  81
  82 struct mlx4_rcv_tunnel_mad {
  83         struct mlx4_rcv_tunnel_hdr hdr;
  84         struct ib_grh grh;
  85         struct ib_mad mad;
  86 } __packed;
  87
  88 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
  89 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
  90 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
  91                                 int block, u32 change_bitmap);
  92
  93 __be64 mlx4_ib_gen_node_guid(void)
  94 {
  95 #define NODE_GUID_HI    ((u64) (((u64)IB_OPENIB_OUI) << 40))
  96         return cpu_to_be64(NODE_GUID_HI | prandom_u32());
  97 }
  98
  99 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
 100 {
 101         return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
 102                 cpu_to_be64(0xff00000000000000LL);
 103 }
 104
 105 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
 106                  int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
 107                  void *in_mad, void *response_mad)
 108 {
 109         struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
 110         void *inbox;
 111         int err;
 112         u32 in_modifier = port;
 113         u8 op_modifier = 0;
 114
 115         inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 116         if (IS_ERR(inmailbox))
 117                 return PTR_ERR(inmailbox);
 118         inbox = inmailbox->buf;
 119
 120         outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 121         if (IS_ERR(outmailbox)) {
 122                 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 123                 return PTR_ERR(outmailbox);
 124         }
 125
 126         memcpy(inbox, in_mad, 256);
 127
 128         /*
 129          * Key check traps can't be generated unless we have in_wc to
 130          * tell us where to send the trap.
 131          */
 132         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
 133                 op_modifier |= 0x1;
 134         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
 135                 op_modifier |= 0x2;
 136         if (mlx4_is_mfunc(dev->dev) &&
 137             (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
 138                 op_modifier |= 0x8;
 139
 140         if (in_wc) {
 141                 struct {
 142                         __be32          my_qpn;
 143                         u32             reserved1;
 144                         __be32          rqpn;
 145                         u8              sl;
 146                         u8              g_path;
 147                         u16             reserved2[2];
 148                         __be16          pkey;
 149                         u32             reserved3[11];
 150                         u8              grh[40];
 151                 } *ext_info;
 152
 153                 memset(inbox + 256, 0, 256);
 154                 ext_info = inbox + 256;
 155
 156                 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
 157                 ext_info->rqpn   = cpu_to_be32(in_wc->src_qp);
 158                 ext_info->sl     = in_wc->sl << 4;
 159                 ext_info->g_path = in_wc->dlid_path_bits |
 160                         (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
 161                 ext_info->pkey   = cpu_to_be16(in_wc->pkey_index);
 162
 163                 if (in_grh)
 164                         memcpy(ext_info->grh, in_grh, 40);
 165
 166                 op_modifier |= 0x4;
 167
 168                 in_modifier |= in_wc->slid << 16;
 169         }
 170
 171         err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
 172                            mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
 173                            MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
 174                            (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
 175
 176         if (!err)
 177                 memcpy(response_mad, outmailbox->buf, 256);
 178
 179         mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 180         mlx4_free_cmd_mailbox(dev->dev, outmailbox);
 181
 182         return err;
 183 }
 184
 185 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
 186 {
 187         struct ib_ah *new_ah;
 188         struct ib_ah_attr ah_attr;
 189         unsigned long flags;
 190
 191         if (!dev->send_agent[port_num - 1][0])
 192                 return;
 193
 194         memset(&ah_attr, 0, sizeof ah_attr);
 195         ah_attr.dlid     = lid;
 196         ah_attr.sl       = sl;
 197         ah_attr.port_num = port_num;
 198
 199         new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
 200                               &ah_attr);
 201         if (IS_ERR(new_ah))
 202                 return;
 203
 204         spin_lock_irqsave(&dev->sm_lock, flags);
 205         if (dev->sm_ah[port_num - 1])
 206                 ib_destroy_ah(dev->sm_ah[port_num - 1]);
 207         dev->sm_ah[port_num - 1] = new_ah;
 208         spin_unlock_irqrestore(&dev->sm_lock, flags);
 209 }
 210
 211 /*
 212  * Snoop SM MADs for port info, GUID info, and  P_Key table sets, so we can
 213  * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
 214  */
 215 static void smp_snoop(struct ib_device *ibdev, u8 port_num, struct ib_mad *mad,
 216                       u16 prev_lid)
 217 {
 218         struct ib_port_info *pinfo;
 219         u16 lid;
 220         __be16 *base;
 221         u32 bn, pkey_change_bitmap;
 222         int i;
 223
 224
 225         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 226         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 227              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 228             mad->mad_hdr.method == IB_MGMT_METHOD_SET)
 229                 switch (mad->mad_hdr.attr_id) {
 230                 case IB_SMP_ATTR_PORT_INFO:
 231                         pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
 232                         lid = be16_to_cpu(pinfo->lid);
 233
 234                         update_sm_ah(dev, port_num,
 235                                      be16_to_cpu(pinfo->sm_lid),
 236                                      pinfo->neighbormtu_mastersmsl & 0xf);
 237
 238                         if (pinfo->clientrereg_resv_subnetto & 0x80)
 239                                 handle_client_rereg_event(dev, port_num);
 240
 241                         if (prev_lid != lid)
 242                                 handle_lid_change_event(dev, port_num);
 243                         break;
 244
 245                 case IB_SMP_ATTR_PKEY_TABLE:
 246                         if (!mlx4_is_mfunc(dev->dev)) {
 247                                 mlx4_ib_dispatch_event(dev, port_num,
 248                                                        IB_EVENT_PKEY_CHANGE);
 249                                 break;
 250                         }
 251
 252                         /* at this point, we are running in the master.
 253                          * Slaves do not receive SMPs.
 254                          */
 255                         bn  = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
 256                         base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
 257                         pkey_change_bitmap = 0;
 258                         for (i = 0; i < 32; i++) {
 259                                 pr_debug("PKEY[%d] = x%x\n",
 260                                          i + bn*32, be16_to_cpu(base[i]));
 261                                 if (be16_to_cpu(base[i]) !=
 262                                     dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
 263                                         pkey_change_bitmap |= (1 << i);
 264                                         dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
 265                                                 be16_to_cpu(base[i]);
 266                                 }
 267                         }
 268                         pr_debug("PKEY Change event: port=%d, "
 269                                  "block=0x%x, change_bitmap=0x%x\n",
 270                                  port_num, bn, pkey_change_bitmap);
 271
 272                         if (pkey_change_bitmap) {
 273                                 mlx4_ib_dispatch_event(dev, port_num,
 274                                                        IB_EVENT_PKEY_CHANGE);
 275                                 if (!dev->sriov.is_going_down)
 276                                         __propagate_pkey_ev(dev, port_num, bn,
 277                                                             pkey_change_bitmap);
 278                         }
 279                         break;
 280
 281                 case IB_SMP_ATTR_GUID_INFO:
 282                         /* paravirtualized master's guid is guid 0 -- does not change */
 283                         if (!mlx4_is_master(dev->dev))
 284                                 mlx4_ib_dispatch_event(dev, port_num,
 285                                                        IB_EVENT_GID_CHANGE);
 286                         /*if master, notify relevant slaves*/
 287                         if (mlx4_is_master(dev->dev) &&
 288                             !dev->sriov.is_going_down) {
 289                                 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
 290                                 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
 291                                                                     (u8 *)(&((struct ib_smp *)mad)->data));
 292                                 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
 293                                                                      (u8 *)(&((struct ib_smp *)mad)->data));
 294                         }
 295                         break;
 296
 297                 default:
 298                         break;
 299                 }
 300 }
 301
 302 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 303                                 int block, u32 change_bitmap)
 304 {
 305         int i, ix, slave, err;
 306         int have_event = 0;
 307
 308         for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
 309                 if (slave == mlx4_master_func_num(dev->dev))
 310                         continue;
 311                 if (!mlx4_is_slave_active(dev->dev, slave))
 312                         continue;
 313
 314                 have_event = 0;
 315                 for (i = 0; i < 32; i++) {
 316                         if (!(change_bitmap & (1 << i)))
 317                                 continue;
 318                         for (ix = 0;
 319                              ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
 320                                 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
 321                                     [ix] == i + 32 * block) {
 322                                         err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
 323                                         pr_debug("propagate_pkey_ev: slave %d,"
 324                                                  " port %d, ix %d (%d)\n",
 325                                                  slave, port_num, ix, err);
 326                                         have_event = 1;
 327                                         break;
 328                                 }
 329                         }
 330                         if (have_event)
 331                                 break;
 332                 }
 333         }
 334 }
 335
 336 static void node_desc_override(struct ib_device *dev,
 337                                struct ib_mad *mad)
 338 {
 339         unsigned long flags;
 340
 341         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 342              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 343             mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
 344             mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
 345                 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
 346                 memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
 347                 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
 348         }
 349 }
 350
 351 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, struct ib_mad *mad)
 352 {
 353         int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
 354         struct ib_mad_send_buf *send_buf;
 355         struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
 356         int ret;
 357         unsigned long flags;
 358
 359         if (agent) {
 360                 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
 361                                               IB_MGMT_MAD_DATA, GFP_ATOMIC);
 362                 if (IS_ERR(send_buf))
 363                         return;
 364                 /*
 365                  * We rely here on the fact that MLX QPs don't use the
 366                  * address handle after the send is posted (this is
 367                  * wrong following the IB spec strictly, but we know
 368                  * it's OK for our devices).
 369                  */
 370                 spin_lock_irqsave(&dev->sm_lock, flags);
 371                 memcpy(send_buf->mad, mad, sizeof *mad);
 372                 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
 373                         ret = ib_post_send_mad(send_buf, NULL);
 374                 else
 375                         ret = -EINVAL;
 376                 spin_unlock_irqrestore(&dev->sm_lock, flags);
 377
 378                 if (ret)
 379                         ib_free_send_mad(send_buf);
 380         }
 381 }
 382
 383 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
 384                                                              struct ib_sa_mad *sa_mad)
 385 {
 386         int ret = 0;
 387
 388         /* dispatch to different sa handlers */
 389         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
 390         case IB_SA_ATTR_MC_MEMBER_REC:
 391                 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
 392                 break;
 393         default:
 394                 break;
 395         }
 396         return ret;
 397 }
 398
 399 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
 400 {
 401         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 402         int i;
 403
 404         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
 405                 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
 406                         return i;
 407         }
 408         return -1;
 409 }
 410
 411
 412 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
 413                                    u8 port, u16 pkey, u16 *ix)
 414 {
 415         int i, ret;
 416         u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
 417         u16 slot_pkey;
 418
 419         if (slave == mlx4_master_func_num(dev->dev))
 420                 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
 421
 422         unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
 423
 424         for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
 425                 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
 426                         continue;
 427
 428                 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
 429
 430                 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
 431                 if (ret)
 432                         continue;
 433                 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
 434                         if (slot_pkey & 0x8000) {
 435                                 *ix = (u16) pkey_ix;
 436                                 return 0;
 437                         } else {
 438                                 /* take first partial pkey index found */
 439                                 if (partial_ix == 0xFF)
 440                                         partial_ix = pkey_ix;
 441                         }
 442                 }
 443         }
 444
 445         if (partial_ix < 0xFF) {
 446                 *ix = (u16) partial_ix;
 447                 return 0;
 448         }
 449
 450         return -EINVAL;
 451 }
 452
 453 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
 454                           enum ib_qp_type dest_qpt, struct ib_wc *wc,
 455                           struct ib_grh *grh, struct ib_mad *mad)
 456 {
 457         struct ib_sge list;
 458         struct ib_send_wr wr, *bad_wr;
 459         struct mlx4_ib_demux_pv_ctx *tun_ctx;
 460         struct mlx4_ib_demux_pv_qp *tun_qp;
 461         struct mlx4_rcv_tunnel_mad *tun_mad;
 462         struct ib_ah_attr attr;
 463         struct ib_ah *ah;
 464         struct ib_qp *src_qp = NULL;
 465         unsigned tun_tx_ix = 0;
 466         int dqpn;
 467         int ret = 0;
 468         u16 tun_pkey_ix;
 469         u16 cached_pkey;
 470         u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
 471
 472         if (dest_qpt > IB_QPT_GSI)
 473                 return -EINVAL;
 474
 475         tun_ctx = dev->sriov.demux[port-1].tun[slave];
 476
 477         /* check if proxy qp created */
 478         if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
 479                 return -EAGAIN;
 480
 481         /* QP0 forwarding only for Dom0 */
 482         if (!dest_qpt && (mlx4_master_func_num(dev->dev) != slave))
 483                 return -EINVAL;
 484
 485         if (!dest_qpt)
 486                 tun_qp = &tun_ctx->qp[0];
 487         else
 488                 tun_qp = &tun_ctx->qp[1];
 489
 490         /* compute P_Key index to put in tunnel header for slave */
 491         if (dest_qpt) {
 492                 u16 pkey_ix;
 493                 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
 494                 if (ret)
 495                         return -EINVAL;
 496
 497                 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
 498                 if (ret)
 499                         return -EINVAL;
 500                 tun_pkey_ix = pkey_ix;
 501         } else
 502                 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
 503
 504         dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
 505
 506         /* get tunnel tx data buf for slave */
 507         src_qp = tun_qp->qp;
 508
 509         /* create ah. Just need an empty one with the port num for the post send.
 510          * The driver will set the force loopback bit in post_send */
 511         memset(&attr, 0, sizeof attr);
 512         attr.port_num = port;
 513         if (is_eth) {
 514                 ret = mlx4_get_roce_gid_from_slave(dev->dev, port, slave, attr.grh.dgid.raw);
 515                 if (ret)
 516                         return ret;
 517                 attr.ah_flags = IB_AH_GRH;
 518         }
 519         ah = ib_create_ah(tun_ctx->pd, &attr);
 520         if (IS_ERR(ah))
 521                 return -ENOMEM;
 522
 523         /* allocate tunnel tx buf after pass failure returns */
 524         spin_lock(&tun_qp->tx_lock);
 525         if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
 526             (MLX4_NUM_TUNNEL_BUFS - 1))
 527                 ret = -EAGAIN;
 528         else
 529                 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
 530         spin_unlock(&tun_qp->tx_lock);
 531         if (ret)
 532                 goto out;
 533
 534         tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
 535         if (tun_qp->tx_ring[tun_tx_ix].ah)
 536                 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
 537         tun_qp->tx_ring[tun_tx_ix].ah = ah;
 538         ib_dma_sync_single_for_cpu(&dev->ib_dev,
 539                                    tun_qp->tx_ring[tun_tx_ix].buf.map,
 540                                    sizeof (struct mlx4_rcv_tunnel_mad),
 541                                    DMA_TO_DEVICE);
 542
 543         /* copy over to tunnel buffer */
 544         if (grh)
 545                 memcpy(&tun_mad->grh, grh, sizeof *grh);
 546         memcpy(&tun_mad->mad, mad, sizeof *mad);
 547
 548         /* adjust tunnel data */
 549         tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
 550         tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
 551         tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
 552         tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
 553         tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
 554
 555         ib_dma_sync_single_for_device(&dev->ib_dev,
 556                                       tun_qp->tx_ring[tun_tx_ix].buf.map,
 557                                       sizeof (struct mlx4_rcv_tunnel_mad),
 558                                       DMA_TO_DEVICE);
 559
 560         list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
 561         list.length = sizeof (struct mlx4_rcv_tunnel_mad);
 562         list.lkey = tun_ctx->mr->lkey;
 563
 564         wr.wr.ud.ah = ah;
 565         wr.wr.ud.port_num = port;
 566         wr.wr.ud.remote_qkey = IB_QP_SET_QKEY;
 567         wr.wr.ud.remote_qpn = dqpn;
 568         wr.next = NULL;
 569         wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
 570         wr.sg_list = &list;
 571         wr.num_sge = 1;
 572         wr.opcode = IB_WR_SEND;
 573         wr.send_flags = IB_SEND_SIGNALED;
 574
 575         ret = ib_post_send(src_qp, &wr, &bad_wr);
 576 out:
 577         if (ret)
 578                 ib_destroy_ah(ah);
 579         return ret;
 580 }
 581
 582 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
 583                         struct ib_wc *wc, struct ib_grh *grh,
 584                         struct ib_mad *mad)
 585 {
 586         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 587         int err;
 588         int slave;
 589         u8 *slave_id;
 590         int is_eth = 0;
 591
 592         if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
 593                 is_eth = 0;
 594         else
 595                 is_eth = 1;
 596
 597         if (is_eth) {
 598                 if (!(wc->wc_flags & IB_WC_GRH)) {
 599                         mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
 600                         return -EINVAL;
 601                 }
 602                 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
 603                         mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
 604                         return -EINVAL;
 605                 }
 606                 if (mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave)) {
 607                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 608                         return -ENOENT;
 609                 }
 610                 if (slave >= dev->dev->caps.sqp_demux) {
 611                         mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 612                                      slave, dev->dev->caps.sqp_demux);
 613                         return -ENOENT;
 614                 }
 615
 616                 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
 617                         return 0;
 618
 619                 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 620                 if (err)
 621                         pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 622                                  slave, err);
 623                 return 0;
 624         }
 625
 626         /* Initially assume that this mad is for us */
 627         slave = mlx4_master_func_num(dev->dev);
 628
 629         /* See if the slave id is encoded in a response mad */
 630         if (mad->mad_hdr.method & 0x80) {
 631                 slave_id = (u8 *) &mad->mad_hdr.tid;
 632                 slave = *slave_id;
 633                 if (slave != 255) /*255 indicates the dom0*/
 634                         *slave_id = 0; /* remap tid */
 635         }
 636
 637         /* If a grh is present, we demux according to it */
 638         if (wc->wc_flags & IB_WC_GRH) {
 639                 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
 640                 if (slave < 0) {
 641                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 642                         return -ENOENT;
 643                 }
 644         }
 645         /* Class-specific handling */
 646         switch (mad->mad_hdr.mgmt_class) {
 647         case IB_MGMT_CLASS_SUBN_ADM:
 648                 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
 649                                              (struct ib_sa_mad *) mad))
 650                         return 0;
 651                 break;
 652         case IB_MGMT_CLASS_CM:
 653                 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
 654                         return 0;
 655                 break;
 656         case IB_MGMT_CLASS_DEVICE_MGMT:
 657                 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
 658                         return 0;
 659                 break;
 660         default:
 661                 /* Drop unsupported classes for slaves in tunnel mode */
 662                 if (slave != mlx4_master_func_num(dev->dev)) {
 663                         pr_debug("dropping unsupported ingress mad from class:%d "
 664                                  "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
 665                         return 0;
 666                 }
 667         }
 668         /*make sure that no slave==255 was not handled yet.*/
 669         if (slave >= dev->dev->caps.sqp_demux) {
 670                 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 671                              slave, dev->dev->caps.sqp_demux);
 672                 return -ENOENT;
 673         }
 674
 675         err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 676         if (err)
 677                 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 678                          slave, err);
 679         return 0;
 680 }
 681
 682 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 683                         struct ib_wc *in_wc, struct ib_grh *in_grh,
 684                         struct ib_mad *in_mad, struct ib_mad *out_mad)
 685 {
 686         u16 slid, prev_lid = 0;
 687         int err;
 688         struct ib_port_attr pattr;
 689
 690         if (in_wc && in_wc->qp->qp_num) {
 691                 pr_debug("received MAD: slid:%d sqpn:%d "
 692                         "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
 693                         in_wc->slid, in_wc->src_qp,
 694                         in_wc->dlid_path_bits,
 695                         in_wc->qp->qp_num,
 696                         in_wc->wc_flags,
 697                         in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
 698                         be16_to_cpu(in_mad->mad_hdr.attr_id));
 699                 if (in_wc->wc_flags & IB_WC_GRH) {
 700                         pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
 701                                  be64_to_cpu(in_grh->sgid.global.subnet_prefix),
 702                                  be64_to_cpu(in_grh->sgid.global.interface_id));
 703                         pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
 704                                  be64_to_cpu(in_grh->dgid.global.subnet_prefix),
 705                                  be64_to_cpu(in_grh->dgid.global.interface_id));
 706                 }
 707         }
 708
 709         slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
 710
 711         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
 712                 forward_trap(to_mdev(ibdev), port_num, in_mad);
 713                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 714         }
 715
 716         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 717             in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
 718                 if (in_mad->mad_hdr.method   != IB_MGMT_METHOD_GET &&
 719                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_SET &&
 720                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_TRAP_REPRESS)
 721                         return IB_MAD_RESULT_SUCCESS;
 722
 723                 /*
 724                  * Don't process SMInfo queries -- the SMA can't handle them.
 725                  */
 726                 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
 727                         return IB_MAD_RESULT_SUCCESS;
 728         } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
 729                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1   ||
 730                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2   ||
 731                    in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
 732                 if (in_mad->mad_hdr.method  != IB_MGMT_METHOD_GET &&
 733                     in_mad->mad_hdr.method  != IB_MGMT_METHOD_SET)
 734                         return IB_MAD_RESULT_SUCCESS;
 735         } else
 736                 return IB_MAD_RESULT_SUCCESS;
 737
 738         if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 739              in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 740             in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
 741             in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
 742             !ib_query_port(ibdev, port_num, &pattr))
 743                 prev_lid = pattr.lid;
 744
 745         err = mlx4_MAD_IFC(to_mdev(ibdev),
 746                            (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
 747                            (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
 748                            MLX4_MAD_IFC_NET_VIEW,
 749                            port_num, in_wc, in_grh, in_mad, out_mad);
 750         if (err)
 751                 return IB_MAD_RESULT_FAILURE;
 752
 753         if (!out_mad->mad_hdr.status) {
 754                 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
 755                         smp_snoop(ibdev, port_num, in_mad, prev_lid);
 756                 /* slaves get node desc from FW */
 757                 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
 758                         node_desc_override(ibdev, out_mad);
 759         }
 760
 761         /* set return bit in status of directed route responses */
 762         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
 763                 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
 764
 765         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
 766                 /* no response for trap repress */
 767                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 768
 769         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 770 }
 771
 772 static void edit_counter(struct mlx4_counter *cnt,
 773                                         struct ib_pma_portcounters *pma_cnt)
 774 {
 775         pma_cnt->port_xmit_data = cpu_to_be32((be64_to_cpu(cnt->tx_bytes)>>2));
 776         pma_cnt->port_rcv_data  = cpu_to_be32((be64_to_cpu(cnt->rx_bytes)>>2));
 777         pma_cnt->port_xmit_packets = cpu_to_be32(be64_to_cpu(cnt->tx_frames));
 778         pma_cnt->port_rcv_packets  = cpu_to_be32(be64_to_cpu(cnt->rx_frames));
 779 }
 780
 781 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 782                         struct ib_wc *in_wc, struct ib_grh *in_grh,
 783                         struct ib_mad *in_mad, struct ib_mad *out_mad)
 784 {
 785         struct mlx4_cmd_mailbox *mailbox;
 786         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 787         int err;
 788         u32 inmod = dev->counters[port_num - 1] & 0xffff;
 789         u8 mode;
 790
 791         if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
 792                 return -EINVAL;
 793
 794         mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 795         if (IS_ERR(mailbox))
 796                 return IB_MAD_RESULT_FAILURE;
 797
 798         err = mlx4_cmd_box(dev->dev, 0, mailbox->dma, inmod, 0,
 799                            MLX4_CMD_QUERY_IF_STAT, MLX4_CMD_TIME_CLASS_C,
 800                            MLX4_CMD_WRAPPED);
 801         if (err)
 802                 err = IB_MAD_RESULT_FAILURE;
 803         else {
 804                 memset(out_mad->data, 0, sizeof out_mad->data);
 805                 mode = ((struct mlx4_counter *)mailbox->buf)->counter_mode;
 806                 switch (mode & 0xf) {
 807                 case 0:
 808                         edit_counter(mailbox->buf,
 809                                                 (void *)(out_mad->data + 40));
 810                         err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 811                         break;
 812                 default:
 813                         err = IB_MAD_RESULT_FAILURE;
 814                 }
 815         }
 816
 817         mlx4_free_cmd_mailbox(dev->dev, mailbox);
 818
 819         return err;
 820 }
 821
 822 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 823                         struct ib_wc *in_wc, struct ib_grh *in_grh,
 824                         struct ib_mad *in_mad, struct ib_mad *out_mad)
 825 {
 826         switch (rdma_port_get_link_layer(ibdev, port_num)) {
 827         case IB_LINK_LAYER_INFINIBAND:
 828                 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
 829                                       in_grh, in_mad, out_mad);
 830         case IB_LINK_LAYER_ETHERNET:
 831                 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
 832                                           in_grh, in_mad, out_mad);
 833         default:
 834                 return -EINVAL;
 835         }
 836 }
 837
 838 static void send_handler(struct ib_mad_agent *agent,
 839                          struct ib_mad_send_wc *mad_send_wc)
 840 {
 841         if (mad_send_wc->send_buf->context[0])
 842                 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
 843         ib_free_send_mad(mad_send_wc->send_buf);
 844 }
 845
 846 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
 847 {
 848         struct ib_mad_agent *agent;
 849         int p, q;
 850         int ret;
 851         enum rdma_link_layer ll;
 852
 853         for (p = 0; p < dev->num_ports; ++p) {
 854                 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
 855                 for (q = 0; q <= 1; ++q) {
 856                         if (ll == IB_LINK_LAYER_INFINIBAND) {
 857                                 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
 858                                                               q ? IB_QPT_GSI : IB_QPT_SMI,
 859                                                               NULL, 0, send_handler,
 860                                                               NULL, NULL);
 861                                 if (IS_ERR(agent)) {
 862                                         ret = PTR_ERR(agent);
 863                                         goto err;
 864                                 }
 865                                 dev->send_agent[p][q] = agent;
 866                         } else
 867                                 dev->send_agent[p][q] = NULL;
 868                 }
 869         }
 870
 871         return 0;
 872
 873 err:
 874         for (p = 0; p < dev->num_ports; ++p)
 875                 for (q = 0; q <= 1; ++q)
 876                         if (dev->send_agent[p][q])
 877                                 ib_unregister_mad_agent(dev->send_agent[p][q]);
 878
 879         return ret;
 880 }
 881
 882 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
 883 {
 884         struct ib_mad_agent *agent;
 885         int p, q;
 886
 887         for (p = 0; p < dev->num_ports; ++p) {
 888                 for (q = 0; q <= 1; ++q) {
 889                         agent = dev->send_agent[p][q];
 890                         if (agent) {
 891                                 dev->send_agent[p][q] = NULL;
 892                                 ib_unregister_mad_agent(agent);
 893                         }
 894                 }
 895
 896                 if (dev->sm_ah[p])
 897                         ib_destroy_ah(dev->sm_ah[p]);
 898         }
 899 }
 900
 901 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
 902 {
 903         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
 904
 905         if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
 906                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 907                                             MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
 908 }
 909
 910 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
 911 {
 912         /* re-configure the alias-guid and mcg's */
 913         if (mlx4_is_master(dev->dev)) {
 914                 mlx4_ib_invalidate_all_guid_record(dev, port_num);
 915
 916                 if (!dev->sriov.is_going_down) {
 917                         mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
 918                         mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 919                                                     MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
 920                 }
 921         }
 922         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
 923 }
 924
 925 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 926                               struct mlx4_eqe *eqe)
 927 {
 928         __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
 929                             GET_MASK_FROM_EQE(eqe));
 930 }
 931
 932 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
 933                                       u32 guid_tbl_blk_num, u32 change_bitmap)
 934 {
 935         struct ib_smp *in_mad  = NULL;
 936         struct ib_smp *out_mad  = NULL;
 937         u16 i;
 938
 939         if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
 940                 return;
 941
 942         in_mad  = kmalloc(sizeof *in_mad, GFP_KERNEL);
 943         out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
 944         if (!in_mad || !out_mad) {
 945                 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
 946                 goto out;
 947         }
 948
 949         guid_tbl_blk_num  *= 4;
 950
 951         for (i = 0; i < 4; i++) {
 952                 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
 953                         continue;
 954                 memset(in_mad, 0, sizeof *in_mad);
 955                 memset(out_mad, 0, sizeof *out_mad);
 956
 957                 in_mad->base_version  = 1;
 958                 in_mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
 959                 in_mad->class_version = 1;
 960                 in_mad->method        = IB_MGMT_METHOD_GET;
 961                 in_mad->attr_id       = IB_SMP_ATTR_GUID_INFO;
 962                 in_mad->attr_mod      = cpu_to_be32(guid_tbl_blk_num + i);
 963
 964                 if (mlx4_MAD_IFC(dev,
 965                                  MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
 966                                  port_num, NULL, NULL, in_mad, out_mad)) {
 967                         mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
 968                         goto out;
 969                 }
 970
 971                 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
 972                                                     port_num,
 973                                                     (u8 *)(&((struct ib_smp *)out_mad)->data));
 974                 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
 975                                                      port_num,
 976                                                      (u8 *)(&((struct ib_smp *)out_mad)->data));
 977         }
 978
 979 out:
 980         kfree(in_mad);
 981         kfree(out_mad);
 982         return;
 983 }
 984
 985 void handle_port_mgmt_change_event(struct work_struct *work)
 986 {
 987         struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
 988         struct mlx4_ib_dev *dev = ew->ib_dev;
 989         struct mlx4_eqe *eqe = &(ew->ib_eqe);
 990         u8 port = eqe->event.port_mgmt_change.port;
 991         u32 changed_attr;
 992         u32 tbl_block;
 993         u32 change_bitmap;
 994
 995         switch (eqe->subtype) {
 996         case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
 997                 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
 998
 999                 /* Update the SM ah - This should be done before handling
1000                    the other changed attributes so that MADs can be sent to the SM */
1001                 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1002                         u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1003                         u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1004                         update_sm_ah(dev, port, lid, sl);
1005                 }
1006
1007                 /* Check if it is a lid change event */
1008                 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1009                         handle_lid_change_event(dev, port);
1010
1011                 /* Generate GUID changed event */
1012                 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1013                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1014                         /*if master, notify all slaves*/
1015                         if (mlx4_is_master(dev->dev))
1016                                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1017                                                             MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1018                 }
1019
1020                 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1021                         handle_client_rereg_event(dev, port);
1022                 break;
1023
1024         case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1025                 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1026                 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1027                         propagate_pkey_ev(dev, port, eqe);
1028                 break;
1029         case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1030                 /* paravirtualized master's guid is guid 0 -- does not change */
1031                 if (!mlx4_is_master(dev->dev))
1032                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1033                 /*if master, notify relevant slaves*/
1034                 else if (!dev->sriov.is_going_down) {
1035                         tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1036                         change_bitmap = GET_MASK_FROM_EQE(eqe);
1037                         handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1038                 }
1039                 break;
1040         default:
1041                 pr_warn("Unsupported subtype 0x%x for "
1042                         "Port Management Change event\n", eqe->subtype);
1043         }
1044
1045         kfree(ew);
1046 }
1047
1048 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1049                             enum ib_event_type type)
1050 {
1051         struct ib_event event;
1052
1053         event.device            = &dev->ib_dev;
1054         event.element.port_num  = port_num;
1055         event.event             = type;
1056
1057         ib_dispatch_event(&event);
1058 }
1059
1060 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1061 {
1062         unsigned long flags;
1063         struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1064         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1065         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1066         if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1067                 queue_work(ctx->wq, &ctx->work);
1068         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1069 }
1070
1071 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1072                                   struct mlx4_ib_demux_pv_qp *tun_qp,
1073                                   int index)
1074 {
1075         struct ib_sge sg_list;
1076         struct ib_recv_wr recv_wr, *bad_recv_wr;
1077         int size;
1078
1079         size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1080                 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1081
1082         sg_list.addr = tun_qp->ring[index].map;
1083         sg_list.length = size;
1084         sg_list.lkey = ctx->mr->lkey;
1085
1086         recv_wr.next = NULL;
1087         recv_wr.sg_list = &sg_list;
1088         recv_wr.num_sge = 1;
1089         recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1090                 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1091         ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1092                                       size, DMA_FROM_DEVICE);
1093         return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1094 }
1095
1096 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1097                 int slave, struct ib_sa_mad *sa_mad)
1098 {
1099         int ret = 0;
1100
1101         /* dispatch to different sa handlers */
1102         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1103         case IB_SA_ATTR_MC_MEMBER_REC:
1104                 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1105                 break;
1106         default:
1107                 break;
1108         }
1109         return ret;
1110 }
1111
1112 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1113 {
1114         int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1115
1116         return (qpn >= proxy_start && qpn <= proxy_start + 1);
1117 }
1118
1119
1120 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1121                          enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
1122                          u32 qkey, struct ib_ah_attr *attr, struct ib_mad *mad)
1123 {
1124         struct ib_sge list;
1125         struct ib_send_wr wr, *bad_wr;
1126         struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1127         struct mlx4_ib_demux_pv_qp *sqp;
1128         struct mlx4_mad_snd_buf *sqp_mad;
1129         struct ib_ah *ah;
1130         struct ib_qp *send_qp = NULL;
1131         unsigned wire_tx_ix = 0;
1132         int ret = 0;
1133         u16 wire_pkey_ix;
1134         int src_qpnum;
1135         u8 sgid_index;
1136
1137
1138         sqp_ctx = dev->sriov.sqps[port-1];
1139
1140         /* check if proxy qp created */
1141         if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1142                 return -EAGAIN;
1143
1144         /* QP0 forwarding only for Dom0 */
1145         if (dest_qpt == IB_QPT_SMI && (mlx4_master_func_num(dev->dev) != slave))
1146                 return -EINVAL;
1147
1148         if (dest_qpt == IB_QPT_SMI) {
1149                 src_qpnum = 0;
1150                 sqp = &sqp_ctx->qp[0];
1151                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1152         } else {
1153                 src_qpnum = 1;
1154                 sqp = &sqp_ctx->qp[1];
1155                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1156         }
1157
1158         send_qp = sqp->qp;
1159
1160         /* create ah */
1161         sgid_index = attr->grh.sgid_index;
1162         attr->grh.sgid_index = 0;
1163         ah = ib_create_ah(sqp_ctx->pd, attr);
1164         if (IS_ERR(ah))
1165                 return -ENOMEM;
1166         attr->grh.sgid_index = sgid_index;
1167         to_mah(ah)->av.ib.gid_index = sgid_index;
1168         /* get rid of force-loopback bit */
1169         to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1170         spin_lock(&sqp->tx_lock);
1171         if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1172             (MLX4_NUM_TUNNEL_BUFS - 1))
1173                 ret = -EAGAIN;
1174         else
1175                 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1176         spin_unlock(&sqp->tx_lock);
1177         if (ret)
1178                 goto out;
1179
1180         sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1181         if (sqp->tx_ring[wire_tx_ix].ah)
1182                 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1183         sqp->tx_ring[wire_tx_ix].ah = ah;
1184         ib_dma_sync_single_for_cpu(&dev->ib_dev,
1185                                    sqp->tx_ring[wire_tx_ix].buf.map,
1186                                    sizeof (struct mlx4_mad_snd_buf),
1187                                    DMA_TO_DEVICE);
1188
1189         memcpy(&sqp_mad->payload, mad, sizeof *mad);
1190
1191         ib_dma_sync_single_for_device(&dev->ib_dev,
1192                                       sqp->tx_ring[wire_tx_ix].buf.map,
1193                                       sizeof (struct mlx4_mad_snd_buf),
1194                                       DMA_TO_DEVICE);
1195
1196         list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1197         list.length = sizeof (struct mlx4_mad_snd_buf);
1198         list.lkey = sqp_ctx->mr->lkey;
1199
1200         wr.wr.ud.ah = ah;
1201         wr.wr.ud.port_num = port;
1202         wr.wr.ud.pkey_index = wire_pkey_ix;
1203         wr.wr.ud.remote_qkey = qkey;
1204         wr.wr.ud.remote_qpn = remote_qpn;
1205         wr.next = NULL;
1206         wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1207         wr.sg_list = &list;
1208         wr.num_sge = 1;
1209         wr.opcode = IB_WR_SEND;
1210         wr.send_flags = IB_SEND_SIGNALED;
1211
1212         ret = ib_post_send(send_qp, &wr, &bad_wr);
1213 out:
1214         if (ret)
1215                 ib_destroy_ah(ah);
1216         return ret;
1217 }
1218
1219 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1220 {
1221         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1222         struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1223         int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1224         struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1225         struct mlx4_ib_ah ah;
1226         struct ib_ah_attr ah_attr;
1227         u8 *slave_id;
1228         int slave;
1229
1230         /* Get slave that sent this packet */
1231         if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1232             wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1233             (wc->src_qp & 0x1) != ctx->port - 1 ||
1234             wc->src_qp & 0x4) {
1235                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1236                 return;
1237         }
1238         slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1239         if (slave != ctx->slave) {
1240                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1241                              "belongs to another slave\n", wc->src_qp);
1242                 return;
1243         }
1244         if (slave != mlx4_master_func_num(dev->dev) && !(wc->src_qp & 0x2)) {
1245                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1246                              "non-master trying to send QP0 packets\n", wc->src_qp);
1247                 return;
1248         }
1249
1250         /* Map transaction ID */
1251         ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1252                                    sizeof (struct mlx4_tunnel_mad),
1253                                    DMA_FROM_DEVICE);
1254         switch (tunnel->mad.mad_hdr.method) {
1255         case IB_MGMT_METHOD_SET:
1256         case IB_MGMT_METHOD_GET:
1257         case IB_MGMT_METHOD_REPORT:
1258         case IB_SA_METHOD_GET_TABLE:
1259         case IB_SA_METHOD_DELETE:
1260         case IB_SA_METHOD_GET_MULTI:
1261         case IB_SA_METHOD_GET_TRACE_TBL:
1262                 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1263                 if (*slave_id) {
1264                         mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1265                                      "class:%d slave:%d\n", *slave_id,
1266                                      tunnel->mad.mad_hdr.mgmt_class, slave);
1267                         return;
1268                 } else
1269                         *slave_id = slave;
1270         default:
1271                 /* nothing */;
1272         }
1273
1274         /* Class-specific handling */
1275         switch (tunnel->mad.mad_hdr.mgmt_class) {
1276         case IB_MGMT_CLASS_SUBN_ADM:
1277                 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1278                               (struct ib_sa_mad *) &tunnel->mad))
1279                         return;
1280                 break;
1281         case IB_MGMT_CLASS_CM:
1282                 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1283                               (struct ib_mad *) &tunnel->mad))
1284                         return;
1285                 break;
1286         case IB_MGMT_CLASS_DEVICE_MGMT:
1287                 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1288                     tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1289                         return;
1290                 break;
1291         default:
1292                 /* Drop unsupported classes for slaves in tunnel mode */
1293                 if (slave != mlx4_master_func_num(dev->dev)) {
1294                         mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1295                                      "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1296                         return;
1297                 }
1298         }
1299
1300         /* We are using standard ib_core services to send the mad, so generate a
1301          * stadard address handle by decoding the tunnelled mlx4_ah fields */
1302         memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1303         ah.ibah.device = ctx->ib_dev;
1304         mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1305         if (ah_attr.ah_flags & IB_AH_GRH)
1306                 ah_attr.grh.sgid_index = slave;
1307
1308         mlx4_ib_send_to_wire(dev, slave, ctx->port,
1309                              is_proxy_qp0(dev, wc->src_qp, slave) ?
1310                              IB_QPT_SMI : IB_QPT_GSI,
1311                              be16_to_cpu(tunnel->hdr.pkey_index),
1312                              be32_to_cpu(tunnel->hdr.remote_qpn),
1313                              be32_to_cpu(tunnel->hdr.qkey),
1314                              &ah_attr, &tunnel->mad);
1315 }
1316
1317 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1318                                  enum ib_qp_type qp_type, int is_tun)
1319 {
1320         int i;
1321         struct mlx4_ib_demux_pv_qp *tun_qp;
1322         int rx_buf_size, tx_buf_size;
1323
1324         if (qp_type > IB_QPT_GSI)
1325                 return -EINVAL;
1326
1327         tun_qp = &ctx->qp[qp_type];
1328
1329         tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1330                                GFP_KERNEL);
1331         if (!tun_qp->ring)
1332                 return -ENOMEM;
1333
1334         tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1335                                   sizeof (struct mlx4_ib_tun_tx_buf),
1336                                   GFP_KERNEL);
1337         if (!tun_qp->tx_ring) {
1338                 kfree(tun_qp->ring);
1339                 tun_qp->ring = NULL;
1340                 return -ENOMEM;
1341         }
1342
1343         if (is_tun) {
1344                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1345                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1346         } else {
1347                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1348                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1349         }
1350
1351         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1352                 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1353                 if (!tun_qp->ring[i].addr)
1354                         goto err;
1355                 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1356                                                         tun_qp->ring[i].addr,
1357                                                         rx_buf_size,
1358                                                         DMA_FROM_DEVICE);
1359         }
1360
1361         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1362                 tun_qp->tx_ring[i].buf.addr =
1363                         kmalloc(tx_buf_size, GFP_KERNEL);
1364                 if (!tun_qp->tx_ring[i].buf.addr)
1365                         goto tx_err;
1366                 tun_qp->tx_ring[i].buf.map =
1367                         ib_dma_map_single(ctx->ib_dev,
1368                                           tun_qp->tx_ring[i].buf.addr,
1369                                           tx_buf_size,
1370                                           DMA_TO_DEVICE);
1371                 tun_qp->tx_ring[i].ah = NULL;
1372         }
1373         spin_lock_init(&tun_qp->tx_lock);
1374         tun_qp->tx_ix_head = 0;
1375         tun_qp->tx_ix_tail = 0;
1376         tun_qp->proxy_qpt = qp_type;
1377
1378         return 0;
1379
1380 tx_err:
1381         while (i > 0) {
1382                 --i;
1383                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1384                                     tx_buf_size, DMA_TO_DEVICE);
1385                 kfree(tun_qp->tx_ring[i].buf.addr);
1386         }
1387         kfree(tun_qp->tx_ring);
1388         tun_qp->tx_ring = NULL;
1389         i = MLX4_NUM_TUNNEL_BUFS;
1390 err:
1391         while (i > 0) {
1392                 --i;
1393                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1394                                     rx_buf_size, DMA_FROM_DEVICE);
1395                 kfree(tun_qp->ring[i].addr);
1396         }
1397         kfree(tun_qp->ring);
1398         tun_qp->ring = NULL;
1399         return -ENOMEM;
1400 }
1401
1402 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1403                                      enum ib_qp_type qp_type, int is_tun)
1404 {
1405         int i;
1406         struct mlx4_ib_demux_pv_qp *tun_qp;
1407         int rx_buf_size, tx_buf_size;
1408
1409         if (qp_type > IB_QPT_GSI)
1410                 return;
1411
1412         tun_qp = &ctx->qp[qp_type];
1413         if (is_tun) {
1414                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1415                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1416         } else {
1417                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1418                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1419         }
1420
1421
1422         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1423                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1424                                     rx_buf_size, DMA_FROM_DEVICE);
1425                 kfree(tun_qp->ring[i].addr);
1426         }
1427
1428         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1429                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1430                                     tx_buf_size, DMA_TO_DEVICE);
1431                 kfree(tun_qp->tx_ring[i].buf.addr);
1432                 if (tun_qp->tx_ring[i].ah)
1433                         ib_destroy_ah(tun_qp->tx_ring[i].ah);
1434         }
1435         kfree(tun_qp->tx_ring);
1436         kfree(tun_qp->ring);
1437 }
1438
1439 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1440 {
1441         struct mlx4_ib_demux_pv_ctx *ctx;
1442         struct mlx4_ib_demux_pv_qp *tun_qp;
1443         struct ib_wc wc;
1444         int ret;
1445         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1446         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1447
1448         while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1449                 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1450                 if (wc.status == IB_WC_SUCCESS) {
1451                         switch (wc.opcode) {
1452                         case IB_WC_RECV:
1453                                 mlx4_ib_multiplex_mad(ctx, &wc);
1454                                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1455                                                              wc.wr_id &
1456                                                              (MLX4_NUM_TUNNEL_BUFS - 1));
1457                                 if (ret)
1458                                         pr_err("Failed reposting tunnel "
1459                                                "buf:%lld\n", wc.wr_id);
1460                                 break;
1461                         case IB_WC_SEND:
1462                                 pr_debug("received tunnel send completion:"
1463                                          "wrid=0x%llx, status=0x%x\n",
1464                                          wc.wr_id, wc.status);
1465                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1466                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1467                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1468                                         = NULL;
1469                                 spin_lock(&tun_qp->tx_lock);
1470                                 tun_qp->tx_ix_tail++;
1471                                 spin_unlock(&tun_qp->tx_lock);
1472
1473                                 break;
1474                         default:
1475                                 break;
1476                         }
1477                 } else  {
1478                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1479                                  " status = %d, wrid = 0x%llx\n",
1480                                  ctx->slave, wc.status, wc.wr_id);
1481                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1482                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1483                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1484                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1485                                         = NULL;
1486                                 spin_lock(&tun_qp->tx_lock);
1487                                 tun_qp->tx_ix_tail++;
1488                                 spin_unlock(&tun_qp->tx_lock);
1489                         }
1490                 }
1491         }
1492 }
1493
1494 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1495 {
1496         struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1497
1498         /* It's worse than that! He's dead, Jim! */
1499         pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1500                event->event, sqp->port);
1501 }
1502
1503 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1504                             enum ib_qp_type qp_type, int create_tun)
1505 {
1506         int i, ret;
1507         struct mlx4_ib_demux_pv_qp *tun_qp;
1508         struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1509         struct ib_qp_attr attr;
1510         int qp_attr_mask_INIT;
1511
1512         if (qp_type > IB_QPT_GSI)
1513                 return -EINVAL;
1514
1515         tun_qp = &ctx->qp[qp_type];
1516
1517         memset(&qp_init_attr, 0, sizeof qp_init_attr);
1518         qp_init_attr.init_attr.send_cq = ctx->cq;
1519         qp_init_attr.init_attr.recv_cq = ctx->cq;
1520         qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1521         qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1522         qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1523         qp_init_attr.init_attr.cap.max_send_sge = 1;
1524         qp_init_attr.init_attr.cap.max_recv_sge = 1;
1525         if (create_tun) {
1526                 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1527                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1528                 qp_init_attr.port = ctx->port;
1529                 qp_init_attr.slave = ctx->slave;
1530                 qp_init_attr.proxy_qp_type = qp_type;
1531                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1532                            IB_QP_QKEY | IB_QP_PORT;
1533         } else {
1534                 qp_init_attr.init_attr.qp_type = qp_type;
1535                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1536                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1537         }
1538         qp_init_attr.init_attr.port_num = ctx->port;
1539         qp_init_attr.init_attr.qp_context = ctx;
1540         qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1541         tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1542         if (IS_ERR(tun_qp->qp)) {
1543                 ret = PTR_ERR(tun_qp->qp);
1544                 tun_qp->qp = NULL;
1545                 pr_err("Couldn't create %s QP (%d)\n",
1546                        create_tun ? "tunnel" : "special", ret);
1547                 return ret;
1548         }
1549
1550         memset(&attr, 0, sizeof attr);
1551         attr.qp_state = IB_QPS_INIT;
1552         ret = 0;
1553         if (create_tun)
1554                 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1555                                               ctx->port, IB_DEFAULT_PKEY_FULL,
1556                                               &attr.pkey_index);
1557         if (ret || !create_tun)
1558                 attr.pkey_index =
1559                         to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1560         attr.qkey = IB_QP1_QKEY;
1561         attr.port_num = ctx->port;
1562         ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1563         if (ret) {
1564                 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1565                        create_tun ? "tunnel" : "special", ret);
1566                 goto err_qp;
1567         }
1568         attr.qp_state = IB_QPS_RTR;
1569         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1570         if (ret) {
1571                 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1572                        create_tun ? "tunnel" : "special", ret);
1573                 goto err_qp;
1574         }
1575         attr.qp_state = IB_QPS_RTS;
1576         attr.sq_psn = 0;
1577         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1578         if (ret) {
1579                 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1580                        create_tun ? "tunnel" : "special", ret);
1581                 goto err_qp;
1582         }
1583
1584         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1585                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1586                 if (ret) {
1587                         pr_err(" mlx4_ib_post_pv_buf error"
1588                                " (err = %d, i = %d)\n", ret, i);
1589                         goto err_qp;
1590                 }
1591         }
1592         return 0;
1593
1594 err_qp:
1595         ib_destroy_qp(tun_qp->qp);
1596         tun_qp->qp = NULL;
1597         return ret;
1598 }
1599
1600 /*
1601  * IB MAD completion callback for real SQPs
1602  */
1603 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1604 {
1605         struct mlx4_ib_demux_pv_ctx *ctx;
1606         struct mlx4_ib_demux_pv_qp *sqp;
1607         struct ib_wc wc;
1608         struct ib_grh *grh;
1609         struct ib_mad *mad;
1610
1611         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1612         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1613
1614         while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1615                 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1616                 if (wc.status == IB_WC_SUCCESS) {
1617                         switch (wc.opcode) {
1618                         case IB_WC_SEND:
1619                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1620                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1621                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1622                                         = NULL;
1623                                 spin_lock(&sqp->tx_lock);
1624                                 sqp->tx_ix_tail++;
1625                                 spin_unlock(&sqp->tx_lock);
1626                                 break;
1627                         case IB_WC_RECV:
1628                                 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1629                                                 (sqp->ring[wc.wr_id &
1630                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1631                                 grh = &(((struct mlx4_mad_rcv_buf *)
1632                                                 (sqp->ring[wc.wr_id &
1633                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1634                                 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1635                                 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1636                                                            (MLX4_NUM_TUNNEL_BUFS - 1)))
1637                                         pr_err("Failed reposting SQP "
1638                                                "buf:%lld\n", wc.wr_id);
1639                                 break;
1640                         default:
1641                                 BUG_ON(1);
1642                                 break;
1643                         }
1644                 } else  {
1645                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1646                                  " status = %d, wrid = 0x%llx\n",
1647                                  ctx->slave, wc.status, wc.wr_id);
1648                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1649                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1650                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1651                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1652                                         = NULL;
1653                                 spin_lock(&sqp->tx_lock);
1654                                 sqp->tx_ix_tail++;
1655                                 spin_unlock(&sqp->tx_lock);
1656                         }
1657                 }
1658         }
1659 }
1660
1661 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1662                                struct mlx4_ib_demux_pv_ctx **ret_ctx)
1663 {
1664         struct mlx4_ib_demux_pv_ctx *ctx;
1665
1666         *ret_ctx = NULL;
1667         ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1668         if (!ctx) {
1669                 pr_err("failed allocating pv resource context "
1670                        "for port %d, slave %d\n", port, slave);
1671                 return -ENOMEM;
1672         }
1673
1674         ctx->ib_dev = &dev->ib_dev;
1675         ctx->port = port;
1676         ctx->slave = slave;
1677         *ret_ctx = ctx;
1678         return 0;
1679 }
1680
1681 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1682 {
1683         if (dev->sriov.demux[port - 1].tun[slave]) {
1684                 kfree(dev->sriov.demux[port - 1].tun[slave]);
1685                 dev->sriov.demux[port - 1].tun[slave] = NULL;
1686         }
1687 }
1688
1689 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1690                                int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1691 {
1692         int ret, cq_size;
1693
1694         if (ctx->state != DEMUX_PV_STATE_DOWN)
1695                 return -EEXIST;
1696
1697         ctx->state = DEMUX_PV_STATE_STARTING;
1698         /* have QP0 only on port owner, and only if link layer is IB */
1699         if (ctx->slave == mlx4_master_func_num(to_mdev(ctx->ib_dev)->dev) &&
1700             rdma_port_get_link_layer(ibdev, ctx->port) == IB_LINK_LAYER_INFINIBAND)
1701                 ctx->has_smi = 1;
1702
1703         if (ctx->has_smi) {
1704                 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1705                 if (ret) {
1706                         pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1707                         goto err_out;
1708                 }
1709         }
1710
1711         ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1712         if (ret) {
1713                 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1714                 goto err_out_qp0;
1715         }
1716
1717         cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1718         if (ctx->has_smi)
1719                 cq_size *= 2;
1720
1721         ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1722                                NULL, ctx, cq_size, 0);
1723         if (IS_ERR(ctx->cq)) {
1724                 ret = PTR_ERR(ctx->cq);
1725                 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1726                 goto err_buf;
1727         }
1728
1729         ctx->pd = ib_alloc_pd(ctx->ib_dev);
1730         if (IS_ERR(ctx->pd)) {
1731                 ret = PTR_ERR(ctx->pd);
1732                 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1733                 goto err_cq;
1734         }
1735
1736         ctx->mr = ib_get_dma_mr(ctx->pd, IB_ACCESS_LOCAL_WRITE);
1737         if (IS_ERR(ctx->mr)) {
1738                 ret = PTR_ERR(ctx->mr);
1739                 pr_err("Couldn't get tunnel DMA MR (%d)\n", ret);
1740                 goto err_pd;
1741         }
1742
1743         if (ctx->has_smi) {
1744                 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1745                 if (ret) {
1746                         pr_err("Couldn't create %s QP0 (%d)\n",
1747                                create_tun ? "tunnel for" : "",  ret);
1748                         goto err_mr;
1749                 }
1750         }
1751
1752         ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1753         if (ret) {
1754                 pr_err("Couldn't create %s QP1 (%d)\n",
1755                        create_tun ? "tunnel for" : "",  ret);
1756                 goto err_qp0;
1757         }
1758
1759         if (create_tun)
1760                 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1761         else
1762                 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1763
1764         ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1765
1766         ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1767         if (ret) {
1768                 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1769                 goto err_wq;
1770         }
1771         ctx->state = DEMUX_PV_STATE_ACTIVE;
1772         return 0;
1773
1774 err_wq:
1775         ctx->wq = NULL;
1776         ib_destroy_qp(ctx->qp[1].qp);
1777         ctx->qp[1].qp = NULL;
1778
1779
1780 err_qp0:
1781         if (ctx->has_smi)
1782                 ib_destroy_qp(ctx->qp[0].qp);
1783         ctx->qp[0].qp = NULL;
1784
1785 err_mr:
1786         ib_dereg_mr(ctx->mr);
1787         ctx->mr = NULL;
1788
1789 err_pd:
1790         ib_dealloc_pd(ctx->pd);
1791         ctx->pd = NULL;
1792
1793 err_cq:
1794         ib_destroy_cq(ctx->cq);
1795         ctx->cq = NULL;
1796
1797 err_buf:
1798         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
1799
1800 err_out_qp0:
1801         if (ctx->has_smi)
1802                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
1803 err_out:
1804         ctx->state = DEMUX_PV_STATE_DOWN;
1805         return ret;
1806 }
1807
1808 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
1809                                  struct mlx4_ib_demux_pv_ctx *ctx, int flush)
1810 {
1811         if (!ctx)
1812                 return;
1813         if (ctx->state > DEMUX_PV_STATE_DOWN) {
1814                 ctx->state = DEMUX_PV_STATE_DOWNING;
1815                 if (flush)
1816                         flush_workqueue(ctx->wq);
1817                 if (ctx->has_smi) {
1818                         ib_destroy_qp(ctx->qp[0].qp);
1819                         ctx->qp[0].qp = NULL;
1820                         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
1821                 }
1822                 ib_destroy_qp(ctx->qp[1].qp);
1823                 ctx->qp[1].qp = NULL;
1824                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
1825                 ib_dereg_mr(ctx->mr);
1826                 ctx->mr = NULL;
1827                 ib_dealloc_pd(ctx->pd);
1828                 ctx->pd = NULL;
1829                 ib_destroy_cq(ctx->cq);
1830                 ctx->cq = NULL;
1831                 ctx->state = DEMUX_PV_STATE_DOWN;
1832         }
1833 }
1834
1835 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
1836                                   int port, int do_init)
1837 {
1838         int ret = 0;
1839
1840         if (!do_init) {
1841                 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
1842                 /* for master, destroy real sqp resources */
1843                 if (slave == mlx4_master_func_num(dev->dev))
1844                         destroy_pv_resources(dev, slave, port,
1845                                              dev->sriov.sqps[port - 1], 1);
1846                 /* destroy the tunnel qp resources */
1847                 destroy_pv_resources(dev, slave, port,
1848                                      dev->sriov.demux[port - 1].tun[slave], 1);
1849                 return 0;
1850         }
1851
1852         /* create the tunnel qp resources */
1853         ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
1854                                   dev->sriov.demux[port - 1].tun[slave]);
1855
1856         /* for master, create the real sqp resources */
1857         if (!ret && slave == mlx4_master_func_num(dev->dev))
1858                 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
1859                                           dev->sriov.sqps[port - 1]);
1860         return ret;
1861 }
1862
1863 void mlx4_ib_tunnels_update_work(struct work_struct *work)
1864 {
1865         struct mlx4_ib_demux_work *dmxw;
1866
1867         dmxw = container_of(work, struct mlx4_ib_demux_work, work);
1868         mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
1869                                dmxw->do_init);
1870         kfree(dmxw);
1871         return;
1872 }
1873
1874 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
1875                                        struct mlx4_ib_demux_ctx *ctx,
1876                                        int port)
1877 {
1878         char name[12];
1879         int ret = 0;
1880         int i;
1881
1882         ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
1883                            sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
1884         if (!ctx->tun)
1885                 return -ENOMEM;
1886
1887         ctx->dev = dev;
1888         ctx->port = port;
1889         ctx->ib_dev = &dev->ib_dev;
1890
1891         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
1892                 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
1893                 if (ret) {
1894                         ret = -ENOMEM;
1895                         goto err_mcg;
1896                 }
1897         }
1898
1899         ret = mlx4_ib_mcg_port_init(ctx);
1900         if (ret) {
1901                 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
1902                 goto err_mcg;
1903         }
1904
1905         snprintf(name, sizeof name, "mlx4_ibt%d", port);
1906         ctx->wq = create_singlethread_workqueue(name);
1907         if (!ctx->wq) {
1908                 pr_err("Failed to create tunnelling WQ for port %d\n", port);
1909                 ret = -ENOMEM;
1910                 goto err_wq;
1911         }
1912
1913         snprintf(name, sizeof name, "mlx4_ibud%d", port);
1914         ctx->ud_wq = create_singlethread_workqueue(name);
1915         if (!ctx->ud_wq) {
1916                 pr_err("Failed to create up/down WQ for port %d\n", port);
1917                 ret = -ENOMEM;
1918                 goto err_udwq;
1919         }
1920
1921         return 0;
1922
1923 err_udwq:
1924         destroy_workqueue(ctx->wq);
1925         ctx->wq = NULL;
1926
1927 err_wq:
1928         mlx4_ib_mcg_port_cleanup(ctx, 1);
1929 err_mcg:
1930         for (i = 0; i < dev->dev->caps.sqp_demux; i++)
1931                 free_pv_object(dev, i, port);
1932         kfree(ctx->tun);
1933         ctx->tun = NULL;
1934         return ret;
1935 }
1936
1937 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
1938 {
1939         if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
1940                 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
1941                 flush_workqueue(sqp_ctx->wq);
1942                 if (sqp_ctx->has_smi) {
1943                         ib_destroy_qp(sqp_ctx->qp[0].qp);
1944                         sqp_ctx->qp[0].qp = NULL;
1945                         mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
1946                 }
1947                 ib_destroy_qp(sqp_ctx->qp[1].qp);
1948                 sqp_ctx->qp[1].qp = NULL;
1949                 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
1950                 ib_dereg_mr(sqp_ctx->mr);
1951                 sqp_ctx->mr = NULL;
1952                 ib_dealloc_pd(sqp_ctx->pd);
1953                 sqp_ctx->pd = NULL;
1954                 ib_destroy_cq(sqp_ctx->cq);
1955                 sqp_ctx->cq = NULL;
1956                 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
1957         }
1958 }
1959
1960 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
1961 {
1962         int i;
1963         if (ctx) {
1964                 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1965                 mlx4_ib_mcg_port_cleanup(ctx, 1);
1966                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
1967                         if (!ctx->tun[i])
1968                                 continue;
1969                         if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
1970                                 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
1971                 }
1972                 flush_workqueue(ctx->wq);
1973                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
1974                         destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
1975                         free_pv_object(dev, i, ctx->port);
1976                 }
1977                 kfree(ctx->tun);
1978                 destroy_workqueue(ctx->ud_wq);
1979                 destroy_workqueue(ctx->wq);
1980         }
1981 }
1982
1983 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
1984 {
1985         int i;
1986
1987         if (!mlx4_is_master(dev->dev))
1988                 return;
1989         /* initialize or tear down tunnel QPs for the master */
1990         for (i = 0; i < dev->dev->caps.num_ports; i++)
1991                 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
1992         return;
1993 }
1994
1995 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
1996 {
1997         int i = 0;
1998         int err;
1999
2000         if (!mlx4_is_mfunc(dev->dev))
2001                 return 0;
2002
2003         dev->sriov.is_going_down = 0;
2004         spin_lock_init(&dev->sriov.going_down_lock);
2005         mlx4_ib_cm_paravirt_init(dev);
2006
2007         mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2008
2009         if (mlx4_is_slave(dev->dev)) {
2010                 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2011                 return 0;
2012         }
2013
2014         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2015                 if (i == mlx4_master_func_num(dev->dev))
2016                         mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2017                 else
2018                         mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2019         }
2020
2021         err = mlx4_ib_init_alias_guid_service(dev);
2022         if (err) {
2023                 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2024                 goto paravirt_err;
2025         }
2026         err = mlx4_ib_device_register_sysfs(dev);
2027         if (err) {
2028                 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2029                 goto sysfs_err;
2030         }
2031
2032         mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2033                      dev->dev->caps.sqp_demux);
2034         for (i = 0; i < dev->num_ports; i++) {
2035                 union ib_gid gid;
2036                 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2037                 if (err)
2038                         goto demux_err;
2039                 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2040                 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2041                                       &dev->sriov.sqps[i]);
2042                 if (err)
2043                         goto demux_err;
2044                 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2045                 if (err)
2046                         goto free_pv;
2047         }
2048         mlx4_ib_master_tunnels(dev, 1);
2049         return 0;
2050
2051 free_pv:
2052         free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2053 demux_err:
2054         while (--i >= 0) {
2055                 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2056                 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2057         }
2058         mlx4_ib_device_unregister_sysfs(dev);
2059
2060 sysfs_err:
2061         mlx4_ib_destroy_alias_guid_service(dev);
2062
2063 paravirt_err:
2064         mlx4_ib_cm_paravirt_clean(dev, -1);
2065
2066         return err;
2067 }
2068
2069 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2070 {
2071         int i;
2072         unsigned long flags;
2073
2074         if (!mlx4_is_mfunc(dev->dev))
2075                 return;
2076
2077         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2078         dev->sriov.is_going_down = 1;
2079         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2080         if (mlx4_is_master(dev->dev)) {
2081                 for (i = 0; i < dev->num_ports; i++) {
2082                         flush_workqueue(dev->sriov.demux[i].ud_wq);
2083                         mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2084                         kfree(dev->sriov.sqps[i]);
2085                         dev->sriov.sqps[i] = NULL;
2086                         mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2087                 }
2088
2089                 mlx4_ib_cm_paravirt_clean(dev, -1);
2090                 mlx4_ib_destroy_alias_guid_service(dev);
2091                 mlx4_ib_device_unregister_sysfs(dev);
2092         }
2093 }