drivers/net/ethernet/brocade/bna/bna_types.h

   1 /*
   2  * Linux network driver for QLogic BR-series Converged Network Adapter.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License (GPL) Version 2 as
   6  * published by the Free Software Foundation
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  */
  13 /*
  14  * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
  15  * Copyright (c) 2014-2015 QLogic Corporation
  16  * All rights reserved
  17  * www.qlogic.com
  18  */
  19 #ifndef __BNA_TYPES_H__
  20 #define __BNA_TYPES_H__
  21
  22 #include "cna.h"
  23 #include "bna_hw_defs.h"
  24 #include "bfa_cee.h"
  25 #include "bfa_msgq.h"
  26
  27 /* Forward declarations */
  28
  29 struct bna_mcam_handle;
  30 struct bna_txq;
  31 struct bna_tx;
  32 struct bna_rxq;
  33 struct bna_cq;
  34 struct bna_rx;
  35 struct bna_rxf;
  36 struct bna_enet;
  37 struct bna;
  38 struct bnad;
  39
  40 /* Enums, primitive data types */
  41
  42 enum bna_status {
  43         BNA_STATUS_T_DISABLED   = 0,
  44         BNA_STATUS_T_ENABLED    = 1
  45 };
  46
  47 enum bna_cleanup_type {
  48         BNA_HARD_CLEANUP        = 0,
  49         BNA_SOFT_CLEANUP        = 1
  50 };
  51
  52 enum bna_cb_status {
  53         BNA_CB_SUCCESS          = 0,
  54         BNA_CB_FAIL             = 1,
  55         BNA_CB_INTERRUPT        = 2,
  56         BNA_CB_BUSY             = 3,
  57         BNA_CB_INVALID_MAC      = 4,
  58         BNA_CB_MCAST_LIST_FULL  = 5,
  59         BNA_CB_UCAST_CAM_FULL   = 6,
  60         BNA_CB_WAITING          = 7,
  61         BNA_CB_NOT_EXEC         = 8
  62 };
  63
  64 enum bna_res_type {
  65         BNA_RES_T_MEM           = 1,
  66         BNA_RES_T_INTR          = 2
  67 };
  68
  69 enum bna_mem_type {
  70         BNA_MEM_T_KVA           = 1,
  71         BNA_MEM_T_DMA           = 2
  72 };
  73
  74 enum bna_intr_type {
  75         BNA_INTR_T_INTX         = 1,
  76         BNA_INTR_T_MSIX         = 2
  77 };
  78
  79 enum bna_res_req_type {
  80         BNA_RES_MEM_T_COM               = 0,
  81         BNA_RES_MEM_T_ATTR              = 1,
  82         BNA_RES_MEM_T_FWTRC             = 2,
  83         BNA_RES_MEM_T_STATS             = 3,
  84         BNA_RES_T_MAX
  85 };
  86
  87 enum bna_mod_res_req_type {
  88         BNA_MOD_RES_MEM_T_TX_ARRAY      = 0,
  89         BNA_MOD_RES_MEM_T_TXQ_ARRAY     = 1,
  90         BNA_MOD_RES_MEM_T_RX_ARRAY      = 2,
  91         BNA_MOD_RES_MEM_T_RXP_ARRAY     = 3,
  92         BNA_MOD_RES_MEM_T_RXQ_ARRAY     = 4,
  93         BNA_MOD_RES_MEM_T_UCMAC_ARRAY   = 5,
  94         BNA_MOD_RES_MEM_T_MCMAC_ARRAY   = 6,
  95         BNA_MOD_RES_MEM_T_MCHANDLE_ARRAY = 7,
  96         BNA_MOD_RES_T_MAX
  97 };
  98
  99 enum bna_tx_res_req_type {
 100         BNA_TX_RES_MEM_T_TCB    = 0,
 101         BNA_TX_RES_MEM_T_UNMAPQ = 1,
 102         BNA_TX_RES_MEM_T_QPT    = 2,
 103         BNA_TX_RES_MEM_T_SWQPT  = 3,
 104         BNA_TX_RES_MEM_T_PAGE   = 4,
 105         BNA_TX_RES_MEM_T_IBIDX  = 5,
 106         BNA_TX_RES_INTR_T_TXCMPL = 6,
 107         BNA_TX_RES_T_MAX,
 108 };
 109
 110 enum bna_rx_mem_type {
 111         BNA_RX_RES_MEM_T_CCB            = 0,    /* CQ context */
 112         BNA_RX_RES_MEM_T_RCB            = 1,    /* CQ context */
 113         BNA_RX_RES_MEM_T_UNMAPHQ        = 2,
 114         BNA_RX_RES_MEM_T_UNMAPDQ        = 3,
 115         BNA_RX_RES_MEM_T_CQPT           = 4,
 116         BNA_RX_RES_MEM_T_CSWQPT         = 5,
 117         BNA_RX_RES_MEM_T_CQPT_PAGE      = 6,
 118         BNA_RX_RES_MEM_T_HQPT           = 7,
 119         BNA_RX_RES_MEM_T_DQPT           = 8,
 120         BNA_RX_RES_MEM_T_HSWQPT         = 9,
 121         BNA_RX_RES_MEM_T_DSWQPT         = 10,
 122         BNA_RX_RES_MEM_T_DPAGE          = 11,
 123         BNA_RX_RES_MEM_T_HPAGE          = 12,
 124         BNA_RX_RES_MEM_T_IBIDX          = 13,
 125         BNA_RX_RES_MEM_T_RIT            = 14,
 126         BNA_RX_RES_T_INTR               = 15,
 127         BNA_RX_RES_T_MAX                = 16
 128 };
 129
 130 enum bna_tx_type {
 131         BNA_TX_T_REGULAR        = 0,
 132         BNA_TX_T_LOOPBACK       = 1,
 133 };
 134
 135 enum bna_tx_flags {
 136         BNA_TX_F_ENET_STARTED   = 1,
 137         BNA_TX_F_ENABLED        = 2,
 138         BNA_TX_F_PRIO_CHANGED   = 4,
 139         BNA_TX_F_BW_UPDATED     = 8,
 140 };
 141
 142 enum bna_tx_mod_flags {
 143         BNA_TX_MOD_F_ENET_STARTED       = 1,
 144         BNA_TX_MOD_F_ENET_LOOPBACK      = 2,
 145 };
 146
 147 enum bna_rx_type {
 148         BNA_RX_T_REGULAR        = 0,
 149         BNA_RX_T_LOOPBACK       = 1,
 150 };
 151
 152 enum bna_rxp_type {
 153         BNA_RXP_SINGLE          = 1,
 154         BNA_RXP_SLR             = 2,
 155         BNA_RXP_HDS             = 3
 156 };
 157
 158 enum bna_rxmode {
 159         BNA_RXMODE_PROMISC      = 1,
 160         BNA_RXMODE_DEFAULT      = 2,
 161         BNA_RXMODE_ALLMULTI     = 4
 162 };
 163
 164 enum bna_rx_event {
 165         RX_E_START                      = 1,
 166         RX_E_STOP                       = 2,
 167         RX_E_FAIL                       = 3,
 168         RX_E_STARTED                    = 4,
 169         RX_E_STOPPED                    = 5,
 170         RX_E_RXF_STARTED                = 6,
 171         RX_E_RXF_STOPPED                = 7,
 172         RX_E_CLEANUP_DONE               = 8,
 173 };
 174
 175 enum bna_rx_flags {
 176         BNA_RX_F_ENET_STARTED   = 1,
 177         BNA_RX_F_ENABLED        = 2,
 178 };
 179
 180 enum bna_rx_mod_flags {
 181         BNA_RX_MOD_F_ENET_STARTED       = 1,
 182         BNA_RX_MOD_F_ENET_LOOPBACK      = 2,
 183 };
 184
 185 enum bna_rxf_flags {
 186         BNA_RXF_F_PAUSED                = 1,
 187 };
 188
 189 enum bna_rxf_event {
 190         RXF_E_START                     = 1,
 191         RXF_E_STOP                      = 2,
 192         RXF_E_FAIL                      = 3,
 193         RXF_E_CONFIG                    = 4,
 194         RXF_E_FW_RESP                   = 7,
 195 };
 196
 197 enum bna_enet_type {
 198         BNA_ENET_T_REGULAR              = 0,
 199         BNA_ENET_T_LOOPBACK_INTERNAL    = 1,
 200         BNA_ENET_T_LOOPBACK_EXTERNAL    = 2,
 201 };
 202
 203 enum bna_link_status {
 204         BNA_LINK_DOWN           = 0,
 205         BNA_LINK_UP             = 1,
 206         BNA_CEE_UP              = 2
 207 };
 208
 209 enum bna_ethport_flags {
 210         BNA_ETHPORT_F_ADMIN_UP          = 1,
 211         BNA_ETHPORT_F_PORT_ENABLED      = 2,
 212         BNA_ETHPORT_F_RX_STARTED        = 4,
 213 };
 214
 215 enum bna_enet_flags {
 216         BNA_ENET_F_IOCETH_READY         = 1,
 217         BNA_ENET_F_ENABLED              = 2,
 218         BNA_ENET_F_PAUSE_CHANGED        = 4,
 219         BNA_ENET_F_MTU_CHANGED          = 8
 220 };
 221
 222 enum bna_rss_flags {
 223         BNA_RSS_F_RIT_PENDING           = 1,
 224         BNA_RSS_F_CFG_PENDING           = 2,
 225         BNA_RSS_F_STATUS_PENDING        = 4,
 226 };
 227
 228 enum bna_mod_flags {
 229         BNA_MOD_F_INIT_DONE             = 1,
 230 };
 231
 232 enum bna_pkt_rates {
 233         BNA_PKT_RATE_10K                = 10000,
 234         BNA_PKT_RATE_20K                = 20000,
 235         BNA_PKT_RATE_30K                = 30000,
 236         BNA_PKT_RATE_40K                = 40000,
 237         BNA_PKT_RATE_50K                = 50000,
 238         BNA_PKT_RATE_60K                = 60000,
 239         BNA_PKT_RATE_70K                = 70000,
 240         BNA_PKT_RATE_80K                = 80000,
 241 };
 242
 243 enum bna_dim_load_types {
 244         BNA_LOAD_T_HIGH_4               = 0, /* 80K <= r */
 245         BNA_LOAD_T_HIGH_3               = 1, /* 60K <= r < 80K */
 246         BNA_LOAD_T_HIGH_2               = 2, /* 50K <= r < 60K */
 247         BNA_LOAD_T_HIGH_1               = 3, /* 40K <= r < 50K */
 248         BNA_LOAD_T_LOW_1                = 4, /* 30K <= r < 40K */
 249         BNA_LOAD_T_LOW_2                = 5, /* 20K <= r < 30K */
 250         BNA_LOAD_T_LOW_3                = 6, /* 10K <= r < 20K */
 251         BNA_LOAD_T_LOW_4                = 7, /* r < 10K */
 252         BNA_LOAD_T_MAX                  = 8
 253 };
 254
 255 enum bna_dim_bias_types {
 256         BNA_BIAS_T_SMALL                = 0, /* small pkts > (large pkts * 2) */
 257         BNA_BIAS_T_LARGE                = 1, /* Not BNA_BIAS_T_SMALL */
 258         BNA_BIAS_T_MAX                  = 2
 259 };
 260
 261 #define BNA_MAX_NAME_SIZE       64
 262 struct bna_ident {
 263         int                     id;
 264         char                    name[BNA_MAX_NAME_SIZE];
 265 };
 266
 267 struct bna_mac {
 268         /* This should be the first one */
 269         struct list_head                        qe;
 270         u8                      addr[ETH_ALEN];
 271         struct bna_mcam_handle *handle;
 272 };
 273
 274 struct bna_mem_descr {
 275         u32             len;
 276         void            *kva;
 277         struct bna_dma_addr dma;
 278 };
 279
 280 struct bna_mem_info {
 281         enum bna_mem_type mem_type;
 282         u32             len;
 283         u32             num;
 284         u32             align_sz; /* 0/1 = no alignment */
 285         struct bna_mem_descr *mdl;
 286         void                    *cookie; /* For bnad to unmap dma later */
 287 };
 288
 289 struct bna_intr_descr {
 290         int                     vector;
 291 };
 292
 293 struct bna_intr_info {
 294         enum bna_intr_type intr_type;
 295         int                     num;
 296         struct bna_intr_descr *idl;
 297 };
 298
 299 union bna_res_u {
 300         struct bna_mem_info mem_info;
 301         struct bna_intr_info intr_info;
 302 };
 303
 304 struct bna_res_info {
 305         enum bna_res_type res_type;
 306         union bna_res_u         res_u;
 307 };
 308
 309 /* HW QPT */
 310 struct bna_qpt {
 311         struct bna_dma_addr hw_qpt_ptr;
 312         void            *kv_qpt_ptr;
 313         u32             page_count;
 314         u32             page_size;
 315 };
 316
 317 struct bna_attr {
 318         bool                    fw_query_complete;
 319         int                     num_txq;
 320         int                     num_rxp;
 321         int                     num_ucmac;
 322         int                     num_mcmac;
 323         int                     max_rit_size;
 324 };
 325
 326 /* IOCEth */
 327
 328 struct bna_ioceth {
 329         bfa_fsm_t               fsm;
 330         struct bfa_ioc ioc;
 331
 332         struct bna_attr attr;
 333         struct bfa_msgq_cmd_entry msgq_cmd;
 334         struct bfi_enet_attr_req attr_req;
 335
 336         void (*stop_cbfn)(struct bnad *bnad);
 337         struct bnad *stop_cbarg;
 338
 339         struct bna *bna;
 340 };
 341
 342 /* Enet */
 343
 344 /* Pause configuration */
 345 struct bna_pause_config {
 346         enum bna_status tx_pause;
 347         enum bna_status rx_pause;
 348 };
 349
 350 struct bna_enet {
 351         bfa_fsm_t               fsm;
 352         enum bna_enet_flags flags;
 353
 354         enum bna_enet_type type;
 355
 356         struct bna_pause_config pause_config;
 357         int                     mtu;
 358
 359         /* Callback for bna_enet_disable(), enet_stop() */
 360         void (*stop_cbfn)(void *);
 361         void                    *stop_cbarg;
 362
 363         /* Callback for bna_enet_mtu_set() */
 364         void (*mtu_cbfn)(struct bnad *);
 365
 366         struct bfa_wc           chld_stop_wc;
 367
 368         struct bfa_msgq_cmd_entry msgq_cmd;
 369         struct bfi_enet_set_pause_req pause_req;
 370
 371         struct bna *bna;
 372 };
 373
 374 /* Ethport */
 375
 376 struct bna_ethport {
 377         bfa_fsm_t               fsm;
 378         enum bna_ethport_flags flags;
 379
 380         enum bna_link_status link_status;
 381
 382         int                     rx_started_count;
 383
 384         void (*stop_cbfn)(struct bna_enet *);
 385
 386         void (*adminup_cbfn)(struct bnad *, enum bna_cb_status);
 387
 388         void (*link_cbfn)(struct bnad *, enum bna_link_status);
 389
 390         struct bfa_msgq_cmd_entry msgq_cmd;
 391         union {
 392                 struct bfi_enet_enable_req admin_req;
 393                 struct bfi_enet_diag_lb_req lpbk_req;
 394         } bfi_enet_cmd;
 395
 396         struct bna *bna;
 397 };
 398
 399 /* Interrupt Block */
 400
 401 /* Doorbell structure */
 402 struct bna_ib_dbell {
 403         void __iomem   *doorbell_addr;
 404         u32             doorbell_ack;
 405 };
 406
 407 /* IB structure */
 408 struct bna_ib {
 409         struct bna_dma_addr ib_seg_host_addr;
 410         void            *ib_seg_host_addr_kva;
 411
 412         struct bna_ib_dbell door_bell;
 413
 414         enum bna_intr_type      intr_type;
 415         int                     intr_vector;
 416
 417         u8                      coalescing_timeo;    /* Unit is 5usec. */
 418
 419         int                     interpkt_count;
 420         int                     interpkt_timeo;
 421 };
 422
 423 /* Tx object */
 424
 425 /* Tx datapath control structure */
 426 #define BNA_Q_NAME_SIZE         16
 427 struct bna_tcb {
 428         /* Fast path */
 429         void                    **sw_qpt;
 430         void                    *sw_q;
 431         void                    *unmap_q;
 432         u32             producer_index;
 433         u32             consumer_index;
 434         volatile u32    *hw_consumer_index;
 435         u32             q_depth;
 436         void __iomem   *q_dbell;
 437         struct bna_ib_dbell *i_dbell;
 438         /* Control path */
 439         struct bna_txq *txq;
 440         struct bnad *bnad;
 441         void                    *priv; /* BNAD's cookie */
 442         enum bna_intr_type intr_type;
 443         int                     intr_vector;
 444         u8                      priority; /* Current priority */
 445         unsigned long           flags; /* Used by bnad as required */
 446         int                     id;
 447         char                    name[BNA_Q_NAME_SIZE];
 448 };
 449
 450 /* TxQ QPT and configuration */
 451 struct bna_txq {
 452         /* This should be the first one */
 453         struct list_head                        qe;
 454
 455         u8                      priority;
 456
 457         struct bna_qpt qpt;
 458         struct bna_tcb *tcb;
 459         struct bna_ib ib;
 460
 461         struct bna_tx *tx;
 462
 463         int                     hw_id;
 464
 465         u64             tx_packets;
 466         u64             tx_bytes;
 467 };
 468
 469 /* Tx object */
 470 struct bna_tx {
 471         /* This should be the first one */
 472         struct list_head                        qe;
 473         int                     rid;
 474         int                     hw_id;
 475
 476         bfa_fsm_t               fsm;
 477         enum bna_tx_flags flags;
 478
 479         enum bna_tx_type type;
 480         int                     num_txq;
 481
 482         struct list_head                        txq_q;
 483         u16                     txf_vlan_id;
 484
 485         /* Tx event handlers */
 486         void (*tcb_setup_cbfn)(struct bnad *, struct bna_tcb *);
 487         void (*tcb_destroy_cbfn)(struct bnad *, struct bna_tcb *);
 488         void (*tx_stall_cbfn)(struct bnad *, struct bna_tx *);
 489         void (*tx_resume_cbfn)(struct bnad *, struct bna_tx *);
 490         void (*tx_cleanup_cbfn)(struct bnad *, struct bna_tx *);
 491
 492         /* callback for bna_tx_disable(), bna_tx_stop() */
 493         void (*stop_cbfn)(void *arg, struct bna_tx *tx);
 494         void                    *stop_cbarg;
 495
 496         struct bfa_msgq_cmd_entry msgq_cmd;
 497         union {
 498                 struct bfi_enet_tx_cfg_req      cfg_req;
 499                 struct bfi_enet_req             req;
 500                 struct bfi_enet_tx_cfg_rsp      cfg_rsp;
 501         } bfi_enet_cmd;
 502
 503         struct bna *bna;
 504         void                    *priv;  /* bnad's cookie */
 505 };
 506
 507 /* Tx object configuration used during creation */
 508 struct bna_tx_config {
 509         int                     num_txq;
 510         int                     txq_depth;
 511         int                     coalescing_timeo;
 512         enum bna_tx_type tx_type;
 513 };
 514
 515 struct bna_tx_event_cbfn {
 516         /* Optional */
 517         void (*tcb_setup_cbfn)(struct bnad *, struct bna_tcb *);
 518         void (*tcb_destroy_cbfn)(struct bnad *, struct bna_tcb *);
 519         /* Mandatory */
 520         void (*tx_stall_cbfn)(struct bnad *, struct bna_tx *);
 521         void (*tx_resume_cbfn)(struct bnad *, struct bna_tx *);
 522         void (*tx_cleanup_cbfn)(struct bnad *, struct bna_tx *);
 523 };
 524
 525 /* Tx module - keeps track of free, active tx objects */
 526 struct bna_tx_mod {
 527         struct bna_tx *tx;              /* BFI_MAX_TXQ entries */
 528         struct bna_txq *txq;            /* BFI_MAX_TXQ entries */
 529
 530         struct list_head                        tx_free_q;
 531         struct list_head                        tx_active_q;
 532
 533         struct list_head                        txq_free_q;
 534
 535         /* callback for bna_tx_mod_stop() */
 536         void (*stop_cbfn)(struct bna_enet *enet);
 537
 538         struct bfa_wc           tx_stop_wc;
 539
 540         enum bna_tx_mod_flags flags;
 541
 542         u8                      prio_map;
 543         int                     default_prio;
 544         int                     iscsi_over_cee;
 545         int                     iscsi_prio;
 546         int                     prio_reconfigured;
 547
 548         u32                     rid_mask;
 549
 550         struct bna *bna;
 551 };
 552
 553 /* Rx object */
 554
 555 /* Rx datapath control structure */
 556 struct bna_rcb {
 557         /* Fast path */
 558         void                    **sw_qpt;
 559         void                    *sw_q;
 560         void                    *unmap_q;
 561         u32             producer_index;
 562         u32             consumer_index;
 563         u32             q_depth;
 564         void __iomem   *q_dbell;
 565         /* Control path */
 566         struct bna_rxq *rxq;
 567         struct bna_ccb *ccb;
 568         struct bnad *bnad;
 569         void                    *priv; /* BNAD's cookie */
 570         unsigned long           flags;
 571         int                     id;
 572 };
 573
 574 /* RxQ structure - QPT, configuration */
 575 struct bna_rxq {
 576         struct list_head                        qe;
 577
 578         int                     buffer_size;
 579         int                     q_depth;
 580         u32                     num_vecs;
 581         enum bna_status         multi_buffer;
 582
 583         struct bna_qpt qpt;
 584         struct bna_rcb *rcb;
 585
 586         struct bna_rxp *rxp;
 587         struct bna_rx *rx;
 588
 589         int                     hw_id;
 590
 591         u64             rx_packets;
 592         u64             rx_bytes;
 593         u64             rx_packets_with_error;
 594         u64             rxbuf_alloc_failed;
 595 };
 596
 597 /* RxQ pair */
 598 union bna_rxq_u {
 599         struct {
 600                 struct bna_rxq *hdr;
 601                 struct bna_rxq *data;
 602         } hds;
 603         struct {
 604                 struct bna_rxq *small;
 605                 struct bna_rxq *large;
 606         } slr;
 607         struct {
 608                 struct bna_rxq *only;
 609                 struct bna_rxq *reserved;
 610         } single;
 611 };
 612
 613 /* Packet rate for Dynamic Interrupt Moderation */
 614 struct bna_pkt_rate {
 615         u32             small_pkt_cnt;
 616         u32             large_pkt_cnt;
 617 };
 618
 619 /* Completion control structure */
 620 struct bna_ccb {
 621         /* Fast path */
 622         void                    **sw_qpt;
 623         void                    *sw_q;
 624         u32             producer_index;
 625         volatile u32    *hw_producer_index;
 626         u32             q_depth;
 627         struct bna_ib_dbell *i_dbell;
 628         struct bna_rcb *rcb[2];
 629         void                    *ctrl; /* For bnad */
 630         struct bna_pkt_rate pkt_rate;
 631         u32                     pkts_una;
 632         u32                     bytes_per_intr;
 633
 634         /* Control path */
 635         struct bna_cq *cq;
 636         struct bnad *bnad;
 637         void                    *priv; /* BNAD's cookie */
 638         enum bna_intr_type intr_type;
 639         int                     intr_vector;
 640         u8                      rx_coalescing_timeo; /* For NAPI */
 641         int                     id;
 642         char                    name[BNA_Q_NAME_SIZE];
 643 };
 644
 645 /* CQ QPT, configuration  */
 646 struct bna_cq {
 647         struct bna_qpt qpt;
 648         struct bna_ccb *ccb;
 649
 650         struct bna_ib ib;
 651
 652         struct bna_rx *rx;
 653 };
 654
 655 struct bna_rss_config {
 656         enum bfi_enet_rss_type  hash_type;
 657         u8                      hash_mask;
 658         u32             toeplitz_hash_key[BFI_ENET_RSS_KEY_LEN];
 659 };
 660
 661 struct bna_hds_config {
 662         enum bfi_enet_hds_type  hdr_type;
 663         int                     forced_offset;
 664 };
 665
 666 /* Rx object configuration used during creation */
 667 struct bna_rx_config {
 668         enum bna_rx_type rx_type;
 669         int                     num_paths;
 670         enum bna_rxp_type rxp_type;
 671         int                     paused;
 672         int                     coalescing_timeo;
 673         /*
 674          * Small/Large (or Header/Data) buffer size to be configured
 675          * for SLR and HDS queue type.
 676          */
 677         u32                     frame_size;
 678
 679         /* header or small queue */
 680         u32                     q1_depth;
 681         u32                     q1_buf_size;
 682
 683         /* data or large queue */
 684         u32                     q0_depth;
 685         u32                     q0_buf_size;
 686         u32                     q0_num_vecs;
 687         enum bna_status         q0_multi_buf;
 688
 689         enum bna_status rss_status;
 690         struct bna_rss_config rss_config;
 691
 692         struct bna_hds_config hds_config;
 693
 694         enum bna_status vlan_strip_status;
 695 };
 696
 697 /* Rx Path structure - one per MSIX vector/CPU */
 698 struct bna_rxp {
 699         /* This should be the first one */
 700         struct list_head                        qe;
 701
 702         enum bna_rxp_type type;
 703         union   bna_rxq_u       rxq;
 704         struct bna_cq cq;
 705
 706         struct bna_rx *rx;
 707
 708         /* MSI-x vector number for configuring RSS */
 709         int                     vector;
 710         int                     hw_id;
 711 };
 712
 713 /* RxF structure (hardware Rx Function) */
 714 struct bna_rxf {
 715         bfa_fsm_t               fsm;
 716         enum bna_rxf_flags flags;
 717
 718         struct bfa_msgq_cmd_entry msgq_cmd;
 719         union {
 720                 struct bfi_enet_enable_req req;
 721                 struct bfi_enet_rss_cfg_req rss_req;
 722                 struct bfi_enet_rit_req rit_req;
 723                 struct bfi_enet_rx_vlan_req vlan_req;
 724                 struct bfi_enet_mcast_add_req mcast_add_req;
 725                 struct bfi_enet_mcast_del_req mcast_del_req;
 726                 struct bfi_enet_ucast_req ucast_req;
 727         } bfi_enet_cmd;
 728
 729         /* callback for bna_rxf_start() */
 730         void (*start_cbfn) (struct bna_rx *rx);
 731         struct bna_rx *start_cbarg;
 732
 733         /* callback for bna_rxf_stop() */
 734         void (*stop_cbfn) (struct bna_rx *rx);
 735         struct bna_rx *stop_cbarg;
 736
 737         /**
 738          * callback for:
 739          *      bna_rxf_ucast_set()
 740          *      bna_rxf_{ucast/mcast}_add(),
 741          *      bna_rxf_{ucast/mcast}_del(),
 742          *      bna_rxf_mode_set()
 743          */
 744         void (*cam_fltr_cbfn)(struct bnad *bnad, struct bna_rx *rx);
 745         struct bnad *cam_fltr_cbarg;
 746
 747         /* List of unicast addresses yet to be applied to h/w */
 748         struct list_head                        ucast_pending_add_q;
 749         struct list_head                        ucast_pending_del_q;
 750         struct bna_mac *ucast_pending_mac;
 751         int                     ucast_pending_set;
 752         /* ucast addresses applied to the h/w */
 753         struct list_head                        ucast_active_q;
 754         struct bna_mac ucast_active_mac;
 755         int                     ucast_active_set;
 756
 757         /* List of multicast addresses yet to be applied to h/w */
 758         struct list_head                        mcast_pending_add_q;
 759         struct list_head                        mcast_pending_del_q;
 760         /* multicast addresses applied to the h/w */
 761         struct list_head                        mcast_active_q;
 762         struct list_head                        mcast_handle_q;
 763
 764         /* Rx modes yet to be applied to h/w */
 765         enum bna_rxmode rxmode_pending;
 766         enum bna_rxmode rxmode_pending_bitmask;
 767         /* Rx modes applied to h/w */
 768         enum bna_rxmode rxmode_active;
 769
 770         u8                      vlan_pending_bitmask;
 771         enum bna_status vlan_filter_status;
 772         u32     vlan_filter_table[(BFI_ENET_VLAN_ID_MAX) / 32];
 773         bool                    vlan_strip_pending;
 774         enum bna_status         vlan_strip_status;
 775
 776         enum bna_rss_flags      rss_pending;
 777         enum bna_status         rss_status;
 778         struct bna_rss_config   rss_cfg;
 779         u8                      *rit;
 780         int                     rit_size;
 781
 782         struct bna_rx           *rx;
 783 };
 784
 785 /* Rx object */
 786 struct bna_rx {
 787         /* This should be the first one */
 788         struct list_head                        qe;
 789         int                     rid;
 790         int                     hw_id;
 791
 792         bfa_fsm_t               fsm;
 793
 794         enum bna_rx_type type;
 795
 796         int                     num_paths;
 797         struct list_head                        rxp_q;
 798
 799         struct bna_hds_config   hds_cfg;
 800
 801         struct bna_rxf rxf;
 802
 803         enum bna_rx_flags rx_flags;
 804
 805         struct bfa_msgq_cmd_entry msgq_cmd;
 806         union {
 807                 struct bfi_enet_rx_cfg_req      cfg_req;
 808                 struct bfi_enet_req             req;
 809                 struct bfi_enet_rx_cfg_rsp      cfg_rsp;
 810         } bfi_enet_cmd;
 811
 812         /* Rx event handlers */
 813         void (*rcb_setup_cbfn)(struct bnad *, struct bna_rcb *);
 814         void (*rcb_destroy_cbfn)(struct bnad *, struct bna_rcb *);
 815         void (*ccb_setup_cbfn)(struct bnad *, struct bna_ccb *);
 816         void (*ccb_destroy_cbfn)(struct bnad *, struct bna_ccb *);
 817         void (*rx_stall_cbfn)(struct bnad *, struct bna_rx *);
 818         void (*rx_cleanup_cbfn)(struct bnad *, struct bna_rx *);
 819         void (*rx_post_cbfn)(struct bnad *, struct bna_rx *);
 820
 821         /* callback for bna_rx_disable(), bna_rx_stop() */
 822         void (*stop_cbfn)(void *arg, struct bna_rx *rx);
 823         void                    *stop_cbarg;
 824
 825         struct bna *bna;
 826         void                    *priv; /* bnad's cookie */
 827 };
 828
 829 struct bna_rx_event_cbfn {
 830         /* Optional */
 831         void (*rcb_setup_cbfn)(struct bnad *, struct bna_rcb *);
 832         void (*rcb_destroy_cbfn)(struct bnad *, struct bna_rcb *);
 833         void (*ccb_setup_cbfn)(struct bnad *, struct bna_ccb *);
 834         void (*ccb_destroy_cbfn)(struct bnad *, struct bna_ccb *);
 835         void (*rx_stall_cbfn)(struct bnad *, struct bna_rx *);
 836         /* Mandatory */
 837         void (*rx_cleanup_cbfn)(struct bnad *, struct bna_rx *);
 838         void (*rx_post_cbfn)(struct bnad *, struct bna_rx *);
 839 };
 840
 841 /* Rx module - keeps track of free, active rx objects */
 842 struct bna_rx_mod {
 843         struct bna *bna;                /* back pointer to parent */
 844         struct bna_rx *rx;              /* BFI_MAX_RXQ entries */
 845         struct bna_rxp *rxp;            /* BFI_MAX_RXQ entries */
 846         struct bna_rxq *rxq;            /* BFI_MAX_RXQ entries */
 847
 848         struct list_head                        rx_free_q;
 849         struct list_head                        rx_active_q;
 850         int                     rx_free_count;
 851
 852         struct list_head                        rxp_free_q;
 853         int                     rxp_free_count;
 854
 855         struct list_head                        rxq_free_q;
 856         int                     rxq_free_count;
 857
 858         enum bna_rx_mod_flags flags;
 859
 860         /* callback for bna_rx_mod_stop() */
 861         void (*stop_cbfn)(struct bna_enet *enet);
 862
 863         struct bfa_wc           rx_stop_wc;
 864         u32             dim_vector[BNA_LOAD_T_MAX][BNA_BIAS_T_MAX];
 865         u32             rid_mask;
 866 };
 867
 868 /* CAM */
 869
 870 struct bna_ucam_mod {
 871         struct bna_mac *ucmac;          /* num_ucmac * 2 entries */
 872         struct list_head                        free_q;
 873         struct list_head                        del_q;
 874
 875         struct bna *bna;
 876 };
 877
 878 struct bna_mcam_handle {
 879         /* This should be the first one */
 880         struct list_head                        qe;
 881         int                     handle;
 882         int                     refcnt;
 883 };
 884
 885 struct bna_mcam_mod {
 886         struct bna_mac *mcmac;          /* num_mcmac * 2 entries */
 887         struct bna_mcam_handle *mchandle;       /* num_mcmac entries */
 888         struct list_head                        free_q;
 889         struct list_head                        del_q;
 890         struct list_head                        free_handle_q;
 891
 892         struct bna *bna;
 893 };
 894
 895 /* Statistics */
 896
 897 struct bna_stats {
 898         struct bna_dma_addr     hw_stats_dma;
 899         struct bfi_enet_stats   *hw_stats_kva;
 900         struct bfi_enet_stats   hw_stats;
 901 };
 902
 903 struct bna_stats_mod {
 904         bool            ioc_ready;
 905         bool            stats_get_busy;
 906         bool            stats_clr_busy;
 907         struct bfa_msgq_cmd_entry stats_get_cmd;
 908         struct bfa_msgq_cmd_entry stats_clr_cmd;
 909         struct bfi_enet_stats_req stats_get;
 910         struct bfi_enet_stats_req stats_clr;
 911 };
 912
 913 /* BNA */
 914
 915 struct bna {
 916         struct bna_ident ident;
 917         struct bfa_pcidev pcidev;
 918
 919         struct bna_reg regs;
 920         struct bna_bit_defn bits;
 921
 922         struct bna_stats stats;
 923
 924         struct bna_ioceth ioceth;
 925         struct bfa_cee cee;
 926         struct bfa_flash flash;
 927         struct bfa_msgq msgq;
 928
 929         struct bna_ethport ethport;
 930         struct bna_enet enet;
 931         struct bna_stats_mod stats_mod;
 932
 933         struct bna_tx_mod tx_mod;
 934         struct bna_rx_mod rx_mod;
 935         struct bna_ucam_mod ucam_mod;
 936         struct bna_mcam_mod mcam_mod;
 937
 938         enum bna_mod_flags mod_flags;
 939
 940         int                     default_mode_rid;
 941         int                     promisc_rid;
 942
 943         struct bnad *bnad;
 944 };
 945 #endif  /* __BNA_TYPES_H__ */