drivers/net/ethernet/brocade/bna/bnad.c

   1 /*
   2  * Linux network driver for QLogic BR-series Converged Network Adapter.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License (GPL) Version 2 as
   6  * published by the Free Software Foundation
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  */
  13 /*
  14  * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
  15  * Copyright (c) 2014-2015 QLogic Corporation
  16  * All rights reserved
  17  * www.qlogic.com
  18  */
  19 #include <linux/bitops.h>
  20 #include <linux/netdevice.h>
  21 #include <linux/skbuff.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/in.h>
  24 #include <linux/ethtool.h>
  25 #include <linux/if_vlan.h>
  26 #include <linux/if_ether.h>
  27 #include <linux/ip.h>
  28 #include <linux/prefetch.h>
  29 #include <linux/module.h>
  30
  31 #include "bnad.h"
  32 #include "bna.h"
  33 #include "cna.h"
  34
  35 static DEFINE_MUTEX(bnad_fwimg_mutex);
  36
  37 /*
  38  * Module params
  39  */
  40 static uint bnad_msix_disable;
  41 module_param(bnad_msix_disable, uint, 0444);
  42 MODULE_PARM_DESC(bnad_msix_disable, "Disable MSIX mode");
  43
  44 static uint bnad_ioc_auto_recover = 1;
  45 module_param(bnad_ioc_auto_recover, uint, 0444);
  46 MODULE_PARM_DESC(bnad_ioc_auto_recover, "Enable / Disable auto recovery");
  47
  48 static uint bna_debugfs_enable = 1;
  49 module_param(bna_debugfs_enable, uint, S_IRUGO | S_IWUSR);
  50 MODULE_PARM_DESC(bna_debugfs_enable, "Enables debugfs feature, default=1,"
  51                  " Range[false:0|true:1]");
  52
  53 /*
  54  * Global variables
  55  */
  56 static u32 bnad_rxqs_per_cq = 2;
  57 static u32 bna_id;
  58 static struct mutex bnad_list_mutex;
  59 static LIST_HEAD(bnad_list);
  60 static const u8 bnad_bcast_addr[] __aligned(2) =
  61         { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
  62
  63 /*
  64  * Local MACROS
  65  */
  66 #define BNAD_GET_MBOX_IRQ(_bnad)                                \
  67         (((_bnad)->cfg_flags & BNAD_CF_MSIX) ?                  \
  68          ((_bnad)->msix_table[BNAD_MAILBOX_MSIX_INDEX].vector) : \
  69          ((_bnad)->pcidev->irq))
  70
  71 #define BNAD_FILL_UNMAPQ_MEM_REQ(_res_info, _num, _size)        \
  72 do {                                                            \
  73         (_res_info)->res_type = BNA_RES_T_MEM;                  \
  74         (_res_info)->res_u.mem_info.mem_type = BNA_MEM_T_KVA;   \
  75         (_res_info)->res_u.mem_info.num = (_num);               \
  76         (_res_info)->res_u.mem_info.len = (_size);              \
  77 } while (0)
  78
  79 static void
  80 bnad_add_to_list(struct bnad *bnad)
  81 {
  82         mutex_lock(&bnad_list_mutex);
  83         list_add_tail(&bnad->list_entry, &bnad_list);
  84         bnad->id = bna_id++;
  85         mutex_unlock(&bnad_list_mutex);
  86 }
  87
  88 static void
  89 bnad_remove_from_list(struct bnad *bnad)
  90 {
  91         mutex_lock(&bnad_list_mutex);
  92         list_del(&bnad->list_entry);
  93         mutex_unlock(&bnad_list_mutex);
  94 }
  95
  96 /*
  97  * Reinitialize completions in CQ, once Rx is taken down
  98  */
  99 static void
 100 bnad_cq_cleanup(struct bnad *bnad, struct bna_ccb *ccb)
 101 {
 102         struct bna_cq_entry *cmpl;
 103         int i;
 104
 105         for (i = 0; i < ccb->q_depth; i++) {
 106                 cmpl = &((struct bna_cq_entry *)ccb->sw_q)[i];
 107                 cmpl->valid = 0;
 108         }
 109 }
 110
 111 /* Tx Datapath functions */
 112
 113
 114 /* Caller should ensure that the entry at unmap_q[index] is valid */
 115 static u32
 116 bnad_tx_buff_unmap(struct bnad *bnad,
 117                               struct bnad_tx_unmap *unmap_q,
 118                               u32 q_depth, u32 index)
 119 {
 120         struct bnad_tx_unmap *unmap;
 121         struct sk_buff *skb;
 122         int vector, nvecs;
 123
 124         unmap = &unmap_q[index];
 125         nvecs = unmap->nvecs;
 126
 127         skb = unmap->skb;
 128         unmap->skb = NULL;
 129         unmap->nvecs = 0;
 130         dma_unmap_single(&bnad->pcidev->dev,
 131                 dma_unmap_addr(&unmap->vectors[0], dma_addr),
 132                 skb_headlen(skb), DMA_TO_DEVICE);
 133         dma_unmap_addr_set(&unmap->vectors[0], dma_addr, 0);
 134         nvecs--;
 135
 136         vector = 0;
 137         while (nvecs) {
 138                 vector++;
 139                 if (vector == BFI_TX_MAX_VECTORS_PER_WI) {
 140                         vector = 0;
 141                         BNA_QE_INDX_INC(index, q_depth);
 142                         unmap = &unmap_q[index];
 143                 }
 144
 145                 dma_unmap_page(&bnad->pcidev->dev,
 146                         dma_unmap_addr(&unmap->vectors[vector], dma_addr),
 147                         dma_unmap_len(&unmap->vectors[vector], dma_len),
 148                         DMA_TO_DEVICE);
 149                 dma_unmap_addr_set(&unmap->vectors[vector], dma_addr, 0);
 150                 nvecs--;
 151         }
 152
 153         BNA_QE_INDX_INC(index, q_depth);
 154
 155         return index;
 156 }
 157
 158 /*
 159  * Frees all pending Tx Bufs
 160  * At this point no activity is expected on the Q,
 161  * so DMA unmap & freeing is fine.
 162  */
 163 static void
 164 bnad_txq_cleanup(struct bnad *bnad, struct bna_tcb *tcb)
 165 {
 166         struct bnad_tx_unmap *unmap_q = tcb->unmap_q;
 167         struct sk_buff *skb;
 168         int i;
 169
 170         for (i = 0; i < tcb->q_depth; i++) {
 171                 skb = unmap_q[i].skb;
 172                 if (!skb)
 173                         continue;
 174                 bnad_tx_buff_unmap(bnad, unmap_q, tcb->q_depth, i);
 175
 176                 dev_kfree_skb_any(skb);
 177         }
 178 }
 179
 180 /*
 181  * bnad_txcmpl_process : Frees the Tx bufs on Tx completion
 182  * Can be called in a) Interrupt context
 183  *                  b) Sending context
 184  */
 185 static u32
 186 bnad_txcmpl_process(struct bnad *bnad, struct bna_tcb *tcb)
 187 {
 188         u32 sent_packets = 0, sent_bytes = 0;
 189         u32 wis, unmap_wis, hw_cons, cons, q_depth;
 190         struct bnad_tx_unmap *unmap_q = tcb->unmap_q;
 191         struct bnad_tx_unmap *unmap;
 192         struct sk_buff *skb;
 193
 194         /* Just return if TX is stopped */
 195         if (!test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))
 196                 return 0;
 197
 198         hw_cons = *(tcb->hw_consumer_index);
 199         cons = tcb->consumer_index;
 200         q_depth = tcb->q_depth;
 201
 202         wis = BNA_Q_INDEX_CHANGE(cons, hw_cons, q_depth);
 203         BUG_ON(!(wis <= BNA_QE_IN_USE_CNT(tcb, tcb->q_depth)));
 204
 205         while (wis) {
 206                 unmap = &unmap_q[cons];
 207
 208                 skb = unmap->skb;
 209
 210                 sent_packets++;
 211                 sent_bytes += skb->len;
 212
 213                 unmap_wis = BNA_TXQ_WI_NEEDED(unmap->nvecs);
 214                 wis -= unmap_wis;
 215
 216                 cons = bnad_tx_buff_unmap(bnad, unmap_q, q_depth, cons);
 217                 dev_kfree_skb_any(skb);
 218         }
 219
 220         /* Update consumer pointers. */
 221         tcb->consumer_index = hw_cons;
 222
 223         tcb->txq->tx_packets += sent_packets;
 224         tcb->txq->tx_bytes += sent_bytes;
 225
 226         return sent_packets;
 227 }
 228
 229 static u32
 230 bnad_tx_complete(struct bnad *bnad, struct bna_tcb *tcb)
 231 {
 232         struct net_device *netdev = bnad->netdev;
 233         u32 sent = 0;
 234
 235         if (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags))
 236                 return 0;
 237
 238         sent = bnad_txcmpl_process(bnad, tcb);
 239         if (sent) {
 240                 if (netif_queue_stopped(netdev) &&
 241                     netif_carrier_ok(netdev) &&
 242                     BNA_QE_FREE_CNT(tcb, tcb->q_depth) >=
 243                                     BNAD_NETIF_WAKE_THRESHOLD) {
 244                         if (test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)) {
 245                                 netif_wake_queue(netdev);
 246                                 BNAD_UPDATE_CTR(bnad, netif_queue_wakeup);
 247                         }
 248                 }
 249         }
 250
 251         if (likely(test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)))
 252                 bna_ib_ack(tcb->i_dbell, sent);
 253
 254         smp_mb__before_atomic();
 255         clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
 256
 257         return sent;
 258 }
 259
 260 /* MSIX Tx Completion Handler */
 261 static irqreturn_t
 262 bnad_msix_tx(int irq, void *data)
 263 {
 264         struct bna_tcb *tcb = (struct bna_tcb *)data;
 265         struct bnad *bnad = tcb->bnad;
 266
 267         bnad_tx_complete(bnad, tcb);
 268
 269         return IRQ_HANDLED;
 270 }
 271
 272 static inline void
 273 bnad_rxq_alloc_uninit(struct bnad *bnad, struct bna_rcb *rcb)
 274 {
 275         struct bnad_rx_unmap_q *unmap_q = rcb->unmap_q;
 276
 277         unmap_q->reuse_pi = -1;
 278         unmap_q->alloc_order = -1;
 279         unmap_q->map_size = 0;
 280         unmap_q->type = BNAD_RXBUF_NONE;
 281 }
 282
 283 /* Default is page-based allocation. Multi-buffer support - TBD */
 284 static int
 285 bnad_rxq_alloc_init(struct bnad *bnad, struct bna_rcb *rcb)
 286 {
 287         struct bnad_rx_unmap_q *unmap_q = rcb->unmap_q;
 288         int order;
 289
 290         bnad_rxq_alloc_uninit(bnad, rcb);
 291
 292         order = get_order(rcb->rxq->buffer_size);
 293
 294         unmap_q->type = BNAD_RXBUF_PAGE;
 295
 296         if (bna_is_small_rxq(rcb->id)) {
 297                 unmap_q->alloc_order = 0;
 298                 unmap_q->map_size = rcb->rxq->buffer_size;
 299         } else {
 300                 if (rcb->rxq->multi_buffer) {
 301                         unmap_q->alloc_order = 0;
 302                         unmap_q->map_size = rcb->rxq->buffer_size;
 303                         unmap_q->type = BNAD_RXBUF_MULTI_BUFF;
 304                 } else {
 305                         unmap_q->alloc_order = order;
 306                         unmap_q->map_size =
 307                                 (rcb->rxq->buffer_size > 2048) ?
 308                                 PAGE_SIZE << order : 2048;
 309                 }
 310         }
 311
 312         BUG_ON(((PAGE_SIZE << order) % unmap_q->map_size));
 313
 314         return 0;
 315 }
 316
 317 static inline void
 318 bnad_rxq_cleanup_page(struct bnad *bnad, struct bnad_rx_unmap *unmap)
 319 {
 320         if (!unmap->page)
 321                 return;
 322
 323         dma_unmap_page(&bnad->pcidev->dev,
 324                         dma_unmap_addr(&unmap->vector, dma_addr),
 325                         unmap->vector.len, DMA_FROM_DEVICE);
 326         put_page(unmap->page);
 327         unmap->page = NULL;
 328         dma_unmap_addr_set(&unmap->vector, dma_addr, 0);
 329         unmap->vector.len = 0;
 330 }
 331
 332 static inline void
 333 bnad_rxq_cleanup_skb(struct bnad *bnad, struct bnad_rx_unmap *unmap)
 334 {
 335         if (!unmap->skb)
 336                 return;
 337
 338         dma_unmap_single(&bnad->pcidev->dev,
 339                         dma_unmap_addr(&unmap->vector, dma_addr),
 340                         unmap->vector.len, DMA_FROM_DEVICE);
 341         dev_kfree_skb_any(unmap->skb);
 342         unmap->skb = NULL;
 343         dma_unmap_addr_set(&unmap->vector, dma_addr, 0);
 344         unmap->vector.len = 0;
 345 }
 346
 347 static void
 348 bnad_rxq_cleanup(struct bnad *bnad, struct bna_rcb *rcb)
 349 {
 350         struct bnad_rx_unmap_q *unmap_q = rcb->unmap_q;
 351         int i;
 352
 353         for (i = 0; i < rcb->q_depth; i++) {
 354                 struct bnad_rx_unmap *unmap = &unmap_q->unmap[i];
 355
 356                 if (BNAD_RXBUF_IS_SK_BUFF(unmap_q->type))
 357                         bnad_rxq_cleanup_skb(bnad, unmap);
 358                 else
 359                         bnad_rxq_cleanup_page(bnad, unmap);
 360         }
 361         bnad_rxq_alloc_uninit(bnad, rcb);
 362 }
 363
 364 static u32
 365 bnad_rxq_refill_page(struct bnad *bnad, struct bna_rcb *rcb, u32 nalloc)
 366 {
 367         u32 alloced, prod, q_depth;
 368         struct bnad_rx_unmap_q *unmap_q = rcb->unmap_q;
 369         struct bnad_rx_unmap *unmap, *prev;
 370         struct bna_rxq_entry *rxent;
 371         struct page *page;
 372         u32 page_offset, alloc_size;
 373         dma_addr_t dma_addr;
 374
 375         prod = rcb->producer_index;
 376         q_depth = rcb->q_depth;
 377
 378         alloc_size = PAGE_SIZE << unmap_q->alloc_order;
 379         alloced = 0;
 380
 381         while (nalloc--) {
 382                 unmap = &unmap_q->unmap[prod];
 383
 384                 if (unmap_q->reuse_pi < 0) {
 385                         page = alloc_pages(GFP_ATOMIC | __GFP_COMP,
 386                                         unmap_q->alloc_order);
 387                         page_offset = 0;
 388                 } else {
 389                         prev = &unmap_q->unmap[unmap_q->reuse_pi];
 390                         page = prev->page;
 391                         page_offset = prev->page_offset + unmap_q->map_size;
 392                         get_page(page);
 393                 }
 394
 395                 if (unlikely(!page)) {
 396                         BNAD_UPDATE_CTR(bnad, rxbuf_alloc_failed);
 397                         rcb->rxq->rxbuf_alloc_failed++;
 398                         goto finishing;
 399                 }
 400
 401                 dma_addr = dma_map_page(&bnad->pcidev->dev, page, page_offset,
 402                                 unmap_q->map_size, DMA_FROM_DEVICE);
 403
 404                 unmap->page = page;
 405                 unmap->page_offset = page_offset;
 406                 dma_unmap_addr_set(&unmap->vector, dma_addr, dma_addr);
 407                 unmap->vector.len = unmap_q->map_size;
 408                 page_offset += unmap_q->map_size;
 409
 410                 if (page_offset < alloc_size)
 411                         unmap_q->reuse_pi = prod;
 412                 else
 413                         unmap_q->reuse_pi = -1;
 414
 415                 rxent = &((struct bna_rxq_entry *)rcb->sw_q)[prod];
 416                 BNA_SET_DMA_ADDR(dma_addr, &rxent->host_addr);
 417                 BNA_QE_INDX_INC(prod, q_depth);
 418                 alloced++;
 419         }
 420
 421 finishing:
 422         if (likely(alloced)) {
 423                 rcb->producer_index = prod;
 424                 smp_mb();
 425                 if (likely(test_bit(BNAD_RXQ_POST_OK, &rcb->flags)))
 426                         bna_rxq_prod_indx_doorbell(rcb);
 427         }
 428
 429         return alloced;
 430 }
 431
 432 static u32
 433 bnad_rxq_refill_skb(struct bnad *bnad, struct bna_rcb *rcb, u32 nalloc)
 434 {
 435         u32 alloced, prod, q_depth, buff_sz;
 436         struct bnad_rx_unmap_q *unmap_q = rcb->unmap_q;
 437         struct bnad_rx_unmap *unmap;
 438         struct bna_rxq_entry *rxent;
 439         struct sk_buff *skb;
 440         dma_addr_t dma_addr;
 441
 442         buff_sz = rcb->rxq->buffer_size;
 443         prod = rcb->producer_index;
 444         q_depth = rcb->q_depth;
 445
 446         alloced = 0;
 447         while (nalloc--) {
 448                 unmap = &unmap_q->unmap[prod];
 449
 450                 skb = netdev_alloc_skb_ip_align(bnad->netdev, buff_sz);
 451
 452                 if (unlikely(!skb)) {
 453                         BNAD_UPDATE_CTR(bnad, rxbuf_alloc_failed);
 454                         rcb->rxq->rxbuf_alloc_failed++;
 455                         goto finishing;
 456                 }
 457                 dma_addr = dma_map_single(&bnad->pcidev->dev, skb->data,
 458                                           buff_sz, DMA_FROM_DEVICE);
 459
 460                 unmap->skb = skb;
 461                 dma_unmap_addr_set(&unmap->vector, dma_addr, dma_addr);
 462                 unmap->vector.len = buff_sz;
 463
 464                 rxent = &((struct bna_rxq_entry *)rcb->sw_q)[prod];
 465                 BNA_SET_DMA_ADDR(dma_addr, &rxent->host_addr);
 466                 BNA_QE_INDX_INC(prod, q_depth);
 467                 alloced++;
 468         }
 469
 470 finishing:
 471         if (likely(alloced)) {
 472                 rcb->producer_index = prod;
 473                 smp_mb();
 474                 if (likely(test_bit(BNAD_RXQ_POST_OK, &rcb->flags)))
 475                         bna_rxq_prod_indx_doorbell(rcb);
 476         }
 477
 478         return alloced;
 479 }
 480
 481 static inline void
 482 bnad_rxq_post(struct bnad *bnad, struct bna_rcb *rcb)
 483 {
 484         struct bnad_rx_unmap_q *unmap_q = rcb->unmap_q;
 485         u32 to_alloc;
 486
 487         to_alloc = BNA_QE_FREE_CNT(rcb, rcb->q_depth);
 488         if (!(to_alloc >> BNAD_RXQ_REFILL_THRESHOLD_SHIFT))
 489                 return;
 490
 491         if (BNAD_RXBUF_IS_SK_BUFF(unmap_q->type))
 492                 bnad_rxq_refill_skb(bnad, rcb, to_alloc);
 493         else
 494                 bnad_rxq_refill_page(bnad, rcb, to_alloc);
 495 }
 496
 497 #define flags_cksum_prot_mask (BNA_CQ_EF_IPV4 | BNA_CQ_EF_L3_CKSUM_OK | \
 498                                         BNA_CQ_EF_IPV6 | \
 499                                         BNA_CQ_EF_TCP | BNA_CQ_EF_UDP | \
 500                                         BNA_CQ_EF_L4_CKSUM_OK)
 501
 502 #define flags_tcp4 (BNA_CQ_EF_IPV4 | BNA_CQ_EF_L3_CKSUM_OK | \
 503                                 BNA_CQ_EF_TCP | BNA_CQ_EF_L4_CKSUM_OK)
 504 #define flags_tcp6 (BNA_CQ_EF_IPV6 | \
 505                                 BNA_CQ_EF_TCP | BNA_CQ_EF_L4_CKSUM_OK)
 506 #define flags_udp4 (BNA_CQ_EF_IPV4 | BNA_CQ_EF_L3_CKSUM_OK | \
 507                                 BNA_CQ_EF_UDP | BNA_CQ_EF_L4_CKSUM_OK)
 508 #define flags_udp6 (BNA_CQ_EF_IPV6 | \
 509                                 BNA_CQ_EF_UDP | BNA_CQ_EF_L4_CKSUM_OK)
 510
 511 static void
 512 bnad_cq_drop_packet(struct bnad *bnad, struct bna_rcb *rcb,
 513                     u32 sop_ci, u32 nvecs)
 514 {
 515         struct bnad_rx_unmap_q *unmap_q;
 516         struct bnad_rx_unmap *unmap;
 517         u32 ci, vec;
 518
 519         unmap_q = rcb->unmap_q;
 520         for (vec = 0, ci = sop_ci; vec < nvecs; vec++) {
 521                 unmap = &unmap_q->unmap[ci];
 522                 BNA_QE_INDX_INC(ci, rcb->q_depth);
 523
 524                 if (BNAD_RXBUF_IS_SK_BUFF(unmap_q->type))
 525                         bnad_rxq_cleanup_skb(bnad, unmap);
 526                 else
 527                         bnad_rxq_cleanup_page(bnad, unmap);
 528         }
 529 }
 530
 531 static void
 532 bnad_cq_setup_skb_frags(struct bna_rcb *rcb, struct sk_buff *skb,
 533                         u32 sop_ci, u32 nvecs, u32 last_fraglen)
 534 {
 535         struct bnad *bnad;
 536         u32 ci, vec, len, totlen = 0;
 537         struct bnad_rx_unmap_q *unmap_q;
 538         struct bnad_rx_unmap *unmap;
 539
 540         unmap_q = rcb->unmap_q;
 541         bnad = rcb->bnad;
 542
 543         /* prefetch header */
 544         prefetch(page_address(unmap_q->unmap[sop_ci].page) +
 545                         unmap_q->unmap[sop_ci].page_offset);
 546
 547         for (vec = 1, ci = sop_ci; vec <= nvecs; vec++) {
 548                 unmap = &unmap_q->unmap[ci];
 549                 BNA_QE_INDX_INC(ci, rcb->q_depth);
 550
 551                 dma_unmap_page(&bnad->pcidev->dev,
 552                                 dma_unmap_addr(&unmap->vector, dma_addr),
 553                                 unmap->vector.len, DMA_FROM_DEVICE);
 554
 555                 len = (vec == nvecs) ?
 556                         last_fraglen : unmap->vector.len;
 557                 skb->truesize += unmap->vector.len;
 558                 totlen += len;
 559
 560                 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 561                                 unmap->page, unmap->page_offset, len);
 562
 563                 unmap->page = NULL;
 564                 unmap->vector.len = 0;
 565         }
 566
 567         skb->len += totlen;
 568         skb->data_len += totlen;
 569 }
 570
 571 static inline void
 572 bnad_cq_setup_skb(struct bnad *bnad, struct sk_buff *skb,
 573                   struct bnad_rx_unmap *unmap, u32 len)
 574 {
 575         prefetch(skb->data);
 576
 577         dma_unmap_single(&bnad->pcidev->dev,
 578                         dma_unmap_addr(&unmap->vector, dma_addr),
 579                         unmap->vector.len, DMA_FROM_DEVICE);
 580
 581         skb_put(skb, len);
 582         skb->protocol = eth_type_trans(skb, bnad->netdev);
 583
 584         unmap->skb = NULL;
 585         unmap->vector.len = 0;
 586 }
 587
 588 static u32
 589 bnad_cq_process(struct bnad *bnad, struct bna_ccb *ccb, int budget)
 590 {
 591         struct bna_cq_entry *cq, *cmpl, *next_cmpl;
 592         struct bna_rcb *rcb = NULL;
 593         struct bnad_rx_unmap_q *unmap_q;
 594         struct bnad_rx_unmap *unmap = NULL;
 595         struct sk_buff *skb = NULL;
 596         struct bna_pkt_rate *pkt_rt = &ccb->pkt_rate;
 597         struct bnad_rx_ctrl *rx_ctrl = ccb->ctrl;
 598         u32 packets = 0, len = 0, totlen = 0;
 599         u32 pi, vec, sop_ci = 0, nvecs = 0;
 600         u32 flags, masked_flags;
 601
 602         prefetch(bnad->netdev);
 603
 604         cq = ccb->sw_q;
 605
 606         while (packets < budget) {
 607                 cmpl = &cq[ccb->producer_index];
 608                 if (!cmpl->valid)
 609                         break;
 610                 /* The 'valid' field is set by the adapter, only after writing
 611                  * the other fields of completion entry. Hence, do not load
 612                  * other fields of completion entry *before* the 'valid' is
 613                  * loaded. Adding the rmb() here prevents the compiler and/or
 614                  * CPU from reordering the reads which would potentially result
 615                  * in reading stale values in completion entry.
 616                  */
 617                 rmb();
 618
 619                 BNA_UPDATE_PKT_CNT(pkt_rt, ntohs(cmpl->length));
 620
 621                 if (bna_is_small_rxq(cmpl->rxq_id))
 622                         rcb = ccb->rcb[1];
 623                 else
 624                         rcb = ccb->rcb[0];
 625
 626                 unmap_q = rcb->unmap_q;
 627
 628                 /* start of packet ci */
 629                 sop_ci = rcb->consumer_index;
 630
 631                 if (BNAD_RXBUF_IS_SK_BUFF(unmap_q->type)) {
 632                         unmap = &unmap_q->unmap[sop_ci];
 633                         skb = unmap->skb;
 634                 } else {
 635                         skb = napi_get_frags(&rx_ctrl->napi);
 636                         if (unlikely(!skb))
 637                                 break;
 638                 }
 639                 prefetch(skb);
 640
 641                 flags = ntohl(cmpl->flags);
 642                 len = ntohs(cmpl->length);
 643                 totlen = len;
 644                 nvecs = 1;
 645
 646                 /* Check all the completions for this frame.
 647                  * busy-wait doesn't help much, break here.
 648                  */
 649                 if (BNAD_RXBUF_IS_MULTI_BUFF(unmap_q->type) &&
 650                     (flags & BNA_CQ_EF_EOP) == 0) {
 651                         pi = ccb->producer_index;
 652                         do {
 653                                 BNA_QE_INDX_INC(pi, ccb->q_depth);
 654                                 next_cmpl = &cq[pi];
 655
 656                                 if (!next_cmpl->valid)
 657                                         break;
 658                                 /* The 'valid' field is set by the adapter, only
 659                                  * after writing the other fields of completion
 660                                  * entry. Hence, do not load other fields of
 661                                  * completion entry *before* the 'valid' is
 662                                  * loaded. Adding the rmb() here prevents the
 663                                  * compiler and/or CPU from reordering the reads
 664                                  * which would potentially result in reading
 665                                  * stale values in completion entry.
 666                                  */
 667                                 rmb();
 668
 669                                 len = ntohs(next_cmpl->length);
 670                                 flags = ntohl(next_cmpl->flags);
 671
 672                                 nvecs++;
 673                                 totlen += len;
 674                         } while ((flags & BNA_CQ_EF_EOP) == 0);
 675
 676                         if (!next_cmpl->valid)
 677                                 break;
 678                 }
 679
 680                 /* TODO: BNA_CQ_EF_LOCAL ? */
 681                 if (unlikely(flags & (BNA_CQ_EF_MAC_ERROR |
 682                                                 BNA_CQ_EF_FCS_ERROR |
 683                                                 BNA_CQ_EF_TOO_LONG))) {
 684                         bnad_cq_drop_packet(bnad, rcb, sop_ci, nvecs);
 685                         rcb->rxq->rx_packets_with_error++;
 686
 687                         goto next;
 688                 }
 689
 690                 if (BNAD_RXBUF_IS_SK_BUFF(unmap_q->type))
 691                         bnad_cq_setup_skb(bnad, skb, unmap, len);
 692                 else
 693                         bnad_cq_setup_skb_frags(rcb, skb, sop_ci, nvecs, len);
 694
 695                 packets++;
 696                 rcb->rxq->rx_packets++;
 697                 rcb->rxq->rx_bytes += totlen;
 698                 ccb->bytes_per_intr += totlen;
 699
 700                 masked_flags = flags & flags_cksum_prot_mask;
 701
 702                 if (likely
 703                     ((bnad->netdev->features & NETIF_F_RXCSUM) &&
 704                      ((masked_flags == flags_tcp4) ||
 705                       (masked_flags == flags_udp4) ||
 706                       (masked_flags == flags_tcp6) ||
 707                       (masked_flags == flags_udp6))))
 708                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 709                 else
 710                         skb_checksum_none_assert(skb);
 711
 712                 if ((flags & BNA_CQ_EF_VLAN) &&
 713                     (bnad->netdev->features & NETIF_F_HW_VLAN_CTAG_RX))
 714                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), ntohs(cmpl->vlan_tag));
 715
 716                 if (BNAD_RXBUF_IS_SK_BUFF(unmap_q->type))
 717                         netif_receive_skb(skb);
 718                 else
 719                         napi_gro_frags(&rx_ctrl->napi);
 720
 721 next:
 722                 BNA_QE_INDX_ADD(rcb->consumer_index, nvecs, rcb->q_depth);
 723                 for (vec = 0; vec < nvecs; vec++) {
 724                         cmpl = &cq[ccb->producer_index];
 725                         cmpl->valid = 0;
 726                         BNA_QE_INDX_INC(ccb->producer_index, ccb->q_depth);
 727                 }
 728                 cmpl = &cq[ccb->producer_index];
 729         }
 730
 731         napi_gro_flush(&rx_ctrl->napi, false);
 732         if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags)))
 733                 bna_ib_ack_disable_irq(ccb->i_dbell, packets);
 734
 735         bnad_rxq_post(bnad, ccb->rcb[0]);
 736         if (ccb->rcb[1])
 737                 bnad_rxq_post(bnad, ccb->rcb[1]);
 738
 739         return packets;
 740 }
 741
 742 static void
 743 bnad_netif_rx_schedule_poll(struct bnad *bnad, struct bna_ccb *ccb)
 744 {
 745         struct bnad_rx_ctrl *rx_ctrl = (struct bnad_rx_ctrl *)(ccb->ctrl);
 746         struct napi_struct *napi = &rx_ctrl->napi;
 747
 748         if (likely(napi_schedule_prep(napi))) {
 749                 __napi_schedule(napi);
 750                 rx_ctrl->rx_schedule++;
 751         }
 752 }
 753
 754 /* MSIX Rx Path Handler */
 755 static irqreturn_t
 756 bnad_msix_rx(int irq, void *data)
 757 {
 758         struct bna_ccb *ccb = (struct bna_ccb *)data;
 759
 760         if (ccb) {
 761                 ((struct bnad_rx_ctrl *)(ccb->ctrl))->rx_intr_ctr++;
 762                 bnad_netif_rx_schedule_poll(ccb->bnad, ccb);
 763         }
 764
 765         return IRQ_HANDLED;
 766 }
 767
 768 /* Interrupt handlers */
 769
 770 /* Mbox Interrupt Handlers */
 771 static irqreturn_t
 772 bnad_msix_mbox_handler(int irq, void *data)
 773 {
 774         u32 intr_status;
 775         unsigned long flags;
 776         struct bnad *bnad = (struct bnad *)data;
 777
 778         spin_lock_irqsave(&bnad->bna_lock, flags);
 779         if (unlikely(test_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags))) {
 780                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
 781                 return IRQ_HANDLED;
 782         }
 783
 784         bna_intr_status_get(&bnad->bna, intr_status);
 785
 786         if (BNA_IS_MBOX_ERR_INTR(&bnad->bna, intr_status))
 787                 bna_mbox_handler(&bnad->bna, intr_status);
 788
 789         spin_unlock_irqrestore(&bnad->bna_lock, flags);
 790
 791         return IRQ_HANDLED;
 792 }
 793
 794 static irqreturn_t
 795 bnad_isr(int irq, void *data)
 796 {
 797         int i, j;
 798         u32 intr_status;
 799         unsigned long flags;
 800         struct bnad *bnad = (struct bnad *)data;
 801         struct bnad_rx_info *rx_info;
 802         struct bnad_rx_ctrl *rx_ctrl;
 803         struct bna_tcb *tcb = NULL;
 804
 805         spin_lock_irqsave(&bnad->bna_lock, flags);
 806         if (unlikely(test_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags))) {
 807                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
 808                 return IRQ_NONE;
 809         }
 810
 811         bna_intr_status_get(&bnad->bna, intr_status);
 812
 813         if (unlikely(!intr_status)) {
 814                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
 815                 return IRQ_NONE;
 816         }
 817
 818         if (BNA_IS_MBOX_ERR_INTR(&bnad->bna, intr_status))
 819                 bna_mbox_handler(&bnad->bna, intr_status);
 820
 821         spin_unlock_irqrestore(&bnad->bna_lock, flags);
 822
 823         if (!BNA_IS_INTX_DATA_INTR(intr_status))
 824                 return IRQ_HANDLED;
 825
 826         /* Process data interrupts */
 827         /* Tx processing */
 828         for (i = 0; i < bnad->num_tx; i++) {
 829                 for (j = 0; j < bnad->num_txq_per_tx; j++) {
 830                         tcb = bnad->tx_info[i].tcb[j];
 831                         if (tcb && test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))
 832                                 bnad_tx_complete(bnad, bnad->tx_info[i].tcb[j]);
 833                 }
 834         }
 835         /* Rx processing */
 836         for (i = 0; i < bnad->num_rx; i++) {
 837                 rx_info = &bnad->rx_info[i];
 838                 if (!rx_info->rx)
 839                         continue;
 840                 for (j = 0; j < bnad->num_rxp_per_rx; j++) {
 841                         rx_ctrl = &rx_info->rx_ctrl[j];
 842                         if (rx_ctrl->ccb)
 843                                 bnad_netif_rx_schedule_poll(bnad,
 844                                                             rx_ctrl->ccb);
 845                 }
 846         }
 847         return IRQ_HANDLED;
 848 }
 849
 850 /*
 851  * Called in interrupt / callback context
 852  * with bna_lock held, so cfg_flags access is OK
 853  */
 854 static void
 855 bnad_enable_mbox_irq(struct bnad *bnad)
 856 {
 857         clear_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags);
 858
 859         BNAD_UPDATE_CTR(bnad, mbox_intr_enabled);
 860 }
 861
 862 /*
 863  * Called with bnad->bna_lock held b'cos of
 864  * bnad->cfg_flags access.
 865  */
 866 static void
 867 bnad_disable_mbox_irq(struct bnad *bnad)
 868 {
 869         set_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags);
 870
 871         BNAD_UPDATE_CTR(bnad, mbox_intr_disabled);
 872 }
 873
 874 static void
 875 bnad_set_netdev_perm_addr(struct bnad *bnad)
 876 {
 877         struct net_device *netdev = bnad->netdev;
 878
 879         ether_addr_copy(netdev->perm_addr, bnad->perm_addr.mac);
 880         if (is_zero_ether_addr(netdev->dev_addr))
 881                 ether_addr_copy(netdev->dev_addr, bnad->perm_addr.mac);
 882 }
 883
 884 /* Control Path Handlers */
 885
 886 /* Callbacks */
 887 void
 888 bnad_cb_mbox_intr_enable(struct bnad *bnad)
 889 {
 890         bnad_enable_mbox_irq(bnad);
 891 }
 892
 893 void
 894 bnad_cb_mbox_intr_disable(struct bnad *bnad)
 895 {
 896         bnad_disable_mbox_irq(bnad);
 897 }
 898
 899 void
 900 bnad_cb_ioceth_ready(struct bnad *bnad)
 901 {
 902         bnad->bnad_completions.ioc_comp_status = BNA_CB_SUCCESS;
 903         complete(&bnad->bnad_completions.ioc_comp);
 904 }
 905
 906 void
 907 bnad_cb_ioceth_failed(struct bnad *bnad)
 908 {
 909         bnad->bnad_completions.ioc_comp_status = BNA_CB_FAIL;
 910         complete(&bnad->bnad_completions.ioc_comp);
 911 }
 912
 913 void
 914 bnad_cb_ioceth_disabled(struct bnad *bnad)
 915 {
 916         bnad->bnad_completions.ioc_comp_status = BNA_CB_SUCCESS;
 917         complete(&bnad->bnad_completions.ioc_comp);
 918 }
 919
 920 static void
 921 bnad_cb_enet_disabled(void *arg)
 922 {
 923         struct bnad *bnad = (struct bnad *)arg;
 924
 925         netif_carrier_off(bnad->netdev);
 926         complete(&bnad->bnad_completions.enet_comp);
 927 }
 928
 929 void
 930 bnad_cb_ethport_link_status(struct bnad *bnad,
 931                         enum bna_link_status link_status)
 932 {
 933         bool link_up = false;
 934
 935         link_up = (link_status == BNA_LINK_UP) || (link_status == BNA_CEE_UP);
 936
 937         if (link_status == BNA_CEE_UP) {
 938                 if (!test_bit(BNAD_RF_CEE_RUNNING, &bnad->run_flags))
 939                         BNAD_UPDATE_CTR(bnad, cee_toggle);
 940                 set_bit(BNAD_RF_CEE_RUNNING, &bnad->run_flags);
 941         } else {
 942                 if (test_bit(BNAD_RF_CEE_RUNNING, &bnad->run_flags))
 943                         BNAD_UPDATE_CTR(bnad, cee_toggle);
 944                 clear_bit(BNAD_RF_CEE_RUNNING, &bnad->run_flags);
 945         }
 946
 947         if (link_up) {
 948                 if (!netif_carrier_ok(bnad->netdev)) {
 949                         uint tx_id, tcb_id;
 950                         printk(KERN_WARNING "bna: %s link up\n",
 951                                 bnad->netdev->name);
 952                         netif_carrier_on(bnad->netdev);
 953                         BNAD_UPDATE_CTR(bnad, link_toggle);
 954                         for (tx_id = 0; tx_id < bnad->num_tx; tx_id++) {
 955                                 for (tcb_id = 0; tcb_id < bnad->num_txq_per_tx;
 956                                       tcb_id++) {
 957                                         struct bna_tcb *tcb =
 958                                         bnad->tx_info[tx_id].tcb[tcb_id];
 959                                         u32 txq_id;
 960                                         if (!tcb)
 961                                                 continue;
 962
 963                                         txq_id = tcb->id;
 964
 965                                         if (test_bit(BNAD_TXQ_TX_STARTED,
 966                                                      &tcb->flags)) {
 967                                                 /*
 968                                                  * Force an immediate
 969                                                  * Transmit Schedule */
 970                                                 printk(KERN_INFO "bna: %s %d "
 971                                                       "TXQ_STARTED\n",
 972                                                        bnad->netdev->name,
 973                                                        txq_id);
 974                                                 netif_wake_subqueue(
 975                                                                 bnad->netdev,
 976                                                                 txq_id);
 977                                                 BNAD_UPDATE_CTR(bnad,
 978                                                         netif_queue_wakeup);
 979                                         } else {
 980                                                 netif_stop_subqueue(
 981                                                                 bnad->netdev,
 982                                                                 txq_id);
 983                                                 BNAD_UPDATE_CTR(bnad,
 984                                                         netif_queue_stop);
 985                                         }
 986                                 }
 987                         }
 988                 }
 989         } else {
 990                 if (netif_carrier_ok(bnad->netdev)) {
 991                         printk(KERN_WARNING "bna: %s link down\n",
 992                                 bnad->netdev->name);
 993                         netif_carrier_off(bnad->netdev);
 994                         BNAD_UPDATE_CTR(bnad, link_toggle);
 995                 }
 996         }
 997 }
 998
 999 static void
1000 bnad_cb_tx_disabled(void *arg, struct bna_tx *tx)
1001 {
1002         struct bnad *bnad = (struct bnad *)arg;
1003
1004         complete(&bnad->bnad_completions.tx_comp);
1005 }
1006
1007 static void
1008 bnad_cb_tcb_setup(struct bnad *bnad, struct bna_tcb *tcb)
1009 {
1010         struct bnad_tx_info *tx_info =
1011                         (struct bnad_tx_info *)tcb->txq->tx->priv;
1012
1013         tcb->priv = tcb;
1014         tx_info->tcb[tcb->id] = tcb;
1015 }
1016
1017 static void
1018 bnad_cb_tcb_destroy(struct bnad *bnad, struct bna_tcb *tcb)
1019 {
1020         struct bnad_tx_info *tx_info =
1021                         (struct bnad_tx_info *)tcb->txq->tx->priv;
1022
1023         tx_info->tcb[tcb->id] = NULL;
1024         tcb->priv = NULL;
1025 }
1026
1027 static void
1028 bnad_cb_ccb_setup(struct bnad *bnad, struct bna_ccb *ccb)
1029 {
1030         struct bnad_rx_info *rx_info =
1031                         (struct bnad_rx_info *)ccb->cq->rx->priv;
1032
1033         rx_info->rx_ctrl[ccb->id].ccb = ccb;
1034         ccb->ctrl = &rx_info->rx_ctrl[ccb->id];
1035 }
1036
1037 static void
1038 bnad_cb_ccb_destroy(struct bnad *bnad, struct bna_ccb *ccb)
1039 {
1040         struct bnad_rx_info *rx_info =
1041                         (struct bnad_rx_info *)ccb->cq->rx->priv;
1042
1043         rx_info->rx_ctrl[ccb->id].ccb = NULL;
1044 }
1045
1046 static void
1047 bnad_cb_tx_stall(struct bnad *bnad, struct bna_tx *tx)
1048 {
1049         struct bnad_tx_info *tx_info =
1050                         (struct bnad_tx_info *)tx->priv;
1051         struct bna_tcb *tcb;
1052         u32 txq_id;
1053         int i;
1054
1055         for (i = 0; i < BNAD_MAX_TXQ_PER_TX; i++) {
1056                 tcb = tx_info->tcb[i];
1057                 if (!tcb)
1058                         continue;
1059                 txq_id = tcb->id;
1060                 clear_bit(BNAD_TXQ_TX_STARTED, &tcb->flags);
1061                 netif_stop_subqueue(bnad->netdev, txq_id);
1062                 printk(KERN_INFO "bna: %s %d TXQ_STOPPED\n",
1063                         bnad->netdev->name, txq_id);
1064         }
1065 }
1066
1067 static void
1068 bnad_cb_tx_resume(struct bnad *bnad, struct bna_tx *tx)
1069 {
1070         struct bnad_tx_info *tx_info = (struct bnad_tx_info *)tx->priv;
1071         struct bna_tcb *tcb;
1072         u32 txq_id;
1073         int i;
1074
1075         for (i = 0; i < BNAD_MAX_TXQ_PER_TX; i++) {
1076                 tcb = tx_info->tcb[i];
1077                 if (!tcb)
1078                         continue;
1079                 txq_id = tcb->id;
1080
1081                 BUG_ON(test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags));
1082                 set_bit(BNAD_TXQ_TX_STARTED, &tcb->flags);
1083                 BUG_ON(*(tcb->hw_consumer_index) != 0);
1084
1085                 if (netif_carrier_ok(bnad->netdev)) {
1086                         printk(KERN_INFO "bna: %s %d TXQ_STARTED\n",
1087                                 bnad->netdev->name, txq_id);
1088                         netif_wake_subqueue(bnad->netdev, txq_id);
1089                         BNAD_UPDATE_CTR(bnad, netif_queue_wakeup);
1090                 }
1091         }
1092
1093         /*
1094          * Workaround for first ioceth enable failure & we
1095          * get a 0 MAC address. We try to get the MAC address
1096          * again here.
1097          */
1098         if (is_zero_ether_addr(&bnad->perm_addr.mac[0])) {
1099                 bna_enet_perm_mac_get(&bnad->bna.enet, &bnad->perm_addr);
1100                 bnad_set_netdev_perm_addr(bnad);
1101         }
1102 }
1103
1104 /*
1105  * Free all TxQs buffers and then notify TX_E_CLEANUP_DONE to Tx fsm.
1106  */
1107 static void
1108 bnad_tx_cleanup(struct delayed_work *work)
1109 {
1110         struct bnad_tx_info *tx_info =
1111                 container_of(work, struct bnad_tx_info, tx_cleanup_work);
1112         struct bnad *bnad = NULL;
1113         struct bna_tcb *tcb;
1114         unsigned long flags;
1115         u32 i, pending = 0;
1116
1117         for (i = 0; i < BNAD_MAX_TXQ_PER_TX; i++) {
1118                 tcb = tx_info->tcb[i];
1119                 if (!tcb)
1120                         continue;
1121
1122                 bnad = tcb->bnad;
1123
1124                 if (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags)) {
1125                         pending++;
1126                         continue;
1127                 }
1128
1129                 bnad_txq_cleanup(bnad, tcb);
1130
1131                 smp_mb__before_atomic();
1132                 clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
1133         }
1134
1135         if (pending) {
1136                 queue_delayed_work(bnad->work_q, &tx_info->tx_cleanup_work,
1137                         msecs_to_jiffies(1));
1138                 return;
1139         }
1140
1141         spin_lock_irqsave(&bnad->bna_lock, flags);
1142         bna_tx_cleanup_complete(tx_info->tx);
1143         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1144 }
1145
1146 static void
1147 bnad_cb_tx_cleanup(struct bnad *bnad, struct bna_tx *tx)
1148 {
1149         struct bnad_tx_info *tx_info = (struct bnad_tx_info *)tx->priv;
1150         struct bna_tcb *tcb;
1151         int i;
1152
1153         for (i = 0; i < BNAD_MAX_TXQ_PER_TX; i++) {
1154                 tcb = tx_info->tcb[i];
1155                 if (!tcb)
1156                         continue;
1157         }
1158
1159         queue_delayed_work(bnad->work_q, &tx_info->tx_cleanup_work, 0);
1160 }
1161
1162 static void
1163 bnad_cb_rx_stall(struct bnad *bnad, struct bna_rx *rx)
1164 {
1165         struct bnad_rx_info *rx_info = (struct bnad_rx_info *)rx->priv;
1166         struct bna_ccb *ccb;
1167         struct bnad_rx_ctrl *rx_ctrl;
1168         int i;
1169
1170         for (i = 0; i < BNAD_MAX_RXP_PER_RX; i++) {
1171                 rx_ctrl = &rx_info->rx_ctrl[i];
1172                 ccb = rx_ctrl->ccb;
1173                 if (!ccb)
1174                         continue;
1175
1176                 clear_bit(BNAD_RXQ_POST_OK, &ccb->rcb[0]->flags);
1177
1178                 if (ccb->rcb[1])
1179                         clear_bit(BNAD_RXQ_POST_OK, &ccb->rcb[1]->flags);
1180         }
1181 }
1182
1183 /*
1184  * Free all RxQs buffers and then notify RX_E_CLEANUP_DONE to Rx fsm.
1185  */
1186 static void
1187 bnad_rx_cleanup(void *work)
1188 {
1189         struct bnad_rx_info *rx_info =
1190                 container_of(work, struct bnad_rx_info, rx_cleanup_work);
1191         struct bnad_rx_ctrl *rx_ctrl;
1192         struct bnad *bnad = NULL;
1193         unsigned long flags;
1194         u32 i;
1195
1196         for (i = 0; i < BNAD_MAX_RXP_PER_RX; i++) {
1197                 rx_ctrl = &rx_info->rx_ctrl[i];
1198
1199                 if (!rx_ctrl->ccb)
1200                         continue;
1201
1202                 bnad = rx_ctrl->ccb->bnad;
1203
1204                 /*
1205                  * Wait till the poll handler has exited
1206                  * and nothing can be scheduled anymore
1207                  */
1208                 napi_disable(&rx_ctrl->napi);
1209
1210                 bnad_cq_cleanup(bnad, rx_ctrl->ccb);
1211                 bnad_rxq_cleanup(bnad, rx_ctrl->ccb->rcb[0]);
1212                 if (rx_ctrl->ccb->rcb[1])
1213                         bnad_rxq_cleanup(bnad, rx_ctrl->ccb->rcb[1]);
1214         }
1215
1216         spin_lock_irqsave(&bnad->bna_lock, flags);
1217         bna_rx_cleanup_complete(rx_info->rx);
1218         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1219 }
1220
1221 static void
1222 bnad_cb_rx_cleanup(struct bnad *bnad, struct bna_rx *rx)
1223 {
1224         struct bnad_rx_info *rx_info = (struct bnad_rx_info *)rx->priv;
1225         struct bna_ccb *ccb;
1226         struct bnad_rx_ctrl *rx_ctrl;
1227         int i;
1228
1229         for (i = 0; i < BNAD_MAX_RXP_PER_RX; i++) {
1230                 rx_ctrl = &rx_info->rx_ctrl[i];
1231                 ccb = rx_ctrl->ccb;
1232                 if (!ccb)
1233                         continue;
1234
1235                 clear_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags);
1236
1237                 if (ccb->rcb[1])
1238                         clear_bit(BNAD_RXQ_STARTED, &ccb->rcb[1]->flags);
1239         }
1240
1241         queue_work(bnad->work_q, &rx_info->rx_cleanup_work);
1242 }
1243
1244 static void
1245 bnad_cb_rx_post(struct bnad *bnad, struct bna_rx *rx)
1246 {
1247         struct bnad_rx_info *rx_info = (struct bnad_rx_info *)rx->priv;
1248         struct bna_ccb *ccb;
1249         struct bna_rcb *rcb;
1250         struct bnad_rx_ctrl *rx_ctrl;
1251         int i, j;
1252
1253         for (i = 0; i < BNAD_MAX_RXP_PER_RX; i++) {
1254                 rx_ctrl = &rx_info->rx_ctrl[i];
1255                 ccb = rx_ctrl->ccb;
1256                 if (!ccb)
1257                         continue;
1258
1259                 napi_enable(&rx_ctrl->napi);
1260
1261                 for (j = 0; j < BNAD_MAX_RXQ_PER_RXP; j++) {
1262                         rcb = ccb->rcb[j];
1263                         if (!rcb)
1264                                 continue;
1265
1266                         bnad_rxq_alloc_init(bnad, rcb);
1267                         set_bit(BNAD_RXQ_STARTED, &rcb->flags);
1268                         set_bit(BNAD_RXQ_POST_OK, &rcb->flags);
1269                         bnad_rxq_post(bnad, rcb);
1270                 }
1271         }
1272 }
1273
1274 static void
1275 bnad_cb_rx_disabled(void *arg, struct bna_rx *rx)
1276 {
1277         struct bnad *bnad = (struct bnad *)arg;
1278
1279         complete(&bnad->bnad_completions.rx_comp);
1280 }
1281
1282 static void
1283 bnad_cb_rx_mcast_add(struct bnad *bnad, struct bna_rx *rx)
1284 {
1285         bnad->bnad_completions.mcast_comp_status = BNA_CB_SUCCESS;
1286         complete(&bnad->bnad_completions.mcast_comp);
1287 }
1288
1289 void
1290 bnad_cb_stats_get(struct bnad *bnad, enum bna_cb_status status,
1291                        struct bna_stats *stats)
1292 {
1293         if (status == BNA_CB_SUCCESS)
1294                 BNAD_UPDATE_CTR(bnad, hw_stats_updates);
1295
1296         if (!netif_running(bnad->netdev) ||
1297                 !test_bit(BNAD_RF_STATS_TIMER_RUNNING, &bnad->run_flags))
1298                 return;
1299
1300         mod_timer(&bnad->stats_timer,
1301                   jiffies + msecs_to_jiffies(BNAD_STATS_TIMER_FREQ));
1302 }
1303
1304 static void
1305 bnad_cb_enet_mtu_set(struct bnad *bnad)
1306 {
1307         bnad->bnad_completions.mtu_comp_status = BNA_CB_SUCCESS;
1308         complete(&bnad->bnad_completions.mtu_comp);
1309 }
1310
1311 void
1312 bnad_cb_completion(void *arg, enum bfa_status status)
1313 {
1314         struct bnad_iocmd_comp *iocmd_comp =
1315                         (struct bnad_iocmd_comp *)arg;
1316
1317         iocmd_comp->comp_status = (u32) status;
1318         complete(&iocmd_comp->comp);
1319 }
1320
1321 /* Resource allocation, free functions */
1322
1323 static void
1324 bnad_mem_free(struct bnad *bnad,
1325               struct bna_mem_info *mem_info)
1326 {
1327         int i;
1328         dma_addr_t dma_pa;
1329
1330         if (mem_info->mdl == NULL)
1331                 return;
1332
1333         for (i = 0; i < mem_info->num; i++) {
1334                 if (mem_info->mdl[i].kva != NULL) {
1335                         if (mem_info->mem_type == BNA_MEM_T_DMA) {
1336                                 BNA_GET_DMA_ADDR(&(mem_info->mdl[i].dma),
1337                                                 dma_pa);
1338                                 dma_free_coherent(&bnad->pcidev->dev,
1339                                                   mem_info->mdl[i].len,
1340                                                   mem_info->mdl[i].kva, dma_pa);
1341                         } else
1342                                 kfree(mem_info->mdl[i].kva);
1343                 }
1344         }
1345         kfree(mem_info->mdl);
1346         mem_info->mdl = NULL;
1347 }
1348
1349 static int
1350 bnad_mem_alloc(struct bnad *bnad,
1351                struct bna_mem_info *mem_info)
1352 {
1353         int i;
1354         dma_addr_t dma_pa;
1355
1356         if ((mem_info->num == 0) || (mem_info->len == 0)) {
1357                 mem_info->mdl = NULL;
1358                 return 0;
1359         }
1360
1361         mem_info->mdl = kcalloc(mem_info->num, sizeof(struct bna_mem_descr),
1362                                 GFP_KERNEL);
1363         if (mem_info->mdl == NULL)
1364                 return -ENOMEM;
1365
1366         if (mem_info->mem_type == BNA_MEM_T_DMA) {
1367                 for (i = 0; i < mem_info->num; i++) {
1368                         mem_info->mdl[i].len = mem_info->len;
1369                         mem_info->mdl[i].kva =
1370                                 dma_alloc_coherent(&bnad->pcidev->dev,
1371                                                    mem_info->len, &dma_pa,
1372                                                    GFP_KERNEL);
1373                         if (mem_info->mdl[i].kva == NULL)
1374                                 goto err_return;
1375
1376                         BNA_SET_DMA_ADDR(dma_pa,
1377                                          &(mem_info->mdl[i].dma));
1378                 }
1379         } else {
1380                 for (i = 0; i < mem_info->num; i++) {
1381                         mem_info->mdl[i].len = mem_info->len;
1382                         mem_info->mdl[i].kva = kzalloc(mem_info->len,
1383                                                         GFP_KERNEL);
1384                         if (mem_info->mdl[i].kva == NULL)
1385                                 goto err_return;
1386                 }
1387         }
1388
1389         return 0;
1390
1391 err_return:
1392         bnad_mem_free(bnad, mem_info);
1393         return -ENOMEM;
1394 }
1395
1396 /* Free IRQ for Mailbox */
1397 static void
1398 bnad_mbox_irq_free(struct bnad *bnad)
1399 {
1400         int irq;
1401         unsigned long flags;
1402
1403         spin_lock_irqsave(&bnad->bna_lock, flags);
1404         bnad_disable_mbox_irq(bnad);
1405         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1406
1407         irq = BNAD_GET_MBOX_IRQ(bnad);
1408         free_irq(irq, bnad);
1409 }
1410
1411 /*
1412  * Allocates IRQ for Mailbox, but keep it disabled
1413  * This will be enabled once we get the mbox enable callback
1414  * from bna
1415  */
1416 static int
1417 bnad_mbox_irq_alloc(struct bnad *bnad)
1418 {
1419         int             err = 0;
1420         unsigned long   irq_flags, flags;
1421         u32     irq;
1422         irq_handler_t   irq_handler;
1423
1424         spin_lock_irqsave(&bnad->bna_lock, flags);
1425         if (bnad->cfg_flags & BNAD_CF_MSIX) {
1426                 irq_handler = (irq_handler_t)bnad_msix_mbox_handler;
1427                 irq = bnad->msix_table[BNAD_MAILBOX_MSIX_INDEX].vector;
1428                 irq_flags = 0;
1429         } else {
1430                 irq_handler = (irq_handler_t)bnad_isr;
1431                 irq = bnad->pcidev->irq;
1432                 irq_flags = IRQF_SHARED;
1433         }
1434
1435         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1436         sprintf(bnad->mbox_irq_name, "%s", BNAD_NAME);
1437
1438         /*
1439          * Set the Mbox IRQ disable flag, so that the IRQ handler
1440          * called from request_irq() for SHARED IRQs do not execute
1441          */
1442         set_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags);
1443
1444         BNAD_UPDATE_CTR(bnad, mbox_intr_disabled);
1445
1446         err = request_irq(irq, irq_handler, irq_flags,
1447                           bnad->mbox_irq_name, bnad);
1448
1449         return err;
1450 }
1451
1452 static void
1453 bnad_txrx_irq_free(struct bnad *bnad, struct bna_intr_info *intr_info)
1454 {
1455         kfree(intr_info->idl);
1456         intr_info->idl = NULL;
1457 }
1458
1459 /* Allocates Interrupt Descriptor List for MSIX/INT-X vectors */
1460 static int
1461 bnad_txrx_irq_alloc(struct bnad *bnad, enum bnad_intr_source src,
1462                     u32 txrx_id, struct bna_intr_info *intr_info)
1463 {
1464         int i, vector_start = 0;
1465         u32 cfg_flags;
1466         unsigned long flags;
1467
1468         spin_lock_irqsave(&bnad->bna_lock, flags);
1469         cfg_flags = bnad->cfg_flags;
1470         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1471
1472         if (cfg_flags & BNAD_CF_MSIX) {
1473                 intr_info->intr_type = BNA_INTR_T_MSIX;
1474                 intr_info->idl = kcalloc(intr_info->num,
1475                                         sizeof(struct bna_intr_descr),
1476                                         GFP_KERNEL);
1477                 if (!intr_info->idl)
1478                         return -ENOMEM;
1479
1480                 switch (src) {
1481                 case BNAD_INTR_TX:
1482                         vector_start = BNAD_MAILBOX_MSIX_VECTORS + txrx_id;
1483                         break;
1484
1485                 case BNAD_INTR_RX:
1486                         vector_start = BNAD_MAILBOX_MSIX_VECTORS +
1487                                         (bnad->num_tx * bnad->num_txq_per_tx) +
1488                                         txrx_id;
1489                         break;
1490
1491                 default:
1492                         BUG();
1493                 }
1494
1495                 for (i = 0; i < intr_info->num; i++)
1496                         intr_info->idl[i].vector = vector_start + i;
1497         } else {
1498                 intr_info->intr_type = BNA_INTR_T_INTX;
1499                 intr_info->num = 1;
1500                 intr_info->idl = kcalloc(intr_info->num,
1501                                         sizeof(struct bna_intr_descr),
1502                                         GFP_KERNEL);
1503                 if (!intr_info->idl)
1504                         return -ENOMEM;
1505
1506                 switch (src) {
1507                 case BNAD_INTR_TX:
1508                         intr_info->idl[0].vector = BNAD_INTX_TX_IB_BITMASK;
1509                         break;
1510
1511                 case BNAD_INTR_RX:
1512                         intr_info->idl[0].vector = BNAD_INTX_RX_IB_BITMASK;
1513                         break;
1514                 }
1515         }
1516         return 0;
1517 }
1518
1519 /* NOTE: Should be called for MSIX only
1520  * Unregisters Tx MSIX vector(s) from the kernel
1521  */
1522 static void
1523 bnad_tx_msix_unregister(struct bnad *bnad, struct bnad_tx_info *tx_info,
1524                         int num_txqs)
1525 {
1526         int i;
1527         int vector_num;
1528
1529         for (i = 0; i < num_txqs; i++) {
1530                 if (tx_info->tcb[i] == NULL)
1531                         continue;
1532
1533                 vector_num = tx_info->tcb[i]->intr_vector;
1534                 free_irq(bnad->msix_table[vector_num].vector, tx_info->tcb[i]);
1535         }
1536 }
1537
1538 /* NOTE: Should be called for MSIX only
1539  * Registers Tx MSIX vector(s) and ISR(s), cookie with the kernel
1540  */
1541 static int
1542 bnad_tx_msix_register(struct bnad *bnad, struct bnad_tx_info *tx_info,
1543                         u32 tx_id, int num_txqs)
1544 {
1545         int i;
1546         int err;
1547         int vector_num;
1548
1549         for (i = 0; i < num_txqs; i++) {
1550                 vector_num = tx_info->tcb[i]->intr_vector;
1551                 sprintf(tx_info->tcb[i]->name, "%s TXQ %d", bnad->netdev->name,
1552                                 tx_id + tx_info->tcb[i]->id);
1553                 err = request_irq(bnad->msix_table[vector_num].vector,
1554                                   (irq_handler_t)bnad_msix_tx, 0,
1555                                   tx_info->tcb[i]->name,
1556                                   tx_info->tcb[i]);
1557                 if (err)
1558                         goto err_return;
1559         }
1560
1561         return 0;
1562
1563 err_return:
1564         if (i > 0)
1565                 bnad_tx_msix_unregister(bnad, tx_info, (i - 1));
1566         return -1;
1567 }
1568
1569 /* NOTE: Should be called for MSIX only
1570  * Unregisters Rx MSIX vector(s) from the kernel
1571  */
1572 static void
1573 bnad_rx_msix_unregister(struct bnad *bnad, struct bnad_rx_info *rx_info,
1574                         int num_rxps)
1575 {
1576         int i;
1577         int vector_num;
1578
1579         for (i = 0; i < num_rxps; i++) {
1580                 if (rx_info->rx_ctrl[i].ccb == NULL)
1581                         continue;
1582
1583                 vector_num = rx_info->rx_ctrl[i].ccb->intr_vector;
1584                 free_irq(bnad->msix_table[vector_num].vector,
1585                          rx_info->rx_ctrl[i].ccb);
1586         }
1587 }
1588
1589 /* NOTE: Should be called for MSIX only
1590  * Registers Tx MSIX vector(s) and ISR(s), cookie with the kernel
1591  */
1592 static int
1593 bnad_rx_msix_register(struct bnad *bnad, struct bnad_rx_info *rx_info,
1594                         u32 rx_id, int num_rxps)
1595 {
1596         int i;
1597         int err;
1598         int vector_num;
1599
1600         for (i = 0; i < num_rxps; i++) {
1601                 vector_num = rx_info->rx_ctrl[i].ccb->intr_vector;
1602                 sprintf(rx_info->rx_ctrl[i].ccb->name, "%s CQ %d",
1603                         bnad->netdev->name,
1604                         rx_id + rx_info->rx_ctrl[i].ccb->id);
1605                 err = request_irq(bnad->msix_table[vector_num].vector,
1606                                   (irq_handler_t)bnad_msix_rx, 0,
1607                                   rx_info->rx_ctrl[i].ccb->name,
1608                                   rx_info->rx_ctrl[i].ccb);
1609                 if (err)
1610                         goto err_return;
1611         }
1612
1613         return 0;
1614
1615 err_return:
1616         if (i > 0)
1617                 bnad_rx_msix_unregister(bnad, rx_info, (i - 1));
1618         return -1;
1619 }
1620
1621 /* Free Tx object Resources */
1622 static void
1623 bnad_tx_res_free(struct bnad *bnad, struct bna_res_info *res_info)
1624 {
1625         int i;
1626
1627         for (i = 0; i < BNA_TX_RES_T_MAX; i++) {
1628                 if (res_info[i].res_type == BNA_RES_T_MEM)
1629                         bnad_mem_free(bnad, &res_info[i].res_u.mem_info);
1630                 else if (res_info[i].res_type == BNA_RES_T_INTR)
1631                         bnad_txrx_irq_free(bnad, &res_info[i].res_u.intr_info);
1632         }
1633 }
1634
1635 /* Allocates memory and interrupt resources for Tx object */
1636 static int
1637 bnad_tx_res_alloc(struct bnad *bnad, struct bna_res_info *res_info,
1638                   u32 tx_id)
1639 {
1640         int i, err = 0;
1641
1642         for (i = 0; i < BNA_TX_RES_T_MAX; i++) {
1643                 if (res_info[i].res_type == BNA_RES_T_MEM)
1644                         err = bnad_mem_alloc(bnad,
1645                                         &res_info[i].res_u.mem_info);
1646                 else if (res_info[i].res_type == BNA_RES_T_INTR)
1647                         err = bnad_txrx_irq_alloc(bnad, BNAD_INTR_TX, tx_id,
1648                                         &res_info[i].res_u.intr_info);
1649                 if (err)
1650                         goto err_return;
1651         }
1652         return 0;
1653
1654 err_return:
1655         bnad_tx_res_free(bnad, res_info);
1656         return err;
1657 }
1658
1659 /* Free Rx object Resources */
1660 static void
1661 bnad_rx_res_free(struct bnad *bnad, struct bna_res_info *res_info)
1662 {
1663         int i;
1664
1665         for (i = 0; i < BNA_RX_RES_T_MAX; i++) {
1666                 if (res_info[i].res_type == BNA_RES_T_MEM)
1667                         bnad_mem_free(bnad, &res_info[i].res_u.mem_info);
1668                 else if (res_info[i].res_type == BNA_RES_T_INTR)
1669                         bnad_txrx_irq_free(bnad, &res_info[i].res_u.intr_info);
1670         }
1671 }
1672
1673 /* Allocates memory and interrupt resources for Rx object */
1674 static int
1675 bnad_rx_res_alloc(struct bnad *bnad, struct bna_res_info *res_info,
1676                   uint rx_id)
1677 {
1678         int i, err = 0;
1679
1680         /* All memory needs to be allocated before setup_ccbs */
1681         for (i = 0; i < BNA_RX_RES_T_MAX; i++) {
1682                 if (res_info[i].res_type == BNA_RES_T_MEM)
1683                         err = bnad_mem_alloc(bnad,
1684                                         &res_info[i].res_u.mem_info);
1685                 else if (res_info[i].res_type == BNA_RES_T_INTR)
1686                         err = bnad_txrx_irq_alloc(bnad, BNAD_INTR_RX, rx_id,
1687                                         &res_info[i].res_u.intr_info);
1688                 if (err)
1689                         goto err_return;
1690         }
1691         return 0;
1692
1693 err_return:
1694         bnad_rx_res_free(bnad, res_info);
1695         return err;
1696 }
1697
1698 /* Timer callbacks */
1699 /* a) IOC timer */
1700 static void
1701 bnad_ioc_timeout(unsigned long data)
1702 {
1703         struct bnad *bnad = (struct bnad *)data;
1704         unsigned long flags;
1705
1706         spin_lock_irqsave(&bnad->bna_lock, flags);
1707         bfa_nw_ioc_timeout((void *) &bnad->bna.ioceth.ioc);
1708         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1709 }
1710
1711 static void
1712 bnad_ioc_hb_check(unsigned long data)
1713 {
1714         struct bnad *bnad = (struct bnad *)data;
1715         unsigned long flags;
1716
1717         spin_lock_irqsave(&bnad->bna_lock, flags);
1718         bfa_nw_ioc_hb_check((void *) &bnad->bna.ioceth.ioc);
1719         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1720 }
1721
1722 static void
1723 bnad_iocpf_timeout(unsigned long data)
1724 {
1725         struct bnad *bnad = (struct bnad *)data;
1726         unsigned long flags;
1727
1728         spin_lock_irqsave(&bnad->bna_lock, flags);
1729         bfa_nw_iocpf_timeout((void *) &bnad->bna.ioceth.ioc);
1730         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1731 }
1732
1733 static void
1734 bnad_iocpf_sem_timeout(unsigned long data)
1735 {
1736         struct bnad *bnad = (struct bnad *)data;
1737         unsigned long flags;
1738
1739         spin_lock_irqsave(&bnad->bna_lock, flags);
1740         bfa_nw_iocpf_sem_timeout((void *) &bnad->bna.ioceth.ioc);
1741         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1742 }
1743
1744 /*
1745  * All timer routines use bnad->bna_lock to protect against
1746  * the following race, which may occur in case of no locking:
1747  *      Time    CPU m   CPU n
1748  *      0       1 = test_bit
1749  *      1                       clear_bit
1750  *      2                       del_timer_sync
1751  *      3       mod_timer
1752  */
1753
1754 /* b) Dynamic Interrupt Moderation Timer */
1755 static void
1756 bnad_dim_timeout(unsigned long data)
1757 {
1758         struct bnad *bnad = (struct bnad *)data;
1759         struct bnad_rx_info *rx_info;
1760         struct bnad_rx_ctrl *rx_ctrl;
1761         int i, j;
1762         unsigned long flags;
1763
1764         if (!netif_carrier_ok(bnad->netdev))
1765                 return;
1766
1767         spin_lock_irqsave(&bnad->bna_lock, flags);
1768         for (i = 0; i < bnad->num_rx; i++) {
1769                 rx_info = &bnad->rx_info[i];
1770                 if (!rx_info->rx)
1771                         continue;
1772                 for (j = 0; j < bnad->num_rxp_per_rx; j++) {
1773                         rx_ctrl = &rx_info->rx_ctrl[j];
1774                         if (!rx_ctrl->ccb)
1775                                 continue;
1776                         bna_rx_dim_update(rx_ctrl->ccb);
1777                 }
1778         }
1779
1780         /* Check for BNAD_CF_DIM_ENABLED, does not eleminate a race */
1781         if (test_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags))
1782                 mod_timer(&bnad->dim_timer,
1783                           jiffies + msecs_to_jiffies(BNAD_DIM_TIMER_FREQ));
1784         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1785 }
1786
1787 /* c)  Statistics Timer */
1788 static void
1789 bnad_stats_timeout(unsigned long data)
1790 {
1791         struct bnad *bnad = (struct bnad *)data;
1792         unsigned long flags;
1793
1794         if (!netif_running(bnad->netdev) ||
1795                 !test_bit(BNAD_RF_STATS_TIMER_RUNNING, &bnad->run_flags))
1796                 return;
1797
1798         spin_lock_irqsave(&bnad->bna_lock, flags);
1799         bna_hw_stats_get(&bnad->bna);
1800         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1801 }
1802
1803 /*
1804  * Set up timer for DIM
1805  * Called with bnad->bna_lock held
1806  */
1807 void
1808 bnad_dim_timer_start(struct bnad *bnad)
1809 {
1810         if (bnad->cfg_flags & BNAD_CF_DIM_ENABLED &&
1811             !test_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags)) {
1812                 setup_timer(&bnad->dim_timer, bnad_dim_timeout,
1813                             (unsigned long)bnad);
1814                 set_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags);
1815                 mod_timer(&bnad->dim_timer,
1816                           jiffies + msecs_to_jiffies(BNAD_DIM_TIMER_FREQ));
1817         }
1818 }
1819
1820 /*
1821  * Set up timer for statistics
1822  * Called with mutex_lock(&bnad->conf_mutex) held
1823  */
1824 static void
1825 bnad_stats_timer_start(struct bnad *bnad)
1826 {
1827         unsigned long flags;
1828
1829         spin_lock_irqsave(&bnad->bna_lock, flags);
1830         if (!test_and_set_bit(BNAD_RF_STATS_TIMER_RUNNING, &bnad->run_flags)) {
1831                 setup_timer(&bnad->stats_timer, bnad_stats_timeout,
1832                             (unsigned long)bnad);
1833                 mod_timer(&bnad->stats_timer,
1834                           jiffies + msecs_to_jiffies(BNAD_STATS_TIMER_FREQ));
1835         }
1836         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1837 }
1838
1839 /*
1840  * Stops the stats timer
1841  * Called with mutex_lock(&bnad->conf_mutex) held
1842  */
1843 static void
1844 bnad_stats_timer_stop(struct bnad *bnad)
1845 {
1846         int to_del = 0;
1847         unsigned long flags;
1848
1849         spin_lock_irqsave(&bnad->bna_lock, flags);
1850         if (test_and_clear_bit(BNAD_RF_STATS_TIMER_RUNNING, &bnad->run_flags))
1851                 to_del = 1;
1852         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1853         if (to_del)
1854                 del_timer_sync(&bnad->stats_timer);
1855 }
1856
1857 /* Utilities */
1858
1859 static void
1860 bnad_netdev_mc_list_get(struct net_device *netdev, u8 *mc_list)
1861 {
1862         int i = 1; /* Index 0 has broadcast address */
1863         struct netdev_hw_addr *mc_addr;
1864
1865         netdev_for_each_mc_addr(mc_addr, netdev) {
1866                 ether_addr_copy(&mc_list[i * ETH_ALEN], &mc_addr->addr[0]);
1867                 i++;
1868         }
1869 }
1870
1871 static int
1872 bnad_napi_poll_rx(struct napi_struct *napi, int budget)
1873 {
1874         struct bnad_rx_ctrl *rx_ctrl =
1875                 container_of(napi, struct bnad_rx_ctrl, napi);
1876         struct bnad *bnad = rx_ctrl->bnad;
1877         int rcvd = 0;
1878
1879         rx_ctrl->rx_poll_ctr++;
1880
1881         if (!netif_carrier_ok(bnad->netdev))
1882                 goto poll_exit;
1883
1884         rcvd = bnad_cq_process(bnad, rx_ctrl->ccb, budget);
1885         if (rcvd >= budget)
1886                 return rcvd;
1887
1888 poll_exit:
1889         napi_complete(napi);
1890
1891         rx_ctrl->rx_complete++;
1892
1893         if (rx_ctrl->ccb)
1894                 bnad_enable_rx_irq_unsafe(rx_ctrl->ccb);
1895
1896         return rcvd;
1897 }
1898
1899 #define BNAD_NAPI_POLL_QUOTA            64
1900 static void
1901 bnad_napi_add(struct bnad *bnad, u32 rx_id)
1902 {
1903         struct bnad_rx_ctrl *rx_ctrl;
1904         int i;
1905
1906         /* Initialize & enable NAPI */
1907         for (i = 0; i < bnad->num_rxp_per_rx; i++) {
1908                 rx_ctrl = &bnad->rx_info[rx_id].rx_ctrl[i];
1909                 netif_napi_add(bnad->netdev, &rx_ctrl->napi,
1910                                bnad_napi_poll_rx, BNAD_NAPI_POLL_QUOTA);
1911         }
1912 }
1913
1914 static void
1915 bnad_napi_delete(struct bnad *bnad, u32 rx_id)
1916 {
1917         int i;
1918
1919         /* First disable and then clean up */
1920         for (i = 0; i < bnad->num_rxp_per_rx; i++)
1921                 netif_napi_del(&bnad->rx_info[rx_id].rx_ctrl[i].napi);
1922 }
1923
1924 /* Should be held with conf_lock held */
1925 void
1926 bnad_destroy_tx(struct bnad *bnad, u32 tx_id)
1927 {
1928         struct bnad_tx_info *tx_info = &bnad->tx_info[tx_id];
1929         struct bna_res_info *res_info = &bnad->tx_res_info[tx_id].res_info[0];
1930         unsigned long flags;
1931
1932         if (!tx_info->tx)
1933                 return;
1934
1935         init_completion(&bnad->bnad_completions.tx_comp);
1936         spin_lock_irqsave(&bnad->bna_lock, flags);
1937         bna_tx_disable(tx_info->tx, BNA_HARD_CLEANUP, bnad_cb_tx_disabled);
1938         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1939         wait_for_completion(&bnad->bnad_completions.tx_comp);
1940
1941         if (tx_info->tcb[0]->intr_type == BNA_INTR_T_MSIX)
1942                 bnad_tx_msix_unregister(bnad, tx_info,
1943                         bnad->num_txq_per_tx);
1944
1945         spin_lock_irqsave(&bnad->bna_lock, flags);
1946         bna_tx_destroy(tx_info->tx);
1947         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1948
1949         tx_info->tx = NULL;
1950         tx_info->tx_id = 0;
1951
1952         bnad_tx_res_free(bnad, res_info);
1953 }
1954
1955 /* Should be held with conf_lock held */
1956 int
1957 bnad_setup_tx(struct bnad *bnad, u32 tx_id)
1958 {
1959         int err;
1960         struct bnad_tx_info *tx_info = &bnad->tx_info[tx_id];
1961         struct bna_res_info *res_info = &bnad->tx_res_info[tx_id].res_info[0];
1962         struct bna_intr_info *intr_info =
1963                         &res_info[BNA_TX_RES_INTR_T_TXCMPL].res_u.intr_info;
1964         struct bna_tx_config *tx_config = &bnad->tx_config[tx_id];
1965         static const struct bna_tx_event_cbfn tx_cbfn = {
1966                 .tcb_setup_cbfn = bnad_cb_tcb_setup,
1967                 .tcb_destroy_cbfn = bnad_cb_tcb_destroy,
1968                 .tx_stall_cbfn = bnad_cb_tx_stall,
1969                 .tx_resume_cbfn = bnad_cb_tx_resume,
1970                 .tx_cleanup_cbfn = bnad_cb_tx_cleanup,
1971         };
1972
1973         struct bna_tx *tx;
1974         unsigned long flags;
1975
1976         tx_info->tx_id = tx_id;
1977
1978         /* Initialize the Tx object configuration */
1979         tx_config->num_txq = bnad->num_txq_per_tx;
1980         tx_config->txq_depth = bnad->txq_depth;
1981         tx_config->tx_type = BNA_TX_T_REGULAR;
1982         tx_config->coalescing_timeo = bnad->tx_coalescing_timeo;
1983
1984         /* Get BNA's resource requirement for one tx object */
1985         spin_lock_irqsave(&bnad->bna_lock, flags);
1986         bna_tx_res_req(bnad->num_txq_per_tx,
1987                 bnad->txq_depth, res_info);
1988         spin_unlock_irqrestore(&bnad->bna_lock, flags);
1989
1990         /* Fill Unmap Q memory requirements */
1991         BNAD_FILL_UNMAPQ_MEM_REQ(&res_info[BNA_TX_RES_MEM_T_UNMAPQ],
1992                         bnad->num_txq_per_tx, (sizeof(struct bnad_tx_unmap) *
1993                         bnad->txq_depth));
1994
1995         /* Allocate resources */
1996         err = bnad_tx_res_alloc(bnad, res_info, tx_id);
1997         if (err)
1998                 return err;
1999
2000         /* Ask BNA to create one Tx object, supplying required resources */
2001         spin_lock_irqsave(&bnad->bna_lock, flags);
2002         tx = bna_tx_create(&bnad->bna, bnad, tx_config, &tx_cbfn, res_info,
2003                         tx_info);
2004         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2005         if (!tx) {
2006                 err = -ENOMEM;
2007                 goto err_return;
2008         }
2009         tx_info->tx = tx;
2010
2011         INIT_DELAYED_WORK(&tx_info->tx_cleanup_work,
2012                         (work_func_t)bnad_tx_cleanup);
2013
2014         /* Register ISR for the Tx object */
2015         if (intr_info->intr_type == BNA_INTR_T_MSIX) {
2016                 err = bnad_tx_msix_register(bnad, tx_info,
2017                         tx_id, bnad->num_txq_per_tx);
2018                 if (err)
2019                         goto cleanup_tx;
2020         }
2021
2022         spin_lock_irqsave(&bnad->bna_lock, flags);
2023         bna_tx_enable(tx);
2024         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2025
2026         return 0;
2027
2028 cleanup_tx:
2029         spin_lock_irqsave(&bnad->bna_lock, flags);
2030         bna_tx_destroy(tx_info->tx);
2031         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2032         tx_info->tx = NULL;
2033         tx_info->tx_id = 0;
2034 err_return:
2035         bnad_tx_res_free(bnad, res_info);
2036         return err;
2037 }
2038
2039 /* Setup the rx config for bna_rx_create */
2040 /* bnad decides the configuration */
2041 static void
2042 bnad_init_rx_config(struct bnad *bnad, struct bna_rx_config *rx_config)
2043 {
2044         memset(rx_config, 0, sizeof(*rx_config));
2045         rx_config->rx_type = BNA_RX_T_REGULAR;
2046         rx_config->num_paths = bnad->num_rxp_per_rx;
2047         rx_config->coalescing_timeo = bnad->rx_coalescing_timeo;
2048
2049         if (bnad->num_rxp_per_rx > 1) {
2050                 rx_config->rss_status = BNA_STATUS_T_ENABLED;
2051                 rx_config->rss_config.hash_type =
2052                                 (BFI_ENET_RSS_IPV6 |
2053                                  BFI_ENET_RSS_IPV6_TCP |
2054                                  BFI_ENET_RSS_IPV4 |
2055                                  BFI_ENET_RSS_IPV4_TCP);
2056                 rx_config->rss_config.hash_mask =
2057                                 bnad->num_rxp_per_rx - 1;
2058                 netdev_rss_key_fill(rx_config->rss_config.toeplitz_hash_key,
2059                         sizeof(rx_config->rss_config.toeplitz_hash_key));
2060         } else {
2061                 rx_config->rss_status = BNA_STATUS_T_DISABLED;
2062                 memset(&rx_config->rss_config, 0,
2063                        sizeof(rx_config->rss_config));
2064         }
2065
2066         rx_config->frame_size = BNAD_FRAME_SIZE(bnad->netdev->mtu);
2067         rx_config->q0_multi_buf = BNA_STATUS_T_DISABLED;
2068
2069         /* BNA_RXP_SINGLE - one data-buffer queue
2070          * BNA_RXP_SLR - one small-buffer and one large-buffer queues
2071          * BNA_RXP_HDS - one header-buffer and one data-buffer queues
2072          */
2073         /* TODO: configurable param for queue type */
2074         rx_config->rxp_type = BNA_RXP_SLR;
2075
2076         if (BNAD_PCI_DEV_IS_CAT2(bnad) &&
2077             rx_config->frame_size > 4096) {
2078                 /* though size_routing_enable is set in SLR,
2079                  * small packets may get routed to same rxq.
2080                  * set buf_size to 2048 instead of PAGE_SIZE.
2081                  */
2082                 rx_config->q0_buf_size = 2048;
2083                 /* this should be in multiples of 2 */
2084                 rx_config->q0_num_vecs = 4;
2085                 rx_config->q0_depth = bnad->rxq_depth * rx_config->q0_num_vecs;
2086                 rx_config->q0_multi_buf = BNA_STATUS_T_ENABLED;
2087         } else {
2088                 rx_config->q0_buf_size = rx_config->frame_size;
2089                 rx_config->q0_num_vecs = 1;
2090                 rx_config->q0_depth = bnad->rxq_depth;
2091         }
2092
2093         /* initialize for q1 for BNA_RXP_SLR/BNA_RXP_HDS */
2094         if (rx_config->rxp_type == BNA_RXP_SLR) {
2095                 rx_config->q1_depth = bnad->rxq_depth;
2096                 rx_config->q1_buf_size = BFI_SMALL_RXBUF_SIZE;
2097         }
2098
2099         rx_config->vlan_strip_status =
2100                 (bnad->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) ?
2101                 BNA_STATUS_T_ENABLED : BNA_STATUS_T_DISABLED;
2102 }
2103
2104 static void
2105 bnad_rx_ctrl_init(struct bnad *bnad, u32 rx_id)
2106 {
2107         struct bnad_rx_info *rx_info = &bnad->rx_info[rx_id];
2108         int i;
2109
2110         for (i = 0; i < bnad->num_rxp_per_rx; i++)
2111                 rx_info->rx_ctrl[i].bnad = bnad;
2112 }
2113
2114 /* Called with mutex_lock(&bnad->conf_mutex) held */
2115 static u32
2116 bnad_reinit_rx(struct bnad *bnad)
2117 {
2118         struct net_device *netdev = bnad->netdev;
2119         u32 err = 0, current_err = 0;
2120         u32 rx_id = 0, count = 0;
2121         unsigned long flags;
2122
2123         /* destroy and create new rx objects */
2124         for (rx_id = 0; rx_id < bnad->num_rx; rx_id++) {
2125                 if (!bnad->rx_info[rx_id].rx)
2126                         continue;
2127                 bnad_destroy_rx(bnad, rx_id);
2128         }
2129
2130         spin_lock_irqsave(&bnad->bna_lock, flags);
2131         bna_enet_mtu_set(&bnad->bna.enet,
2132                          BNAD_FRAME_SIZE(bnad->netdev->mtu), NULL);
2133         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2134
2135         for (rx_id = 0; rx_id < bnad->num_rx; rx_id++) {
2136                 count++;
2137                 current_err = bnad_setup_rx(bnad, rx_id);
2138                 if (current_err && !err) {
2139                         err = current_err;
2140                         pr_err("RXQ:%u setup failed\n", rx_id);
2141                 }
2142         }
2143
2144         /* restore rx configuration */
2145         if (bnad->rx_info[0].rx && !err) {
2146                 bnad_restore_vlans(bnad, 0);
2147                 bnad_enable_default_bcast(bnad);
2148                 spin_lock_irqsave(&bnad->bna_lock, flags);
2149                 bnad_mac_addr_set_locked(bnad, netdev->dev_addr);
2150                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2151                 bnad_set_rx_mode(netdev);
2152         }
2153
2154         return count;
2155 }
2156
2157 /* Called with bnad_conf_lock() held */
2158 void
2159 bnad_destroy_rx(struct bnad *bnad, u32 rx_id)
2160 {
2161         struct bnad_rx_info *rx_info = &bnad->rx_info[rx_id];
2162         struct bna_rx_config *rx_config = &bnad->rx_config[rx_id];
2163         struct bna_res_info *res_info = &bnad->rx_res_info[rx_id].res_info[0];
2164         unsigned long flags;
2165         int to_del = 0;
2166
2167         if (!rx_info->rx)
2168                 return;
2169
2170         if (0 == rx_id) {
2171                 spin_lock_irqsave(&bnad->bna_lock, flags);
2172                 if (bnad->cfg_flags & BNAD_CF_DIM_ENABLED &&
2173                     test_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags)) {
2174                         clear_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags);
2175                         to_del = 1;
2176                 }
2177                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2178                 if (to_del)
2179                         del_timer_sync(&bnad->dim_timer);
2180         }
2181
2182         init_completion(&bnad->bnad_completions.rx_comp);
2183         spin_lock_irqsave(&bnad->bna_lock, flags);
2184         bna_rx_disable(rx_info->rx, BNA_HARD_CLEANUP, bnad_cb_rx_disabled);
2185         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2186         wait_for_completion(&bnad->bnad_completions.rx_comp);
2187
2188         if (rx_info->rx_ctrl[0].ccb->intr_type == BNA_INTR_T_MSIX)
2189                 bnad_rx_msix_unregister(bnad, rx_info, rx_config->num_paths);
2190
2191         bnad_napi_delete(bnad, rx_id);
2192
2193         spin_lock_irqsave(&bnad->bna_lock, flags);
2194         bna_rx_destroy(rx_info->rx);
2195
2196         rx_info->rx = NULL;
2197         rx_info->rx_id = 0;
2198         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2199
2200         bnad_rx_res_free(bnad, res_info);
2201 }
2202
2203 /* Called with mutex_lock(&bnad->conf_mutex) held */
2204 int
2205 bnad_setup_rx(struct bnad *bnad, u32 rx_id)
2206 {
2207         int err;
2208         struct bnad_rx_info *rx_info = &bnad->rx_info[rx_id];
2209         struct bna_res_info *res_info = &bnad->rx_res_info[rx_id].res_info[0];
2210         struct bna_intr_info *intr_info =
2211                         &res_info[BNA_RX_RES_T_INTR].res_u.intr_info;
2212         struct bna_rx_config *rx_config = &bnad->rx_config[rx_id];
2213         static const struct bna_rx_event_cbfn rx_cbfn = {
2214                 .rcb_setup_cbfn = NULL,
2215                 .rcb_destroy_cbfn = NULL,
2216                 .ccb_setup_cbfn = bnad_cb_ccb_setup,
2217                 .ccb_destroy_cbfn = bnad_cb_ccb_destroy,
2218                 .rx_stall_cbfn = bnad_cb_rx_stall,
2219                 .rx_cleanup_cbfn = bnad_cb_rx_cleanup,
2220                 .rx_post_cbfn = bnad_cb_rx_post,
2221         };
2222         struct bna_rx *rx;
2223         unsigned long flags;
2224
2225         rx_info->rx_id = rx_id;
2226
2227         /* Initialize the Rx object configuration */
2228         bnad_init_rx_config(bnad, rx_config);
2229
2230         /* Get BNA's resource requirement for one Rx object */
2231         spin_lock_irqsave(&bnad->bna_lock, flags);
2232         bna_rx_res_req(rx_config, res_info);
2233         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2234
2235         /* Fill Unmap Q memory requirements */
2236         BNAD_FILL_UNMAPQ_MEM_REQ(&res_info[BNA_RX_RES_MEM_T_UNMAPDQ],
2237                                  rx_config->num_paths,
2238                         (rx_config->q0_depth *
2239                          sizeof(struct bnad_rx_unmap)) +
2240                          sizeof(struct bnad_rx_unmap_q));
2241
2242         if (rx_config->rxp_type != BNA_RXP_SINGLE) {
2243                 BNAD_FILL_UNMAPQ_MEM_REQ(&res_info[BNA_RX_RES_MEM_T_UNMAPHQ],
2244                                          rx_config->num_paths,
2245                                 (rx_config->q1_depth *
2246                                  sizeof(struct bnad_rx_unmap) +
2247                                  sizeof(struct bnad_rx_unmap_q)));
2248         }
2249         /* Allocate resource */
2250         err = bnad_rx_res_alloc(bnad, res_info, rx_id);
2251         if (err)
2252                 return err;
2253
2254         bnad_rx_ctrl_init(bnad, rx_id);
2255
2256         /* Ask BNA to create one Rx object, supplying required resources */
2257         spin_lock_irqsave(&bnad->bna_lock, flags);
2258         rx = bna_rx_create(&bnad->bna, bnad, rx_config, &rx_cbfn, res_info,
2259                         rx_info);
2260         if (!rx) {
2261                 err = -ENOMEM;
2262                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2263                 goto err_return;
2264         }
2265         rx_info->rx = rx;
2266         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2267
2268         INIT_WORK(&rx_info->rx_cleanup_work,
2269                         (work_func_t)(bnad_rx_cleanup));
2270
2271         /*
2272          * Init NAPI, so that state is set to NAPI_STATE_SCHED,
2273          * so that IRQ handler cannot schedule NAPI at this point.
2274          */
2275         bnad_napi_add(bnad, rx_id);
2276
2277         /* Register ISR for the Rx object */
2278         if (intr_info->intr_type == BNA_INTR_T_MSIX) {
2279                 err = bnad_rx_msix_register(bnad, rx_info, rx_id,
2280                                                 rx_config->num_paths);
2281                 if (err)
2282                         goto err_return;
2283         }
2284
2285         spin_lock_irqsave(&bnad->bna_lock, flags);
2286         if (0 == rx_id) {
2287                 /* Set up Dynamic Interrupt Moderation Vector */
2288                 if (bnad->cfg_flags & BNAD_CF_DIM_ENABLED)
2289                         bna_rx_dim_reconfig(&bnad->bna, bna_napi_dim_vector);
2290
2291                 /* Enable VLAN filtering only on the default Rx */
2292                 bna_rx_vlanfilter_enable(rx);
2293
2294                 /* Start the DIM timer */
2295                 bnad_dim_timer_start(bnad);
2296         }
2297
2298         bna_rx_enable(rx);
2299         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2300
2301         return 0;
2302
2303 err_return:
2304         bnad_destroy_rx(bnad, rx_id);
2305         return err;
2306 }
2307
2308 /* Called with conf_lock & bnad->bna_lock held */
2309 void
2310 bnad_tx_coalescing_timeo_set(struct bnad *bnad)
2311 {
2312         struct bnad_tx_info *tx_info;
2313
2314         tx_info = &bnad->tx_info[0];
2315         if (!tx_info->tx)
2316                 return;
2317
2318         bna_tx_coalescing_timeo_set(tx_info->tx, bnad->tx_coalescing_timeo);
2319 }
2320
2321 /* Called with conf_lock & bnad->bna_lock held */
2322 void
2323 bnad_rx_coalescing_timeo_set(struct bnad *bnad)
2324 {
2325         struct bnad_rx_info *rx_info;
2326         int     i;
2327
2328         for (i = 0; i < bnad->num_rx; i++) {
2329                 rx_info = &bnad->rx_info[i];
2330                 if (!rx_info->rx)
2331                         continue;
2332                 bna_rx_coalescing_timeo_set(rx_info->rx,
2333                                 bnad->rx_coalescing_timeo);
2334         }
2335 }
2336
2337 /*
2338  * Called with bnad->bna_lock held
2339  */
2340 int
2341 bnad_mac_addr_set_locked(struct bnad *bnad, u8 *mac_addr)
2342 {
2343         int ret;
2344
2345         if (!is_valid_ether_addr(mac_addr))
2346                 return -EADDRNOTAVAIL;
2347
2348         /* If datapath is down, pretend everything went through */
2349         if (!bnad->rx_info[0].rx)
2350                 return 0;
2351
2352         ret = bna_rx_ucast_set(bnad->rx_info[0].rx, mac_addr, NULL);
2353         if (ret != BNA_CB_SUCCESS)
2354                 return -EADDRNOTAVAIL;
2355
2356         return 0;
2357 }
2358
2359 /* Should be called with conf_lock held */
2360 int
2361 bnad_enable_default_bcast(struct bnad *bnad)
2362 {
2363         struct bnad_rx_info *rx_info = &bnad->rx_info[0];
2364         int ret;
2365         unsigned long flags;
2366
2367         init_completion(&bnad->bnad_completions.mcast_comp);
2368
2369         spin_lock_irqsave(&bnad->bna_lock, flags);
2370         ret = bna_rx_mcast_add(rx_info->rx, (u8 *)bnad_bcast_addr,
2371                                 bnad_cb_rx_mcast_add);
2372         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2373
2374         if (ret == BNA_CB_SUCCESS)
2375                 wait_for_completion(&bnad->bnad_completions.mcast_comp);
2376         else
2377                 return -ENODEV;
2378
2379         if (bnad->bnad_completions.mcast_comp_status != BNA_CB_SUCCESS)
2380                 return -ENODEV;
2381
2382         return 0;
2383 }
2384
2385 /* Called with mutex_lock(&bnad->conf_mutex) held */
2386 void
2387 bnad_restore_vlans(struct bnad *bnad, u32 rx_id)
2388 {
2389         u16 vid;
2390         unsigned long flags;
2391
2392         for_each_set_bit(vid, bnad->active_vlans, VLAN_N_VID) {
2393                 spin_lock_irqsave(&bnad->bna_lock, flags);
2394                 bna_rx_vlan_add(bnad->rx_info[rx_id].rx, vid);
2395                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2396         }
2397 }
2398
2399 /* Statistics utilities */
2400 void
2401 bnad_netdev_qstats_fill(struct bnad *bnad, struct rtnl_link_stats64 *stats)
2402 {
2403         int i, j;
2404
2405         for (i = 0; i < bnad->num_rx; i++) {
2406                 for (j = 0; j < bnad->num_rxp_per_rx; j++) {
2407                         if (bnad->rx_info[i].rx_ctrl[j].ccb) {
2408                                 stats->rx_packets += bnad->rx_info[i].
2409                                 rx_ctrl[j].ccb->rcb[0]->rxq->rx_packets;
2410                                 stats->rx_bytes += bnad->rx_info[i].
2411                                         rx_ctrl[j].ccb->rcb[0]->rxq->rx_bytes;
2412                                 if (bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1] &&
2413                                         bnad->rx_info[i].rx_ctrl[j].ccb->
2414                                         rcb[1]->rxq) {
2415                                         stats->rx_packets +=
2416                                                 bnad->rx_info[i].rx_ctrl[j].
2417                                                 ccb->rcb[1]->rxq->rx_packets;
2418                                         stats->rx_bytes +=
2419                                                 bnad->rx_info[i].rx_ctrl[j].
2420                                                 ccb->rcb[1]->rxq->rx_bytes;
2421                                 }
2422                         }
2423                 }
2424         }
2425         for (i = 0; i < bnad->num_tx; i++) {
2426                 for (j = 0; j < bnad->num_txq_per_tx; j++) {
2427                         if (bnad->tx_info[i].tcb[j]) {
2428                                 stats->tx_packets +=
2429                                 bnad->tx_info[i].tcb[j]->txq->tx_packets;
2430                                 stats->tx_bytes +=
2431                                         bnad->tx_info[i].tcb[j]->txq->tx_bytes;
2432                         }
2433                 }
2434         }
2435 }
2436
2437 /*
2438  * Must be called with the bna_lock held.
2439  */
2440 void
2441 bnad_netdev_hwstats_fill(struct bnad *bnad, struct rtnl_link_stats64 *stats)
2442 {
2443         struct bfi_enet_stats_mac *mac_stats;
2444         u32 bmap;
2445         int i;
2446
2447         mac_stats = &bnad->stats.bna_stats->hw_stats.mac_stats;
2448         stats->rx_errors =
2449                 mac_stats->rx_fcs_error + mac_stats->rx_alignment_error +
2450                 mac_stats->rx_frame_length_error + mac_stats->rx_code_error +
2451                 mac_stats->rx_undersize;
2452         stats->tx_errors = mac_stats->tx_fcs_error +
2453                                         mac_stats->tx_undersize;
2454         stats->rx_dropped = mac_stats->rx_drop;
2455         stats->tx_dropped = mac_stats->tx_drop;
2456         stats->multicast = mac_stats->rx_multicast;
2457         stats->collisions = mac_stats->tx_total_collision;
2458
2459         stats->rx_length_errors = mac_stats->rx_frame_length_error;
2460
2461         /* receive ring buffer overflow  ?? */
2462
2463         stats->rx_crc_errors = mac_stats->rx_fcs_error;
2464         stats->rx_frame_errors = mac_stats->rx_alignment_error;
2465         /* recv'r fifo overrun */
2466         bmap = bna_rx_rid_mask(&bnad->bna);
2467         for (i = 0; bmap; i++) {
2468                 if (bmap & 1) {
2469                         stats->rx_fifo_errors +=
2470                                 bnad->stats.bna_stats->
2471                                         hw_stats.rxf_stats[i].frame_drops;
2472                         break;
2473                 }
2474                 bmap >>= 1;
2475         }
2476 }
2477
2478 static void
2479 bnad_mbox_irq_sync(struct bnad *bnad)
2480 {
2481         u32 irq;
2482         unsigned long flags;
2483
2484         spin_lock_irqsave(&bnad->bna_lock, flags);
2485         if (bnad->cfg_flags & BNAD_CF_MSIX)
2486                 irq = bnad->msix_table[BNAD_MAILBOX_MSIX_INDEX].vector;
2487         else
2488                 irq = bnad->pcidev->irq;
2489         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2490
2491         synchronize_irq(irq);
2492 }
2493
2494 /* Utility used by bnad_start_xmit, for doing TSO */
2495 static int
2496 bnad_tso_prepare(struct bnad *bnad, struct sk_buff *skb)
2497 {
2498         int err;
2499
2500         err = skb_cow_head(skb, 0);
2501         if (err < 0) {
2502                 BNAD_UPDATE_CTR(bnad, tso_err);
2503                 return err;
2504         }
2505
2506         /*
2507          * For TSO, the TCP checksum field is seeded with pseudo-header sum
2508          * excluding the length field.
2509          */
2510         if (vlan_get_protocol(skb) == htons(ETH_P_IP)) {
2511                 struct iphdr *iph = ip_hdr(skb);
2512
2513                 /* Do we really need these? */
2514                 iph->tot_len = 0;
2515                 iph->check = 0;
2516
2517                 tcp_hdr(skb)->check =
2518                         ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
2519                                            IPPROTO_TCP, 0);
2520                 BNAD_UPDATE_CTR(bnad, tso4);
2521         } else {
2522                 struct ipv6hdr *ipv6h = ipv6_hdr(skb);
2523
2524                 ipv6h->payload_len = 0;
2525                 tcp_hdr(skb)->check =
2526                         ~csum_ipv6_magic(&ipv6h->saddr, &ipv6h->daddr, 0,
2527                                          IPPROTO_TCP, 0);
2528                 BNAD_UPDATE_CTR(bnad, tso6);
2529         }
2530
2531         return 0;
2532 }
2533
2534 /*
2535  * Initialize Q numbers depending on Rx Paths
2536  * Called with bnad->bna_lock held, because of cfg_flags
2537  * access.
2538  */
2539 static void
2540 bnad_q_num_init(struct bnad *bnad)
2541 {
2542         int rxps;
2543
2544         rxps = min((uint)num_online_cpus(),
2545                         (uint)(BNAD_MAX_RX * BNAD_MAX_RXP_PER_RX));
2546
2547         if (!(bnad->cfg_flags & BNAD_CF_MSIX))
2548                 rxps = 1;       /* INTx */
2549
2550         bnad->num_rx = 1;
2551         bnad->num_tx = 1;
2552         bnad->num_rxp_per_rx = rxps;
2553         bnad->num_txq_per_tx = BNAD_TXQ_NUM;
2554 }
2555
2556 /*
2557  * Adjusts the Q numbers, given a number of msix vectors
2558  * Give preference to RSS as opposed to Tx priority Queues,
2559  * in such a case, just use 1 Tx Q
2560  * Called with bnad->bna_lock held b'cos of cfg_flags access
2561  */
2562 static void
2563 bnad_q_num_adjust(struct bnad *bnad, int msix_vectors, int temp)
2564 {
2565         bnad->num_txq_per_tx = 1;
2566         if ((msix_vectors >= (bnad->num_tx * bnad->num_txq_per_tx)  +
2567              bnad_rxqs_per_cq + BNAD_MAILBOX_MSIX_VECTORS) &&
2568             (bnad->cfg_flags & BNAD_CF_MSIX)) {
2569                 bnad->num_rxp_per_rx = msix_vectors -
2570                         (bnad->num_tx * bnad->num_txq_per_tx) -
2571                         BNAD_MAILBOX_MSIX_VECTORS;
2572         } else
2573                 bnad->num_rxp_per_rx = 1;
2574 }
2575
2576 /* Enable / disable ioceth */
2577 static int
2578 bnad_ioceth_disable(struct bnad *bnad)
2579 {
2580         unsigned long flags;
2581         int err = 0;
2582
2583         spin_lock_irqsave(&bnad->bna_lock, flags);
2584         init_completion(&bnad->bnad_completions.ioc_comp);
2585         bna_ioceth_disable(&bnad->bna.ioceth, BNA_HARD_CLEANUP);
2586         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2587
2588         wait_for_completion_timeout(&bnad->bnad_completions.ioc_comp,
2589                 msecs_to_jiffies(BNAD_IOCETH_TIMEOUT));
2590
2591         err = bnad->bnad_completions.ioc_comp_status;
2592         return err;
2593 }
2594
2595 static int
2596 bnad_ioceth_enable(struct bnad *bnad)
2597 {
2598         int err = 0;
2599         unsigned long flags;
2600
2601         spin_lock_irqsave(&bnad->bna_lock, flags);
2602         init_completion(&bnad->bnad_completions.ioc_comp);
2603         bnad->bnad_completions.ioc_comp_status = BNA_CB_WAITING;
2604         bna_ioceth_enable(&bnad->bna.ioceth);
2605         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2606
2607         wait_for_completion_timeout(&bnad->bnad_completions.ioc_comp,
2608                 msecs_to_jiffies(BNAD_IOCETH_TIMEOUT));
2609
2610         err = bnad->bnad_completions.ioc_comp_status;
2611
2612         return err;
2613 }
2614
2615 /* Free BNA resources */
2616 static void
2617 bnad_res_free(struct bnad *bnad, struct bna_res_info *res_info,
2618                 u32 res_val_max)
2619 {
2620         int i;
2621
2622         for (i = 0; i < res_val_max; i++)
2623                 bnad_mem_free(bnad, &res_info[i].res_u.mem_info);
2624 }
2625
2626 /* Allocates memory and interrupt resources for BNA */
2627 static int
2628 bnad_res_alloc(struct bnad *bnad, struct bna_res_info *res_info,
2629                 u32 res_val_max)
2630 {
2631         int i, err;
2632
2633         for (i = 0; i < res_val_max; i++) {
2634                 err = bnad_mem_alloc(bnad, &res_info[i].res_u.mem_info);
2635                 if (err)
2636                         goto err_return;
2637         }
2638         return 0;
2639
2640 err_return:
2641         bnad_res_free(bnad, res_info, res_val_max);
2642         return err;
2643 }
2644
2645 /* Interrupt enable / disable */
2646 static void
2647 bnad_enable_msix(struct bnad *bnad)
2648 {
2649         int i, ret;
2650         unsigned long flags;
2651
2652         spin_lock_irqsave(&bnad->bna_lock, flags);
2653         if (!(bnad->cfg_flags & BNAD_CF_MSIX)) {
2654                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2655                 return;
2656         }
2657         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2658
2659         if (bnad->msix_table)
2660                 return;
2661
2662         bnad->msix_table =
2663                 kcalloc(bnad->msix_num, sizeof(struct msix_entry), GFP_KERNEL);
2664
2665         if (!bnad->msix_table)
2666                 goto intx_mode;
2667
2668         for (i = 0; i < bnad->msix_num; i++)
2669                 bnad->msix_table[i].entry = i;
2670
2671         ret = pci_enable_msix_range(bnad->pcidev, bnad->msix_table,
2672                                     1, bnad->msix_num);
2673         if (ret < 0) {
2674                 goto intx_mode;
2675         } else if (ret < bnad->msix_num) {
2676                 pr_warn("BNA: %d MSI-X vectors allocated < %d requested\n",
2677                         ret, bnad->msix_num);
2678
2679                 spin_lock_irqsave(&bnad->bna_lock, flags);
2680                 /* ret = #of vectors that we got */
2681                 bnad_q_num_adjust(bnad, (ret - BNAD_MAILBOX_MSIX_VECTORS) / 2,
2682                         (ret - BNAD_MAILBOX_MSIX_VECTORS) / 2);
2683                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2684
2685                 bnad->msix_num = BNAD_NUM_TXQ + BNAD_NUM_RXP +
2686                          BNAD_MAILBOX_MSIX_VECTORS;
2687
2688                 if (bnad->msix_num > ret) {
2689                         pci_disable_msix(bnad->pcidev);
2690                         goto intx_mode;
2691                 }
2692         }
2693
2694         pci_intx(bnad->pcidev, 0);
2695
2696         return;
2697
2698 intx_mode:
2699         pr_warn("BNA: MSI-X enable failed - operating in INTx mode\n");
2700
2701         kfree(bnad->msix_table);
2702         bnad->msix_table = NULL;
2703         bnad->msix_num = 0;
2704         spin_lock_irqsave(&bnad->bna_lock, flags);
2705         bnad->cfg_flags &= ~BNAD_CF_MSIX;
2706         bnad_q_num_init(bnad);
2707         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2708 }
2709
2710 static void
2711 bnad_disable_msix(struct bnad *bnad)
2712 {
2713         u32 cfg_flags;
2714         unsigned long flags;
2715
2716         spin_lock_irqsave(&bnad->bna_lock, flags);
2717         cfg_flags = bnad->cfg_flags;
2718         if (bnad->cfg_flags & BNAD_CF_MSIX)
2719                 bnad->cfg_flags &= ~BNAD_CF_MSIX;
2720         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2721
2722         if (cfg_flags & BNAD_CF_MSIX) {
2723                 pci_disable_msix(bnad->pcidev);
2724                 kfree(bnad->msix_table);
2725                 bnad->msix_table = NULL;
2726         }
2727 }
2728
2729 /* Netdev entry points */
2730 static int
2731 bnad_open(struct net_device *netdev)
2732 {
2733         int err;
2734         struct bnad *bnad = netdev_priv(netdev);
2735         struct bna_pause_config pause_config;
2736         unsigned long flags;
2737
2738         mutex_lock(&bnad->conf_mutex);
2739
2740         /* Tx */
2741         err = bnad_setup_tx(bnad, 0);
2742         if (err)
2743                 goto err_return;
2744
2745         /* Rx */
2746         err = bnad_setup_rx(bnad, 0);
2747         if (err)
2748                 goto cleanup_tx;
2749
2750         /* Port */
2751         pause_config.tx_pause = 0;
2752         pause_config.rx_pause = 0;
2753
2754         spin_lock_irqsave(&bnad->bna_lock, flags);
2755         bna_enet_mtu_set(&bnad->bna.enet,
2756                          BNAD_FRAME_SIZE(bnad->netdev->mtu), NULL);
2757         bna_enet_pause_config(&bnad->bna.enet, &pause_config, NULL);
2758         bna_enet_enable(&bnad->bna.enet);
2759         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2760
2761         /* Enable broadcast */
2762         bnad_enable_default_bcast(bnad);
2763
2764         /* Restore VLANs, if any */
2765         bnad_restore_vlans(bnad, 0);
2766
2767         /* Set the UCAST address */
2768         spin_lock_irqsave(&bnad->bna_lock, flags);
2769         bnad_mac_addr_set_locked(bnad, netdev->dev_addr);
2770         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2771
2772         /* Start the stats timer */
2773         bnad_stats_timer_start(bnad);
2774
2775         mutex_unlock(&bnad->conf_mutex);
2776
2777         return 0;
2778
2779 cleanup_tx:
2780         bnad_destroy_tx(bnad, 0);
2781
2782 err_return:
2783         mutex_unlock(&bnad->conf_mutex);
2784         return err;
2785 }
2786
2787 static int
2788 bnad_stop(struct net_device *netdev)
2789 {
2790         struct bnad *bnad = netdev_priv(netdev);
2791         unsigned long flags;
2792
2793         mutex_lock(&bnad->conf_mutex);
2794
2795         /* Stop the stats timer */
2796         bnad_stats_timer_stop(bnad);
2797
2798         init_completion(&bnad->bnad_completions.enet_comp);
2799
2800         spin_lock_irqsave(&bnad->bna_lock, flags);
2801         bna_enet_disable(&bnad->bna.enet, BNA_HARD_CLEANUP,
2802                         bnad_cb_enet_disabled);
2803         spin_unlock_irqrestore(&bnad->bna_lock, flags);
2804
2805         wait_for_completion(&bnad->bnad_completions.enet_comp);
2806
2807         bnad_destroy_tx(bnad, 0);
2808         bnad_destroy_rx(bnad, 0);
2809
2810         /* Synchronize mailbox IRQ */
2811         bnad_mbox_irq_sync(bnad);
2812
2813         mutex_unlock(&bnad->conf_mutex);
2814
2815         return 0;
2816 }
2817
2818 /* TX */
2819 /* Returns 0 for success */
2820 static int
2821 bnad_txq_wi_prepare(struct bnad *bnad, struct bna_tcb *tcb,
2822                     struct sk_buff *skb, struct bna_txq_entry *txqent)
2823 {
2824         u16 flags = 0;
2825         u32 gso_size;
2826         u16 vlan_tag = 0;
2827
2828         if (skb_vlan_tag_present(skb)) {
2829                 vlan_tag = (u16)skb_vlan_tag_get(skb);
2830                 flags |= (BNA_TXQ_WI_CF_INS_PRIO | BNA_TXQ_WI_CF_INS_VLAN);
2831         }
2832         if (test_bit(BNAD_RF_CEE_RUNNING, &bnad->run_flags)) {
2833                 vlan_tag = ((tcb->priority & 0x7) << VLAN_PRIO_SHIFT)
2834                                 | (vlan_tag & 0x1fff);
2835                 flags |= (BNA_TXQ_WI_CF_INS_PRIO | BNA_TXQ_WI_CF_INS_VLAN);
2836         }
2837         txqent->hdr.wi.vlan_tag = htons(vlan_tag);
2838
2839         if (skb_is_gso(skb)) {
2840                 gso_size = skb_shinfo(skb)->gso_size;
2841                 if (unlikely(gso_size > bnad->netdev->mtu)) {
2842                         BNAD_UPDATE_CTR(bnad, tx_skb_mss_too_long);
2843                         return -EINVAL;
2844                 }
2845                 if (unlikely((gso_size + skb_transport_offset(skb) +
2846                               tcp_hdrlen(skb)) >= skb->len)) {
2847                         txqent->hdr.wi.opcode = htons(BNA_TXQ_WI_SEND);
2848                         txqent->hdr.wi.lso_mss = 0;
2849                         BNAD_UPDATE_CTR(bnad, tx_skb_tso_too_short);
2850                 } else {
2851                         txqent->hdr.wi.opcode = htons(BNA_TXQ_WI_SEND_LSO);
2852                         txqent->hdr.wi.lso_mss = htons(gso_size);
2853                 }
2854
2855                 if (bnad_tso_prepare(bnad, skb)) {
2856                         BNAD_UPDATE_CTR(bnad, tx_skb_tso_prepare);
2857                         return -EINVAL;
2858                 }
2859
2860                 flags |= (BNA_TXQ_WI_CF_IP_CKSUM | BNA_TXQ_WI_CF_TCP_CKSUM);
2861                 txqent->hdr.wi.l4_hdr_size_n_offset =
2862                         htons(BNA_TXQ_WI_L4_HDR_N_OFFSET(
2863                         tcp_hdrlen(skb) >> 2, skb_transport_offset(skb)));
2864         } else  {
2865                 txqent->hdr.wi.opcode = htons(BNA_TXQ_WI_SEND);
2866                 txqent->hdr.wi.lso_mss = 0;
2867
2868                 if (unlikely(skb->len > (bnad->netdev->mtu + VLAN_ETH_HLEN))) {
2869                         BNAD_UPDATE_CTR(bnad, tx_skb_non_tso_too_long);
2870                         return -EINVAL;
2871                 }
2872
2873                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2874                         __be16 net_proto = vlan_get_protocol(skb);
2875                         u8 proto = 0;
2876
2877                         if (net_proto == htons(ETH_P_IP))
2878                                 proto = ip_hdr(skb)->protocol;
2879 #ifdef NETIF_F_IPV6_CSUM
2880                         else if (net_proto == htons(ETH_P_IPV6)) {
2881                                 /* nexthdr may not be TCP immediately. */
2882                                 proto = ipv6_hdr(skb)->nexthdr;
2883                         }
2884 #endif
2885                         if (proto == IPPROTO_TCP) {
2886                                 flags |= BNA_TXQ_WI_CF_TCP_CKSUM;
2887                                 txqent->hdr.wi.l4_hdr_size_n_offset =
2888                                         htons(BNA_TXQ_WI_L4_HDR_N_OFFSET
2889                                               (0, skb_transport_offset(skb)));
2890
2891                                 BNAD_UPDATE_CTR(bnad, tcpcsum_offload);
2892
2893                                 if (unlikely(skb_headlen(skb) <
2894                                             skb_transport_offset(skb) +
2895                                     tcp_hdrlen(skb))) {
2896                                         BNAD_UPDATE_CTR(bnad, tx_skb_tcp_hdr);
2897                                         return -EINVAL;
2898                                 }
2899                         } else if (proto == IPPROTO_UDP) {
2900                                 flags |= BNA_TXQ_WI_CF_UDP_CKSUM;
2901                                 txqent->hdr.wi.l4_hdr_size_n_offset =
2902                                         htons(BNA_TXQ_WI_L4_HDR_N_OFFSET
2903                                               (0, skb_transport_offset(skb)));
2904
2905                                 BNAD_UPDATE_CTR(bnad, udpcsum_offload);
2906                                 if (unlikely(skb_headlen(skb) <
2907                                             skb_transport_offset(skb) +
2908                                     sizeof(struct udphdr))) {
2909                                         BNAD_UPDATE_CTR(bnad, tx_skb_udp_hdr);
2910                                         return -EINVAL;
2911                                 }
2912                         } else {
2913
2914                                 BNAD_UPDATE_CTR(bnad, tx_skb_csum_err);
2915                                 return -EINVAL;
2916                         }
2917                 } else
2918                         txqent->hdr.wi.l4_hdr_size_n_offset = 0;
2919         }
2920
2921         txqent->hdr.wi.flags = htons(flags);
2922         txqent->hdr.wi.frame_length = htonl(skb->len);
2923
2924         return 0;
2925 }
2926
2927 /*
2928  * bnad_start_xmit : Netdev entry point for Transmit
2929  *                   Called under lock held by net_device
2930  */
2931 static netdev_tx_t
2932 bnad_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2933 {
2934         struct bnad *bnad = netdev_priv(netdev);
2935         u32 txq_id = 0;
2936         struct bna_tcb *tcb = NULL;
2937         struct bnad_tx_unmap *unmap_q, *unmap, *head_unmap;
2938         u32             prod, q_depth, vect_id;
2939         u32             wis, vectors, len;
2940         int             i;
2941         dma_addr_t              dma_addr;
2942         struct bna_txq_entry *txqent;
2943
2944         len = skb_headlen(skb);
2945
2946         /* Sanity checks for the skb */
2947
2948         if (unlikely(skb->len <= ETH_HLEN)) {
2949                 dev_kfree_skb_any(skb);
2950                 BNAD_UPDATE_CTR(bnad, tx_skb_too_short);
2951                 return NETDEV_TX_OK;
2952         }
2953         if (unlikely(len > BFI_TX_MAX_DATA_PER_VECTOR)) {
2954                 dev_kfree_skb_any(skb);
2955                 BNAD_UPDATE_CTR(bnad, tx_skb_headlen_zero);
2956                 return NETDEV_TX_OK;
2957         }
2958         if (unlikely(len == 0)) {
2959                 dev_kfree_skb_any(skb);
2960                 BNAD_UPDATE_CTR(bnad, tx_skb_headlen_zero);
2961                 return NETDEV_TX_OK;
2962         }
2963
2964         tcb = bnad->tx_info[0].tcb[txq_id];
2965
2966         /*
2967          * Takes care of the Tx that is scheduled between clearing the flag
2968          * and the netif_tx_stop_all_queues() call.
2969          */
2970         if (unlikely(!tcb || !test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))) {
2971                 dev_kfree_skb_any(skb);
2972                 BNAD_UPDATE_CTR(bnad, tx_skb_stopping);
2973                 return NETDEV_TX_OK;
2974         }
2975
2976         q_depth = tcb->q_depth;
2977         prod = tcb->producer_index;
2978         unmap_q = tcb->unmap_q;
2979
2980         vectors = 1 + skb_shinfo(skb)->nr_frags;
2981         wis = BNA_TXQ_WI_NEEDED(vectors);       /* 4 vectors per work item */
2982
2983         if (unlikely(vectors > BFI_TX_MAX_VECTORS_PER_PKT)) {
2984                 dev_kfree_skb_any(skb);
2985                 BNAD_UPDATE_CTR(bnad, tx_skb_max_vectors);
2986                 return NETDEV_TX_OK;
2987         }
2988
2989         /* Check for available TxQ resources */
2990         if (unlikely(wis > BNA_QE_FREE_CNT(tcb, q_depth))) {
2991                 if ((*tcb->hw_consumer_index != tcb->consumer_index) &&
2992                     !test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags)) {
2993                         u32 sent;
2994                         sent = bnad_txcmpl_process(bnad, tcb);
2995                         if (likely(test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)))
2996                                 bna_ib_ack(tcb->i_dbell, sent);
2997                         smp_mb__before_atomic();
2998                         clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
2999                 } else {
3000                         netif_stop_queue(netdev);
3001                         BNAD_UPDATE_CTR(bnad, netif_queue_stop);
3002                 }
3003
3004                 smp_mb();
3005                 /*
3006                  * Check again to deal with race condition between
3007                  * netif_stop_queue here, and netif_wake_queue in
3008                  * interrupt handler which is not inside netif tx lock.
3009                  */
3010                 if (likely(wis > BNA_QE_FREE_CNT(tcb, q_depth))) {
3011                         BNAD_UPDATE_CTR(bnad, netif_queue_stop);
3012                         return NETDEV_TX_BUSY;
3013                 } else {
3014                         netif_wake_queue(netdev);
3015                         BNAD_UPDATE_CTR(bnad, netif_queue_wakeup);
3016                 }
3017         }
3018
3019         txqent = &((struct bna_txq_entry *)tcb->sw_q)[prod];
3020         head_unmap = &unmap_q[prod];
3021
3022         /* Program the opcode, flags, frame_len, num_vectors in WI */
3023         if (bnad_txq_wi_prepare(bnad, tcb, skb, txqent)) {
3024                 dev_kfree_skb_any(skb);
3025                 return NETDEV_TX_OK;
3026         }
3027         txqent->hdr.wi.reserved = 0;
3028         txqent->hdr.wi.num_vectors = vectors;
3029
3030         head_unmap->skb = skb;
3031         head_unmap->nvecs = 0;
3032
3033         /* Program the vectors */
3034         unmap = head_unmap;
3035         dma_addr = dma_map_single(&bnad->pcidev->dev, skb->data,
3036                                   len, DMA_TO_DEVICE);
3037         BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[0].host_addr);
3038         txqent->vector[0].length = htons(len);
3039         dma_unmap_addr_set(&unmap->vectors[0], dma_addr, dma_addr);
3040         head_unmap->nvecs++;
3041
3042         for (i = 0, vect_id = 0; i < vectors - 1; i++) {
3043                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
3044                 u32             size = skb_frag_size(frag);
3045
3046                 if (unlikely(size == 0)) {
3047                         /* Undo the changes starting at tcb->producer_index */
3048                         bnad_tx_buff_unmap(bnad, unmap_q, q_depth,
3049                                 tcb->producer_index);
3050                         dev_kfree_skb_any(skb);
3051                         BNAD_UPDATE_CTR(bnad, tx_skb_frag_zero);
3052                         return NETDEV_TX_OK;
3053                 }
3054
3055                 len += size;
3056
3057                 vect_id++;
3058                 if (vect_id == BFI_TX_MAX_VECTORS_PER_WI) {
3059                         vect_id = 0;
3060                         BNA_QE_INDX_INC(prod, q_depth);
3061                         txqent = &((struct bna_txq_entry *)tcb->sw_q)[prod];
3062                         txqent->hdr.wi_ext.opcode = htons(BNA_TXQ_WI_EXTENSION);
3063                         unmap = &unmap_q[prod];
3064                 }
3065
3066                 dma_addr = skb_frag_dma_map(&bnad->pcidev->dev, frag,
3067                                             0, size, DMA_TO_DEVICE);
3068                 dma_unmap_len_set(&unmap->vectors[vect_id], dma_len, size);
3069                 BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[vect_id].host_addr);
3070                 txqent->vector[vect_id].length = htons(size);
3071                 dma_unmap_addr_set(&unmap->vectors[vect_id], dma_addr,
3072                                    dma_addr);
3073                 head_unmap->nvecs++;
3074         }
3075
3076         if (unlikely(len != skb->len)) {
3077                 /* Undo the changes starting at tcb->producer_index */
3078                 bnad_tx_buff_unmap(bnad, unmap_q, q_depth, tcb->producer_index);
3079                 dev_kfree_skb_any(skb);
3080                 BNAD_UPDATE_CTR(bnad, tx_skb_len_mismatch);
3081                 return NETDEV_TX_OK;
3082         }
3083
3084         BNA_QE_INDX_INC(prod, q_depth);
3085         tcb->producer_index = prod;
3086
3087         smp_mb();
3088
3089         if (unlikely(!test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)))
3090                 return NETDEV_TX_OK;
3091
3092         skb_tx_timestamp(skb);
3093
3094         bna_txq_prod_indx_doorbell(tcb);
3095         smp_mb();
3096
3097         return NETDEV_TX_OK;
3098 }
3099
3100 /*
3101  * Used spin_lock to synchronize reading of stats structures, which
3102  * is written by BNA under the same lock.
3103  */
3104 static struct rtnl_link_stats64 *
3105 bnad_get_stats64(struct net_device *netdev, struct rtnl_link_stats64 *stats)
3106 {
3107         struct bnad *bnad = netdev_priv(netdev);
3108         unsigned long flags;
3109
3110         spin_lock_irqsave(&bnad->bna_lock, flags);
3111
3112         bnad_netdev_qstats_fill(bnad, stats);
3113         bnad_netdev_hwstats_fill(bnad, stats);
3114
3115         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3116
3117         return stats;
3118 }
3119
3120 static void
3121 bnad_set_rx_ucast_fltr(struct bnad *bnad)
3122 {
3123         struct net_device *netdev = bnad->netdev;
3124         int uc_count = netdev_uc_count(netdev);
3125         enum bna_cb_status ret;
3126         u8 *mac_list;
3127         struct netdev_hw_addr *ha;
3128         int entry;
3129
3130         if (netdev_uc_empty(bnad->netdev)) {
3131                 bna_rx_ucast_listset(bnad->rx_info[0].rx, 0, NULL, NULL);
3132                 return;
3133         }
3134
3135         if (uc_count > bna_attr(&bnad->bna)->num_ucmac)
3136                 goto mode_default;
3137
3138         mac_list = kzalloc(uc_count * ETH_ALEN, GFP_ATOMIC);
3139         if (mac_list == NULL)
3140                 goto mode_default;
3141
3142         entry = 0;
3143         netdev_for_each_uc_addr(ha, netdev) {
3144                 ether_addr_copy(&mac_list[entry * ETH_ALEN], &ha->addr[0]);
3145                 entry++;
3146         }
3147
3148         ret = bna_rx_ucast_listset(bnad->rx_info[0].rx, entry,
3149                         mac_list, NULL);
3150         kfree(mac_list);
3151
3152         if (ret != BNA_CB_SUCCESS)
3153                 goto mode_default;
3154
3155         return;
3156
3157         /* ucast packets not in UCAM are routed to default function */
3158 mode_default:
3159         bnad->cfg_flags |= BNAD_CF_DEFAULT;
3160         bna_rx_ucast_listset(bnad->rx_info[0].rx, 0, NULL, NULL);
3161 }
3162
3163 static void
3164 bnad_set_rx_mcast_fltr(struct bnad *bnad)
3165 {
3166         struct net_device *netdev = bnad->netdev;
3167         int mc_count = netdev_mc_count(netdev);
3168         enum bna_cb_status ret;
3169         u8 *mac_list;
3170
3171         if (netdev->flags & IFF_ALLMULTI)
3172                 goto mode_allmulti;
3173
3174         if (netdev_mc_empty(netdev))
3175                 return;
3176
3177         if (mc_count > bna_attr(&bnad->bna)->num_mcmac)
3178                 goto mode_allmulti;
3179
3180         mac_list = kzalloc((mc_count + 1) * ETH_ALEN, GFP_ATOMIC);
3181
3182         if (mac_list == NULL)
3183                 goto mode_allmulti;
3184
3185         ether_addr_copy(&mac_list[0], &bnad_bcast_addr[0]);
3186
3187         /* copy rest of the MCAST addresses */
3188         bnad_netdev_mc_list_get(netdev, mac_list);
3189         ret = bna_rx_mcast_listset(bnad->rx_info[0].rx, mc_count + 1,
3190                         mac_list, NULL);
3191         kfree(mac_list);
3192
3193         if (ret != BNA_CB_SUCCESS)
3194                 goto mode_allmulti;
3195
3196         return;
3197
3198 mode_allmulti:
3199         bnad->cfg_flags |= BNAD_CF_ALLMULTI;
3200         bna_rx_mcast_delall(bnad->rx_info[0].rx, NULL);
3201 }
3202
3203 void
3204 bnad_set_rx_mode(struct net_device *netdev)
3205 {
3206         struct bnad *bnad = netdev_priv(netdev);
3207         enum bna_rxmode new_mode, mode_mask;
3208         unsigned long flags;
3209
3210         spin_lock_irqsave(&bnad->bna_lock, flags);
3211
3212         if (bnad->rx_info[0].rx == NULL) {
3213                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
3214                 return;
3215         }
3216
3217         /* clear bnad flags to update it with new settings */
3218         bnad->cfg_flags &= ~(BNAD_CF_PROMISC | BNAD_CF_DEFAULT |
3219                         BNAD_CF_ALLMULTI);
3220
3221         new_mode = 0;
3222         if (netdev->flags & IFF_PROMISC) {
3223                 new_mode |= BNAD_RXMODE_PROMISC_DEFAULT;
3224                 bnad->cfg_flags |= BNAD_CF_PROMISC;
3225         } else {
3226                 bnad_set_rx_mcast_fltr(bnad);
3227
3228                 if (bnad->cfg_flags & BNAD_CF_ALLMULTI)
3229                         new_mode |= BNA_RXMODE_ALLMULTI;
3230
3231                 bnad_set_rx_ucast_fltr(bnad);
3232
3233                 if (bnad->cfg_flags & BNAD_CF_DEFAULT)
3234                         new_mode |= BNA_RXMODE_DEFAULT;
3235         }
3236
3237         mode_mask = BNA_RXMODE_PROMISC | BNA_RXMODE_DEFAULT |
3238                         BNA_RXMODE_ALLMULTI;
3239         bna_rx_mode_set(bnad->rx_info[0].rx, new_mode, mode_mask, NULL);
3240
3241         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3242 }
3243
3244 /*
3245  * bna_lock is used to sync writes to netdev->addr
3246  * conf_lock cannot be used since this call may be made
3247  * in a non-blocking context.
3248  */
3249 static int
3250 bnad_set_mac_address(struct net_device *netdev, void *addr)
3251 {
3252         int err;
3253         struct bnad *bnad = netdev_priv(netdev);
3254         struct sockaddr *sa = (struct sockaddr *)addr;
3255         unsigned long flags;
3256
3257         spin_lock_irqsave(&bnad->bna_lock, flags);
3258
3259         err = bnad_mac_addr_set_locked(bnad, sa->sa_data);
3260         if (!err)
3261                 ether_addr_copy(netdev->dev_addr, sa->sa_data);
3262
3263         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3264
3265         return err;
3266 }
3267
3268 static int
3269 bnad_mtu_set(struct bnad *bnad, int frame_size)
3270 {
3271         unsigned long flags;
3272
3273         init_completion(&bnad->bnad_completions.mtu_comp);
3274
3275         spin_lock_irqsave(&bnad->bna_lock, flags);
3276         bna_enet_mtu_set(&bnad->bna.enet, frame_size, bnad_cb_enet_mtu_set);
3277         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3278
3279         wait_for_completion(&bnad->bnad_completions.mtu_comp);
3280
3281         return bnad->bnad_completions.mtu_comp_status;
3282 }
3283
3284 static int
3285 bnad_change_mtu(struct net_device *netdev, int new_mtu)
3286 {
3287         int err, mtu;
3288         struct bnad *bnad = netdev_priv(netdev);
3289         u32 rx_count = 0, frame, new_frame;
3290
3291         if (new_mtu + ETH_HLEN < ETH_ZLEN || new_mtu > BNAD_JUMBO_MTU)
3292                 return -EINVAL;
3293
3294         mutex_lock(&bnad->conf_mutex);
3295
3296         mtu = netdev->mtu;
3297         netdev->mtu = new_mtu;
3298
3299         frame = BNAD_FRAME_SIZE(mtu);
3300         new_frame = BNAD_FRAME_SIZE(new_mtu);
3301
3302         /* check if multi-buffer needs to be enabled */
3303         if (BNAD_PCI_DEV_IS_CAT2(bnad) &&
3304             netif_running(bnad->netdev)) {
3305                 /* only when transition is over 4K */
3306                 if ((frame <= 4096 && new_frame > 4096) ||
3307                     (frame > 4096 && new_frame <= 4096))
3308                         rx_count = bnad_reinit_rx(bnad);
3309         }
3310
3311         /* rx_count > 0 - new rx created
3312          *      - Linux set err = 0 and return
3313          */
3314         err = bnad_mtu_set(bnad, new_frame);
3315         if (err)
3316                 err = -EBUSY;
3317
3318         mutex_unlock(&bnad->conf_mutex);
3319         return err;
3320 }
3321
3322 static int
3323 bnad_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
3324 {
3325         struct bnad *bnad = netdev_priv(netdev);
3326         unsigned long flags;
3327
3328         if (!bnad->rx_info[0].rx)
3329                 return 0;
3330
3331         mutex_lock(&bnad->conf_mutex);
3332
3333         spin_lock_irqsave(&bnad->bna_lock, flags);
3334         bna_rx_vlan_add(bnad->rx_info[0].rx, vid);
3335         set_bit(vid, bnad->active_vlans);
3336         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3337
3338         mutex_unlock(&bnad->conf_mutex);
3339
3340         return 0;
3341 }
3342
3343 static int
3344 bnad_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
3345 {
3346         struct bnad *bnad = netdev_priv(netdev);
3347         unsigned long flags;
3348
3349         if (!bnad->rx_info[0].rx)
3350                 return 0;
3351
3352         mutex_lock(&bnad->conf_mutex);
3353
3354         spin_lock_irqsave(&bnad->bna_lock, flags);
3355         clear_bit(vid, bnad->active_vlans);
3356         bna_rx_vlan_del(bnad->rx_info[0].rx, vid);
3357         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3358
3359         mutex_unlock(&bnad->conf_mutex);
3360
3361         return 0;
3362 }
3363
3364 static int bnad_set_features(struct net_device *dev, netdev_features_t features)
3365 {
3366         struct bnad *bnad = netdev_priv(dev);
3367         netdev_features_t changed = features ^ dev->features;
3368
3369         if ((changed & NETIF_F_HW_VLAN_CTAG_RX) && netif_running(dev)) {
3370                 unsigned long flags;
3371
3372                 spin_lock_irqsave(&bnad->bna_lock, flags);
3373
3374                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
3375                         bna_rx_vlan_strip_enable(bnad->rx_info[0].rx);
3376                 else
3377                         bna_rx_vlan_strip_disable(bnad->rx_info[0].rx);
3378
3379                 spin_unlock_irqrestore(&bnad->bna_lock, flags);
3380         }
3381
3382         return 0;
3383 }
3384
3385 #ifdef CONFIG_NET_POLL_CONTROLLER
3386 static void
3387 bnad_netpoll(struct net_device *netdev)
3388 {
3389         struct bnad *bnad = netdev_priv(netdev);
3390         struct bnad_rx_info *rx_info;
3391         struct bnad_rx_ctrl *rx_ctrl;
3392         u32 curr_mask;
3393         int i, j;
3394
3395         if (!(bnad->cfg_flags & BNAD_CF_MSIX)) {
3396                 bna_intx_disable(&bnad->bna, curr_mask);
3397                 bnad_isr(bnad->pcidev->irq, netdev);
3398                 bna_intx_enable(&bnad->bna, curr_mask);
3399         } else {
3400                 /*
3401                  * Tx processing may happen in sending context, so no need
3402                  * to explicitly process completions here
3403                  */
3404
3405                 /* Rx processing */
3406                 for (i = 0; i < bnad->num_rx; i++) {
3407                         rx_info = &bnad->rx_info[i];
3408                         if (!rx_info->rx)
3409                                 continue;
3410                         for (j = 0; j < bnad->num_rxp_per_rx; j++) {
3411                                 rx_ctrl = &rx_info->rx_ctrl[j];
3412                                 if (rx_ctrl->ccb)
3413                                         bnad_netif_rx_schedule_poll(bnad,
3414                                                             rx_ctrl->ccb);
3415                         }
3416                 }
3417         }
3418 }
3419 #endif
3420
3421 static const struct net_device_ops bnad_netdev_ops = {
3422         .ndo_open               = bnad_open,
3423         .ndo_stop               = bnad_stop,
3424         .ndo_start_xmit         = bnad_start_xmit,
3425         .ndo_get_stats64                = bnad_get_stats64,
3426         .ndo_set_rx_mode        = bnad_set_rx_mode,
3427         .ndo_validate_addr      = eth_validate_addr,
3428         .ndo_set_mac_address    = bnad_set_mac_address,
3429         .ndo_change_mtu         = bnad_change_mtu,
3430         .ndo_vlan_rx_add_vid    = bnad_vlan_rx_add_vid,
3431         .ndo_vlan_rx_kill_vid   = bnad_vlan_rx_kill_vid,
3432         .ndo_set_features       = bnad_set_features,
3433 #ifdef CONFIG_NET_POLL_CONTROLLER
3434         .ndo_poll_controller    = bnad_netpoll
3435 #endif
3436 };
3437
3438 static void
3439 bnad_netdev_init(struct bnad *bnad, bool using_dac)
3440 {
3441         struct net_device *netdev = bnad->netdev;
3442
3443         netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
3444                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3445                 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_TX |
3446                 NETIF_F_HW_VLAN_CTAG_RX;
3447
3448         netdev->vlan_features = NETIF_F_SG | NETIF_F_HIGHDMA |
3449                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3450                 NETIF_F_TSO | NETIF_F_TSO6;
3451
3452         netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
3453
3454         if (using_dac)
3455                 netdev->features |= NETIF_F_HIGHDMA;
3456
3457         netdev->mem_start = bnad->mmio_start;
3458         netdev->mem_end = bnad->mmio_start + bnad->mmio_len - 1;
3459
3460         netdev->netdev_ops = &bnad_netdev_ops;
3461         bnad_set_ethtool_ops(netdev);
3462 }
3463
3464 /*
3465  * 1. Initialize the bnad structure
3466  * 2. Setup netdev pointer in pci_dev
3467  * 3. Initialize no. of TxQ & CQs & MSIX vectors
3468  * 4. Initialize work queue.
3469  */
3470 static int
3471 bnad_init(struct bnad *bnad,
3472           struct pci_dev *pdev, struct net_device *netdev)
3473 {
3474         unsigned long flags;
3475
3476         SET_NETDEV_DEV(netdev, &pdev->dev);
3477         pci_set_drvdata(pdev, netdev);
3478
3479         bnad->netdev = netdev;
3480         bnad->pcidev = pdev;
3481         bnad->mmio_start = pci_resource_start(pdev, 0);
3482         bnad->mmio_len = pci_resource_len(pdev, 0);
3483         bnad->bar0 = ioremap_nocache(bnad->mmio_start, bnad->mmio_len);
3484         if (!bnad->bar0) {
3485                 dev_err(&pdev->dev, "ioremap for bar0 failed\n");
3486                 return -ENOMEM;
3487         }
3488         pr_info("bar0 mapped to %p, len %llu\n", bnad->bar0,
3489                (unsigned long long) bnad->mmio_len);
3490
3491         spin_lock_irqsave(&bnad->bna_lock, flags);
3492         if (!bnad_msix_disable)
3493                 bnad->cfg_flags = BNAD_CF_MSIX;
3494
3495         bnad->cfg_flags |= BNAD_CF_DIM_ENABLED;
3496
3497         bnad_q_num_init(bnad);
3498         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3499
3500         bnad->msix_num = (bnad->num_tx * bnad->num_txq_per_tx) +
3501                 (bnad->num_rx * bnad->num_rxp_per_rx) +
3502                          BNAD_MAILBOX_MSIX_VECTORS;
3503
3504         bnad->txq_depth = BNAD_TXQ_DEPTH;
3505         bnad->rxq_depth = BNAD_RXQ_DEPTH;
3506
3507         bnad->tx_coalescing_timeo = BFI_TX_COALESCING_TIMEO;
3508         bnad->rx_coalescing_timeo = BFI_RX_COALESCING_TIMEO;
3509
3510         sprintf(bnad->wq_name, "%s_wq_%d", BNAD_NAME, bnad->id);
3511         bnad->work_q = create_singlethread_workqueue(bnad->wq_name);
3512         if (!bnad->work_q) {
3513                 iounmap(bnad->bar0);
3514                 return -ENOMEM;
3515         }
3516
3517         return 0;
3518 }
3519
3520 /*
3521  * Must be called after bnad_pci_uninit()
3522  * so that iounmap() and pci_set_drvdata(NULL)
3523  * happens only after PCI uninitialization.
3524  */
3525 static void
3526 bnad_uninit(struct bnad *bnad)
3527 {
3528         if (bnad->work_q) {
3529                 flush_workqueue(bnad->work_q);
3530                 destroy_workqueue(bnad->work_q);
3531                 bnad->work_q = NULL;
3532         }
3533
3534         if (bnad->bar0)
3535                 iounmap(bnad->bar0);
3536 }
3537
3538 /*
3539  * Initialize locks
3540         a) Per ioceth mutes used for serializing configuration
3541            changes from OS interface
3542         b) spin lock used to protect bna state machine
3543  */
3544 static void
3545 bnad_lock_init(struct bnad *bnad)
3546 {
3547         spin_lock_init(&bnad->bna_lock);
3548         mutex_init(&bnad->conf_mutex);
3549         mutex_init(&bnad_list_mutex);
3550 }
3551
3552 static void
3553 bnad_lock_uninit(struct bnad *bnad)
3554 {
3555         mutex_destroy(&bnad->conf_mutex);
3556         mutex_destroy(&bnad_list_mutex);
3557 }
3558
3559 /* PCI Initialization */
3560 static int
3561 bnad_pci_init(struct bnad *bnad,
3562               struct pci_dev *pdev, bool *using_dac)
3563 {
3564         int err;
3565
3566         err = pci_enable_device(pdev);
3567         if (err)
3568                 return err;
3569         err = pci_request_regions(pdev, BNAD_NAME);
3570         if (err)
3571                 goto disable_device;
3572         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
3573                 *using_dac = true;
3574         } else {
3575                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3576                 if (err)
3577                         goto release_regions;
3578                 *using_dac = false;
3579         }
3580         pci_set_master(pdev);
3581         return 0;
3582
3583 release_regions:
3584         pci_release_regions(pdev);
3585 disable_device:
3586         pci_disable_device(pdev);
3587
3588         return err;
3589 }
3590
3591 static void
3592 bnad_pci_uninit(struct pci_dev *pdev)
3593 {
3594         pci_release_regions(pdev);
3595         pci_disable_device(pdev);
3596 }
3597
3598 static int
3599 bnad_pci_probe(struct pci_dev *pdev,
3600                 const struct pci_device_id *pcidev_id)
3601 {
3602         bool    using_dac;
3603         int     err;
3604         struct bnad *bnad;
3605         struct bna *bna;
3606         struct net_device *netdev;
3607         struct bfa_pcidev pcidev_info;
3608         unsigned long flags;
3609
3610         pr_info("bnad_pci_probe : (0x%p, 0x%p) PCI Func : (%d)\n",
3611                pdev, pcidev_id, PCI_FUNC(pdev->devfn));
3612
3613         mutex_lock(&bnad_fwimg_mutex);
3614         if (!cna_get_firmware_buf(pdev)) {
3615                 mutex_unlock(&bnad_fwimg_mutex);
3616                 pr_warn("Failed to load Firmware Image!\n");
3617                 return -ENODEV;
3618         }
3619         mutex_unlock(&bnad_fwimg_mutex);
3620
3621         /*
3622          * Allocates sizeof(struct net_device + struct bnad)
3623          * bnad = netdev->priv
3624          */
3625         netdev = alloc_etherdev(sizeof(struct bnad));
3626         if (!netdev) {
3627                 err = -ENOMEM;
3628                 return err;
3629         }
3630         bnad = netdev_priv(netdev);
3631         bnad_lock_init(bnad);
3632         bnad_add_to_list(bnad);
3633
3634         mutex_lock(&bnad->conf_mutex);
3635         /*
3636          * PCI initialization
3637          *      Output : using_dac = 1 for 64 bit DMA
3638          *                         = 0 for 32 bit DMA
3639          */
3640         using_dac = false;
3641         err = bnad_pci_init(bnad, pdev, &using_dac);
3642         if (err)
3643                 goto unlock_mutex;
3644
3645         /*
3646          * Initialize bnad structure
3647          * Setup relation between pci_dev & netdev
3648          */
3649         err = bnad_init(bnad, pdev, netdev);
3650         if (err)
3651                 goto pci_uninit;
3652
3653         /* Initialize netdev structure, set up ethtool ops */
3654         bnad_netdev_init(bnad, using_dac);
3655
3656         /* Set link to down state */
3657         netif_carrier_off(netdev);
3658
3659         /* Setup the debugfs node for this bfad */
3660         if (bna_debugfs_enable)
3661                 bnad_debugfs_init(bnad);
3662
3663         /* Get resource requirement form bna */
3664         spin_lock_irqsave(&bnad->bna_lock, flags);
3665         bna_res_req(&bnad->res_info[0]);
3666         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3667
3668         /* Allocate resources from bna */
3669         err = bnad_res_alloc(bnad, &bnad->res_info[0], BNA_RES_T_MAX);
3670         if (err)
3671                 goto drv_uninit;
3672
3673         bna = &bnad->bna;
3674
3675         /* Setup pcidev_info for bna_init() */
3676         pcidev_info.pci_slot = PCI_SLOT(bnad->pcidev->devfn);
3677         pcidev_info.pci_func = PCI_FUNC(bnad->pcidev->devfn);
3678         pcidev_info.device_id = bnad->pcidev->device;
3679         pcidev_info.pci_bar_kva = bnad->bar0;
3680
3681         spin_lock_irqsave(&bnad->bna_lock, flags);
3682         bna_init(bna, bnad, &pcidev_info, &bnad->res_info[0]);
3683         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3684
3685         bnad->stats.bna_stats = &bna->stats;
3686
3687         bnad_enable_msix(bnad);
3688         err = bnad_mbox_irq_alloc(bnad);
3689         if (err)
3690                 goto res_free;
3691
3692         /* Set up timers */
3693         setup_timer(&bnad->bna.ioceth.ioc.ioc_timer, bnad_ioc_timeout,
3694                                 ((unsigned long)bnad));
3695         setup_timer(&bnad->bna.ioceth.ioc.hb_timer, bnad_ioc_hb_check,
3696                                 ((unsigned long)bnad));
3697         setup_timer(&bnad->bna.ioceth.ioc.iocpf_timer, bnad_iocpf_timeout,
3698                                 ((unsigned long)bnad));
3699         setup_timer(&bnad->bna.ioceth.ioc.sem_timer, bnad_iocpf_sem_timeout,
3700                                 ((unsigned long)bnad));
3701
3702         /*
3703          * Start the chip
3704          * If the call back comes with error, we bail out.
3705          * This is a catastrophic error.
3706          */
3707         err = bnad_ioceth_enable(bnad);
3708         if (err) {
3709                 pr_err("BNA: Initialization failed err=%d\n",
3710                        err);
3711                 goto probe_success;
3712         }
3713
3714         spin_lock_irqsave(&bnad->bna_lock, flags);
3715         if (bna_num_txq_set(bna, BNAD_NUM_TXQ + 1) ||
3716                 bna_num_rxp_set(bna, BNAD_NUM_RXP + 1)) {
3717                 bnad_q_num_adjust(bnad, bna_attr(bna)->num_txq - 1,
3718                         bna_attr(bna)->num_rxp - 1);
3719                 if (bna_num_txq_set(bna, BNAD_NUM_TXQ + 1) ||
3720                         bna_num_rxp_set(bna, BNAD_NUM_RXP + 1))
3721                         err = -EIO;
3722         }
3723         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3724         if (err)
3725                 goto disable_ioceth;
3726
3727         spin_lock_irqsave(&bnad->bna_lock, flags);
3728         bna_mod_res_req(&bnad->bna, &bnad->mod_res_info[0]);
3729         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3730
3731         err = bnad_res_alloc(bnad, &bnad->mod_res_info[0], BNA_MOD_RES_T_MAX);
3732         if (err) {
3733                 err = -EIO;
3734                 goto disable_ioceth;
3735         }
3736
3737         spin_lock_irqsave(&bnad->bna_lock, flags);
3738         bna_mod_init(&bnad->bna, &bnad->mod_res_info[0]);
3739         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3740
3741         /* Get the burnt-in mac */
3742         spin_lock_irqsave(&bnad->bna_lock, flags);
3743         bna_enet_perm_mac_get(&bna->enet, &bnad->perm_addr);
3744         bnad_set_netdev_perm_addr(bnad);
3745         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3746
3747         mutex_unlock(&bnad->conf_mutex);
3748
3749         /* Finally, reguister with net_device layer */
3750         err = register_netdev(netdev);
3751         if (err) {
3752                 pr_err("BNA : Registering with netdev failed\n");
3753                 goto probe_uninit;
3754         }
3755         set_bit(BNAD_RF_NETDEV_REGISTERED, &bnad->run_flags);
3756
3757         return 0;
3758
3759 probe_success:
3760         mutex_unlock(&bnad->conf_mutex);
3761         return 0;
3762
3763 probe_uninit:
3764         mutex_lock(&bnad->conf_mutex);
3765         bnad_res_free(bnad, &bnad->mod_res_info[0], BNA_MOD_RES_T_MAX);
3766 disable_ioceth:
3767         bnad_ioceth_disable(bnad);
3768         del_timer_sync(&bnad->bna.ioceth.ioc.ioc_timer);
3769         del_timer_sync(&bnad->bna.ioceth.ioc.sem_timer);
3770         del_timer_sync(&bnad->bna.ioceth.ioc.hb_timer);
3771         spin_lock_irqsave(&bnad->bna_lock, flags);
3772         bna_uninit(bna);
3773         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3774         bnad_mbox_irq_free(bnad);
3775         bnad_disable_msix(bnad);
3776 res_free:
3777         bnad_res_free(bnad, &bnad->res_info[0], BNA_RES_T_MAX);
3778 drv_uninit:
3779         /* Remove the debugfs node for this bnad */
3780         kfree(bnad->regdata);
3781         bnad_debugfs_uninit(bnad);
3782         bnad_uninit(bnad);
3783 pci_uninit:
3784         bnad_pci_uninit(pdev);
3785 unlock_mutex:
3786         mutex_unlock(&bnad->conf_mutex);
3787         bnad_remove_from_list(bnad);
3788         bnad_lock_uninit(bnad);
3789         free_netdev(netdev);
3790         return err;
3791 }
3792
3793 static void
3794 bnad_pci_remove(struct pci_dev *pdev)
3795 {
3796         struct net_device *netdev = pci_get_drvdata(pdev);
3797         struct bnad *bnad;
3798         struct bna *bna;
3799         unsigned long flags;
3800
3801         if (!netdev)
3802                 return;
3803
3804         pr_info("%s bnad_pci_remove\n", netdev->name);
3805         bnad = netdev_priv(netdev);
3806         bna = &bnad->bna;
3807
3808         if (test_and_clear_bit(BNAD_RF_NETDEV_REGISTERED, &bnad->run_flags))
3809                 unregister_netdev(netdev);
3810
3811         mutex_lock(&bnad->conf_mutex);
3812         bnad_ioceth_disable(bnad);
3813         del_timer_sync(&bnad->bna.ioceth.ioc.ioc_timer);
3814         del_timer_sync(&bnad->bna.ioceth.ioc.sem_timer);
3815         del_timer_sync(&bnad->bna.ioceth.ioc.hb_timer);
3816         spin_lock_irqsave(&bnad->bna_lock, flags);
3817         bna_uninit(bna);
3818         spin_unlock_irqrestore(&bnad->bna_lock, flags);
3819
3820         bnad_res_free(bnad, &bnad->mod_res_info[0], BNA_MOD_RES_T_MAX);
3821         bnad_res_free(bnad, &bnad->res_info[0], BNA_RES_T_MAX);
3822         bnad_mbox_irq_free(bnad);
3823         bnad_disable_msix(bnad);
3824         bnad_pci_uninit(pdev);
3825         mutex_unlock(&bnad->conf_mutex);
3826         bnad_remove_from_list(bnad);
3827         bnad_lock_uninit(bnad);
3828         /* Remove the debugfs node for this bnad */
3829         kfree(bnad->regdata);
3830         bnad_debugfs_uninit(bnad);
3831         bnad_uninit(bnad);
3832         free_netdev(netdev);
3833 }
3834
3835 static const struct pci_device_id bnad_pci_id_table[] = {
3836         {
3837                 PCI_DEVICE(PCI_VENDOR_ID_BROCADE,
3838                         PCI_DEVICE_ID_BROCADE_CT),
3839                 .class = PCI_CLASS_NETWORK_ETHERNET << 8,
3840                 .class_mask =  0xffff00
3841         },
3842         {
3843                 PCI_DEVICE(PCI_VENDOR_ID_BROCADE,
3844                         BFA_PCI_DEVICE_ID_CT2),
3845                 .class = PCI_CLASS_NETWORK_ETHERNET << 8,
3846                 .class_mask =  0xffff00
3847         },
3848         {0,  },
3849 };
3850
3851 MODULE_DEVICE_TABLE(pci, bnad_pci_id_table);
3852
3853 static struct pci_driver bnad_pci_driver = {
3854         .name = BNAD_NAME,
3855         .id_table = bnad_pci_id_table,
3856         .probe = bnad_pci_probe,
3857         .remove = bnad_pci_remove,
3858 };
3859
3860 static int __init
3861 bnad_module_init(void)
3862 {
3863         int err;
3864
3865         pr_info("QLogic BR-series 10G Ethernet driver - version: %s\n",
3866                         BNAD_VERSION);
3867
3868         bfa_nw_ioc_auto_recover(bnad_ioc_auto_recover);
3869
3870         err = pci_register_driver(&bnad_pci_driver);
3871         if (err < 0) {
3872                 pr_err("bna : PCI registration failed in module init "
3873                        "(%d)\n", err);
3874                 return err;
3875         }
3876
3877         return 0;
3878 }
3879
3880 static void __exit
3881 bnad_module_exit(void)
3882 {
3883         pci_unregister_driver(&bnad_pci_driver);
3884         release_firmware(bfi_fw);
3885 }
3886
3887 module_init(bnad_module_init);
3888 module_exit(bnad_module_exit);
3889
3890 MODULE_AUTHOR("Brocade");
3891 MODULE_LICENSE("GPL");
3892 MODULE_DESCRIPTION("QLogic BR-series 10G PCIe Ethernet driver");
3893 MODULE_VERSION(BNAD_VERSION);
3894 MODULE_FIRMWARE(CNA_FW_FILE_CT);
3895 MODULE_FIRMWARE(CNA_FW_FILE_CT2);