2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/string.h>
23 #include <linux/errno.h>
24 #include <linux/types.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/workqueue.h>
28 #include <linux/pci.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
32 #include <linux/if_ether.h>
33 #include <linux/if_vlan.h>
36 #include <linux/ipv6.h>
37 #include <linux/tcp.h>
38 #include <linux/rtnetlink.h>
39 #include <linux/prefetch.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ktime.h>
42 #ifdef CONFIG_RFS_ACCEL
43 #include <linux/cpu_rmap.h>
45 #ifdef CONFIG_NET_RX_BUSY_POLL
46 #include <net/busy_poll.h>
49 #include "cq_enet_desc.h"
51 #include "vnic_intr.h"
52 #include "vnic_stats.h"
58 #include "enic_clsf.h"
60 #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
61 #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
62 #define MAX_TSO (1 << 16)
63 #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
65 #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
66 #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
67 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */
69 /* Supported devices */
70 static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
71 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
72 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
73 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
74 { 0, } /* end of table */
77 MODULE_DESCRIPTION(DRV_DESCRIPTION);
78 MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
79 MODULE_LICENSE("GPL");
80 MODULE_VERSION(DRV_VERSION);
81 MODULE_DEVICE_TABLE(pci, enic_id_table);
83 #define ENIC_LARGE_PKT_THRESHOLD 1000
84 #define ENIC_MAX_COALESCE_TIMERS 10
85 /* Interrupt moderation table, which will be used to decide the
86 * coalescing timer values
87 * {rx_rate in Mbps, mapping percentage of the range}
89 struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = {
103 /* This table helps the driver to pick different ranges for rx coalescing
104 * timer depending on the link speed.
106 struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = {
107 {0, 0}, /* 0 - 4 Gbps */
108 {0, 3}, /* 4 - 10 Gbps */
109 {3, 6}, /* 10 - 40 Gbps */
112 int enic_is_dynamic(struct enic *enic)
114 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
117 int enic_sriov_enabled(struct enic *enic)
119 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
122 static int enic_is_sriov_vf(struct enic *enic)
124 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
127 int enic_is_valid_vf(struct enic *enic, int vf)
129 #ifdef CONFIG_PCI_IOV
130 return vf >= 0 && vf < enic->num_vfs;
136 static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
138 struct enic *enic = vnic_dev_priv(wq->vdev);
141 pci_unmap_single(enic->pdev, buf->dma_addr,
142 buf->len, PCI_DMA_TODEVICE);
144 pci_unmap_page(enic->pdev, buf->dma_addr,
145 buf->len, PCI_DMA_TODEVICE);
148 dev_kfree_skb_any(buf->os_buf);
151 static void enic_wq_free_buf(struct vnic_wq *wq,
152 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
154 enic_free_wq_buf(wq, buf);
157 static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
158 u8 type, u16 q_number, u16 completed_index, void *opaque)
160 struct enic *enic = vnic_dev_priv(vdev);
162 spin_lock(&enic->wq_lock[q_number]);
164 vnic_wq_service(&enic->wq[q_number], cq_desc,
165 completed_index, enic_wq_free_buf,
168 if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) &&
169 vnic_wq_desc_avail(&enic->wq[q_number]) >=
170 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
171 netif_wake_subqueue(enic->netdev, q_number);
173 spin_unlock(&enic->wq_lock[q_number]);
178 static void enic_log_q_error(struct enic *enic)
183 for (i = 0; i < enic->wq_count; i++) {
184 error_status = vnic_wq_error_status(&enic->wq[i]);
186 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
190 for (i = 0; i < enic->rq_count; i++) {
191 error_status = vnic_rq_error_status(&enic->rq[i]);
193 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
198 static void enic_msglvl_check(struct enic *enic)
200 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
202 if (msg_enable != enic->msg_enable) {
203 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
204 enic->msg_enable, msg_enable);
205 enic->msg_enable = msg_enable;
209 static void enic_mtu_check(struct enic *enic)
211 u32 mtu = vnic_dev_mtu(enic->vdev);
212 struct net_device *netdev = enic->netdev;
214 if (mtu && mtu != enic->port_mtu) {
215 enic->port_mtu = mtu;
216 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
217 mtu = max_t(int, ENIC_MIN_MTU,
218 min_t(int, ENIC_MAX_MTU, mtu));
219 if (mtu != netdev->mtu)
220 schedule_work(&enic->change_mtu_work);
222 if (mtu < netdev->mtu)
224 "interface MTU (%d) set higher "
225 "than switch port MTU (%d)\n",
231 static void enic_link_check(struct enic *enic)
233 int link_status = vnic_dev_link_status(enic->vdev);
234 int carrier_ok = netif_carrier_ok(enic->netdev);
236 if (link_status && !carrier_ok) {
237 netdev_info(enic->netdev, "Link UP\n");
238 netif_carrier_on(enic->netdev);
239 } else if (!link_status && carrier_ok) {
240 netdev_info(enic->netdev, "Link DOWN\n");
241 netif_carrier_off(enic->netdev);
245 static void enic_notify_check(struct enic *enic)
247 enic_msglvl_check(enic);
248 enic_mtu_check(enic);
249 enic_link_check(enic);
252 #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
254 static irqreturn_t enic_isr_legacy(int irq, void *data)
256 struct net_device *netdev = data;
257 struct enic *enic = netdev_priv(netdev);
258 unsigned int io_intr = enic_legacy_io_intr();
259 unsigned int err_intr = enic_legacy_err_intr();
260 unsigned int notify_intr = enic_legacy_notify_intr();
263 vnic_intr_mask(&enic->intr[io_intr]);
265 pba = vnic_intr_legacy_pba(enic->legacy_pba);
267 vnic_intr_unmask(&enic->intr[io_intr]);
268 return IRQ_NONE; /* not our interrupt */
271 if (ENIC_TEST_INTR(pba, notify_intr)) {
272 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
273 enic_notify_check(enic);
276 if (ENIC_TEST_INTR(pba, err_intr)) {
277 vnic_intr_return_all_credits(&enic->intr[err_intr]);
278 enic_log_q_error(enic);
279 /* schedule recovery from WQ/RQ error */
280 schedule_work(&enic->reset);
284 if (ENIC_TEST_INTR(pba, io_intr)) {
285 if (napi_schedule_prep(&enic->napi[0]))
286 __napi_schedule(&enic->napi[0]);
288 vnic_intr_unmask(&enic->intr[io_intr]);
294 static irqreturn_t enic_isr_msi(int irq, void *data)
296 struct enic *enic = data;
298 /* With MSI, there is no sharing of interrupts, so this is
299 * our interrupt and there is no need to ack it. The device
300 * is not providing per-vector masking, so the OS will not
301 * write to PCI config space to mask/unmask the interrupt.
302 * We're using mask_on_assertion for MSI, so the device
303 * automatically masks the interrupt when the interrupt is
304 * generated. Later, when exiting polling, the interrupt
305 * will be unmasked (see enic_poll).
307 * Also, the device uses the same PCIe Traffic Class (TC)
308 * for Memory Write data and MSI, so there are no ordering
309 * issues; the MSI will always arrive at the Root Complex
310 * _after_ corresponding Memory Writes (i.e. descriptor
314 napi_schedule(&enic->napi[0]);
319 static irqreturn_t enic_isr_msix_rq(int irq, void *data)
321 struct napi_struct *napi = data;
323 /* schedule NAPI polling for RQ cleanup */
329 static irqreturn_t enic_isr_msix_wq(int irq, void *data)
331 struct enic *enic = data;
334 unsigned int wq_work_to_do = -1; /* no limit */
335 unsigned int wq_work_done;
338 wq_irq = (u32)irq - enic->msix_entry[enic_msix_wq_intr(enic, 0)].vector;
339 cq = enic_cq_wq(enic, wq_irq);
340 intr = enic_msix_wq_intr(enic, wq_irq);
342 wq_work_done = vnic_cq_service(&enic->cq[cq],
343 wq_work_to_do, enic_wq_service, NULL);
345 vnic_intr_return_credits(&enic->intr[intr],
348 1 /* reset intr timer */);
353 static irqreturn_t enic_isr_msix_err(int irq, void *data)
355 struct enic *enic = data;
356 unsigned int intr = enic_msix_err_intr(enic);
358 vnic_intr_return_all_credits(&enic->intr[intr]);
360 enic_log_q_error(enic);
362 /* schedule recovery from WQ/RQ error */
363 schedule_work(&enic->reset);
368 static irqreturn_t enic_isr_msix_notify(int irq, void *data)
370 struct enic *enic = data;
371 unsigned int intr = enic_msix_notify_intr(enic);
373 vnic_intr_return_all_credits(&enic->intr[intr]);
374 enic_notify_check(enic);
379 static inline void enic_queue_wq_skb_cont(struct enic *enic,
380 struct vnic_wq *wq, struct sk_buff *skb,
381 unsigned int len_left, int loopback)
383 const skb_frag_t *frag;
385 /* Queue additional data fragments */
386 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
387 len_left -= skb_frag_size(frag);
388 enic_queue_wq_desc_cont(wq, skb,
389 skb_frag_dma_map(&enic->pdev->dev,
390 frag, 0, skb_frag_size(frag),
393 (len_left == 0), /* EOP? */
398 static inline void enic_queue_wq_skb_vlan(struct enic *enic,
399 struct vnic_wq *wq, struct sk_buff *skb,
400 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
402 unsigned int head_len = skb_headlen(skb);
403 unsigned int len_left = skb->len - head_len;
404 int eop = (len_left == 0);
406 /* Queue the main skb fragment. The fragments are no larger
407 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
408 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
409 * per fragment is queued.
411 enic_queue_wq_desc(wq, skb,
412 pci_map_single(enic->pdev, skb->data,
413 head_len, PCI_DMA_TODEVICE),
415 vlan_tag_insert, vlan_tag,
419 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
422 static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
423 struct vnic_wq *wq, struct sk_buff *skb,
424 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
426 unsigned int head_len = skb_headlen(skb);
427 unsigned int len_left = skb->len - head_len;
428 unsigned int hdr_len = skb_checksum_start_offset(skb);
429 unsigned int csum_offset = hdr_len + skb->csum_offset;
430 int eop = (len_left == 0);
432 /* Queue the main skb fragment. The fragments are no larger
433 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
434 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
435 * per fragment is queued.
437 enic_queue_wq_desc_csum_l4(wq, skb,
438 pci_map_single(enic->pdev, skb->data,
439 head_len, PCI_DMA_TODEVICE),
443 vlan_tag_insert, vlan_tag,
447 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
450 static inline void enic_queue_wq_skb_tso(struct enic *enic,
451 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
452 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
454 unsigned int frag_len_left = skb_headlen(skb);
455 unsigned int len_left = skb->len - frag_len_left;
456 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
457 int eop = (len_left == 0);
460 unsigned int offset = 0;
463 /* Preload TCP csum field with IP pseudo hdr calculated
464 * with IP length set to zero. HW will later add in length
465 * to each TCP segment resulting from the TSO.
468 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
469 ip_hdr(skb)->check = 0;
470 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
471 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
472 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
473 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
474 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
477 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
478 * for the main skb fragment
480 while (frag_len_left) {
481 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
482 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
483 len, PCI_DMA_TODEVICE);
484 enic_queue_wq_desc_tso(wq, skb,
488 vlan_tag_insert, vlan_tag,
489 eop && (len == frag_len_left), loopback);
490 frag_len_left -= len;
497 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
498 * for additional data fragments
500 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
501 len_left -= skb_frag_size(frag);
502 frag_len_left = skb_frag_size(frag);
505 while (frag_len_left) {
506 len = min(frag_len_left,
507 (unsigned int)WQ_ENET_MAX_DESC_LEN);
508 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
511 enic_queue_wq_desc_cont(wq, skb,
515 (len == frag_len_left), /* EOP? */
517 frag_len_left -= len;
523 static inline void enic_queue_wq_skb(struct enic *enic,
524 struct vnic_wq *wq, struct sk_buff *skb)
526 unsigned int mss = skb_shinfo(skb)->gso_size;
527 unsigned int vlan_tag = 0;
528 int vlan_tag_insert = 0;
531 if (vlan_tx_tag_present(skb)) {
532 /* VLAN tag from trunking driver */
534 vlan_tag = vlan_tx_tag_get(skb);
535 } else if (enic->loop_enable) {
536 vlan_tag = enic->loop_tag;
541 enic_queue_wq_skb_tso(enic, wq, skb, mss,
542 vlan_tag_insert, vlan_tag, loopback);
543 else if (skb->ip_summed == CHECKSUM_PARTIAL)
544 enic_queue_wq_skb_csum_l4(enic, wq, skb,
545 vlan_tag_insert, vlan_tag, loopback);
547 enic_queue_wq_skb_vlan(enic, wq, skb,
548 vlan_tag_insert, vlan_tag, loopback);
551 /* netif_tx_lock held, process context with BHs disabled, or BH */
552 static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
553 struct net_device *netdev)
555 struct enic *enic = netdev_priv(netdev);
558 unsigned int txq_map;
561 dev_kfree_skb_any(skb);
565 txq_map = skb_get_queue_mapping(skb) % enic->wq_count;
566 wq = &enic->wq[txq_map];
568 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
569 * which is very likely. In the off chance it's going to take
570 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
573 if (skb_shinfo(skb)->gso_size == 0 &&
574 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
575 skb_linearize(skb)) {
576 dev_kfree_skb_any(skb);
580 spin_lock_irqsave(&enic->wq_lock[txq_map], flags);
582 if (vnic_wq_desc_avail(wq) <
583 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
584 netif_tx_stop_queue(netdev_get_tx_queue(netdev, txq_map));
585 /* This is a hard error, log it */
586 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
587 spin_unlock_irqrestore(&enic->wq_lock[txq_map], flags);
588 return NETDEV_TX_BUSY;
591 enic_queue_wq_skb(enic, wq, skb);
593 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
594 netif_tx_stop_queue(netdev_get_tx_queue(netdev, txq_map));
596 spin_unlock_irqrestore(&enic->wq_lock[txq_map], flags);
601 /* dev_base_lock rwlock held, nominally process context */
602 static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
603 struct rtnl_link_stats64 *net_stats)
605 struct enic *enic = netdev_priv(netdev);
606 struct vnic_stats *stats;
608 enic_dev_stats_dump(enic, &stats);
610 net_stats->tx_packets = stats->tx.tx_frames_ok;
611 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
612 net_stats->tx_errors = stats->tx.tx_errors;
613 net_stats->tx_dropped = stats->tx.tx_drops;
615 net_stats->rx_packets = stats->rx.rx_frames_ok;
616 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
617 net_stats->rx_errors = stats->rx.rx_errors;
618 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
619 net_stats->rx_over_errors = enic->rq_truncated_pkts;
620 net_stats->rx_crc_errors = enic->rq_bad_fcs;
621 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
626 static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr)
628 struct enic *enic = netdev_priv(netdev);
630 if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) {
631 unsigned int mc_count = netdev_mc_count(netdev);
633 netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n",
634 ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
639 enic_dev_add_addr(enic, mc_addr);
645 static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr)
647 struct enic *enic = netdev_priv(netdev);
649 enic_dev_del_addr(enic, mc_addr);
655 static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr)
657 struct enic *enic = netdev_priv(netdev);
659 if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) {
660 unsigned int uc_count = netdev_uc_count(netdev);
662 netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n",
663 ENIC_UNICAST_PERFECT_FILTERS, uc_count);
668 enic_dev_add_addr(enic, uc_addr);
674 static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr)
676 struct enic *enic = netdev_priv(netdev);
678 enic_dev_del_addr(enic, uc_addr);
684 void enic_reset_addr_lists(struct enic *enic)
686 struct net_device *netdev = enic->netdev;
688 __dev_uc_unsync(netdev, NULL);
689 __dev_mc_unsync(netdev, NULL);
696 static int enic_set_mac_addr(struct net_device *netdev, char *addr)
698 struct enic *enic = netdev_priv(netdev);
700 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
701 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
702 return -EADDRNOTAVAIL;
704 if (!is_valid_ether_addr(addr))
705 return -EADDRNOTAVAIL;
708 memcpy(netdev->dev_addr, addr, netdev->addr_len);
713 static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
715 struct enic *enic = netdev_priv(netdev);
716 struct sockaddr *saddr = p;
717 char *addr = saddr->sa_data;
720 if (netif_running(enic->netdev)) {
721 err = enic_dev_del_station_addr(enic);
726 err = enic_set_mac_addr(netdev, addr);
730 if (netif_running(enic->netdev)) {
731 err = enic_dev_add_station_addr(enic);
739 static int enic_set_mac_address(struct net_device *netdev, void *p)
741 struct sockaddr *saddr = p;
742 char *addr = saddr->sa_data;
743 struct enic *enic = netdev_priv(netdev);
746 err = enic_dev_del_station_addr(enic);
750 err = enic_set_mac_addr(netdev, addr);
754 return enic_dev_add_station_addr(enic);
757 /* netif_tx_lock held, BHs disabled */
758 static void enic_set_rx_mode(struct net_device *netdev)
760 struct enic *enic = netdev_priv(netdev);
762 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
763 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
764 int promisc = (netdev->flags & IFF_PROMISC) ||
765 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
766 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
767 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
768 unsigned int flags = netdev->flags |
769 (allmulti ? IFF_ALLMULTI : 0) |
770 (promisc ? IFF_PROMISC : 0);
772 if (enic->flags != flags) {
774 enic_dev_packet_filter(enic, directed,
775 multicast, broadcast, promisc, allmulti);
779 __dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync);
781 __dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync);
785 /* netif_tx_lock held, BHs disabled */
786 static void enic_tx_timeout(struct net_device *netdev)
788 struct enic *enic = netdev_priv(netdev);
789 schedule_work(&enic->reset);
792 static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
794 struct enic *enic = netdev_priv(netdev);
795 struct enic_port_profile *pp;
798 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
802 if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) {
803 if (vf == PORT_SELF_VF) {
804 memcpy(pp->vf_mac, mac, ETH_ALEN);
808 * For sriov vf's set the mac in hw
810 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
811 vnic_dev_set_mac_addr, mac);
812 return enic_dev_status_to_errno(err);
818 static int enic_set_vf_port(struct net_device *netdev, int vf,
819 struct nlattr *port[])
821 struct enic *enic = netdev_priv(netdev);
822 struct enic_port_profile prev_pp;
823 struct enic_port_profile *pp;
824 int err = 0, restore_pp = 1;
826 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
830 if (!port[IFLA_PORT_REQUEST])
833 memcpy(&prev_pp, pp, sizeof(*enic->pp));
834 memset(pp, 0, sizeof(*enic->pp));
836 pp->set |= ENIC_SET_REQUEST;
837 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
839 if (port[IFLA_PORT_PROFILE]) {
840 pp->set |= ENIC_SET_NAME;
841 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
845 if (port[IFLA_PORT_INSTANCE_UUID]) {
846 pp->set |= ENIC_SET_INSTANCE;
847 memcpy(pp->instance_uuid,
848 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
851 if (port[IFLA_PORT_HOST_UUID]) {
852 pp->set |= ENIC_SET_HOST;
853 memcpy(pp->host_uuid,
854 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
857 if (vf == PORT_SELF_VF) {
858 /* Special case handling: mac came from IFLA_VF_MAC */
859 if (!is_zero_ether_addr(prev_pp.vf_mac))
860 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
862 if (is_zero_ether_addr(netdev->dev_addr))
863 eth_hw_addr_random(netdev);
865 /* SR-IOV VF: get mac from adapter */
866 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
867 vnic_dev_get_mac_addr, pp->mac_addr);
869 netdev_err(netdev, "Error getting mac for vf %d\n", vf);
870 memcpy(pp, &prev_pp, sizeof(*pp));
871 return enic_dev_status_to_errno(err);
875 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
878 /* Things are still the way they were: Implicit
879 * DISASSOCIATE failed
881 memcpy(pp, &prev_pp, sizeof(*pp));
883 memset(pp, 0, sizeof(*pp));
884 if (vf == PORT_SELF_VF)
885 memset(netdev->dev_addr, 0, ETH_ALEN);
888 /* Set flag to indicate that the port assoc/disassoc
889 * request has been sent out to fw
891 pp->set |= ENIC_PORT_REQUEST_APPLIED;
893 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
894 if (pp->request == PORT_REQUEST_DISASSOCIATE) {
895 memset(pp->mac_addr, 0, ETH_ALEN);
896 if (vf == PORT_SELF_VF)
897 memset(netdev->dev_addr, 0, ETH_ALEN);
901 if (vf == PORT_SELF_VF)
902 memset(pp->vf_mac, 0, ETH_ALEN);
907 static int enic_get_vf_port(struct net_device *netdev, int vf,
910 struct enic *enic = netdev_priv(netdev);
911 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
912 struct enic_port_profile *pp;
915 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
919 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
922 err = enic_process_get_pp_request(enic, vf, pp->request, &response);
926 if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) ||
927 nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||
928 ((pp->set & ENIC_SET_NAME) &&
929 nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) ||
930 ((pp->set & ENIC_SET_INSTANCE) &&
931 nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
932 pp->instance_uuid)) ||
933 ((pp->set & ENIC_SET_HOST) &&
934 nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid)))
935 goto nla_put_failure;
942 static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
944 struct enic *enic = vnic_dev_priv(rq->vdev);
949 pci_unmap_single(enic->pdev, buf->dma_addr,
950 buf->len, PCI_DMA_FROMDEVICE);
951 dev_kfree_skb_any(buf->os_buf);
954 static int enic_rq_alloc_buf(struct vnic_rq *rq)
956 struct enic *enic = vnic_dev_priv(rq->vdev);
957 struct net_device *netdev = enic->netdev;
959 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
960 unsigned int os_buf_index = 0;
963 skb = netdev_alloc_skb_ip_align(netdev, len);
967 dma_addr = pci_map_single(enic->pdev, skb->data,
968 len, PCI_DMA_FROMDEVICE);
970 enic_queue_rq_desc(rq, skb, os_buf_index,
976 static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size,
979 if (ENIC_LARGE_PKT_THRESHOLD <= pkt_len)
980 pkt_size->large_pkt_bytes_cnt += pkt_len;
982 pkt_size->small_pkt_bytes_cnt += pkt_len;
985 static void enic_rq_indicate_buf(struct vnic_rq *rq,
986 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
987 int skipped, void *opaque)
989 struct enic *enic = vnic_dev_priv(rq->vdev);
990 struct net_device *netdev = enic->netdev;
992 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
994 u8 type, color, eop, sop, ingress_port, vlan_stripped;
995 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
996 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
997 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
999 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
1006 prefetch(skb->data - NET_IP_ALIGN);
1007 pci_unmap_single(enic->pdev, buf->dma_addr,
1008 buf->len, PCI_DMA_FROMDEVICE);
1010 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1011 &type, &color, &q_number, &completed_index,
1012 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1013 &csum_not_calc, &rss_hash, &bytes_written,
1014 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
1015 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1016 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1017 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1023 if (bytes_written > 0)
1025 else if (bytes_written == 0)
1026 enic->rq_truncated_pkts++;
1029 dev_kfree_skb_any(skb);
1034 if (eop && bytes_written > 0) {
1039 skb_put(skb, bytes_written);
1040 skb->protocol = eth_type_trans(skb, netdev);
1041 skb_record_rx_queue(skb, q_number);
1042 if (netdev->features & NETIF_F_RXHASH) {
1043 skb_set_hash(skb, rss_hash,
1045 (NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX |
1046 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6 |
1047 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4)) ?
1048 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1051 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
1052 skb->csum = htons(checksum);
1053 skb->ip_summed = CHECKSUM_COMPLETE;
1057 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci);
1059 skb_mark_napi_id(skb, &enic->napi[rq->index]);
1060 if (enic_poll_busy_polling(rq) ||
1061 !(netdev->features & NETIF_F_GRO))
1062 netif_receive_skb(skb);
1064 napi_gro_receive(&enic->napi[q_number], skb);
1065 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1066 enic_intr_update_pkt_size(&cq->pkt_size_counter,
1073 dev_kfree_skb_any(skb);
1077 static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1078 u8 type, u16 q_number, u16 completed_index, void *opaque)
1080 struct enic *enic = vnic_dev_priv(vdev);
1082 vnic_rq_service(&enic->rq[q_number], cq_desc,
1083 completed_index, VNIC_RQ_RETURN_DESC,
1084 enic_rq_indicate_buf, opaque);
1089 static int enic_poll(struct napi_struct *napi, int budget)
1091 struct net_device *netdev = napi->dev;
1092 struct enic *enic = netdev_priv(netdev);
1093 unsigned int cq_rq = enic_cq_rq(enic, 0);
1094 unsigned int cq_wq = enic_cq_wq(enic, 0);
1095 unsigned int intr = enic_legacy_io_intr();
1096 unsigned int rq_work_to_do = budget;
1097 unsigned int wq_work_to_do = -1; /* no limit */
1098 unsigned int work_done, rq_work_done = 0, wq_work_done;
1101 wq_work_done = vnic_cq_service(&enic->cq[cq_wq], wq_work_to_do,
1102 enic_wq_service, NULL);
1104 if (!enic_poll_lock_napi(&enic->rq[cq_rq])) {
1105 if (wq_work_done > 0)
1106 vnic_intr_return_credits(&enic->intr[intr],
1108 0 /* dont unmask intr */,
1109 0 /* dont reset intr timer */);
1110 return rq_work_done;
1114 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
1115 rq_work_to_do, enic_rq_service, NULL);
1117 /* Accumulate intr event credits for this polling
1118 * cycle. An intr event is the completion of a
1119 * a WQ or RQ packet.
1122 work_done = rq_work_done + wq_work_done;
1125 vnic_intr_return_credits(&enic->intr[intr],
1127 0 /* don't unmask intr */,
1128 0 /* don't reset intr timer */);
1130 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1132 /* Buffer allocation failed. Stay in polling
1133 * mode so we can try to fill the ring again.
1137 rq_work_done = rq_work_to_do;
1139 if (rq_work_done < rq_work_to_do) {
1141 /* Some work done, but not enough to stay in polling,
1145 napi_complete(napi);
1146 vnic_intr_unmask(&enic->intr[intr]);
1148 enic_poll_unlock_napi(&enic->rq[cq_rq]);
1150 return rq_work_done;
1153 static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq)
1155 unsigned int intr = enic_msix_rq_intr(enic, rq->index);
1156 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
1157 u32 timer = cq->tobe_rx_coal_timeval;
1159 if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) {
1160 vnic_intr_coalescing_timer_set(&enic->intr[intr], timer);
1161 cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval;
1165 static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq)
1167 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
1168 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
1169 struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter;
1175 ktime_t now = ktime_get();
1177 delta = ktime_us_delta(now, cq->prev_ts);
1178 if (delta < ENIC_AIC_TS_BREAK)
1182 traffic = pkt_size_counter->large_pkt_bytes_cnt +
1183 pkt_size_counter->small_pkt_bytes_cnt;
1184 /* The table takes Mbps
1185 * traffic *= 8 => bits
1186 * traffic *= (10^6 / delta) => bps
1187 * traffic /= 10^6 => Mbps
1189 * Combining, traffic *= (8 / delta)
1193 traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta;
1195 for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++)
1196 if (traffic < mod_table[index].rx_rate)
1198 range_start = (pkt_size_counter->small_pkt_bytes_cnt >
1199 pkt_size_counter->large_pkt_bytes_cnt << 1) ?
1200 rx_coal->small_pkt_range_start :
1201 rx_coal->large_pkt_range_start;
1202 timer = range_start + ((rx_coal->range_end - range_start) *
1203 mod_table[index].range_percent / 100);
1205 cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1;
1207 pkt_size_counter->large_pkt_bytes_cnt = 0;
1208 pkt_size_counter->small_pkt_bytes_cnt = 0;
1211 #ifdef CONFIG_RFS_ACCEL
1212 static void enic_free_rx_cpu_rmap(struct enic *enic)
1214 free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap);
1215 enic->netdev->rx_cpu_rmap = NULL;
1218 static void enic_set_rx_cpu_rmap(struct enic *enic)
1222 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) {
1223 enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count);
1224 if (unlikely(!enic->netdev->rx_cpu_rmap))
1226 for (i = 0; i < enic->rq_count; i++) {
1227 res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap,
1228 enic->msix_entry[i].vector);
1229 if (unlikely(res)) {
1230 enic_free_rx_cpu_rmap(enic);
1239 static void enic_free_rx_cpu_rmap(struct enic *enic)
1243 static void enic_set_rx_cpu_rmap(struct enic *enic)
1247 #endif /* CONFIG_RFS_ACCEL */
1249 #ifdef CONFIG_NET_RX_BUSY_POLL
1250 int enic_busy_poll(struct napi_struct *napi)
1252 struct net_device *netdev = napi->dev;
1253 struct enic *enic = netdev_priv(netdev);
1254 unsigned int rq = (napi - &enic->napi[0]);
1255 unsigned int cq = enic_cq_rq(enic, rq);
1256 unsigned int intr = enic_msix_rq_intr(enic, rq);
1257 unsigned int work_to_do = -1; /* clean all pkts possible */
1258 unsigned int work_done;
1260 if (!enic_poll_lock_poll(&enic->rq[rq]))
1261 return LL_FLUSH_BUSY;
1262 work_done = vnic_cq_service(&enic->cq[cq], work_to_do,
1263 enic_rq_service, NULL);
1266 vnic_intr_return_credits(&enic->intr[intr],
1268 vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
1269 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1270 enic_calc_int_moderation(enic, &enic->rq[rq]);
1271 enic_poll_unlock_poll(&enic->rq[rq]);
1275 #endif /* CONFIG_NET_RX_BUSY_POLL */
1277 static int enic_poll_msix(struct napi_struct *napi, int budget)
1279 struct net_device *netdev = napi->dev;
1280 struct enic *enic = netdev_priv(netdev);
1281 unsigned int rq = (napi - &enic->napi[0]);
1282 unsigned int cq = enic_cq_rq(enic, rq);
1283 unsigned int intr = enic_msix_rq_intr(enic, rq);
1284 unsigned int work_to_do = budget;
1285 unsigned int work_done = 0;
1288 if (!enic_poll_lock_napi(&enic->rq[rq]))
1294 work_done = vnic_cq_service(&enic->cq[cq],
1295 work_to_do, enic_rq_service, NULL);
1297 /* Return intr event credits for this polling
1298 * cycle. An intr event is the completion of a
1303 vnic_intr_return_credits(&enic->intr[intr],
1305 0 /* don't unmask intr */,
1306 0 /* don't reset intr timer */);
1308 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
1310 /* Buffer allocation failed. Stay in polling mode
1311 * so we can try to fill the ring again.
1315 work_done = work_to_do;
1316 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1317 /* Call the function which refreshes
1318 * the intr coalescing timer value based on
1319 * the traffic. This is supported only in
1320 * the case of MSI-x mode
1322 enic_calc_int_moderation(enic, &enic->rq[rq]);
1324 if (work_done < work_to_do) {
1326 /* Some work done, but not enough to stay in polling,
1330 napi_complete(napi);
1331 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1332 enic_set_int_moderation(enic, &enic->rq[rq]);
1333 vnic_intr_unmask(&enic->intr[intr]);
1335 enic_poll_unlock_napi(&enic->rq[rq]);
1340 static void enic_notify_timer(unsigned long data)
1342 struct enic *enic = (struct enic *)data;
1344 enic_notify_check(enic);
1346 mod_timer(&enic->notify_timer,
1347 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
1350 static void enic_free_intr(struct enic *enic)
1352 struct net_device *netdev = enic->netdev;
1355 enic_free_rx_cpu_rmap(enic);
1356 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1357 case VNIC_DEV_INTR_MODE_INTX:
1358 free_irq(enic->pdev->irq, netdev);
1360 case VNIC_DEV_INTR_MODE_MSI:
1361 free_irq(enic->pdev->irq, enic);
1363 case VNIC_DEV_INTR_MODE_MSIX:
1364 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1365 if (enic->msix[i].requested)
1366 free_irq(enic->msix_entry[i].vector,
1367 enic->msix[i].devid);
1374 static int enic_request_intr(struct enic *enic)
1376 struct net_device *netdev = enic->netdev;
1377 unsigned int i, intr;
1380 enic_set_rx_cpu_rmap(enic);
1381 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1383 case VNIC_DEV_INTR_MODE_INTX:
1385 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1386 IRQF_SHARED, netdev->name, netdev);
1389 case VNIC_DEV_INTR_MODE_MSI:
1391 err = request_irq(enic->pdev->irq, enic_isr_msi,
1392 0, netdev->name, enic);
1395 case VNIC_DEV_INTR_MODE_MSIX:
1397 for (i = 0; i < enic->rq_count; i++) {
1398 intr = enic_msix_rq_intr(enic, i);
1399 snprintf(enic->msix[intr].devname,
1400 sizeof(enic->msix[intr].devname),
1401 "%.11s-rx-%d", netdev->name, i);
1402 enic->msix[intr].isr = enic_isr_msix_rq;
1403 enic->msix[intr].devid = &enic->napi[i];
1406 for (i = 0; i < enic->wq_count; i++) {
1407 intr = enic_msix_wq_intr(enic, i);
1408 snprintf(enic->msix[intr].devname,
1409 sizeof(enic->msix[intr].devname),
1410 "%.11s-tx-%d", netdev->name, i);
1411 enic->msix[intr].isr = enic_isr_msix_wq;
1412 enic->msix[intr].devid = enic;
1415 intr = enic_msix_err_intr(enic);
1416 snprintf(enic->msix[intr].devname,
1417 sizeof(enic->msix[intr].devname),
1418 "%.11s-err", netdev->name);
1419 enic->msix[intr].isr = enic_isr_msix_err;
1420 enic->msix[intr].devid = enic;
1422 intr = enic_msix_notify_intr(enic);
1423 snprintf(enic->msix[intr].devname,
1424 sizeof(enic->msix[intr].devname),
1425 "%.11s-notify", netdev->name);
1426 enic->msix[intr].isr = enic_isr_msix_notify;
1427 enic->msix[intr].devid = enic;
1429 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1430 enic->msix[i].requested = 0;
1432 for (i = 0; i < enic->intr_count; i++) {
1433 err = request_irq(enic->msix_entry[i].vector,
1434 enic->msix[i].isr, 0,
1435 enic->msix[i].devname,
1436 enic->msix[i].devid);
1438 enic_free_intr(enic);
1441 enic->msix[i].requested = 1;
1453 static void enic_synchronize_irqs(struct enic *enic)
1457 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1458 case VNIC_DEV_INTR_MODE_INTX:
1459 case VNIC_DEV_INTR_MODE_MSI:
1460 synchronize_irq(enic->pdev->irq);
1462 case VNIC_DEV_INTR_MODE_MSIX:
1463 for (i = 0; i < enic->intr_count; i++)
1464 synchronize_irq(enic->msix_entry[i].vector);
1471 static void enic_set_rx_coal_setting(struct enic *enic)
1475 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
1477 /* If intr mode is not MSIX, do not do adaptive coalescing */
1478 if (VNIC_DEV_INTR_MODE_MSIX != vnic_dev_get_intr_mode(enic->vdev)) {
1479 netdev_info(enic->netdev, "INTR mode is not MSIX, Not initializing adaptive coalescing");
1483 /* 1. Read the link speed from fw
1484 * 2. Pick the default range for the speed
1485 * 3. Update it in enic->rx_coalesce_setting
1487 speed = vnic_dev_port_speed(enic->vdev);
1488 if (ENIC_LINK_SPEED_10G < speed)
1489 index = ENIC_LINK_40G_INDEX;
1490 else if (ENIC_LINK_SPEED_4G < speed)
1491 index = ENIC_LINK_10G_INDEX;
1493 index = ENIC_LINK_4G_INDEX;
1495 rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start;
1496 rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start;
1497 rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END;
1499 /* Start with the value provided by UCSM */
1500 for (index = 0; index < enic->rq_count; index++)
1501 enic->cq[index].cur_rx_coal_timeval =
1502 enic->config.intr_timer_usec;
1504 rx_coal->use_adaptive_rx_coalesce = 1;
1507 static int enic_dev_notify_set(struct enic *enic)
1511 spin_lock_bh(&enic->devcmd_lock);
1512 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1513 case VNIC_DEV_INTR_MODE_INTX:
1514 err = vnic_dev_notify_set(enic->vdev,
1515 enic_legacy_notify_intr());
1517 case VNIC_DEV_INTR_MODE_MSIX:
1518 err = vnic_dev_notify_set(enic->vdev,
1519 enic_msix_notify_intr(enic));
1522 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1525 spin_unlock_bh(&enic->devcmd_lock);
1530 static void enic_notify_timer_start(struct enic *enic)
1532 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1533 case VNIC_DEV_INTR_MODE_MSI:
1534 mod_timer(&enic->notify_timer, jiffies);
1537 /* Using intr for notification for INTx/MSI-X */
1542 /* rtnl lock is held, process context */
1543 static int enic_open(struct net_device *netdev)
1545 struct enic *enic = netdev_priv(netdev);
1549 err = enic_request_intr(enic);
1551 netdev_err(netdev, "Unable to request irq.\n");
1555 err = enic_dev_notify_set(enic);
1558 "Failed to alloc notify buffer, aborting.\n");
1559 goto err_out_free_intr;
1562 for (i = 0; i < enic->rq_count; i++) {
1563 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
1564 /* Need at least one buffer on ring to get going */
1565 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
1566 netdev_err(netdev, "Unable to alloc receive buffers\n");
1568 goto err_out_notify_unset;
1572 for (i = 0; i < enic->wq_count; i++)
1573 vnic_wq_enable(&enic->wq[i]);
1574 for (i = 0; i < enic->rq_count; i++)
1575 vnic_rq_enable(&enic->rq[i]);
1577 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
1578 enic_dev_add_station_addr(enic);
1580 enic_set_rx_mode(netdev);
1582 netif_tx_wake_all_queues(netdev);
1584 for (i = 0; i < enic->rq_count; i++) {
1585 enic_busy_poll_init_lock(&enic->rq[i]);
1586 napi_enable(&enic->napi[i]);
1589 enic_dev_enable(enic);
1591 for (i = 0; i < enic->intr_count; i++)
1592 vnic_intr_unmask(&enic->intr[i]);
1594 enic_notify_timer_start(enic);
1595 enic_rfs_flw_tbl_init(enic);
1599 err_out_notify_unset:
1600 enic_dev_notify_unset(enic);
1602 enic_free_intr(enic);
1607 /* rtnl lock is held, process context */
1608 static int enic_stop(struct net_device *netdev)
1610 struct enic *enic = netdev_priv(netdev);
1614 for (i = 0; i < enic->intr_count; i++) {
1615 vnic_intr_mask(&enic->intr[i]);
1616 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1619 enic_synchronize_irqs(enic);
1621 del_timer_sync(&enic->notify_timer);
1622 enic_rfs_flw_tbl_free(enic);
1624 enic_dev_disable(enic);
1627 for (i = 0; i < enic->rq_count; i++) {
1628 napi_disable(&enic->napi[i]);
1629 while (!enic_poll_lock_napi(&enic->rq[i]))
1634 netif_carrier_off(netdev);
1635 netif_tx_disable(netdev);
1637 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
1638 enic_dev_del_station_addr(enic);
1640 for (i = 0; i < enic->wq_count; i++) {
1641 err = vnic_wq_disable(&enic->wq[i]);
1645 for (i = 0; i < enic->rq_count; i++) {
1646 err = vnic_rq_disable(&enic->rq[i]);
1651 enic_dev_notify_unset(enic);
1652 enic_free_intr(enic);
1654 for (i = 0; i < enic->wq_count; i++)
1655 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1656 for (i = 0; i < enic->rq_count; i++)
1657 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1658 for (i = 0; i < enic->cq_count; i++)
1659 vnic_cq_clean(&enic->cq[i]);
1660 for (i = 0; i < enic->intr_count; i++)
1661 vnic_intr_clean(&enic->intr[i]);
1666 static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1668 struct enic *enic = netdev_priv(netdev);
1669 int running = netif_running(netdev);
1671 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1674 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
1680 netdev->mtu = new_mtu;
1682 if (netdev->mtu > enic->port_mtu)
1684 "interface MTU (%d) set higher than port MTU (%d)\n",
1685 netdev->mtu, enic->port_mtu);
1693 static void enic_change_mtu_work(struct work_struct *work)
1695 struct enic *enic = container_of(work, struct enic, change_mtu_work);
1696 struct net_device *netdev = enic->netdev;
1697 int new_mtu = vnic_dev_mtu(enic->vdev);
1701 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
1706 del_timer_sync(&enic->notify_timer);
1708 for (i = 0; i < enic->rq_count; i++)
1709 napi_disable(&enic->napi[i]);
1711 vnic_intr_mask(&enic->intr[0]);
1712 enic_synchronize_irqs(enic);
1713 err = vnic_rq_disable(&enic->rq[0]);
1716 netdev_err(netdev, "Unable to disable RQ.\n");
1719 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
1720 vnic_cq_clean(&enic->cq[0]);
1721 vnic_intr_clean(&enic->intr[0]);
1723 /* Fill RQ with new_mtu-sized buffers */
1724 netdev->mtu = new_mtu;
1725 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1726 /* Need at least one buffer on ring to get going */
1727 if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
1729 netdev_err(netdev, "Unable to alloc receive buffers.\n");
1734 vnic_rq_enable(&enic->rq[0]);
1735 napi_enable(&enic->napi[0]);
1736 vnic_intr_unmask(&enic->intr[0]);
1737 enic_notify_timer_start(enic);
1741 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
1744 #ifdef CONFIG_NET_POLL_CONTROLLER
1745 static void enic_poll_controller(struct net_device *netdev)
1747 struct enic *enic = netdev_priv(netdev);
1748 struct vnic_dev *vdev = enic->vdev;
1749 unsigned int i, intr;
1751 switch (vnic_dev_get_intr_mode(vdev)) {
1752 case VNIC_DEV_INTR_MODE_MSIX:
1753 for (i = 0; i < enic->rq_count; i++) {
1754 intr = enic_msix_rq_intr(enic, i);
1755 enic_isr_msix_rq(enic->msix_entry[intr].vector,
1759 for (i = 0; i < enic->wq_count; i++) {
1760 intr = enic_msix_wq_intr(enic, i);
1761 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
1765 case VNIC_DEV_INTR_MODE_MSI:
1766 enic_isr_msi(enic->pdev->irq, enic);
1768 case VNIC_DEV_INTR_MODE_INTX:
1769 enic_isr_legacy(enic->pdev->irq, netdev);
1777 static int enic_dev_wait(struct vnic_dev *vdev,
1778 int (*start)(struct vnic_dev *, int),
1779 int (*finished)(struct vnic_dev *, int *),
1786 BUG_ON(in_interrupt());
1788 err = start(vdev, arg);
1792 /* Wait for func to complete...2 seconds max
1795 time = jiffies + (HZ * 2);
1798 err = finished(vdev, &done);
1805 schedule_timeout_uninterruptible(HZ / 10);
1807 } while (time_after(time, jiffies));
1812 static int enic_dev_open(struct enic *enic)
1816 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1817 vnic_dev_open_done, 0);
1819 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1825 static int enic_dev_hang_reset(struct enic *enic)
1829 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1830 vnic_dev_hang_reset_done, 0);
1832 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1838 static int enic_set_rsskey(struct enic *enic)
1840 dma_addr_t rss_key_buf_pa;
1841 union vnic_rss_key *rss_key_buf_va = NULL;
1842 union vnic_rss_key rss_key = {
1843 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
1844 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
1845 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
1846 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
1850 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
1851 sizeof(union vnic_rss_key), &rss_key_buf_pa);
1852 if (!rss_key_buf_va)
1855 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
1857 spin_lock_bh(&enic->devcmd_lock);
1858 err = enic_set_rss_key(enic,
1860 sizeof(union vnic_rss_key));
1861 spin_unlock_bh(&enic->devcmd_lock);
1863 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
1864 rss_key_buf_va, rss_key_buf_pa);
1869 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
1871 dma_addr_t rss_cpu_buf_pa;
1872 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
1876 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
1877 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
1878 if (!rss_cpu_buf_va)
1881 for (i = 0; i < (1 << rss_hash_bits); i++)
1882 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
1884 spin_lock_bh(&enic->devcmd_lock);
1885 err = enic_set_rss_cpu(enic,
1887 sizeof(union vnic_rss_cpu));
1888 spin_unlock_bh(&enic->devcmd_lock);
1890 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
1891 rss_cpu_buf_va, rss_cpu_buf_pa);
1896 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
1897 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
1899 const u8 tso_ipid_split_en = 0;
1900 const u8 ig_vlan_strip_en = 1;
1903 /* Enable VLAN tag stripping.
1906 spin_lock_bh(&enic->devcmd_lock);
1907 err = enic_set_nic_cfg(enic,
1908 rss_default_cpu, rss_hash_type,
1909 rss_hash_bits, rss_base_cpu,
1910 rss_enable, tso_ipid_split_en,
1912 spin_unlock_bh(&enic->devcmd_lock);
1917 static int enic_set_rss_nic_cfg(struct enic *enic)
1919 struct device *dev = enic_get_dev(enic);
1920 const u8 rss_default_cpu = 0;
1921 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1922 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1923 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1924 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1925 const u8 rss_hash_bits = 7;
1926 const u8 rss_base_cpu = 0;
1927 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1930 if (!enic_set_rsskey(enic)) {
1931 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1933 dev_warn(dev, "RSS disabled, "
1934 "Failed to set RSS cpu indirection table.");
1938 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
1942 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1943 rss_hash_bits, rss_base_cpu, rss_enable);
1946 static void enic_reset(struct work_struct *work)
1948 struct enic *enic = container_of(work, struct enic, reset);
1950 if (!netif_running(enic->netdev))
1955 spin_lock(&enic->enic_api_lock);
1956 enic_dev_hang_notify(enic);
1957 enic_stop(enic->netdev);
1958 enic_dev_hang_reset(enic);
1959 enic_reset_addr_lists(enic);
1960 enic_init_vnic_resources(enic);
1961 enic_set_rss_nic_cfg(enic);
1962 enic_dev_set_ig_vlan_rewrite_mode(enic);
1963 enic_open(enic->netdev);
1964 spin_unlock(&enic->enic_api_lock);
1965 call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);
1970 static int enic_set_intr_mode(struct enic *enic)
1972 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
1973 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
1976 /* Set interrupt mode (INTx, MSI, MSI-X) depending
1977 * on system capabilities.
1981 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
1982 * (the second to last INTR is used for WQ/RQ errors)
1983 * (the last INTR is used for notifications)
1986 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
1987 for (i = 0; i < n + m + 2; i++)
1988 enic->msix_entry[i].entry = i;
1990 /* Use multiple RQs if RSS is enabled
1993 if (ENIC_SETTING(enic, RSS) &&
1994 enic->config.intr_mode < 1 &&
1995 enic->rq_count >= n &&
1996 enic->wq_count >= m &&
1997 enic->cq_count >= n + m &&
1998 enic->intr_count >= n + m + 2) {
2000 if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
2001 n + m + 2, n + m + 2) > 0) {
2005 enic->cq_count = n + m;
2006 enic->intr_count = n + m + 2;
2008 vnic_dev_set_intr_mode(enic->vdev,
2009 VNIC_DEV_INTR_MODE_MSIX);
2015 if (enic->config.intr_mode < 1 &&
2016 enic->rq_count >= 1 &&
2017 enic->wq_count >= m &&
2018 enic->cq_count >= 1 + m &&
2019 enic->intr_count >= 1 + m + 2) {
2020 if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
2021 1 + m + 2, 1 + m + 2) > 0) {
2025 enic->cq_count = 1 + m;
2026 enic->intr_count = 1 + m + 2;
2028 vnic_dev_set_intr_mode(enic->vdev,
2029 VNIC_DEV_INTR_MODE_MSIX);
2037 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2040 if (enic->config.intr_mode < 2 &&
2041 enic->rq_count >= 1 &&
2042 enic->wq_count >= 1 &&
2043 enic->cq_count >= 2 &&
2044 enic->intr_count >= 1 &&
2045 !pci_enable_msi(enic->pdev)) {
2050 enic->intr_count = 1;
2052 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2059 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2060 * (the first INTR is used for WQ/RQ)
2061 * (the second INTR is used for WQ/RQ errors)
2062 * (the last INTR is used for notifications)
2065 if (enic->config.intr_mode < 3 &&
2066 enic->rq_count >= 1 &&
2067 enic->wq_count >= 1 &&
2068 enic->cq_count >= 2 &&
2069 enic->intr_count >= 3) {
2074 enic->intr_count = 3;
2076 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2081 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2086 static void enic_clear_intr_mode(struct enic *enic)
2088 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2089 case VNIC_DEV_INTR_MODE_MSIX:
2090 pci_disable_msix(enic->pdev);
2092 case VNIC_DEV_INTR_MODE_MSI:
2093 pci_disable_msi(enic->pdev);
2099 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2102 static const struct net_device_ops enic_netdev_dynamic_ops = {
2103 .ndo_open = enic_open,
2104 .ndo_stop = enic_stop,
2105 .ndo_start_xmit = enic_hard_start_xmit,
2106 .ndo_get_stats64 = enic_get_stats,
2107 .ndo_validate_addr = eth_validate_addr,
2108 .ndo_set_rx_mode = enic_set_rx_mode,
2109 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2110 .ndo_change_mtu = enic_change_mtu,
2111 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2112 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2113 .ndo_tx_timeout = enic_tx_timeout,
2114 .ndo_set_vf_port = enic_set_vf_port,
2115 .ndo_get_vf_port = enic_get_vf_port,
2116 .ndo_set_vf_mac = enic_set_vf_mac,
2117 #ifdef CONFIG_NET_POLL_CONTROLLER
2118 .ndo_poll_controller = enic_poll_controller,
2120 #ifdef CONFIG_RFS_ACCEL
2121 .ndo_rx_flow_steer = enic_rx_flow_steer,
2123 #ifdef CONFIG_NET_RX_BUSY_POLL
2124 .ndo_busy_poll = enic_busy_poll,
2128 static const struct net_device_ops enic_netdev_ops = {
2129 .ndo_open = enic_open,
2130 .ndo_stop = enic_stop,
2131 .ndo_start_xmit = enic_hard_start_xmit,
2132 .ndo_get_stats64 = enic_get_stats,
2133 .ndo_validate_addr = eth_validate_addr,
2134 .ndo_set_mac_address = enic_set_mac_address,
2135 .ndo_set_rx_mode = enic_set_rx_mode,
2136 .ndo_change_mtu = enic_change_mtu,
2137 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2138 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2139 .ndo_tx_timeout = enic_tx_timeout,
2140 .ndo_set_vf_port = enic_set_vf_port,
2141 .ndo_get_vf_port = enic_get_vf_port,
2142 .ndo_set_vf_mac = enic_set_vf_mac,
2143 #ifdef CONFIG_NET_POLL_CONTROLLER
2144 .ndo_poll_controller = enic_poll_controller,
2146 #ifdef CONFIG_RFS_ACCEL
2147 .ndo_rx_flow_steer = enic_rx_flow_steer,
2149 #ifdef CONFIG_NET_RX_BUSY_POLL
2150 .ndo_busy_poll = enic_busy_poll,
2154 static void enic_dev_deinit(struct enic *enic)
2158 for (i = 0; i < enic->rq_count; i++) {
2159 napi_hash_del(&enic->napi[i]);
2160 netif_napi_del(&enic->napi[i]);
2163 enic_free_vnic_resources(enic);
2164 enic_clear_intr_mode(enic);
2167 static int enic_dev_init(struct enic *enic)
2169 struct device *dev = enic_get_dev(enic);
2170 struct net_device *netdev = enic->netdev;
2174 /* Get interrupt coalesce timer info */
2175 err = enic_dev_intr_coal_timer_info(enic);
2177 dev_warn(dev, "Using default conversion factor for "
2178 "interrupt coalesce timer\n");
2179 vnic_dev_intr_coal_timer_info_default(enic->vdev);
2182 /* Get vNIC configuration
2185 err = enic_get_vnic_config(enic);
2187 dev_err(dev, "Get vNIC configuration failed, aborting\n");
2191 /* Get available resource counts
2194 enic_get_res_counts(enic);
2196 /* Set interrupt mode based on resource counts and system
2200 err = enic_set_intr_mode(enic);
2202 dev_err(dev, "Failed to set intr mode based on resource "
2203 "counts and system capabilities, aborting\n");
2207 /* Allocate and configure vNIC resources
2210 err = enic_alloc_vnic_resources(enic);
2212 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
2213 goto err_out_free_vnic_resources;
2216 enic_init_vnic_resources(enic);
2218 err = enic_set_rss_nic_cfg(enic);
2220 dev_err(dev, "Failed to config nic, aborting\n");
2221 goto err_out_free_vnic_resources;
2224 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2226 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
2227 napi_hash_add(&enic->napi[0]);
2229 case VNIC_DEV_INTR_MODE_MSIX:
2230 for (i = 0; i < enic->rq_count; i++) {
2231 netif_napi_add(netdev, &enic->napi[i],
2232 enic_poll_msix, 64);
2233 napi_hash_add(&enic->napi[i]);
2240 err_out_free_vnic_resources:
2241 enic_clear_intr_mode(enic);
2242 enic_free_vnic_resources(enic);
2247 static void enic_iounmap(struct enic *enic)
2251 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2252 if (enic->bar[i].vaddr)
2253 iounmap(enic->bar[i].vaddr);
2256 static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2258 struct device *dev = &pdev->dev;
2259 struct net_device *netdev;
2264 #ifdef CONFIG_PCI_IOV
2269 /* Allocate net device structure and initialize. Private
2270 * instance data is initialized to zero.
2273 netdev = alloc_etherdev_mqs(sizeof(struct enic),
2274 ENIC_RQ_MAX, ENIC_WQ_MAX);
2278 pci_set_drvdata(pdev, netdev);
2280 SET_NETDEV_DEV(netdev, &pdev->dev);
2282 enic = netdev_priv(netdev);
2283 enic->netdev = netdev;
2286 /* Setup PCI resources
2289 err = pci_enable_device_mem(pdev);
2291 dev_err(dev, "Cannot enable PCI device, aborting\n");
2292 goto err_out_free_netdev;
2295 err = pci_request_regions(pdev, DRV_NAME);
2297 dev_err(dev, "Cannot request PCI regions, aborting\n");
2298 goto err_out_disable_device;
2301 pci_set_master(pdev);
2303 /* Query PCI controller on system for DMA addressing
2304 * limitation for the device. Try 64-bit first, and
2308 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
2310 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2312 dev_err(dev, "No usable DMA configuration, aborting\n");
2313 goto err_out_release_regions;
2315 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2317 dev_err(dev, "Unable to obtain %u-bit DMA "
2318 "for consistent allocations, aborting\n", 32);
2319 goto err_out_release_regions;
2322 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
2324 dev_err(dev, "Unable to obtain %u-bit DMA "
2325 "for consistent allocations, aborting\n", 64);
2326 goto err_out_release_regions;
2331 /* Map vNIC resources from BAR0-5
2334 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2335 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2337 enic->bar[i].len = pci_resource_len(pdev, i);
2338 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2339 if (!enic->bar[i].vaddr) {
2340 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
2342 goto err_out_iounmap;
2344 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
2347 /* Register vNIC device
2350 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2351 ARRAY_SIZE(enic->bar));
2353 dev_err(dev, "vNIC registration failed, aborting\n");
2355 goto err_out_iounmap;
2358 #ifdef CONFIG_PCI_IOV
2359 /* Get number of subvnics */
2360 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
2362 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
2364 if (enic->num_vfs) {
2365 err = pci_enable_sriov(pdev, enic->num_vfs);
2367 dev_err(dev, "SRIOV enable failed, aborting."
2368 " pci_enable_sriov() returned %d\n",
2370 goto err_out_vnic_unregister;
2372 enic->priv_flags |= ENIC_SRIOV_ENABLED;
2373 num_pps = enic->num_vfs;
2378 /* Allocate structure for port profiles */
2379 enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
2382 goto err_out_disable_sriov_pp;
2385 /* Issue device open to get device in known state
2388 err = enic_dev_open(enic);
2390 dev_err(dev, "vNIC dev open failed, aborting\n");
2391 goto err_out_disable_sriov;
2394 /* Setup devcmd lock
2397 spin_lock_init(&enic->devcmd_lock);
2398 spin_lock_init(&enic->enic_api_lock);
2401 * Set ingress vlan rewrite mode before vnic initialization
2404 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2407 "Failed to set ingress vlan rewrite mode, aborting.\n");
2408 goto err_out_dev_close;
2411 /* Issue device init to initialize the vnic-to-switch link.
2412 * We'll start with carrier off and wait for link UP
2413 * notification later to turn on carrier. We don't need
2414 * to wait here for the vnic-to-switch link initialization
2415 * to complete; link UP notification is the indication that
2416 * the process is complete.
2419 netif_carrier_off(netdev);
2421 /* Do not call dev_init for a dynamic vnic.
2422 * For a dynamic vnic, init_prov_info will be
2423 * called later by an upper layer.
2426 if (!enic_is_dynamic(enic)) {
2427 err = vnic_dev_init(enic->vdev, 0);
2429 dev_err(dev, "vNIC dev init failed, aborting\n");
2430 goto err_out_dev_close;
2434 err = enic_dev_init(enic);
2436 dev_err(dev, "Device initialization failed, aborting\n");
2437 goto err_out_dev_close;
2440 netif_set_real_num_tx_queues(netdev, enic->wq_count);
2441 netif_set_real_num_rx_queues(netdev, enic->rq_count);
2443 /* Setup notification timer, HW reset task, and wq locks
2446 init_timer(&enic->notify_timer);
2447 enic->notify_timer.function = enic_notify_timer;
2448 enic->notify_timer.data = (unsigned long)enic;
2450 enic_set_rx_coal_setting(enic);
2451 INIT_WORK(&enic->reset, enic_reset);
2452 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
2454 for (i = 0; i < enic->wq_count; i++)
2455 spin_lock_init(&enic->wq_lock[i]);
2457 /* Register net device
2460 enic->port_mtu = enic->config.mtu;
2461 (void)enic_change_mtu(netdev, enic->port_mtu);
2463 err = enic_set_mac_addr(netdev, enic->mac_addr);
2465 dev_err(dev, "Invalid MAC address, aborting\n");
2466 goto err_out_dev_deinit;
2469 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2470 /* rx coalesce time already got initialized. This gets used
2471 * if adaptive coal is turned off
2473 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2475 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
2476 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2478 netdev->netdev_ops = &enic_netdev_ops;
2480 netdev->watchdog_timeo = 2 * HZ;
2481 enic_set_ethtool_ops(netdev);
2483 netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
2484 if (ENIC_SETTING(enic, LOOP)) {
2485 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2486 enic->loop_enable = 1;
2487 enic->loop_tag = enic->config.loop_tag;
2488 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2490 if (ENIC_SETTING(enic, TXCSUM))
2491 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2492 if (ENIC_SETTING(enic, TSO))
2493 netdev->hw_features |= NETIF_F_TSO |
2494 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
2495 if (ENIC_SETTING(enic, RSS))
2496 netdev->hw_features |= NETIF_F_RXHASH;
2497 if (ENIC_SETTING(enic, RXCSUM))
2498 netdev->hw_features |= NETIF_F_RXCSUM;
2500 netdev->features |= netdev->hw_features;
2502 #ifdef CONFIG_RFS_ACCEL
2503 netdev->hw_features |= NETIF_F_NTUPLE;
2507 netdev->features |= NETIF_F_HIGHDMA;
2509 netdev->priv_flags |= IFF_UNICAST_FLT;
2511 err = register_netdev(netdev);
2513 dev_err(dev, "Cannot register net device, aborting\n");
2514 goto err_out_dev_deinit;
2520 enic_dev_deinit(enic);
2522 vnic_dev_close(enic->vdev);
2523 err_out_disable_sriov:
2525 err_out_disable_sriov_pp:
2526 #ifdef CONFIG_PCI_IOV
2527 if (enic_sriov_enabled(enic)) {
2528 pci_disable_sriov(pdev);
2529 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2531 err_out_vnic_unregister:
2533 vnic_dev_unregister(enic->vdev);
2536 err_out_release_regions:
2537 pci_release_regions(pdev);
2538 err_out_disable_device:
2539 pci_disable_device(pdev);
2540 err_out_free_netdev:
2541 free_netdev(netdev);
2546 static void enic_remove(struct pci_dev *pdev)
2548 struct net_device *netdev = pci_get_drvdata(pdev);
2551 struct enic *enic = netdev_priv(netdev);
2553 cancel_work_sync(&enic->reset);
2554 cancel_work_sync(&enic->change_mtu_work);
2555 unregister_netdev(netdev);
2556 enic_dev_deinit(enic);
2557 vnic_dev_close(enic->vdev);
2558 #ifdef CONFIG_PCI_IOV
2559 if (enic_sriov_enabled(enic)) {
2560 pci_disable_sriov(pdev);
2561 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2565 vnic_dev_unregister(enic->vdev);
2567 pci_release_regions(pdev);
2568 pci_disable_device(pdev);
2569 free_netdev(netdev);
2573 static struct pci_driver enic_driver = {
2575 .id_table = enic_id_table,
2576 .probe = enic_probe,
2577 .remove = enic_remove,
2580 static int __init enic_init_module(void)
2582 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
2584 return pci_register_driver(&enic_driver);
2587 static void __exit enic_cleanup_module(void)
2589 pci_unregister_driver(&enic_driver);
2592 module_init(enic_init_module);
2593 module_exit(enic_cleanup_module);