net/mlx4_en: Add support for setting rxvlan offload OFF/ON
[cascardo/linux.git] / drivers / net / ethernet / mellanox / mlx4 / en_clock.c
1 /*
2  * Copyright (c) 2012 Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  *
32  */
33
34 #include <linux/mlx4/device.h>
35
36 #include "mlx4_en.h"
37
38 int mlx4_en_reset_config(struct net_device *dev,
39                          struct hwtstamp_config ts_config,
40                          netdev_features_t features)
41 {
42         struct mlx4_en_priv *priv = netdev_priv(dev);
43         struct mlx4_en_dev *mdev = priv->mdev;
44         int port_up = 0;
45         int err = 0;
46
47         if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
48             priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
49             !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX))
50                 return 0; /* Nothing to change */
51
52         if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
53             (features & NETIF_F_HW_VLAN_CTAG_RX) &&
54             (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
55                 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
56                 return -EINVAL;
57         }
58
59         mutex_lock(&mdev->state_lock);
60         if (priv->port_up) {
61                 port_up = 1;
62                 mlx4_en_stop_port(dev, 1);
63         }
64
65         mlx4_en_free_resources(priv);
66
67         en_warn(priv, "Changing device configuration rx filter(%x) rx vlan(%x)\n",
68                 ts_config.rx_filter, !!(features & NETIF_F_HW_VLAN_CTAG_RX));
69
70         priv->hwtstamp_config.tx_type = ts_config.tx_type;
71         priv->hwtstamp_config.rx_filter = ts_config.rx_filter;
72
73         if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
74                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
75                         dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
76                 else
77                         dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
78         } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
79                 /* RX time-stamping is OFF, update the RX vlan offload
80                  * to the latest wanted state
81                  */
82                 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
83                         dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
84                 else
85                         dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
86         }
87
88         /* RX vlan offload and RX time-stamping can't co-exist !
89          * Regardless of the caller's choice,
90          * Turn Off RX vlan offload in case of time-stamping is ON
91          */
92         if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
93                 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
94                         en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
95                 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
96         }
97
98         err = mlx4_en_alloc_resources(priv);
99         if (err) {
100                 en_err(priv, "Failed reallocating port resources\n");
101                 goto out;
102         }
103         if (port_up) {
104                 err = mlx4_en_start_port(dev);
105                 if (err)
106                         en_err(priv, "Failed starting port\n");
107         }
108
109 out:
110         mutex_unlock(&mdev->state_lock);
111         netdev_features_change(dev);
112         return err;
113 }
114
115 /* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)
116  */
117 static cycle_t mlx4_en_read_clock(const struct cyclecounter *tc)
118 {
119         struct mlx4_en_dev *mdev =
120                 container_of(tc, struct mlx4_en_dev, cycles);
121         struct mlx4_dev *dev = mdev->dev;
122
123         return mlx4_read_clock(dev) & tc->mask;
124 }
125
126 u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe)
127 {
128         u64 hi, lo;
129         struct mlx4_ts_cqe *ts_cqe = (struct mlx4_ts_cqe *)cqe;
130
131         lo = (u64)be16_to_cpu(ts_cqe->timestamp_lo);
132         hi = ((u64)be32_to_cpu(ts_cqe->timestamp_hi) + !lo) << 16;
133
134         return hi | lo;
135 }
136
137 void mlx4_en_fill_hwtstamps(struct mlx4_en_dev *mdev,
138                             struct skb_shared_hwtstamps *hwts,
139                             u64 timestamp)
140 {
141         unsigned long flags;
142         u64 nsec;
143
144         read_lock_irqsave(&mdev->clock_lock, flags);
145         nsec = timecounter_cyc2time(&mdev->clock, timestamp);
146         read_unlock_irqrestore(&mdev->clock_lock, flags);
147
148         memset(hwts, 0, sizeof(struct skb_shared_hwtstamps));
149         hwts->hwtstamp = ns_to_ktime(nsec);
150 }
151
152 /**
153  * mlx4_en_remove_timestamp - disable PTP device
154  * @mdev: board private structure
155  *
156  * Stop the PTP support.
157  **/
158 void mlx4_en_remove_timestamp(struct mlx4_en_dev *mdev)
159 {
160         if (mdev->ptp_clock) {
161                 ptp_clock_unregister(mdev->ptp_clock);
162                 mdev->ptp_clock = NULL;
163                 mlx4_info(mdev, "removed PHC\n");
164         }
165 }
166
167 void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev)
168 {
169         bool timeout = time_is_before_jiffies(mdev->last_overflow_check +
170                                               mdev->overflow_period);
171         unsigned long flags;
172
173         if (timeout) {
174                 write_lock_irqsave(&mdev->clock_lock, flags);
175                 timecounter_read(&mdev->clock);
176                 write_unlock_irqrestore(&mdev->clock_lock, flags);
177                 mdev->last_overflow_check = jiffies;
178         }
179 }
180
181 /**
182  * mlx4_en_phc_adjfreq - adjust the frequency of the hardware clock
183  * @ptp: ptp clock structure
184  * @delta: Desired frequency change in parts per billion
185  *
186  * Adjust the frequency of the PHC cycle counter by the indicated delta from
187  * the base frequency.
188  **/
189 static int mlx4_en_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
190 {
191         u64 adj;
192         u32 diff, mult;
193         int neg_adj = 0;
194         unsigned long flags;
195         struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
196                                                 ptp_clock_info);
197
198         if (delta < 0) {
199                 neg_adj = 1;
200                 delta = -delta;
201         }
202         mult = mdev->nominal_c_mult;
203         adj = mult;
204         adj *= delta;
205         diff = div_u64(adj, 1000000000ULL);
206
207         write_lock_irqsave(&mdev->clock_lock, flags);
208         timecounter_read(&mdev->clock);
209         mdev->cycles.mult = neg_adj ? mult - diff : mult + diff;
210         write_unlock_irqrestore(&mdev->clock_lock, flags);
211
212         return 0;
213 }
214
215 /**
216  * mlx4_en_phc_adjtime - Shift the time of the hardware clock
217  * @ptp: ptp clock structure
218  * @delta: Desired change in nanoseconds
219  *
220  * Adjust the timer by resetting the timecounter structure.
221  **/
222 static int mlx4_en_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
223 {
224         struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
225                                                 ptp_clock_info);
226         unsigned long flags;
227         s64 now;
228
229         write_lock_irqsave(&mdev->clock_lock, flags);
230         now = timecounter_read(&mdev->clock);
231         now += delta;
232         timecounter_init(&mdev->clock, &mdev->cycles, now);
233         write_unlock_irqrestore(&mdev->clock_lock, flags);
234
235         return 0;
236 }
237
238 /**
239  * mlx4_en_phc_gettime - Reads the current time from the hardware clock
240  * @ptp: ptp clock structure
241  * @ts: timespec structure to hold the current time value
242  *
243  * Read the timecounter and return the correct value in ns after converting
244  * it into a struct timespec.
245  **/
246 static int mlx4_en_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
247 {
248         struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
249                                                 ptp_clock_info);
250         unsigned long flags;
251         u32 remainder;
252         u64 ns;
253
254         write_lock_irqsave(&mdev->clock_lock, flags);
255         ns = timecounter_read(&mdev->clock);
256         write_unlock_irqrestore(&mdev->clock_lock, flags);
257
258         ts->tv_sec = div_u64_rem(ns, NSEC_PER_SEC, &remainder);
259         ts->tv_nsec = remainder;
260
261         return 0;
262 }
263
264 /**
265  * mlx4_en_phc_settime - Set the current time on the hardware clock
266  * @ptp: ptp clock structure
267  * @ts: timespec containing the new time for the cycle counter
268  *
269  * Reset the timecounter to use a new base value instead of the kernel
270  * wall timer value.
271  **/
272 static int mlx4_en_phc_settime(struct ptp_clock_info *ptp,
273                                const struct timespec *ts)
274 {
275         struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
276                                                 ptp_clock_info);
277         u64 ns = timespec_to_ns(ts);
278         unsigned long flags;
279
280         /* reset the timecounter */
281         write_lock_irqsave(&mdev->clock_lock, flags);
282         timecounter_init(&mdev->clock, &mdev->cycles, ns);
283         write_unlock_irqrestore(&mdev->clock_lock, flags);
284
285         return 0;
286 }
287
288 /**
289  * mlx4_en_phc_enable - enable or disable an ancillary feature
290  * @ptp: ptp clock structure
291  * @request: Desired resource to enable or disable
292  * @on: Caller passes one to enable or zero to disable
293  *
294  * Enable (or disable) ancillary features of the PHC subsystem.
295  * Currently, no ancillary features are supported.
296  **/
297 static int mlx4_en_phc_enable(struct ptp_clock_info __always_unused *ptp,
298                               struct ptp_clock_request __always_unused *request,
299                               int __always_unused on)
300 {
301         return -EOPNOTSUPP;
302 }
303
304 static const struct ptp_clock_info mlx4_en_ptp_clock_info = {
305         .owner          = THIS_MODULE,
306         .max_adj        = 100000000,
307         .n_alarm        = 0,
308         .n_ext_ts       = 0,
309         .n_per_out      = 0,
310         .n_pins         = 0,
311         .pps            = 0,
312         .adjfreq        = mlx4_en_phc_adjfreq,
313         .adjtime        = mlx4_en_phc_adjtime,
314         .gettime        = mlx4_en_phc_gettime,
315         .settime        = mlx4_en_phc_settime,
316         .enable         = mlx4_en_phc_enable,
317 };
318
319 void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev)
320 {
321         struct mlx4_dev *dev = mdev->dev;
322         unsigned long flags;
323         u64 ns;
324
325         rwlock_init(&mdev->clock_lock);
326
327         memset(&mdev->cycles, 0, sizeof(mdev->cycles));
328         mdev->cycles.read = mlx4_en_read_clock;
329         mdev->cycles.mask = CLOCKSOURCE_MASK(48);
330         /* Using shift to make calculation more accurate. Since current HW
331          * clock frequency is 427 MHz, and cycles are given using a 48 bits
332          * register, the biggest shift when calculating using u64, is 14
333          * (max_cycles * multiplier < 2^64)
334          */
335         mdev->cycles.shift = 14;
336         mdev->cycles.mult =
337                 clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift);
338         mdev->nominal_c_mult = mdev->cycles.mult;
339
340         write_lock_irqsave(&mdev->clock_lock, flags);
341         timecounter_init(&mdev->clock, &mdev->cycles,
342                          ktime_to_ns(ktime_get_real()));
343         write_unlock_irqrestore(&mdev->clock_lock, flags);
344
345         /* Calculate period in seconds to call the overflow watchdog - to make
346          * sure counter is checked at least once every wrap around.
347          */
348         ns = cyclecounter_cyc2ns(&mdev->cycles, mdev->cycles.mask);
349         do_div(ns, NSEC_PER_SEC / 2 / HZ);
350         mdev->overflow_period = ns;
351
352         /* Configure the PHC */
353         mdev->ptp_clock_info = mlx4_en_ptp_clock_info;
354         snprintf(mdev->ptp_clock_info.name, 16, "mlx4 ptp");
355
356         mdev->ptp_clock = ptp_clock_register(&mdev->ptp_clock_info,
357                                              &mdev->pdev->dev);
358         if (IS_ERR(mdev->ptp_clock)) {
359                 mdev->ptp_clock = NULL;
360                 mlx4_err(mdev, "ptp_clock_register failed\n");
361         } else {
362                 mlx4_info(mdev, "registered PHC clock\n");
363         }
364
365 }