net/mlx4_en: Add resilience in low memory systems
[cascardo/linux.git] / drivers / net / ethernet / mellanox / mlx4 / en_ethtool.c
1 /*
2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  *
32  */
33
34 #include <linux/kernel.h>
35 #include <linux/ethtool.h>
36 #include <linux/netdevice.h>
37 #include <linux/mlx4/driver.h>
38 #include <linux/mlx4/device.h>
39 #include <linux/in.h>
40 #include <net/ip.h>
41 #include <linux/bitmap.h>
42
43 #include "mlx4_en.h"
44 #include "en_port.h"
45
46 #define EN_ETHTOOL_QP_ATTACH (1ull << 63)
47 #define EN_ETHTOOL_SHORT_MASK cpu_to_be16(0xffff)
48 #define EN_ETHTOOL_WORD_MASK  cpu_to_be32(0xffffffff)
49
50 static int mlx4_en_moderation_update(struct mlx4_en_priv *priv)
51 {
52         int i;
53         int err = 0;
54
55         for (i = 0; i < priv->tx_ring_num; i++) {
56                 priv->tx_cq[i]->moder_cnt = priv->tx_frames;
57                 priv->tx_cq[i]->moder_time = priv->tx_usecs;
58                 if (priv->port_up) {
59                         err = mlx4_en_set_cq_moder(priv, priv->tx_cq[i]);
60                         if (err)
61                                 return err;
62                 }
63         }
64
65         if (priv->adaptive_rx_coal)
66                 return 0;
67
68         for (i = 0; i < priv->rx_ring_num; i++) {
69                 priv->rx_cq[i]->moder_cnt = priv->rx_frames;
70                 priv->rx_cq[i]->moder_time = priv->rx_usecs;
71                 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
72                 if (priv->port_up) {
73                         err = mlx4_en_set_cq_moder(priv, priv->rx_cq[i]);
74                         if (err)
75                                 return err;
76                 }
77         }
78
79         return err;
80 }
81
82 static void
83 mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
84 {
85         struct mlx4_en_priv *priv = netdev_priv(dev);
86         struct mlx4_en_dev *mdev = priv->mdev;
87
88         strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
89         strlcpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")",
90                 sizeof(drvinfo->version));
91         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
92                 "%d.%d.%d",
93                 (u16) (mdev->dev->caps.fw_ver >> 32),
94                 (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
95                 (u16) (mdev->dev->caps.fw_ver & 0xffff));
96         strlcpy(drvinfo->bus_info, pci_name(mdev->dev->persist->pdev),
97                 sizeof(drvinfo->bus_info));
98 }
99
100 static const char mlx4_en_priv_flags[][ETH_GSTRING_LEN] = {
101         "blueflame",
102         "phv-bit"
103 };
104
105 static const char main_strings[][ETH_GSTRING_LEN] = {
106         /* main statistics */
107         "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
108         "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
109         "rx_length_errors", "rx_over_errors", "rx_crc_errors",
110         "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
111         "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
112         "tx_heartbeat_errors", "tx_window_errors",
113
114         /* port statistics */
115         "tso_packets",
116         "xmit_more",
117         "queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_failed",
118         "rx_csum_good", "rx_csum_none", "rx_csum_complete", "tx_chksum_offload",
119
120         /* pf statistics */
121         "pf_rx_packets",
122         "pf_rx_bytes",
123         "pf_tx_packets",
124         "pf_tx_bytes",
125
126         /* priority flow control statistics rx */
127         "rx_pause_prio_0", "rx_pause_duration_prio_0",
128         "rx_pause_transition_prio_0",
129         "rx_pause_prio_1", "rx_pause_duration_prio_1",
130         "rx_pause_transition_prio_1",
131         "rx_pause_prio_2", "rx_pause_duration_prio_2",
132         "rx_pause_transition_prio_2",
133         "rx_pause_prio_3", "rx_pause_duration_prio_3",
134         "rx_pause_transition_prio_3",
135         "rx_pause_prio_4", "rx_pause_duration_prio_4",
136         "rx_pause_transition_prio_4",
137         "rx_pause_prio_5", "rx_pause_duration_prio_5",
138         "rx_pause_transition_prio_5",
139         "rx_pause_prio_6", "rx_pause_duration_prio_6",
140         "rx_pause_transition_prio_6",
141         "rx_pause_prio_7", "rx_pause_duration_prio_7",
142         "rx_pause_transition_prio_7",
143
144         /* flow control statistics rx */
145         "rx_pause", "rx_pause_duration", "rx_pause_transition",
146
147         /* priority flow control statistics tx */
148         "tx_pause_prio_0", "tx_pause_duration_prio_0",
149         "tx_pause_transition_prio_0",
150         "tx_pause_prio_1", "tx_pause_duration_prio_1",
151         "tx_pause_transition_prio_1",
152         "tx_pause_prio_2", "tx_pause_duration_prio_2",
153         "tx_pause_transition_prio_2",
154         "tx_pause_prio_3", "tx_pause_duration_prio_3",
155         "tx_pause_transition_prio_3",
156         "tx_pause_prio_4", "tx_pause_duration_prio_4",
157         "tx_pause_transition_prio_4",
158         "tx_pause_prio_5", "tx_pause_duration_prio_5",
159         "tx_pause_transition_prio_5",
160         "tx_pause_prio_6", "tx_pause_duration_prio_6",
161         "tx_pause_transition_prio_6",
162         "tx_pause_prio_7", "tx_pause_duration_prio_7",
163         "tx_pause_transition_prio_7",
164
165         /* flow control statistics tx */
166         "tx_pause", "tx_pause_duration", "tx_pause_transition",
167
168         /* packet statistics */
169         "rx_multicast_packets",
170         "rx_broadcast_packets",
171         "rx_jabbers",
172         "rx_in_range_length_error",
173         "rx_out_range_length_error",
174         "tx_multicast_packets",
175         "tx_broadcast_packets",
176         "rx_prio_0_packets", "rx_prio_0_bytes",
177         "rx_prio_1_packets", "rx_prio_1_bytes",
178         "rx_prio_2_packets", "rx_prio_2_bytes",
179         "rx_prio_3_packets", "rx_prio_3_bytes",
180         "rx_prio_4_packets", "rx_prio_4_bytes",
181         "rx_prio_5_packets", "rx_prio_5_bytes",
182         "rx_prio_6_packets", "rx_prio_6_bytes",
183         "rx_prio_7_packets", "rx_prio_7_bytes",
184         "rx_novlan_packets", "rx_novlan_bytes",
185         "tx_prio_0_packets", "tx_prio_0_bytes",
186         "tx_prio_1_packets", "tx_prio_1_bytes",
187         "tx_prio_2_packets", "tx_prio_2_bytes",
188         "tx_prio_3_packets", "tx_prio_3_bytes",
189         "tx_prio_4_packets", "tx_prio_4_bytes",
190         "tx_prio_5_packets", "tx_prio_5_bytes",
191         "tx_prio_6_packets", "tx_prio_6_bytes",
192         "tx_prio_7_packets", "tx_prio_7_bytes",
193         "tx_novlan_packets", "tx_novlan_bytes",
194
195 };
196
197 static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {
198         "Interrupt Test",
199         "Link Test",
200         "Speed Test",
201         "Register Test",
202         "Loopback Test",
203 };
204
205 static u32 mlx4_en_get_msglevel(struct net_device *dev)
206 {
207         return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
208 }
209
210 static void mlx4_en_set_msglevel(struct net_device *dev, u32 val)
211 {
212         ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
213 }
214
215 static void mlx4_en_get_wol(struct net_device *netdev,
216                             struct ethtool_wolinfo *wol)
217 {
218         struct mlx4_en_priv *priv = netdev_priv(netdev);
219         int err = 0;
220         u64 config = 0;
221         u64 mask;
222
223         if ((priv->port < 1) || (priv->port > 2)) {
224                 en_err(priv, "Failed to get WoL information\n");
225                 return;
226         }
227
228         mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
229                 MLX4_DEV_CAP_FLAG_WOL_PORT2;
230
231         if (!(priv->mdev->dev->caps.flags & mask)) {
232                 wol->supported = 0;
233                 wol->wolopts = 0;
234                 return;
235         }
236
237         err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
238         if (err) {
239                 en_err(priv, "Failed to get WoL information\n");
240                 return;
241         }
242
243         if (config & MLX4_EN_WOL_MAGIC)
244                 wol->supported = WAKE_MAGIC;
245         else
246                 wol->supported = 0;
247
248         if (config & MLX4_EN_WOL_ENABLED)
249                 wol->wolopts = WAKE_MAGIC;
250         else
251                 wol->wolopts = 0;
252 }
253
254 static int mlx4_en_set_wol(struct net_device *netdev,
255                             struct ethtool_wolinfo *wol)
256 {
257         struct mlx4_en_priv *priv = netdev_priv(netdev);
258         u64 config = 0;
259         int err = 0;
260         u64 mask;
261
262         if ((priv->port < 1) || (priv->port > 2))
263                 return -EOPNOTSUPP;
264
265         mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
266                 MLX4_DEV_CAP_FLAG_WOL_PORT2;
267
268         if (!(priv->mdev->dev->caps.flags & mask))
269                 return -EOPNOTSUPP;
270
271         if (wol->supported & ~WAKE_MAGIC)
272                 return -EINVAL;
273
274         err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
275         if (err) {
276                 en_err(priv, "Failed to get WoL info, unable to modify\n");
277                 return err;
278         }
279
280         if (wol->wolopts & WAKE_MAGIC) {
281                 config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED |
282                                 MLX4_EN_WOL_MAGIC;
283         } else {
284                 config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC);
285                 config |= MLX4_EN_WOL_DO_MODIFY;
286         }
287
288         err = mlx4_wol_write(priv->mdev->dev, config, priv->port);
289         if (err)
290                 en_err(priv, "Failed to set WoL information\n");
291
292         return err;
293 }
294
295 struct bitmap_iterator {
296         unsigned long *stats_bitmap;
297         unsigned int count;
298         unsigned int iterator;
299         bool advance_array; /* if set, force no increments */
300 };
301
302 static inline void bitmap_iterator_init(struct bitmap_iterator *h,
303                                         unsigned long *stats_bitmap,
304                                         int count)
305 {
306         h->iterator = 0;
307         h->advance_array = !bitmap_empty(stats_bitmap, count);
308         h->count = h->advance_array ? bitmap_weight(stats_bitmap, count)
309                 : count;
310         h->stats_bitmap = stats_bitmap;
311 }
312
313 static inline int bitmap_iterator_test(struct bitmap_iterator *h)
314 {
315         return !h->advance_array ? 1 : test_bit(h->iterator, h->stats_bitmap);
316 }
317
318 static inline int bitmap_iterator_inc(struct bitmap_iterator *h)
319 {
320         return h->iterator++;
321 }
322
323 static inline unsigned int
324 bitmap_iterator_count(struct bitmap_iterator *h)
325 {
326         return h->count;
327 }
328
329 static int mlx4_en_get_sset_count(struct net_device *dev, int sset)
330 {
331         struct mlx4_en_priv *priv = netdev_priv(dev);
332         struct bitmap_iterator it;
333
334         bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
335
336         switch (sset) {
337         case ETH_SS_STATS:
338                 return bitmap_iterator_count(&it) +
339                         (priv->tx_ring_num * 2) +
340                         (priv->rx_ring_num * 3);
341         case ETH_SS_TEST:
342                 return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags
343                                         & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2;
344         case ETH_SS_PRIV_FLAGS:
345                 return ARRAY_SIZE(mlx4_en_priv_flags);
346         default:
347                 return -EOPNOTSUPP;
348         }
349 }
350
351 static void mlx4_en_get_ethtool_stats(struct net_device *dev,
352                 struct ethtool_stats *stats, uint64_t *data)
353 {
354         struct mlx4_en_priv *priv = netdev_priv(dev);
355         int index = 0;
356         int i;
357         struct bitmap_iterator it;
358
359         bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
360
361         spin_lock_bh(&priv->stats_lock);
362
363         for (i = 0; i < NUM_MAIN_STATS; i++, bitmap_iterator_inc(&it))
364                 if (bitmap_iterator_test(&it))
365                         data[index++] = ((unsigned long *)&dev->stats)[i];
366
367         for (i = 0; i < NUM_PORT_STATS; i++, bitmap_iterator_inc(&it))
368                 if (bitmap_iterator_test(&it))
369                         data[index++] = ((unsigned long *)&priv->port_stats)[i];
370
371         for (i = 0; i < NUM_PF_STATS; i++, bitmap_iterator_inc(&it))
372                 if (bitmap_iterator_test(&it))
373                         data[index++] =
374                                 ((unsigned long *)&priv->pf_stats)[i];
375
376         for (i = 0; i < NUM_FLOW_PRIORITY_STATS_RX;
377              i++, bitmap_iterator_inc(&it))
378                 if (bitmap_iterator_test(&it))
379                         data[index++] =
380                                 ((u64 *)&priv->rx_priority_flowstats)[i];
381
382         for (i = 0; i < NUM_FLOW_STATS_RX; i++, bitmap_iterator_inc(&it))
383                 if (bitmap_iterator_test(&it))
384                         data[index++] = ((u64 *)&priv->rx_flowstats)[i];
385
386         for (i = 0; i < NUM_FLOW_PRIORITY_STATS_TX;
387              i++, bitmap_iterator_inc(&it))
388                 if (bitmap_iterator_test(&it))
389                         data[index++] =
390                                 ((u64 *)&priv->tx_priority_flowstats)[i];
391
392         for (i = 0; i < NUM_FLOW_STATS_TX; i++, bitmap_iterator_inc(&it))
393                 if (bitmap_iterator_test(&it))
394                         data[index++] = ((u64 *)&priv->tx_flowstats)[i];
395
396         for (i = 0; i < NUM_PKT_STATS; i++, bitmap_iterator_inc(&it))
397                 if (bitmap_iterator_test(&it))
398                         data[index++] = ((unsigned long *)&priv->pkstats)[i];
399
400         for (i = 0; i < priv->tx_ring_num; i++) {
401                 data[index++] = priv->tx_ring[i]->packets;
402                 data[index++] = priv->tx_ring[i]->bytes;
403         }
404         for (i = 0; i < priv->rx_ring_num; i++) {
405                 data[index++] = priv->rx_ring[i]->packets;
406                 data[index++] = priv->rx_ring[i]->bytes;
407                 data[index++] = priv->rx_ring[i]->dropped;
408         }
409         spin_unlock_bh(&priv->stats_lock);
410
411 }
412
413 static void mlx4_en_self_test(struct net_device *dev,
414                               struct ethtool_test *etest, u64 *buf)
415 {
416         mlx4_en_ex_selftest(dev, &etest->flags, buf);
417 }
418
419 static void mlx4_en_get_strings(struct net_device *dev,
420                                 uint32_t stringset, uint8_t *data)
421 {
422         struct mlx4_en_priv *priv = netdev_priv(dev);
423         int index = 0;
424         int i, strings = 0;
425         struct bitmap_iterator it;
426
427         bitmap_iterator_init(&it, priv->stats_bitmap.bitmap, NUM_ALL_STATS);
428
429         switch (stringset) {
430         case ETH_SS_TEST:
431                 for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++)
432                         strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
433                 if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK)
434                         for (; i < MLX4_EN_NUM_SELF_TEST; i++)
435                                 strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
436                 break;
437
438         case ETH_SS_STATS:
439                 /* Add main counters */
440                 for (i = 0; i < NUM_MAIN_STATS; i++, strings++,
441                      bitmap_iterator_inc(&it))
442                         if (bitmap_iterator_test(&it))
443                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
444                                        main_strings[strings]);
445
446                 for (i = 0; i < NUM_PORT_STATS; i++, strings++,
447                      bitmap_iterator_inc(&it))
448                         if (bitmap_iterator_test(&it))
449                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
450                                        main_strings[strings]);
451
452                 for (i = 0; i < NUM_PF_STATS; i++, strings++,
453                      bitmap_iterator_inc(&it))
454                         if (bitmap_iterator_test(&it))
455                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
456                                        main_strings[strings]);
457
458                 for (i = 0; i < NUM_FLOW_STATS; i++, strings++,
459                      bitmap_iterator_inc(&it))
460                         if (bitmap_iterator_test(&it))
461                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
462                                        main_strings[strings]);
463
464                 for (i = 0; i < NUM_PKT_STATS; i++, strings++,
465                      bitmap_iterator_inc(&it))
466                         if (bitmap_iterator_test(&it))
467                                 strcpy(data + (index++) * ETH_GSTRING_LEN,
468                                        main_strings[strings]);
469
470                 for (i = 0; i < priv->tx_ring_num; i++) {
471                         sprintf(data + (index++) * ETH_GSTRING_LEN,
472                                 "tx%d_packets", i);
473                         sprintf(data + (index++) * ETH_GSTRING_LEN,
474                                 "tx%d_bytes", i);
475                 }
476                 for (i = 0; i < priv->rx_ring_num; i++) {
477                         sprintf(data + (index++) * ETH_GSTRING_LEN,
478                                 "rx%d_packets", i);
479                         sprintf(data + (index++) * ETH_GSTRING_LEN,
480                                 "rx%d_bytes", i);
481                         sprintf(data + (index++) * ETH_GSTRING_LEN,
482                                 "rx%d_dropped", i);
483                 }
484                 break;
485         case ETH_SS_PRIV_FLAGS:
486                 for (i = 0; i < ARRAY_SIZE(mlx4_en_priv_flags); i++)
487                         strcpy(data + i * ETH_GSTRING_LEN,
488                                mlx4_en_priv_flags[i]);
489                 break;
490
491         }
492 }
493
494 static u32 mlx4_en_autoneg_get(struct net_device *dev)
495 {
496         struct mlx4_en_priv *priv = netdev_priv(dev);
497         struct mlx4_en_dev *mdev = priv->mdev;
498         u32 autoneg = AUTONEG_DISABLE;
499
500         if ((mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP) &&
501             (priv->port_state.flags & MLX4_EN_PORT_ANE))
502                 autoneg = AUTONEG_ENABLE;
503
504         return autoneg;
505 }
506
507 static void ptys2ethtool_update_supported_port(unsigned long *mask,
508                                                struct mlx4_ptys_reg *ptys_reg)
509 {
510         u32 eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap);
511
512         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T)
513                          | MLX4_PROT_MASK(MLX4_1000BASE_T)
514                          | MLX4_PROT_MASK(MLX4_100BASE_TX))) {
515                 __set_bit(ETHTOOL_LINK_MODE_TP_BIT, mask);
516         } else if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR)
517                          | MLX4_PROT_MASK(MLX4_10GBASE_SR)
518                          | MLX4_PROT_MASK(MLX4_56GBASE_SR4)
519                          | MLX4_PROT_MASK(MLX4_40GBASE_CR4)
520                          | MLX4_PROT_MASK(MLX4_40GBASE_SR4)
521                          | MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) {
522                 __set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, mask);
523         } else if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4)
524                          | MLX4_PROT_MASK(MLX4_40GBASE_KR4)
525                          | MLX4_PROT_MASK(MLX4_20GBASE_KR2)
526                          | MLX4_PROT_MASK(MLX4_10GBASE_KR)
527                          | MLX4_PROT_MASK(MLX4_10GBASE_KX4)
528                          | MLX4_PROT_MASK(MLX4_1000BASE_KX))) {
529                 __set_bit(ETHTOOL_LINK_MODE_Backplane_BIT, mask);
530         }
531 }
532
533 static u32 ptys_get_active_port(struct mlx4_ptys_reg *ptys_reg)
534 {
535         u32 eth_proto = be32_to_cpu(ptys_reg->eth_proto_oper);
536
537         if (!eth_proto) /* link down */
538                 eth_proto = be32_to_cpu(ptys_reg->eth_proto_cap);
539
540         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_T)
541                          | MLX4_PROT_MASK(MLX4_1000BASE_T)
542                          | MLX4_PROT_MASK(MLX4_100BASE_TX))) {
543                         return PORT_TP;
544         }
545
546         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_SR)
547                          | MLX4_PROT_MASK(MLX4_56GBASE_SR4)
548                          | MLX4_PROT_MASK(MLX4_40GBASE_SR4)
549                          | MLX4_PROT_MASK(MLX4_1000BASE_CX_SGMII))) {
550                         return PORT_FIBRE;
551         }
552
553         if (eth_proto & (MLX4_PROT_MASK(MLX4_10GBASE_CR)
554                          | MLX4_PROT_MASK(MLX4_56GBASE_CR4)
555                          | MLX4_PROT_MASK(MLX4_40GBASE_CR4))) {
556                         return PORT_DA;
557         }
558
559         if (eth_proto & (MLX4_PROT_MASK(MLX4_56GBASE_KR4)
560                          | MLX4_PROT_MASK(MLX4_40GBASE_KR4)
561                          | MLX4_PROT_MASK(MLX4_20GBASE_KR2)
562                          | MLX4_PROT_MASK(MLX4_10GBASE_KR)
563                          | MLX4_PROT_MASK(MLX4_10GBASE_KX4)
564                          | MLX4_PROT_MASK(MLX4_1000BASE_KX))) {
565                         return PORT_NONE;
566         }
567         return PORT_OTHER;
568 }
569
570 #define MLX4_LINK_MODES_SZ \
571         (FIELD_SIZEOF(struct mlx4_ptys_reg, eth_proto_cap) * 8)
572
573 enum ethtool_report {
574         SUPPORTED = 0,
575         ADVERTISED = 1,
576 };
577
578 struct ptys2ethtool_config {
579         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
580         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
581         u32 speed;
582 };
583
584 static unsigned long *ptys2ethtool_link_mode(struct ptys2ethtool_config *cfg,
585                                              enum ethtool_report report)
586 {
587         switch (report) {
588         case SUPPORTED:
589                 return cfg->supported;
590         case ADVERTISED:
591                 return cfg->advertised;
592         }
593         return NULL;
594 }
595
596 #define MLX4_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...)               \
597         ({                                                              \
598                 struct ptys2ethtool_config *cfg;                        \
599                 const unsigned int modes[] = { __VA_ARGS__ };           \
600                 unsigned int i;                                         \
601                 cfg = &ptys2ethtool_map[reg_];                          \
602                 cfg->speed = speed_;                                    \
603                 bitmap_zero(cfg->supported,                             \
604                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
605                 bitmap_zero(cfg->advertised,                            \
606                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
607                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
608                         __set_bit(modes[i], cfg->supported);            \
609                         __set_bit(modes[i], cfg->advertised);           \
610                 }                                                       \
611         })
612
613 /* Translates mlx4 link mode to equivalent ethtool Link modes/speed */
614 static struct ptys2ethtool_config ptys2ethtool_map[MLX4_LINK_MODES_SZ];
615
616 void __init mlx4_en_init_ptys2ethtool_map(void)
617 {
618         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_100BASE_TX, SPEED_100,
619                                        ETHTOOL_LINK_MODE_100baseT_Full_BIT);
620         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_T, SPEED_1000,
621                                        ETHTOOL_LINK_MODE_1000baseT_Full_BIT);
622         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_CX_SGMII, SPEED_1000,
623                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
624         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_KX, SPEED_1000,
625                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
626         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_T, SPEED_10000,
627                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
628         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_CX4, SPEED_10000,
629                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
630         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_KX4, SPEED_10000,
631                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
632         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_KR, SPEED_10000,
633                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
634         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_CR, SPEED_10000,
635                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
636         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_SR, SPEED_10000,
637                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
638         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_20GBASE_KR2, SPEED_20000,
639                                        ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT,
640                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
641         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_40GBASE_CR4, SPEED_40000,
642                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
643         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_40GBASE_KR4, SPEED_40000,
644                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
645         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_40GBASE_SR4, SPEED_40000,
646                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
647         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_56GBASE_KR4, SPEED_56000,
648                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
649         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_56GBASE_CR4, SPEED_56000,
650                                        ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT);
651         MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_56GBASE_SR4, SPEED_56000,
652                                        ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT);
653 };
654
655 static void ptys2ethtool_update_link_modes(unsigned long *link_modes,
656                                            u32 eth_proto,
657                                            enum ethtool_report report)
658 {
659         int i;
660         for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
661                 if (eth_proto & MLX4_PROT_MASK(i))
662                         bitmap_or(link_modes, link_modes,
663                                   ptys2ethtool_link_mode(&ptys2ethtool_map[i],
664                                                          report),
665                                   __ETHTOOL_LINK_MODE_MASK_NBITS);
666         }
667 }
668
669 static u32 ethtool2ptys_link_modes(const unsigned long *link_modes,
670                                    enum ethtool_report report)
671 {
672         int i;
673         u32 ptys_modes = 0;
674
675         for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
676                 if (bitmap_intersects(
677                             ptys2ethtool_link_mode(&ptys2ethtool_map[i],
678                                                    report),
679                             link_modes,
680                             __ETHTOOL_LINK_MODE_MASK_NBITS))
681                         ptys_modes |= 1 << i;
682         }
683         return ptys_modes;
684 }
685
686 /* Convert actual speed (SPEED_XXX) to ptys link modes */
687 static u32 speed2ptys_link_modes(u32 speed)
688 {
689         int i;
690         u32 ptys_modes = 0;
691
692         for (i = 0; i < MLX4_LINK_MODES_SZ; i++) {
693                 if (ptys2ethtool_map[i].speed == speed)
694                         ptys_modes |= 1 << i;
695         }
696         return ptys_modes;
697 }
698
699 static int
700 ethtool_get_ptys_link_ksettings(struct net_device *dev,
701                                 struct ethtool_link_ksettings *link_ksettings)
702 {
703         struct mlx4_en_priv *priv = netdev_priv(dev);
704         struct mlx4_ptys_reg ptys_reg;
705         u32 eth_proto;
706         int ret;
707
708         memset(&ptys_reg, 0, sizeof(ptys_reg));
709         ptys_reg.local_port = priv->port;
710         ptys_reg.proto_mask = MLX4_PTYS_EN;
711         ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev,
712                                    MLX4_ACCESS_REG_QUERY, &ptys_reg);
713         if (ret) {
714                 en_warn(priv, "Failed to run mlx4_ACCESS_PTYS_REG status(%x)",
715                         ret);
716                 return ret;
717         }
718         en_dbg(DRV, priv, "ptys_reg.proto_mask       %x\n",
719                ptys_reg.proto_mask);
720         en_dbg(DRV, priv, "ptys_reg.eth_proto_cap    %x\n",
721                be32_to_cpu(ptys_reg.eth_proto_cap));
722         en_dbg(DRV, priv, "ptys_reg.eth_proto_admin  %x\n",
723                be32_to_cpu(ptys_reg.eth_proto_admin));
724         en_dbg(DRV, priv, "ptys_reg.eth_proto_oper   %x\n",
725                be32_to_cpu(ptys_reg.eth_proto_oper));
726         en_dbg(DRV, priv, "ptys_reg.eth_proto_lp_adv %x\n",
727                be32_to_cpu(ptys_reg.eth_proto_lp_adv));
728
729         /* reset supported/advertising masks */
730         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
731         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
732
733         ptys2ethtool_update_supported_port(link_ksettings->link_modes.supported,
734                                            &ptys_reg);
735
736         eth_proto = be32_to_cpu(ptys_reg.eth_proto_cap);
737         ptys2ethtool_update_link_modes(link_ksettings->link_modes.supported,
738                                        eth_proto, SUPPORTED);
739
740         eth_proto = be32_to_cpu(ptys_reg.eth_proto_admin);
741         ptys2ethtool_update_link_modes(link_ksettings->link_modes.advertising,
742                                        eth_proto, ADVERTISED);
743
744         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
745                                              Pause);
746         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
747                                              Asym_Pause);
748
749         if (priv->prof->tx_pause)
750                 ethtool_link_ksettings_add_link_mode(link_ksettings,
751                                                      advertising, Pause);
752         if (priv->prof->tx_pause ^ priv->prof->rx_pause)
753                 ethtool_link_ksettings_add_link_mode(link_ksettings,
754                                                      advertising, Asym_Pause);
755
756         link_ksettings->base.port = ptys_get_active_port(&ptys_reg);
757
758         if (mlx4_en_autoneg_get(dev)) {
759                 ethtool_link_ksettings_add_link_mode(link_ksettings,
760                                                      supported, Autoneg);
761                 ethtool_link_ksettings_add_link_mode(link_ksettings,
762                                                      advertising, Autoneg);
763         }
764
765         link_ksettings->base.autoneg
766                 = (priv->port_state.flags & MLX4_EN_PORT_ANC) ?
767                 AUTONEG_ENABLE : AUTONEG_DISABLE;
768
769         eth_proto = be32_to_cpu(ptys_reg.eth_proto_lp_adv);
770
771         ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising);
772         ptys2ethtool_update_link_modes(
773                 link_ksettings->link_modes.lp_advertising,
774                 eth_proto, ADVERTISED);
775         if (priv->port_state.flags & MLX4_EN_PORT_ANC)
776                 ethtool_link_ksettings_add_link_mode(link_ksettings,
777                                                      lp_advertising, Autoneg);
778
779         link_ksettings->base.phy_address = 0;
780         link_ksettings->base.mdio_support = 0;
781         link_ksettings->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
782         link_ksettings->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
783
784         return ret;
785 }
786
787 static void
788 ethtool_get_default_link_ksettings(
789         struct net_device *dev, struct ethtool_link_ksettings *link_ksettings)
790 {
791         struct mlx4_en_priv *priv = netdev_priv(dev);
792         int trans_type;
793
794         link_ksettings->base.autoneg = AUTONEG_DISABLE;
795
796         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
797         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
798                                              10000baseT_Full);
799
800         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
801         ethtool_link_ksettings_add_link_mode(link_ksettings, advertising,
802                                              10000baseT_Full);
803
804         trans_type = priv->port_state.transceiver;
805         if (trans_type > 0 && trans_type <= 0xC) {
806                 link_ksettings->base.port = PORT_FIBRE;
807                 ethtool_link_ksettings_add_link_mode(link_ksettings,
808                                                      supported, FIBRE);
809                 ethtool_link_ksettings_add_link_mode(link_ksettings,
810                                                      advertising, FIBRE);
811         } else if (trans_type == 0x80 || trans_type == 0) {
812                 link_ksettings->base.port = PORT_TP;
813                 ethtool_link_ksettings_add_link_mode(link_ksettings,
814                                                      supported, TP);
815                 ethtool_link_ksettings_add_link_mode(link_ksettings,
816                                                      advertising, TP);
817         } else  {
818                 link_ksettings->base.port = -1;
819         }
820 }
821
822 static int
823 mlx4_en_get_link_ksettings(struct net_device *dev,
824                            struct ethtool_link_ksettings *link_ksettings)
825 {
826         struct mlx4_en_priv *priv = netdev_priv(dev);
827         int ret = -EINVAL;
828
829         if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
830                 return -ENOMEM;
831
832         en_dbg(DRV, priv, "query port state.flags ANC(%x) ANE(%x)\n",
833                priv->port_state.flags & MLX4_EN_PORT_ANC,
834                priv->port_state.flags & MLX4_EN_PORT_ANE);
835
836         if (priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL)
837                 ret = ethtool_get_ptys_link_ksettings(dev, link_ksettings);
838         if (ret) /* ETH PROT CRTL is not supported or PTYS CMD failed */
839                 ethtool_get_default_link_ksettings(dev, link_ksettings);
840
841         if (netif_carrier_ok(dev)) {
842                 link_ksettings->base.speed = priv->port_state.link_speed;
843                 link_ksettings->base.duplex = DUPLEX_FULL;
844         } else {
845                 link_ksettings->base.speed = SPEED_UNKNOWN;
846                 link_ksettings->base.duplex = DUPLEX_UNKNOWN;
847         }
848         return 0;
849 }
850
851 /* Calculate PTYS admin according ethtool speed (SPEED_XXX) */
852 static __be32 speed_set_ptys_admin(struct mlx4_en_priv *priv, u32 speed,
853                                    __be32 proto_cap)
854 {
855         __be32 proto_admin = 0;
856
857         if (!speed) { /* Speed = 0 ==> Reset Link modes */
858                 proto_admin = proto_cap;
859                 en_info(priv, "Speed was set to 0, Reset advertised Link Modes to default (%x)\n",
860                         be32_to_cpu(proto_cap));
861         } else {
862                 u32 ptys_link_modes = speed2ptys_link_modes(speed);
863
864                 proto_admin = cpu_to_be32(ptys_link_modes) & proto_cap;
865                 en_info(priv, "Setting Speed to %d\n", speed);
866         }
867         return proto_admin;
868 }
869
870 static int
871 mlx4_en_set_link_ksettings(struct net_device *dev,
872                            const struct ethtool_link_ksettings *link_ksettings)
873 {
874         struct mlx4_en_priv *priv = netdev_priv(dev);
875         struct mlx4_ptys_reg ptys_reg;
876         __be32 proto_admin;
877         int ret;
878
879         u32 ptys_adv = ethtool2ptys_link_modes(
880                 link_ksettings->link_modes.advertising, ADVERTISED);
881         const int speed = link_ksettings->base.speed;
882
883         en_dbg(DRV, priv,
884                "Set Speed=%d adv={%*pbl} autoneg=%d duplex=%d\n",
885                speed, __ETHTOOL_LINK_MODE_MASK_NBITS,
886                link_ksettings->link_modes.advertising,
887                link_ksettings->base.autoneg,
888                link_ksettings->base.duplex);
889
890         if (!(priv->mdev->dev->caps.flags2 &
891               MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL) ||
892             (link_ksettings->base.duplex == DUPLEX_HALF))
893                 return -EINVAL;
894
895         memset(&ptys_reg, 0, sizeof(ptys_reg));
896         ptys_reg.local_port = priv->port;
897         ptys_reg.proto_mask = MLX4_PTYS_EN;
898         ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev,
899                                    MLX4_ACCESS_REG_QUERY, &ptys_reg);
900         if (ret) {
901                 en_warn(priv, "Failed to QUERY mlx4_ACCESS_PTYS_REG status(%x)\n",
902                         ret);
903                 return 0;
904         }
905
906         proto_admin = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
907                 cpu_to_be32(ptys_adv) :
908                 speed_set_ptys_admin(priv, speed,
909                                      ptys_reg.eth_proto_cap);
910
911         proto_admin &= ptys_reg.eth_proto_cap;
912         if (!proto_admin) {
913                 en_warn(priv, "Not supported link mode(s) requested, check supported link modes.\n");
914                 return -EINVAL; /* nothing to change due to bad input */
915         }
916
917         if (proto_admin == ptys_reg.eth_proto_admin)
918                 return 0; /* Nothing to change */
919
920         en_dbg(DRV, priv, "mlx4_ACCESS_PTYS_REG SET: ptys_reg.eth_proto_admin = 0x%x\n",
921                be32_to_cpu(proto_admin));
922
923         ptys_reg.eth_proto_admin = proto_admin;
924         ret = mlx4_ACCESS_PTYS_REG(priv->mdev->dev, MLX4_ACCESS_REG_WRITE,
925                                    &ptys_reg);
926         if (ret) {
927                 en_warn(priv, "Failed to write mlx4_ACCESS_PTYS_REG eth_proto_admin(0x%x) status(0x%x)",
928                         be32_to_cpu(ptys_reg.eth_proto_admin), ret);
929                 return ret;
930         }
931
932         mutex_lock(&priv->mdev->state_lock);
933         if (priv->port_up) {
934                 en_warn(priv, "Port link mode changed, restarting port...\n");
935                 mlx4_en_stop_port(dev, 1);
936                 if (mlx4_en_start_port(dev))
937                         en_err(priv, "Failed restarting port %d\n", priv->port);
938         }
939         mutex_unlock(&priv->mdev->state_lock);
940         return 0;
941 }
942
943 static int mlx4_en_get_coalesce(struct net_device *dev,
944                               struct ethtool_coalesce *coal)
945 {
946         struct mlx4_en_priv *priv = netdev_priv(dev);
947
948         coal->tx_coalesce_usecs = priv->tx_usecs;
949         coal->tx_max_coalesced_frames = priv->tx_frames;
950         coal->tx_max_coalesced_frames_irq = priv->tx_work_limit;
951
952         coal->rx_coalesce_usecs = priv->rx_usecs;
953         coal->rx_max_coalesced_frames = priv->rx_frames;
954
955         coal->pkt_rate_low = priv->pkt_rate_low;
956         coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
957         coal->pkt_rate_high = priv->pkt_rate_high;
958         coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
959         coal->rate_sample_interval = priv->sample_interval;
960         coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
961
962         return 0;
963 }
964
965 static int mlx4_en_set_coalesce(struct net_device *dev,
966                               struct ethtool_coalesce *coal)
967 {
968         struct mlx4_en_priv *priv = netdev_priv(dev);
969
970         if (!coal->tx_max_coalesced_frames_irq)
971                 return -EINVAL;
972
973         priv->rx_frames = (coal->rx_max_coalesced_frames ==
974                            MLX4_EN_AUTO_CONF) ?
975                                 MLX4_EN_RX_COAL_TARGET :
976                                 coal->rx_max_coalesced_frames;
977         priv->rx_usecs = (coal->rx_coalesce_usecs ==
978                           MLX4_EN_AUTO_CONF) ?
979                                 MLX4_EN_RX_COAL_TIME :
980                                 coal->rx_coalesce_usecs;
981
982         /* Setting TX coalescing parameters */
983         if (coal->tx_coalesce_usecs != priv->tx_usecs ||
984             coal->tx_max_coalesced_frames != priv->tx_frames) {
985                 priv->tx_usecs = coal->tx_coalesce_usecs;
986                 priv->tx_frames = coal->tx_max_coalesced_frames;
987         }
988
989         /* Set adaptive coalescing params */
990         priv->pkt_rate_low = coal->pkt_rate_low;
991         priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
992         priv->pkt_rate_high = coal->pkt_rate_high;
993         priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
994         priv->sample_interval = coal->rate_sample_interval;
995         priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
996         priv->tx_work_limit = coal->tx_max_coalesced_frames_irq;
997
998         return mlx4_en_moderation_update(priv);
999 }
1000
1001 static int mlx4_en_set_pauseparam(struct net_device *dev,
1002                                 struct ethtool_pauseparam *pause)
1003 {
1004         struct mlx4_en_priv *priv = netdev_priv(dev);
1005         struct mlx4_en_dev *mdev = priv->mdev;
1006         int err;
1007
1008         if (pause->autoneg)
1009                 return -EINVAL;
1010
1011         priv->prof->tx_pause = pause->tx_pause != 0;
1012         priv->prof->rx_pause = pause->rx_pause != 0;
1013         err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1014                                     priv->rx_skb_size + ETH_FCS_LEN,
1015                                     priv->prof->tx_pause,
1016                                     priv->prof->tx_ppp,
1017                                     priv->prof->rx_pause,
1018                                     priv->prof->rx_ppp);
1019         if (err)
1020                 en_err(priv, "Failed setting pause params\n");
1021         else
1022                 mlx4_en_update_pfc_stats_bitmap(mdev->dev, &priv->stats_bitmap,
1023                                                 priv->prof->rx_ppp,
1024                                                 priv->prof->rx_pause,
1025                                                 priv->prof->tx_ppp,
1026                                                 priv->prof->tx_pause);
1027
1028         return err;
1029 }
1030
1031 static void mlx4_en_get_pauseparam(struct net_device *dev,
1032                                  struct ethtool_pauseparam *pause)
1033 {
1034         struct mlx4_en_priv *priv = netdev_priv(dev);
1035
1036         pause->tx_pause = priv->prof->tx_pause;
1037         pause->rx_pause = priv->prof->rx_pause;
1038 }
1039
1040 static int mlx4_en_set_ringparam(struct net_device *dev,
1041                                  struct ethtool_ringparam *param)
1042 {
1043         struct mlx4_en_priv *priv = netdev_priv(dev);
1044         struct mlx4_en_dev *mdev = priv->mdev;
1045         struct mlx4_en_port_profile new_prof;
1046         struct mlx4_en_priv *tmp;
1047         u32 rx_size, tx_size;
1048         int port_up = 0;
1049         int err = 0;
1050
1051         if (param->rx_jumbo_pending || param->rx_mini_pending)
1052                 return -EINVAL;
1053
1054         rx_size = roundup_pow_of_two(param->rx_pending);
1055         rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE);
1056         rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE);
1057         tx_size = roundup_pow_of_two(param->tx_pending);
1058         tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE);
1059         tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE);
1060
1061         if (rx_size == (priv->port_up ? priv->rx_ring[0]->actual_size :
1062                                         priv->rx_ring[0]->size) &&
1063             tx_size == priv->tx_ring[0]->size)
1064                 return 0;
1065
1066         tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
1067         if (!tmp)
1068                 return -ENOMEM;
1069
1070         mutex_lock(&mdev->state_lock);
1071         memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
1072         new_prof.tx_ring_size = tx_size;
1073         new_prof.rx_ring_size = rx_size;
1074         err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof);
1075         if (err)
1076                 goto out;
1077
1078         if (priv->port_up) {
1079                 port_up = 1;
1080                 mlx4_en_stop_port(dev, 1);
1081         }
1082
1083         mlx4_en_safe_replace_resources(priv, tmp);
1084
1085         if (port_up) {
1086                 err = mlx4_en_start_port(dev);
1087                 if (err)
1088                         en_err(priv, "Failed starting port\n");
1089         }
1090
1091         err = mlx4_en_moderation_update(priv);
1092 out:
1093         kfree(tmp);
1094         mutex_unlock(&mdev->state_lock);
1095         return err;
1096 }
1097
1098 static void mlx4_en_get_ringparam(struct net_device *dev,
1099                                   struct ethtool_ringparam *param)
1100 {
1101         struct mlx4_en_priv *priv = netdev_priv(dev);
1102
1103         memset(param, 0, sizeof(*param));
1104         param->rx_max_pending = MLX4_EN_MAX_RX_SIZE;
1105         param->tx_max_pending = MLX4_EN_MAX_TX_SIZE;
1106         param->rx_pending = priv->port_up ?
1107                 priv->rx_ring[0]->actual_size : priv->rx_ring[0]->size;
1108         param->tx_pending = priv->tx_ring[0]->size;
1109 }
1110
1111 static u32 mlx4_en_get_rxfh_indir_size(struct net_device *dev)
1112 {
1113         struct mlx4_en_priv *priv = netdev_priv(dev);
1114
1115         return priv->rx_ring_num;
1116 }
1117
1118 static u32 mlx4_en_get_rxfh_key_size(struct net_device *netdev)
1119 {
1120         return MLX4_EN_RSS_KEY_SIZE;
1121 }
1122
1123 static int mlx4_en_check_rxfh_func(struct net_device *dev, u8 hfunc)
1124 {
1125         struct mlx4_en_priv *priv = netdev_priv(dev);
1126
1127         /* check if requested function is supported by the device */
1128         if (hfunc == ETH_RSS_HASH_TOP) {
1129                 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP))
1130                         return -EINVAL;
1131                 if (!(dev->features & NETIF_F_RXHASH))
1132                         en_warn(priv, "Toeplitz hash function should be used in conjunction with RX hashing for optimal performance\n");
1133                 return 0;
1134         } else if (hfunc == ETH_RSS_HASH_XOR) {
1135                 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR))
1136                         return -EINVAL;
1137                 if (dev->features & NETIF_F_RXHASH)
1138                         en_warn(priv, "Enabling both XOR Hash function and RX Hashing can limit RPS functionality\n");
1139                 return 0;
1140         }
1141
1142         return -EINVAL;
1143 }
1144
1145 static int mlx4_en_get_rxfh(struct net_device *dev, u32 *ring_index, u8 *key,
1146                             u8 *hfunc)
1147 {
1148         struct mlx4_en_priv *priv = netdev_priv(dev);
1149         struct mlx4_en_rss_map *rss_map = &priv->rss_map;
1150         int rss_rings;
1151         size_t n = priv->rx_ring_num;
1152         int err = 0;
1153
1154         rss_rings = priv->prof->rss_rings ?: priv->rx_ring_num;
1155         rss_rings = 1 << ilog2(rss_rings);
1156
1157         while (n--) {
1158                 if (!ring_index)
1159                         break;
1160                 ring_index[n] = rss_map->qps[n % rss_rings].qpn -
1161                         rss_map->base_qpn;
1162         }
1163         if (key)
1164                 memcpy(key, priv->rss_key, MLX4_EN_RSS_KEY_SIZE);
1165         if (hfunc)
1166                 *hfunc = priv->rss_hash_fn;
1167         return err;
1168 }
1169
1170 static int mlx4_en_set_rxfh(struct net_device *dev, const u32 *ring_index,
1171                             const u8 *key, const u8 hfunc)
1172 {
1173         struct mlx4_en_priv *priv = netdev_priv(dev);
1174         struct mlx4_en_dev *mdev = priv->mdev;
1175         int port_up = 0;
1176         int err = 0;
1177         int i;
1178         int rss_rings = 0;
1179
1180         /* Calculate RSS table size and make sure flows are spread evenly
1181          * between rings
1182          */
1183         for (i = 0; i < priv->rx_ring_num; i++) {
1184                 if (!ring_index)
1185                         continue;
1186                 if (i > 0 && !ring_index[i] && !rss_rings)
1187                         rss_rings = i;
1188
1189                 if (ring_index[i] != (i % (rss_rings ?: priv->rx_ring_num)))
1190                         return -EINVAL;
1191         }
1192
1193         if (!rss_rings)
1194                 rss_rings = priv->rx_ring_num;
1195
1196         /* RSS table size must be an order of 2 */
1197         if (!is_power_of_2(rss_rings))
1198                 return -EINVAL;
1199
1200         if (hfunc != ETH_RSS_HASH_NO_CHANGE) {
1201                 err = mlx4_en_check_rxfh_func(dev, hfunc);
1202                 if (err)
1203                         return err;
1204         }
1205
1206         mutex_lock(&mdev->state_lock);
1207         if (priv->port_up) {
1208                 port_up = 1;
1209                 mlx4_en_stop_port(dev, 1);
1210         }
1211
1212         if (ring_index)
1213                 priv->prof->rss_rings = rss_rings;
1214         if (key)
1215                 memcpy(priv->rss_key, key, MLX4_EN_RSS_KEY_SIZE);
1216         if (hfunc !=  ETH_RSS_HASH_NO_CHANGE)
1217                 priv->rss_hash_fn = hfunc;
1218
1219         if (port_up) {
1220                 err = mlx4_en_start_port(dev);
1221                 if (err)
1222                         en_err(priv, "Failed starting port\n");
1223         }
1224
1225         mutex_unlock(&mdev->state_lock);
1226         return err;
1227 }
1228
1229 #define all_zeros_or_all_ones(field)            \
1230         ((field) == 0 || (field) == (__force typeof(field))-1)
1231
1232 static int mlx4_en_validate_flow(struct net_device *dev,
1233                                  struct ethtool_rxnfc *cmd)
1234 {
1235         struct ethtool_usrip4_spec *l3_mask;
1236         struct ethtool_tcpip4_spec *l4_mask;
1237         struct ethhdr *eth_mask;
1238
1239         if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
1240                 return -EINVAL;
1241
1242         if (cmd->fs.flow_type & FLOW_MAC_EXT) {
1243                 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
1244                 if (!is_broadcast_ether_addr(cmd->fs.m_ext.h_dest))
1245                         return -EINVAL;
1246         }
1247
1248         switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
1249         case TCP_V4_FLOW:
1250         case UDP_V4_FLOW:
1251                 if (cmd->fs.m_u.tcp_ip4_spec.tos)
1252                         return -EINVAL;
1253                 l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
1254                 /* don't allow mask which isn't all 0 or 1 */
1255                 if (!all_zeros_or_all_ones(l4_mask->ip4src) ||
1256                     !all_zeros_or_all_ones(l4_mask->ip4dst) ||
1257                     !all_zeros_or_all_ones(l4_mask->psrc) ||
1258                     !all_zeros_or_all_ones(l4_mask->pdst))
1259                         return -EINVAL;
1260                 break;
1261         case IP_USER_FLOW:
1262                 l3_mask = &cmd->fs.m_u.usr_ip4_spec;
1263                 if (l3_mask->l4_4_bytes || l3_mask->tos || l3_mask->proto ||
1264                     cmd->fs.h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4 ||
1265                     (!l3_mask->ip4src && !l3_mask->ip4dst) ||
1266                     !all_zeros_or_all_ones(l3_mask->ip4src) ||
1267                     !all_zeros_or_all_ones(l3_mask->ip4dst))
1268                         return -EINVAL;
1269                 break;
1270         case ETHER_FLOW:
1271                 eth_mask = &cmd->fs.m_u.ether_spec;
1272                 /* source mac mask must not be set */
1273                 if (!is_zero_ether_addr(eth_mask->h_source))
1274                         return -EINVAL;
1275
1276                 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
1277                 if (!is_broadcast_ether_addr(eth_mask->h_dest))
1278                         return -EINVAL;
1279
1280                 if (!all_zeros_or_all_ones(eth_mask->h_proto))
1281                         return -EINVAL;
1282                 break;
1283         default:
1284                 return -EINVAL;
1285         }
1286
1287         if ((cmd->fs.flow_type & FLOW_EXT)) {
1288                 if (cmd->fs.m_ext.vlan_etype ||
1289                     !((cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
1290                       0 ||
1291                       (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
1292                       cpu_to_be16(VLAN_VID_MASK)))
1293                         return -EINVAL;
1294
1295                 if (cmd->fs.m_ext.vlan_tci) {
1296                         if (be16_to_cpu(cmd->fs.h_ext.vlan_tci) >= VLAN_N_VID)
1297                                 return -EINVAL;
1298
1299                 }
1300         }
1301
1302         return 0;
1303 }
1304
1305 static int mlx4_en_ethtool_add_mac_rule(struct ethtool_rxnfc *cmd,
1306                                         struct list_head *rule_list_h,
1307                                         struct mlx4_spec_list *spec_l2,
1308                                         unsigned char *mac)
1309 {
1310         int err = 0;
1311         __be64 mac_msk = cpu_to_be64(MLX4_MAC_MASK << 16);
1312
1313         spec_l2->id = MLX4_NET_TRANS_RULE_ID_ETH;
1314         memcpy(spec_l2->eth.dst_mac_msk, &mac_msk, ETH_ALEN);
1315         memcpy(spec_l2->eth.dst_mac, mac, ETH_ALEN);
1316
1317         if ((cmd->fs.flow_type & FLOW_EXT) &&
1318             (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK))) {
1319                 spec_l2->eth.vlan_id = cmd->fs.h_ext.vlan_tci;
1320                 spec_l2->eth.vlan_id_msk = cpu_to_be16(VLAN_VID_MASK);
1321         }
1322
1323         list_add_tail(&spec_l2->list, rule_list_h);
1324
1325         return err;
1326 }
1327
1328 static int mlx4_en_ethtool_add_mac_rule_by_ipv4(struct mlx4_en_priv *priv,
1329                                                 struct ethtool_rxnfc *cmd,
1330                                                 struct list_head *rule_list_h,
1331                                                 struct mlx4_spec_list *spec_l2,
1332                                                 __be32 ipv4_dst)
1333 {
1334 #ifdef CONFIG_INET
1335         unsigned char mac[ETH_ALEN];
1336
1337         if (!ipv4_is_multicast(ipv4_dst)) {
1338                 if (cmd->fs.flow_type & FLOW_MAC_EXT)
1339                         memcpy(&mac, cmd->fs.h_ext.h_dest, ETH_ALEN);
1340                 else
1341                         memcpy(&mac, priv->dev->dev_addr, ETH_ALEN);
1342         } else {
1343                 ip_eth_mc_map(ipv4_dst, mac);
1344         }
1345
1346         return mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2, &mac[0]);
1347 #else
1348         return -EINVAL;
1349 #endif
1350 }
1351
1352 static int add_ip_rule(struct mlx4_en_priv *priv,
1353                        struct ethtool_rxnfc *cmd,
1354                        struct list_head *list_h)
1355 {
1356         int err;
1357         struct mlx4_spec_list *spec_l2 = NULL;
1358         struct mlx4_spec_list *spec_l3 = NULL;
1359         struct ethtool_usrip4_spec *l3_mask = &cmd->fs.m_u.usr_ip4_spec;
1360
1361         spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
1362         spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
1363         if (!spec_l2 || !spec_l3) {
1364                 err = -ENOMEM;
1365                 goto free_spec;
1366         }
1367
1368         err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h, spec_l2,
1369                                                    cmd->fs.h_u.
1370                                                    usr_ip4_spec.ip4dst);
1371         if (err)
1372                 goto free_spec;
1373         spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
1374         spec_l3->ipv4.src_ip = cmd->fs.h_u.usr_ip4_spec.ip4src;
1375         if (l3_mask->ip4src)
1376                 spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
1377         spec_l3->ipv4.dst_ip = cmd->fs.h_u.usr_ip4_spec.ip4dst;
1378         if (l3_mask->ip4dst)
1379                 spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
1380         list_add_tail(&spec_l3->list, list_h);
1381
1382         return 0;
1383
1384 free_spec:
1385         kfree(spec_l2);
1386         kfree(spec_l3);
1387         return err;
1388 }
1389
1390 static int add_tcp_udp_rule(struct mlx4_en_priv *priv,
1391                              struct ethtool_rxnfc *cmd,
1392                              struct list_head *list_h, int proto)
1393 {
1394         int err;
1395         struct mlx4_spec_list *spec_l2 = NULL;
1396         struct mlx4_spec_list *spec_l3 = NULL;
1397         struct mlx4_spec_list *spec_l4 = NULL;
1398         struct ethtool_tcpip4_spec *l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
1399
1400         spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
1401         spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
1402         spec_l4 = kzalloc(sizeof(*spec_l4), GFP_KERNEL);
1403         if (!spec_l2 || !spec_l3 || !spec_l4) {
1404                 err = -ENOMEM;
1405                 goto free_spec;
1406         }
1407
1408         spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
1409
1410         if (proto == TCP_V4_FLOW) {
1411                 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
1412                                                            spec_l2,
1413                                                            cmd->fs.h_u.
1414                                                            tcp_ip4_spec.ip4dst);
1415                 if (err)
1416                         goto free_spec;
1417                 spec_l4->id = MLX4_NET_TRANS_RULE_ID_TCP;
1418                 spec_l3->ipv4.src_ip = cmd->fs.h_u.tcp_ip4_spec.ip4src;
1419                 spec_l3->ipv4.dst_ip = cmd->fs.h_u.tcp_ip4_spec.ip4dst;
1420                 spec_l4->tcp_udp.src_port = cmd->fs.h_u.tcp_ip4_spec.psrc;
1421                 spec_l4->tcp_udp.dst_port = cmd->fs.h_u.tcp_ip4_spec.pdst;
1422         } else {
1423                 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
1424                                                            spec_l2,
1425                                                            cmd->fs.h_u.
1426                                                            udp_ip4_spec.ip4dst);
1427                 if (err)
1428                         goto free_spec;
1429                 spec_l4->id = MLX4_NET_TRANS_RULE_ID_UDP;
1430                 spec_l3->ipv4.src_ip = cmd->fs.h_u.udp_ip4_spec.ip4src;
1431                 spec_l3->ipv4.dst_ip = cmd->fs.h_u.udp_ip4_spec.ip4dst;
1432                 spec_l4->tcp_udp.src_port = cmd->fs.h_u.udp_ip4_spec.psrc;
1433                 spec_l4->tcp_udp.dst_port = cmd->fs.h_u.udp_ip4_spec.pdst;
1434         }
1435
1436         if (l4_mask->ip4src)
1437                 spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
1438         if (l4_mask->ip4dst)
1439                 spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
1440
1441         if (l4_mask->psrc)
1442                 spec_l4->tcp_udp.src_port_msk = EN_ETHTOOL_SHORT_MASK;
1443         if (l4_mask->pdst)
1444                 spec_l4->tcp_udp.dst_port_msk = EN_ETHTOOL_SHORT_MASK;
1445
1446         list_add_tail(&spec_l3->list, list_h);
1447         list_add_tail(&spec_l4->list, list_h);
1448
1449         return 0;
1450
1451 free_spec:
1452         kfree(spec_l2);
1453         kfree(spec_l3);
1454         kfree(spec_l4);
1455         return err;
1456 }
1457
1458 static int mlx4_en_ethtool_to_net_trans_rule(struct net_device *dev,
1459                                              struct ethtool_rxnfc *cmd,
1460                                              struct list_head *rule_list_h)
1461 {
1462         int err;
1463         struct ethhdr *eth_spec;
1464         struct mlx4_spec_list *spec_l2;
1465         struct mlx4_en_priv *priv = netdev_priv(dev);
1466
1467         err = mlx4_en_validate_flow(dev, cmd);
1468         if (err)
1469                 return err;
1470
1471         switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
1472         case ETHER_FLOW:
1473                 spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
1474                 if (!spec_l2)
1475                         return -ENOMEM;
1476
1477                 eth_spec = &cmd->fs.h_u.ether_spec;
1478                 mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2,
1479                                              &eth_spec->h_dest[0]);
1480                 spec_l2->eth.ether_type = eth_spec->h_proto;
1481                 if (eth_spec->h_proto)
1482                         spec_l2->eth.ether_type_enable = 1;
1483                 break;
1484         case IP_USER_FLOW:
1485                 err = add_ip_rule(priv, cmd, rule_list_h);
1486                 break;
1487         case TCP_V4_FLOW:
1488                 err = add_tcp_udp_rule(priv, cmd, rule_list_h, TCP_V4_FLOW);
1489                 break;
1490         case UDP_V4_FLOW:
1491                 err = add_tcp_udp_rule(priv, cmd, rule_list_h, UDP_V4_FLOW);
1492                 break;
1493         }
1494
1495         return err;
1496 }
1497
1498 static int mlx4_en_flow_replace(struct net_device *dev,
1499                                 struct ethtool_rxnfc *cmd)
1500 {
1501         int err;
1502         struct mlx4_en_priv *priv = netdev_priv(dev);
1503         struct ethtool_flow_id *loc_rule;
1504         struct mlx4_spec_list *spec, *tmp_spec;
1505         u32 qpn;
1506         u64 reg_id;
1507
1508         struct mlx4_net_trans_rule rule = {
1509                 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
1510                 .exclusive = 0,
1511                 .allow_loopback = 1,
1512                 .promisc_mode = MLX4_FS_REGULAR,
1513         };
1514
1515         rule.port = priv->port;
1516         rule.priority = MLX4_DOMAIN_ETHTOOL | cmd->fs.location;
1517         INIT_LIST_HEAD(&rule.list);
1518
1519         /* Allow direct QP attaches if the EN_ETHTOOL_QP_ATTACH flag is set */
1520         if (cmd->fs.ring_cookie == RX_CLS_FLOW_DISC)
1521                 qpn = priv->drop_qp.qpn;
1522         else if (cmd->fs.ring_cookie & EN_ETHTOOL_QP_ATTACH) {
1523                 qpn = cmd->fs.ring_cookie & (EN_ETHTOOL_QP_ATTACH - 1);
1524         } else {
1525                 if (cmd->fs.ring_cookie >= priv->rx_ring_num) {
1526                         en_warn(priv, "rxnfc: RX ring (%llu) doesn't exist\n",
1527                                 cmd->fs.ring_cookie);
1528                         return -EINVAL;
1529                 }
1530                 qpn = priv->rss_map.qps[cmd->fs.ring_cookie].qpn;
1531                 if (!qpn) {
1532                         en_warn(priv, "rxnfc: RX ring (%llu) is inactive\n",
1533                                 cmd->fs.ring_cookie);
1534                         return -EINVAL;
1535                 }
1536         }
1537         rule.qpn = qpn;
1538         err = mlx4_en_ethtool_to_net_trans_rule(dev, cmd, &rule.list);
1539         if (err)
1540                 goto out_free_list;
1541
1542         loc_rule = &priv->ethtool_rules[cmd->fs.location];
1543         if (loc_rule->id) {
1544                 err = mlx4_flow_detach(priv->mdev->dev, loc_rule->id);
1545                 if (err) {
1546                         en_err(priv, "Fail to detach network rule at location %d. registration id = %llx\n",
1547                                cmd->fs.location, loc_rule->id);
1548                         goto out_free_list;
1549                 }
1550                 loc_rule->id = 0;
1551                 memset(&loc_rule->flow_spec, 0,
1552                        sizeof(struct ethtool_rx_flow_spec));
1553                 list_del(&loc_rule->list);
1554         }
1555         err = mlx4_flow_attach(priv->mdev->dev, &rule, &reg_id);
1556         if (err) {
1557                 en_err(priv, "Fail to attach network rule at location %d\n",
1558                        cmd->fs.location);
1559                 goto out_free_list;
1560         }
1561         loc_rule->id = reg_id;
1562         memcpy(&loc_rule->flow_spec, &cmd->fs,
1563                sizeof(struct ethtool_rx_flow_spec));
1564         list_add_tail(&loc_rule->list, &priv->ethtool_list);
1565
1566 out_free_list:
1567         list_for_each_entry_safe(spec, tmp_spec, &rule.list, list) {
1568                 list_del(&spec->list);
1569                 kfree(spec);
1570         }
1571         return err;
1572 }
1573
1574 static int mlx4_en_flow_detach(struct net_device *dev,
1575                                struct ethtool_rxnfc *cmd)
1576 {
1577         int err = 0;
1578         struct ethtool_flow_id *rule;
1579         struct mlx4_en_priv *priv = netdev_priv(dev);
1580
1581         if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
1582                 return -EINVAL;
1583
1584         rule = &priv->ethtool_rules[cmd->fs.location];
1585         if (!rule->id) {
1586                 err =  -ENOENT;
1587                 goto out;
1588         }
1589
1590         err = mlx4_flow_detach(priv->mdev->dev, rule->id);
1591         if (err) {
1592                 en_err(priv, "Fail to detach network rule at location %d. registration id = 0x%llx\n",
1593                        cmd->fs.location, rule->id);
1594                 goto out;
1595         }
1596         rule->id = 0;
1597         memset(&rule->flow_spec, 0, sizeof(struct ethtool_rx_flow_spec));
1598         list_del(&rule->list);
1599 out:
1600         return err;
1601
1602 }
1603
1604 static int mlx4_en_get_flow(struct net_device *dev, struct ethtool_rxnfc *cmd,
1605                             int loc)
1606 {
1607         int err = 0;
1608         struct ethtool_flow_id *rule;
1609         struct mlx4_en_priv *priv = netdev_priv(dev);
1610
1611         if (loc < 0 || loc >= MAX_NUM_OF_FS_RULES)
1612                 return -EINVAL;
1613
1614         rule = &priv->ethtool_rules[loc];
1615         if (rule->id)
1616                 memcpy(&cmd->fs, &rule->flow_spec,
1617                        sizeof(struct ethtool_rx_flow_spec));
1618         else
1619                 err = -ENOENT;
1620
1621         return err;
1622 }
1623
1624 static int mlx4_en_get_num_flows(struct mlx4_en_priv *priv)
1625 {
1626
1627         int i, res = 0;
1628         for (i = 0; i < MAX_NUM_OF_FS_RULES; i++) {
1629                 if (priv->ethtool_rules[i].id)
1630                         res++;
1631         }
1632         return res;
1633
1634 }
1635
1636 static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1637                              u32 *rule_locs)
1638 {
1639         struct mlx4_en_priv *priv = netdev_priv(dev);
1640         struct mlx4_en_dev *mdev = priv->mdev;
1641         int err = 0;
1642         int i = 0, priority = 0;
1643
1644         if ((cmd->cmd == ETHTOOL_GRXCLSRLCNT ||
1645              cmd->cmd == ETHTOOL_GRXCLSRULE ||
1646              cmd->cmd == ETHTOOL_GRXCLSRLALL) &&
1647             (mdev->dev->caps.steering_mode !=
1648              MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up))
1649                 return -EINVAL;
1650
1651         switch (cmd->cmd) {
1652         case ETHTOOL_GRXRINGS:
1653                 cmd->data = priv->rx_ring_num;
1654                 break;
1655         case ETHTOOL_GRXCLSRLCNT:
1656                 cmd->rule_cnt = mlx4_en_get_num_flows(priv);
1657                 break;
1658         case ETHTOOL_GRXCLSRULE:
1659                 err = mlx4_en_get_flow(dev, cmd, cmd->fs.location);
1660                 break;
1661         case ETHTOOL_GRXCLSRLALL:
1662                 while ((!err || err == -ENOENT) && priority < cmd->rule_cnt) {
1663                         err = mlx4_en_get_flow(dev, cmd, i);
1664                         if (!err)
1665                                 rule_locs[priority++] = i;
1666                         i++;
1667                 }
1668                 err = 0;
1669                 break;
1670         default:
1671                 err = -EOPNOTSUPP;
1672                 break;
1673         }
1674
1675         return err;
1676 }
1677
1678 static int mlx4_en_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1679 {
1680         int err = 0;
1681         struct mlx4_en_priv *priv = netdev_priv(dev);
1682         struct mlx4_en_dev *mdev = priv->mdev;
1683
1684         if (mdev->dev->caps.steering_mode !=
1685             MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up)
1686                 return -EINVAL;
1687
1688         switch (cmd->cmd) {
1689         case ETHTOOL_SRXCLSRLINS:
1690                 err = mlx4_en_flow_replace(dev, cmd);
1691                 break;
1692         case ETHTOOL_SRXCLSRLDEL:
1693                 err = mlx4_en_flow_detach(dev, cmd);
1694                 break;
1695         default:
1696                 en_warn(priv, "Unsupported ethtool command. (%d)\n", cmd->cmd);
1697                 return -EINVAL;
1698         }
1699
1700         return err;
1701 }
1702
1703 static void mlx4_en_get_channels(struct net_device *dev,
1704                                  struct ethtool_channels *channel)
1705 {
1706         struct mlx4_en_priv *priv = netdev_priv(dev);
1707
1708         memset(channel, 0, sizeof(*channel));
1709
1710         channel->max_rx = MAX_RX_RINGS;
1711         channel->max_tx = MLX4_EN_MAX_TX_RING_P_UP;
1712
1713         channel->rx_count = priv->rx_ring_num;
1714         channel->tx_count = priv->tx_ring_num / MLX4_EN_NUM_UP;
1715 }
1716
1717 static int mlx4_en_set_channels(struct net_device *dev,
1718                                 struct ethtool_channels *channel)
1719 {
1720         struct mlx4_en_priv *priv = netdev_priv(dev);
1721         struct mlx4_en_dev *mdev = priv->mdev;
1722         struct mlx4_en_port_profile new_prof;
1723         struct mlx4_en_priv *tmp;
1724         int port_up = 0;
1725         int err = 0;
1726
1727         if (channel->other_count || channel->combined_count ||
1728             channel->tx_count > MLX4_EN_MAX_TX_RING_P_UP ||
1729             channel->rx_count > MAX_RX_RINGS ||
1730             !channel->tx_count || !channel->rx_count)
1731                 return -EINVAL;
1732
1733         tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
1734         if (!tmp)
1735                 return -ENOMEM;
1736
1737         mutex_lock(&mdev->state_lock);
1738         memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
1739         new_prof.num_tx_rings_p_up = channel->tx_count;
1740         new_prof.tx_ring_num = channel->tx_count * MLX4_EN_NUM_UP;
1741         new_prof.rx_ring_num = channel->rx_count;
1742
1743         err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof);
1744         if (err)
1745                 goto out;
1746
1747         if (priv->port_up) {
1748                 port_up = 1;
1749                 mlx4_en_stop_port(dev, 1);
1750         }
1751
1752         mlx4_en_safe_replace_resources(priv, tmp);
1753
1754         netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
1755         netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
1756
1757         if (dev->num_tc)
1758                 mlx4_en_setup_tc(dev, MLX4_EN_NUM_UP);
1759
1760         en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num);
1761         en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num);
1762
1763         if (port_up) {
1764                 err = mlx4_en_start_port(dev);
1765                 if (err)
1766                         en_err(priv, "Failed starting port\n");
1767         }
1768
1769         err = mlx4_en_moderation_update(priv);
1770 out:
1771         kfree(tmp);
1772         mutex_unlock(&mdev->state_lock);
1773         return err;
1774 }
1775
1776 static int mlx4_en_get_ts_info(struct net_device *dev,
1777                                struct ethtool_ts_info *info)
1778 {
1779         struct mlx4_en_priv *priv = netdev_priv(dev);
1780         struct mlx4_en_dev *mdev = priv->mdev;
1781         int ret;
1782
1783         ret = ethtool_op_get_ts_info(dev, info);
1784         if (ret)
1785                 return ret;
1786
1787         if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) {
1788                 info->so_timestamping |=
1789                         SOF_TIMESTAMPING_TX_HARDWARE |
1790                         SOF_TIMESTAMPING_RX_HARDWARE |
1791                         SOF_TIMESTAMPING_RAW_HARDWARE;
1792
1793                 info->tx_types =
1794                         (1 << HWTSTAMP_TX_OFF) |
1795                         (1 << HWTSTAMP_TX_ON);
1796
1797                 info->rx_filters =
1798                         (1 << HWTSTAMP_FILTER_NONE) |
1799                         (1 << HWTSTAMP_FILTER_ALL);
1800
1801                 if (mdev->ptp_clock)
1802                         info->phc_index = ptp_clock_index(mdev->ptp_clock);
1803         }
1804
1805         return ret;
1806 }
1807
1808 static int mlx4_en_set_priv_flags(struct net_device *dev, u32 flags)
1809 {
1810         struct mlx4_en_priv *priv = netdev_priv(dev);
1811         struct mlx4_en_dev *mdev = priv->mdev;
1812         bool bf_enabled_new = !!(flags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
1813         bool bf_enabled_old = !!(priv->pflags & MLX4_EN_PRIV_FLAGS_BLUEFLAME);
1814         bool phv_enabled_new = !!(flags & MLX4_EN_PRIV_FLAGS_PHV);
1815         bool phv_enabled_old = !!(priv->pflags & MLX4_EN_PRIV_FLAGS_PHV);
1816         int i;
1817         int ret = 0;
1818
1819         if (bf_enabled_new != bf_enabled_old) {
1820                 if (bf_enabled_new) {
1821                         bool bf_supported = true;
1822
1823                         for (i = 0; i < priv->tx_ring_num; i++)
1824                                 bf_supported &= priv->tx_ring[i]->bf_alloced;
1825
1826                         if (!bf_supported) {
1827                                 en_err(priv, "BlueFlame is not supported\n");
1828                                 return -EINVAL;
1829                         }
1830
1831                         priv->pflags |= MLX4_EN_PRIV_FLAGS_BLUEFLAME;
1832                 } else {
1833                         priv->pflags &= ~MLX4_EN_PRIV_FLAGS_BLUEFLAME;
1834                 }
1835
1836                 for (i = 0; i < priv->tx_ring_num; i++)
1837                         priv->tx_ring[i]->bf_enabled = bf_enabled_new;
1838
1839                 en_info(priv, "BlueFlame %s\n",
1840                         bf_enabled_new ?  "Enabled" : "Disabled");
1841         }
1842
1843         if (phv_enabled_new != phv_enabled_old) {
1844                 ret = set_phv_bit(mdev->dev, priv->port, (int)phv_enabled_new);
1845                 if (ret)
1846                         return ret;
1847                 else if (phv_enabled_new)
1848                         priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
1849                 else
1850                         priv->pflags &= ~MLX4_EN_PRIV_FLAGS_PHV;
1851                 en_info(priv, "PHV bit %s\n",
1852                         phv_enabled_new ?  "Enabled" : "Disabled");
1853         }
1854         return 0;
1855 }
1856
1857 static u32 mlx4_en_get_priv_flags(struct net_device *dev)
1858 {
1859         struct mlx4_en_priv *priv = netdev_priv(dev);
1860
1861         return priv->pflags;
1862 }
1863
1864 static int mlx4_en_get_tunable(struct net_device *dev,
1865                                const struct ethtool_tunable *tuna,
1866                                void *data)
1867 {
1868         const struct mlx4_en_priv *priv = netdev_priv(dev);
1869         int ret = 0;
1870
1871         switch (tuna->id) {
1872         case ETHTOOL_TX_COPYBREAK:
1873                 *(u32 *)data = priv->prof->inline_thold;
1874                 break;
1875         default:
1876                 ret = -EINVAL;
1877                 break;
1878         }
1879
1880         return ret;
1881 }
1882
1883 static int mlx4_en_set_tunable(struct net_device *dev,
1884                                const struct ethtool_tunable *tuna,
1885                                const void *data)
1886 {
1887         struct mlx4_en_priv *priv = netdev_priv(dev);
1888         int val, ret = 0;
1889
1890         switch (tuna->id) {
1891         case ETHTOOL_TX_COPYBREAK:
1892                 val = *(u32 *)data;
1893                 if (val < MIN_PKT_LEN || val > MAX_INLINE)
1894                         ret = -EINVAL;
1895                 else
1896                         priv->prof->inline_thold = val;
1897                 break;
1898         default:
1899                 ret = -EINVAL;
1900                 break;
1901         }
1902
1903         return ret;
1904 }
1905
1906 static int mlx4_en_get_module_info(struct net_device *dev,
1907                                    struct ethtool_modinfo *modinfo)
1908 {
1909         struct mlx4_en_priv *priv = netdev_priv(dev);
1910         struct mlx4_en_dev *mdev = priv->mdev;
1911         int ret;
1912         u8 data[4];
1913
1914         /* Read first 2 bytes to get Module & REV ID */
1915         ret = mlx4_get_module_info(mdev->dev, priv->port,
1916                                    0/*offset*/, 2/*size*/, data);
1917         if (ret < 2)
1918                 return -EIO;
1919
1920         switch (data[0] /* identifier */) {
1921         case MLX4_MODULE_ID_QSFP:
1922                 modinfo->type = ETH_MODULE_SFF_8436;
1923                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1924                 break;
1925         case MLX4_MODULE_ID_QSFP_PLUS:
1926                 if (data[1] >= 0x3) { /* revision id */
1927                         modinfo->type = ETH_MODULE_SFF_8636;
1928                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1929                 } else {
1930                         modinfo->type = ETH_MODULE_SFF_8436;
1931                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1932                 }
1933                 break;
1934         case MLX4_MODULE_ID_QSFP28:
1935                 modinfo->type = ETH_MODULE_SFF_8636;
1936                 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1937                 break;
1938         case MLX4_MODULE_ID_SFP:
1939                 modinfo->type = ETH_MODULE_SFF_8472;
1940                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1941                 break;
1942         default:
1943                 return -ENOSYS;
1944         }
1945
1946         return 0;
1947 }
1948
1949 static int mlx4_en_get_module_eeprom(struct net_device *dev,
1950                                      struct ethtool_eeprom *ee,
1951                                      u8 *data)
1952 {
1953         struct mlx4_en_priv *priv = netdev_priv(dev);
1954         struct mlx4_en_dev *mdev = priv->mdev;
1955         int offset = ee->offset;
1956         int i = 0, ret;
1957
1958         if (ee->len == 0)
1959                 return -EINVAL;
1960
1961         memset(data, 0, ee->len);
1962
1963         while (i < ee->len) {
1964                 en_dbg(DRV, priv,
1965                        "mlx4_get_module_info i(%d) offset(%d) len(%d)\n",
1966                        i, offset, ee->len - i);
1967
1968                 ret = mlx4_get_module_info(mdev->dev, priv->port,
1969                                            offset, ee->len - i, data + i);
1970
1971                 if (!ret) /* Done reading */
1972                         return 0;
1973
1974                 if (ret < 0) {
1975                         en_err(priv,
1976                                "mlx4_get_module_info i(%d) offset(%d) bytes_to_read(%d) - FAILED (0x%x)\n",
1977                                i, offset, ee->len - i, ret);
1978                         return 0;
1979                 }
1980
1981                 i += ret;
1982                 offset += ret;
1983         }
1984         return 0;
1985 }
1986
1987 static int mlx4_en_set_phys_id(struct net_device *dev,
1988                                enum ethtool_phys_id_state state)
1989 {
1990         int err;
1991         u16 beacon_duration;
1992         struct mlx4_en_priv *priv = netdev_priv(dev);
1993         struct mlx4_en_dev *mdev = priv->mdev;
1994
1995         if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_BEACON))
1996                 return -EOPNOTSUPP;
1997
1998         switch (state) {
1999         case ETHTOOL_ID_ACTIVE:
2000                 beacon_duration = PORT_BEACON_MAX_LIMIT;
2001                 break;
2002         case ETHTOOL_ID_INACTIVE:
2003                 beacon_duration = 0;
2004                 break;
2005         default:
2006                 return -EOPNOTSUPP;
2007         }
2008
2009         err = mlx4_SET_PORT_BEACON(mdev->dev, priv->port, beacon_duration);
2010         return err;
2011 }
2012
2013 const struct ethtool_ops mlx4_en_ethtool_ops = {
2014         .get_drvinfo = mlx4_en_get_drvinfo,
2015         .get_link_ksettings = mlx4_en_get_link_ksettings,
2016         .set_link_ksettings = mlx4_en_set_link_ksettings,
2017         .get_link = ethtool_op_get_link,
2018         .get_strings = mlx4_en_get_strings,
2019         .get_sset_count = mlx4_en_get_sset_count,
2020         .get_ethtool_stats = mlx4_en_get_ethtool_stats,
2021         .self_test = mlx4_en_self_test,
2022         .set_phys_id = mlx4_en_set_phys_id,
2023         .get_wol = mlx4_en_get_wol,
2024         .set_wol = mlx4_en_set_wol,
2025         .get_msglevel = mlx4_en_get_msglevel,
2026         .set_msglevel = mlx4_en_set_msglevel,
2027         .get_coalesce = mlx4_en_get_coalesce,
2028         .set_coalesce = mlx4_en_set_coalesce,
2029         .get_pauseparam = mlx4_en_get_pauseparam,
2030         .set_pauseparam = mlx4_en_set_pauseparam,
2031         .get_ringparam = mlx4_en_get_ringparam,
2032         .set_ringparam = mlx4_en_set_ringparam,
2033         .get_rxnfc = mlx4_en_get_rxnfc,
2034         .set_rxnfc = mlx4_en_set_rxnfc,
2035         .get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,
2036         .get_rxfh_key_size = mlx4_en_get_rxfh_key_size,
2037         .get_rxfh = mlx4_en_get_rxfh,
2038         .set_rxfh = mlx4_en_set_rxfh,
2039         .get_channels = mlx4_en_get_channels,
2040         .set_channels = mlx4_en_set_channels,
2041         .get_ts_info = mlx4_en_get_ts_info,
2042         .set_priv_flags = mlx4_en_set_priv_flags,
2043         .get_priv_flags = mlx4_en_get_priv_flags,
2044         .get_tunable            = mlx4_en_get_tunable,
2045         .set_tunable            = mlx4_en_set_tunable,
2046         .get_module_info = mlx4_en_get_module_info,
2047         .get_module_eeprom = mlx4_en_get_module_eeprom
2048 };
2049
2050
2051
2052
2053