drivers/net/ethernet/mellanox/mlx4/main.c

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
   5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 #include <linux/module.h>
  37 #include <linux/init.h>
  38 #include <linux/errno.h>
  39 #include <linux/pci.h>
  40 #include <linux/dma-mapping.h>
  41 #include <linux/slab.h>
  42 #include <linux/io-mapping.h>
  43 #include <linux/delay.h>
  44 #include <linux/netdevice.h>
  45
  46 #include <linux/mlx4/device.h>
  47 #include <linux/mlx4/doorbell.h>
  48
  49 #include "mlx4.h"
  50 #include "fw.h"
  51 #include "icm.h"
  52
  53 MODULE_AUTHOR("Roland Dreier");
  54 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
  55 MODULE_LICENSE("Dual BSD/GPL");
  56 MODULE_VERSION(DRV_VERSION);
  57
  58 struct workqueue_struct *mlx4_wq;
  59
  60 #ifdef CONFIG_MLX4_DEBUG
  61
  62 int mlx4_debug_level = 0;
  63 module_param_named(debug_level, mlx4_debug_level, int, 0644);
  64 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
  65
  66 #endif /* CONFIG_MLX4_DEBUG */
  67
  68 #ifdef CONFIG_PCI_MSI
  69
  70 static int msi_x = 1;
  71 module_param(msi_x, int, 0444);
  72 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  73
  74 #else /* CONFIG_PCI_MSI */
  75
  76 #define msi_x (0)
  77
  78 #endif /* CONFIG_PCI_MSI */
  79
  80 static int num_vfs;
  81 module_param(num_vfs, int, 0444);
  82 MODULE_PARM_DESC(num_vfs, "enable #num_vfs functions if num_vfs > 0");
  83
  84 static int probe_vf;
  85 module_param(probe_vf, int, 0644);
  86 MODULE_PARM_DESC(probe_vf, "number of vfs to probe by pf driver (num_vfs > 0)");
  87
  88 int mlx4_log_num_mgm_entry_size = 10;
  89 module_param_named(log_num_mgm_entry_size,
  90                         mlx4_log_num_mgm_entry_size, int, 0444);
  91 MODULE_PARM_DESC(log_num_mgm_entry_size, "log mgm size, that defines the num"
  92                                          " of qp per mcg, for example:"
  93                                          " 10 gives 248.range: 9<="
  94                                          " log_num_mgm_entry_size <= 12."
  95                                          " Not in use with device managed"
  96                                          " flow steering");
  97
  98 #define MLX4_VF                                        (1 << 0)
  99
 100 #define HCA_GLOBAL_CAP_MASK            0
 101 #define PF_CONTEXT_BEHAVIOUR_MASK      0
 102
 103 static char mlx4_version[] __devinitdata =
 104         DRV_NAME ": Mellanox ConnectX core driver v"
 105         DRV_VERSION " (" DRV_RELDATE ")\n";
 106
 107 static struct mlx4_profile default_profile = {
 108         .num_qp         = 1 << 18,
 109         .num_srq        = 1 << 16,
 110         .rdmarc_per_qp  = 1 << 4,
 111         .num_cq         = 1 << 16,
 112         .num_mcg        = 1 << 13,
 113         .num_mpt        = 1 << 19,
 114         .num_mtt        = 1 << 20, /* It is really num mtt segements */
 115 };
 116
 117 static int log_num_mac = 7;
 118 module_param_named(log_num_mac, log_num_mac, int, 0444);
 119 MODULE_PARM_DESC(log_num_mac, "Log2 max number of MACs per ETH port (1-7)");
 120
 121 static int log_num_vlan;
 122 module_param_named(log_num_vlan, log_num_vlan, int, 0444);
 123 MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)");
 124 /* Log2 max number of VLANs per ETH port (0-7) */
 125 #define MLX4_LOG_NUM_VLANS 7
 126
 127 static bool use_prio;
 128 module_param_named(use_prio, use_prio, bool, 0444);
 129 MODULE_PARM_DESC(use_prio, "Enable steering by VLAN priority on ETH ports "
 130                   "(0/1, default 0)");
 131
 132 int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG);
 133 module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444);
 134 MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-7)");
 135
 136 static int port_type_array[2] = {MLX4_PORT_TYPE_NONE, MLX4_PORT_TYPE_NONE};
 137 static int arr_argc = 2;
 138 module_param_array(port_type_array, int, &arr_argc, 0444);
 139 MODULE_PARM_DESC(port_type_array, "Array of port types: HW_DEFAULT (0) is default "
 140                                 "1 for IB, 2 for Ethernet");
 141
 142 struct mlx4_port_config {
 143         struct list_head list;
 144         enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1];
 145         struct pci_dev *pdev;
 146 };
 147
 148 int mlx4_check_port_params(struct mlx4_dev *dev,
 149                            enum mlx4_port_type *port_type)
 150 {
 151         int i;
 152
 153         for (i = 0; i < dev->caps.num_ports - 1; i++) {
 154                 if (port_type[i] != port_type[i + 1]) {
 155                         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
 156                                 mlx4_err(dev, "Only same port types supported "
 157                                          "on this HCA, aborting.\n");
 158                                 return -EINVAL;
 159                         }
 160                 }
 161         }
 162
 163         for (i = 0; i < dev->caps.num_ports; i++) {
 164                 if (!(port_type[i] & dev->caps.supported_type[i+1])) {
 165                         mlx4_err(dev, "Requested port type for port %d is not "
 166                                       "supported on this HCA\n", i + 1);
 167                         return -EINVAL;
 168                 }
 169         }
 170         return 0;
 171 }
 172
 173 static void mlx4_set_port_mask(struct mlx4_dev *dev)
 174 {
 175         int i;
 176
 177         for (i = 1; i <= dev->caps.num_ports; ++i)
 178                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 179 }
 180
 181 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
 182 {
 183         int err;
 184         int i;
 185
 186         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
 187         if (err) {
 188                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 189                 return err;
 190         }
 191
 192         if (dev_cap->min_page_sz > PAGE_SIZE) {
 193                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 194                          "kernel PAGE_SIZE of %ld, aborting.\n",
 195                          dev_cap->min_page_sz, PAGE_SIZE);
 196                 return -ENODEV;
 197         }
 198         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
 199                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 200                          "aborting.\n",
 201                          dev_cap->num_ports, MLX4_MAX_PORTS);
 202                 return -ENODEV;
 203         }
 204
 205         if (dev_cap->uar_size > pci_resource_len(dev->pdev, 2)) {
 206                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
 207                          "PCI resource 2 size of 0x%llx, aborting.\n",
 208                          dev_cap->uar_size,
 209                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 210                 return -ENODEV;
 211         }
 212
 213         dev->caps.num_ports          = dev_cap->num_ports;
 214         dev->phys_caps.num_phys_eqs  = MLX4_MAX_EQ_NUM;
 215         for (i = 1; i <= dev->caps.num_ports; ++i) {
 216                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
 217                 dev->caps.ib_mtu_cap[i]     = dev_cap->ib_mtu[i];
 218                 dev->phys_caps.gid_phys_table_len[i]  = dev_cap->max_gids[i];
 219                 dev->phys_caps.pkey_phys_table_len[i] = dev_cap->max_pkeys[i];
 220                 /* set gid and pkey table operating lengths by default
 221                  * to non-sriov values */
 222                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
 223                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
 224                 dev->caps.port_width_cap[i] = dev_cap->max_port_width[i];
 225                 dev->caps.eth_mtu_cap[i]    = dev_cap->eth_mtu[i];
 226                 dev->caps.def_mac[i]        = dev_cap->def_mac[i];
 227                 dev->caps.supported_type[i] = dev_cap->supported_port_types[i];
 228                 dev->caps.suggested_type[i] = dev_cap->suggested_type[i];
 229                 dev->caps.default_sense[i] = dev_cap->default_sense[i];
 230                 dev->caps.trans_type[i]     = dev_cap->trans_type[i];
 231                 dev->caps.vendor_oui[i]     = dev_cap->vendor_oui[i];
 232                 dev->caps.wavelength[i]     = dev_cap->wavelength[i];
 233                 dev->caps.trans_code[i]     = dev_cap->trans_code[i];
 234         }
 235
 236         dev->caps.uar_page_size      = PAGE_SIZE;
 237         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
 238         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
 239         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
 240         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
 241         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
 242         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
 243         dev->caps.max_wqes           = dev_cap->max_qp_sz;
 244         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
 245         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
 246         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
 247         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
 248         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
 249         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
 250         /*
 251          * Subtract 1 from the limit because we need to allocate a
 252          * spare CQE so the HCA HW can tell the difference between an
 253          * empty CQ and a full CQ.
 254          */
 255         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
 256         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
 257         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
 258         dev->caps.reserved_mtts      = dev_cap->reserved_mtts;
 259         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
 260
 261         /* The first 128 UARs are used for EQ doorbells */
 262         dev->caps.reserved_uars      = max_t(int, 128, dev_cap->reserved_uars);
 263         dev->caps.reserved_pds       = dev_cap->reserved_pds;
 264         dev->caps.reserved_xrcds     = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 265                                         dev_cap->reserved_xrcds : 0;
 266         dev->caps.max_xrcds          = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 267                                         dev_cap->max_xrcds : 0;
 268         dev->caps.mtt_entry_sz       = dev_cap->mtt_entry_sz;
 269
 270         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
 271         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
 272         dev->caps.flags              = dev_cap->flags;
 273         dev->caps.flags2             = dev_cap->flags2;
 274         dev->caps.bmme_flags         = dev_cap->bmme_flags;
 275         dev->caps.reserved_lkey      = dev_cap->reserved_lkey;
 276         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
 277         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
 278         dev->caps.max_rss_tbl_sz     = dev_cap->max_rss_tbl_sz;
 279
 280         if (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) {
 281                 dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED;
 282                 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
 283                 dev->caps.fs_log_max_ucast_qp_range_size =
 284                         dev_cap->fs_log_max_ucast_qp_range_size;
 285         } else {
 286                 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER &&
 287                     dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) {
 288                         dev->caps.steering_mode = MLX4_STEERING_MODE_B0;
 289                 } else {
 290                         dev->caps.steering_mode = MLX4_STEERING_MODE_A0;
 291
 292                         if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER ||
 293                             dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)
 294                                 mlx4_warn(dev, "Must have UC_STEER and MC_STEER flags "
 295                                                 "set to use B0 steering. Falling back to A0 steering mode.\n");
 296                 }
 297                 dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev);
 298         }
 299         mlx4_dbg(dev, "Steering mode is: %s\n",
 300                  mlx4_steering_mode_str(dev->caps.steering_mode));
 301
 302         /* Sense port always allowed on supported devices for ConnectX1 and 2 */
 303         if (dev->pdev->device != 0x1003)
 304                 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT;
 305
 306         dev->caps.log_num_macs  = log_num_mac;
 307         dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS;
 308         dev->caps.log_num_prios = use_prio ? 3 : 0;
 309
 310         for (i = 1; i <= dev->caps.num_ports; ++i) {
 311                 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE;
 312                 if (dev->caps.supported_type[i]) {
 313                         /* if only ETH is supported - assign ETH */
 314                         if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH)
 315                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
 316                         /* if only IB is supported, assign IB */
 317                         else if (dev->caps.supported_type[i] ==
 318                                  MLX4_PORT_TYPE_IB)
 319                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_IB;
 320                         else {
 321                                 /* if IB and ETH are supported, we set the port
 322                                  * type according to user selection of port type;
 323                                  * if user selected none, take the FW hint */
 324                                 if (port_type_array[i - 1] == MLX4_PORT_TYPE_NONE)
 325                                         dev->caps.port_type[i] = dev->caps.suggested_type[i] ?
 326                                                 MLX4_PORT_TYPE_ETH : MLX4_PORT_TYPE_IB;
 327                                 else
 328                                         dev->caps.port_type[i] = port_type_array[i - 1];
 329                         }
 330                 }
 331                 /*
 332                  * Link sensing is allowed on the port if 3 conditions are true:
 333                  * 1. Both protocols are supported on the port.
 334                  * 2. Different types are supported on the port
 335                  * 3. FW declared that it supports link sensing
 336                  */
 337                 mlx4_priv(dev)->sense.sense_allowed[i] =
 338                         ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) &&
 339                          (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
 340                          (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT));
 341
 342                 /*
 343                  * If "default_sense" bit is set, we move the port to "AUTO" mode
 344                  * and perform sense_port FW command to try and set the correct
 345                  * port type from beginning
 346                  */
 347                 if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) {
 348                         enum mlx4_port_type sensed_port = MLX4_PORT_TYPE_NONE;
 349                         dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO;
 350                         mlx4_SENSE_PORT(dev, i, &sensed_port);
 351                         if (sensed_port != MLX4_PORT_TYPE_NONE)
 352                                 dev->caps.port_type[i] = sensed_port;
 353                 } else {
 354                         dev->caps.possible_type[i] = dev->caps.port_type[i];
 355                 }
 356
 357                 if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) {
 358                         dev->caps.log_num_macs = dev_cap->log_max_macs[i];
 359                         mlx4_warn(dev, "Requested number of MACs is too much "
 360                                   "for port %d, reducing to %d.\n",
 361                                   i, 1 << dev->caps.log_num_macs);
 362                 }
 363                 if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) {
 364                         dev->caps.log_num_vlans = dev_cap->log_max_vlans[i];
 365                         mlx4_warn(dev, "Requested number of VLANs is too much "
 366                                   "for port %d, reducing to %d.\n",
 367                                   i, 1 << dev->caps.log_num_vlans);
 368                 }
 369         }
 370
 371         dev->caps.max_counters = 1 << ilog2(dev_cap->max_counters);
 372
 373         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
 374         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] =
 375                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] =
 376                 (1 << dev->caps.log_num_macs) *
 377                 (1 << dev->caps.log_num_vlans) *
 378                 (1 << dev->caps.log_num_prios) *
 379                 dev->caps.num_ports;
 380         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH;
 381
 382         dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] +
 383                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] +
 384                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] +
 385                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH];
 386
 387         return 0;
 388 }
 389 /*The function checks if there are live vf, return the num of them*/
 390 static int mlx4_how_many_lives_vf(struct mlx4_dev *dev)
 391 {
 392         struct mlx4_priv *priv = mlx4_priv(dev);
 393         struct mlx4_slave_state *s_state;
 394         int i;
 395         int ret = 0;
 396
 397         for (i = 1/*the ppf is 0*/; i < dev->num_slaves; ++i) {
 398                 s_state = &priv->mfunc.master.slave_state[i];
 399                 if (s_state->active && s_state->last_cmd !=
 400                     MLX4_COMM_CMD_RESET) {
 401                         mlx4_warn(dev, "%s: slave: %d is still active\n",
 402                                   __func__, i);
 403                         ret++;
 404                 }
 405         }
 406         return ret;
 407 }
 408
 409 int mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey)
 410 {
 411         u32 qk = MLX4_RESERVED_QKEY_BASE;
 412         if (qpn >= dev->caps.base_tunnel_sqpn + 8 * MLX4_MFUNC_MAX ||
 413             qpn < dev->caps.sqp_start)
 414                 return -EINVAL;
 415
 416         if (qpn >= dev->caps.base_tunnel_sqpn)
 417                 /* tunnel qp */
 418                 qk += qpn - dev->caps.base_tunnel_sqpn;
 419         else
 420                 qk += qpn - dev->caps.sqp_start;
 421         *qkey = qk;
 422         return 0;
 423 }
 424 EXPORT_SYMBOL(mlx4_get_parav_qkey);
 425
 426 int mlx4_is_slave_active(struct mlx4_dev *dev, int slave)
 427 {
 428         struct mlx4_priv *priv = mlx4_priv(dev);
 429         struct mlx4_slave_state *s_slave;
 430
 431         if (!mlx4_is_master(dev))
 432                 return 0;
 433
 434         s_slave = &priv->mfunc.master.slave_state[slave];
 435         return !!s_slave->active;
 436 }
 437 EXPORT_SYMBOL(mlx4_is_slave_active);
 438
 439 static int mlx4_slave_cap(struct mlx4_dev *dev)
 440 {
 441         int                        err;
 442         u32                        page_size;
 443         struct mlx4_dev_cap        dev_cap;
 444         struct mlx4_func_cap       func_cap;
 445         struct mlx4_init_hca_param hca_param;
 446         int                        i;
 447
 448         memset(&hca_param, 0, sizeof(hca_param));
 449         err = mlx4_QUERY_HCA(dev, &hca_param);
 450         if (err) {
 451                 mlx4_err(dev, "QUERY_HCA command failed, aborting.\n");
 452                 return err;
 453         }
 454
 455         /*fail if the hca has an unknown capability */
 456         if ((hca_param.global_caps | HCA_GLOBAL_CAP_MASK) !=
 457             HCA_GLOBAL_CAP_MASK) {
 458                 mlx4_err(dev, "Unknown hca global capabilities\n");
 459                 return -ENOSYS;
 460         }
 461
 462         mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz;
 463
 464         memset(&dev_cap, 0, sizeof(dev_cap));
 465         dev->caps.max_qp_dest_rdma = 1 << hca_param.log_rd_per_qp;
 466         err = mlx4_dev_cap(dev, &dev_cap);
 467         if (err) {
 468                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 469                 return err;
 470         }
 471
 472         err = mlx4_QUERY_FW(dev);
 473         if (err)
 474                 mlx4_err(dev, "QUERY_FW command failed: could not get FW version.\n");
 475
 476         page_size = ~dev->caps.page_size_cap + 1;
 477         mlx4_warn(dev, "HCA minimum page size:%d\n", page_size);
 478         if (page_size > PAGE_SIZE) {
 479                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 480                          "kernel PAGE_SIZE of %ld, aborting.\n",
 481                          page_size, PAGE_SIZE);
 482                 return -ENODEV;
 483         }
 484
 485         /* slave gets uar page size from QUERY_HCA fw command */
 486         dev->caps.uar_page_size = 1 << (hca_param.uar_page_sz + 12);
 487
 488         /* TODO: relax this assumption */
 489         if (dev->caps.uar_page_size != PAGE_SIZE) {
 490                 mlx4_err(dev, "UAR size:%d != kernel PAGE_SIZE of %ld\n",
 491                          dev->caps.uar_page_size, PAGE_SIZE);
 492                 return -ENODEV;
 493         }
 494
 495         memset(&func_cap, 0, sizeof(func_cap));
 496         err = mlx4_QUERY_FUNC_CAP(dev, &func_cap);
 497         if (err) {
 498                 mlx4_err(dev, "QUERY_FUNC_CAP command failed, aborting.\n");
 499                 return err;
 500         }
 501
 502         if ((func_cap.pf_context_behaviour | PF_CONTEXT_BEHAVIOUR_MASK) !=
 503             PF_CONTEXT_BEHAVIOUR_MASK) {
 504                 mlx4_err(dev, "Unknown pf context behaviour\n");
 505                 return -ENOSYS;
 506         }
 507
 508         dev->caps.num_ports             = func_cap.num_ports;
 509         dev->caps.num_qps               = func_cap.qp_quota;
 510         dev->caps.num_srqs              = func_cap.srq_quota;
 511         dev->caps.num_cqs               = func_cap.cq_quota;
 512         dev->caps.num_eqs               = func_cap.max_eq;
 513         dev->caps.reserved_eqs          = func_cap.reserved_eq;
 514         dev->caps.num_mpts              = func_cap.mpt_quota;
 515         dev->caps.num_mtts              = func_cap.mtt_quota;
 516         dev->caps.num_pds               = MLX4_NUM_PDS;
 517         dev->caps.num_mgms              = 0;
 518         dev->caps.num_amgms             = 0;
 519
 520         if (dev->caps.num_ports > MLX4_MAX_PORTS) {
 521                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 522                          "aborting.\n", dev->caps.num_ports, MLX4_MAX_PORTS);
 523                 return -ENODEV;
 524         }
 525
 526         for (i = 1; i <= dev->caps.num_ports; ++i) {
 527                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 528                 if (mlx4_get_slave_pkey_gid_tbl_len(dev, i,
 529                                                     &dev->caps.gid_table_len[i],
 530                                                     &dev->caps.pkey_table_len[i]))
 531                         return -ENODEV;
 532         }
 533
 534         if (dev->caps.uar_page_size * (dev->caps.num_uars -
 535                                        dev->caps.reserved_uars) >
 536                                        pci_resource_len(dev->pdev, 2)) {
 537                 mlx4_err(dev, "HCA reported UAR region size of 0x%x bigger than "
 538                          "PCI resource 2 size of 0x%llx, aborting.\n",
 539                          dev->caps.uar_page_size * dev->caps.num_uars,
 540                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 541                 return -ENODEV;
 542         }
 543
 544         return 0;
 545 }
 546
 547 /*
 548  * Change the port configuration of the device.
 549  * Every user of this function must hold the port mutex.
 550  */
 551 int mlx4_change_port_types(struct mlx4_dev *dev,
 552                            enum mlx4_port_type *port_types)
 553 {
 554         int err = 0;
 555         int change = 0;
 556         int port;
 557
 558         for (port = 0; port <  dev->caps.num_ports; port++) {
 559                 /* Change the port type only if the new type is different
 560                  * from the current, and not set to Auto */
 561                 if (port_types[port] != dev->caps.port_type[port + 1])
 562                         change = 1;
 563         }
 564         if (change) {
 565                 mlx4_unregister_device(dev);
 566                 for (port = 1; port <= dev->caps.num_ports; port++) {
 567                         mlx4_CLOSE_PORT(dev, port);
 568                         dev->caps.port_type[port] = port_types[port - 1];
 569                         err = mlx4_SET_PORT(dev, port, -1);
 570                         if (err) {
 571                                 mlx4_err(dev, "Failed to set port %d, "
 572                                               "aborting\n", port);
 573                                 goto out;
 574                         }
 575                 }
 576                 mlx4_set_port_mask(dev);
 577                 err = mlx4_register_device(dev);
 578         }
 579
 580 out:
 581         return err;
 582 }
 583
 584 static ssize_t show_port_type(struct device *dev,
 585                               struct device_attribute *attr,
 586                               char *buf)
 587 {
 588         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 589                                                    port_attr);
 590         struct mlx4_dev *mdev = info->dev;
 591         char type[8];
 592
 593         sprintf(type, "%s",
 594                 (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ?
 595                 "ib" : "eth");
 596         if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO)
 597                 sprintf(buf, "auto (%s)\n", type);
 598         else
 599                 sprintf(buf, "%s\n", type);
 600
 601         return strlen(buf);
 602 }
 603
 604 static ssize_t set_port_type(struct device *dev,
 605                              struct device_attribute *attr,
 606                              const char *buf, size_t count)
 607 {
 608         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 609                                                    port_attr);
 610         struct mlx4_dev *mdev = info->dev;
 611         struct mlx4_priv *priv = mlx4_priv(mdev);
 612         enum mlx4_port_type types[MLX4_MAX_PORTS];
 613         enum mlx4_port_type new_types[MLX4_MAX_PORTS];
 614         int i;
 615         int err = 0;
 616
 617         if (!strcmp(buf, "ib\n"))
 618                 info->tmp_type = MLX4_PORT_TYPE_IB;
 619         else if (!strcmp(buf, "eth\n"))
 620                 info->tmp_type = MLX4_PORT_TYPE_ETH;
 621         else if (!strcmp(buf, "auto\n"))
 622                 info->tmp_type = MLX4_PORT_TYPE_AUTO;
 623         else {
 624                 mlx4_err(mdev, "%s is not supported port type\n", buf);
 625                 return -EINVAL;
 626         }
 627
 628         mlx4_stop_sense(mdev);
 629         mutex_lock(&priv->port_mutex);
 630         /* Possible type is always the one that was delivered */
 631         mdev->caps.possible_type[info->port] = info->tmp_type;
 632
 633         for (i = 0; i < mdev->caps.num_ports; i++) {
 634                 types[i] = priv->port[i+1].tmp_type ? priv->port[i+1].tmp_type :
 635                                         mdev->caps.possible_type[i+1];
 636                 if (types[i] == MLX4_PORT_TYPE_AUTO)
 637                         types[i] = mdev->caps.port_type[i+1];
 638         }
 639
 640         if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
 641             !(mdev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)) {
 642                 for (i = 1; i <= mdev->caps.num_ports; i++) {
 643                         if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) {
 644                                 mdev->caps.possible_type[i] = mdev->caps.port_type[i];
 645                                 err = -EINVAL;
 646                         }
 647                 }
 648         }
 649         if (err) {
 650                 mlx4_err(mdev, "Auto sensing is not supported on this HCA. "
 651                                "Set only 'eth' or 'ib' for both ports "
 652                                "(should be the same)\n");
 653                 goto out;
 654         }
 655
 656         mlx4_do_sense_ports(mdev, new_types, types);
 657
 658         err = mlx4_check_port_params(mdev, new_types);
 659         if (err)
 660                 goto out;
 661
 662         /* We are about to apply the changes after the configuration
 663          * was verified, no need to remember the temporary types
 664          * any more */
 665         for (i = 0; i < mdev->caps.num_ports; i++)
 666                 priv->port[i + 1].tmp_type = 0;
 667
 668         err = mlx4_change_port_types(mdev, new_types);
 669
 670 out:
 671         mlx4_start_sense(mdev);
 672         mutex_unlock(&priv->port_mutex);
 673         return err ? err : count;
 674 }
 675
 676 enum ibta_mtu {
 677         IB_MTU_256  = 1,
 678         IB_MTU_512  = 2,
 679         IB_MTU_1024 = 3,
 680         IB_MTU_2048 = 4,
 681         IB_MTU_4096 = 5
 682 };
 683
 684 static inline int int_to_ibta_mtu(int mtu)
 685 {
 686         switch (mtu) {
 687         case 256:  return IB_MTU_256;
 688         case 512:  return IB_MTU_512;
 689         case 1024: return IB_MTU_1024;
 690         case 2048: return IB_MTU_2048;
 691         case 4096: return IB_MTU_4096;
 692         default: return -1;
 693         }
 694 }
 695
 696 static inline int ibta_mtu_to_int(enum ibta_mtu mtu)
 697 {
 698         switch (mtu) {
 699         case IB_MTU_256:  return  256;
 700         case IB_MTU_512:  return  512;
 701         case IB_MTU_1024: return 1024;
 702         case IB_MTU_2048: return 2048;
 703         case IB_MTU_4096: return 4096;
 704         default: return -1;
 705         }
 706 }
 707
 708 static ssize_t show_port_ib_mtu(struct device *dev,
 709                              struct device_attribute *attr,
 710                              char *buf)
 711 {
 712         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 713                                                    port_mtu_attr);
 714         struct mlx4_dev *mdev = info->dev;
 715
 716         if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH)
 717                 mlx4_warn(mdev, "port level mtu is only used for IB ports\n");
 718
 719         sprintf(buf, "%d\n",
 720                         ibta_mtu_to_int(mdev->caps.port_ib_mtu[info->port]));
 721         return strlen(buf);
 722 }
 723
 724 static ssize_t set_port_ib_mtu(struct device *dev,
 725                              struct device_attribute *attr,
 726                              const char *buf, size_t count)
 727 {
 728         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 729                                                    port_mtu_attr);
 730         struct mlx4_dev *mdev = info->dev;
 731         struct mlx4_priv *priv = mlx4_priv(mdev);
 732         int err, port, mtu, ibta_mtu = -1;
 733
 734         if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) {
 735                 mlx4_warn(mdev, "port level mtu is only used for IB ports\n");
 736                 return -EINVAL;
 737         }
 738
 739         err = sscanf(buf, "%d", &mtu);
 740         if (err > 0)
 741                 ibta_mtu = int_to_ibta_mtu(mtu);
 742
 743         if (err <= 0 || ibta_mtu < 0) {
 744                 mlx4_err(mdev, "%s is invalid IBTA mtu\n", buf);
 745                 return -EINVAL;
 746         }
 747
 748         mdev->caps.port_ib_mtu[info->port] = ibta_mtu;
 749
 750         mlx4_stop_sense(mdev);
 751         mutex_lock(&priv->port_mutex);
 752         mlx4_unregister_device(mdev);
 753         for (port = 1; port <= mdev->caps.num_ports; port++) {
 754                 mlx4_CLOSE_PORT(mdev, port);
 755                 err = mlx4_SET_PORT(mdev, port, -1);
 756                 if (err) {
 757                         mlx4_err(mdev, "Failed to set port %d, "
 758                                       "aborting\n", port);
 759                         goto err_set_port;
 760                 }
 761         }
 762         err = mlx4_register_device(mdev);
 763 err_set_port:
 764         mutex_unlock(&priv->port_mutex);
 765         mlx4_start_sense(mdev);
 766         return err ? err : count;
 767 }
 768
 769 static int mlx4_load_fw(struct mlx4_dev *dev)
 770 {
 771         struct mlx4_priv *priv = mlx4_priv(dev);
 772         int err;
 773
 774         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
 775                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
 776         if (!priv->fw.fw_icm) {
 777                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
 778                 return -ENOMEM;
 779         }
 780
 781         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
 782         if (err) {
 783                 mlx4_err(dev, "MAP_FA command failed, aborting.\n");
 784                 goto err_free;
 785         }
 786
 787         err = mlx4_RUN_FW(dev);
 788         if (err) {
 789                 mlx4_err(dev, "RUN_FW command failed, aborting.\n");
 790                 goto err_unmap_fa;
 791         }
 792
 793         return 0;
 794
 795 err_unmap_fa:
 796         mlx4_UNMAP_FA(dev);
 797
 798 err_free:
 799         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 800         return err;
 801 }
 802
 803 static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
 804                                 int cmpt_entry_sz)
 805 {
 806         struct mlx4_priv *priv = mlx4_priv(dev);
 807         int err;
 808         int num_eqs;
 809
 810         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
 811                                   cmpt_base +
 812                                   ((u64) (MLX4_CMPT_TYPE_QP *
 813                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 814                                   cmpt_entry_sz, dev->caps.num_qps,
 815                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 816                                   0, 0);
 817         if (err)
 818                 goto err;
 819
 820         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
 821                                   cmpt_base +
 822                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
 823                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 824                                   cmpt_entry_sz, dev->caps.num_srqs,
 825                                   dev->caps.reserved_srqs, 0, 0);
 826         if (err)
 827                 goto err_qp;
 828
 829         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
 830                                   cmpt_base +
 831                                   ((u64) (MLX4_CMPT_TYPE_CQ *
 832                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 833                                   cmpt_entry_sz, dev->caps.num_cqs,
 834                                   dev->caps.reserved_cqs, 0, 0);
 835         if (err)
 836                 goto err_srq;
 837
 838         num_eqs = (mlx4_is_master(dev)) ? dev->phys_caps.num_phys_eqs :
 839                   dev->caps.num_eqs;
 840         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
 841                                   cmpt_base +
 842                                   ((u64) (MLX4_CMPT_TYPE_EQ *
 843                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 844                                   cmpt_entry_sz, num_eqs, num_eqs, 0, 0);
 845         if (err)
 846                 goto err_cq;
 847
 848         return 0;
 849
 850 err_cq:
 851         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 852
 853 err_srq:
 854         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 855
 856 err_qp:
 857         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 858
 859 err:
 860         return err;
 861 }
 862
 863 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
 864                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
 865 {
 866         struct mlx4_priv *priv = mlx4_priv(dev);
 867         u64 aux_pages;
 868         int num_eqs;
 869         int err;
 870
 871         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
 872         if (err) {
 873                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
 874                 return err;
 875         }
 876
 877         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
 878                  (unsigned long long) icm_size >> 10,
 879                  (unsigned long long) aux_pages << 2);
 880
 881         priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages,
 882                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
 883         if (!priv->fw.aux_icm) {
 884                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
 885                 return -ENOMEM;
 886         }
 887
 888         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
 889         if (err) {
 890                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
 891                 goto err_free_aux;
 892         }
 893
 894         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
 895         if (err) {
 896                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
 897                 goto err_unmap_aux;
 898         }
 899
 900
 901         num_eqs = (mlx4_is_master(dev)) ? dev->phys_caps.num_phys_eqs :
 902                    dev->caps.num_eqs;
 903         err = mlx4_init_icm_table(dev, &priv->eq_table.table,
 904                                   init_hca->eqc_base, dev_cap->eqc_entry_sz,
 905                                   num_eqs, num_eqs, 0, 0);
 906         if (err) {
 907                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
 908                 goto err_unmap_cmpt;
 909         }
 910
 911         /*
 912          * Reserved MTT entries must be aligned up to a cacheline
 913          * boundary, since the FW will write to them, while the driver
 914          * writes to all other MTT entries. (The variable
 915          * dev->caps.mtt_entry_sz below is really the MTT segment
 916          * size, not the raw entry size)
 917          */
 918         dev->caps.reserved_mtts =
 919                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
 920                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
 921
 922         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
 923                                   init_hca->mtt_base,
 924                                   dev->caps.mtt_entry_sz,
 925                                   dev->caps.num_mtts,
 926                                   dev->caps.reserved_mtts, 1, 0);
 927         if (err) {
 928                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
 929                 goto err_unmap_eq;
 930         }
 931
 932         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
 933                                   init_hca->dmpt_base,
 934                                   dev_cap->dmpt_entry_sz,
 935                                   dev->caps.num_mpts,
 936                                   dev->caps.reserved_mrws, 1, 1);
 937         if (err) {
 938                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
 939                 goto err_unmap_mtt;
 940         }
 941
 942         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
 943                                   init_hca->qpc_base,
 944                                   dev_cap->qpc_entry_sz,
 945                                   dev->caps.num_qps,
 946                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 947                                   0, 0);
 948         if (err) {
 949                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
 950                 goto err_unmap_dmpt;
 951         }
 952
 953         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
 954                                   init_hca->auxc_base,
 955                                   dev_cap->aux_entry_sz,
 956                                   dev->caps.num_qps,
 957                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 958                                   0, 0);
 959         if (err) {
 960                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
 961                 goto err_unmap_qp;
 962         }
 963
 964         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
 965                                   init_hca->altc_base,
 966                                   dev_cap->altc_entry_sz,
 967                                   dev->caps.num_qps,
 968                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 969                                   0, 0);
 970         if (err) {
 971                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
 972                 goto err_unmap_auxc;
 973         }
 974
 975         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
 976                                   init_hca->rdmarc_base,
 977                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
 978                                   dev->caps.num_qps,
 979                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 980                                   0, 0);
 981         if (err) {
 982                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
 983                 goto err_unmap_altc;
 984         }
 985
 986         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
 987                                   init_hca->cqc_base,
 988                                   dev_cap->cqc_entry_sz,
 989                                   dev->caps.num_cqs,
 990                                   dev->caps.reserved_cqs, 0, 0);
 991         if (err) {
 992                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
 993                 goto err_unmap_rdmarc;
 994         }
 995
 996         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
 997                                   init_hca->srqc_base,
 998                                   dev_cap->srq_entry_sz,
 999                                   dev->caps.num_srqs,
1000                                   dev->caps.reserved_srqs, 0, 0);
1001         if (err) {
1002                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
1003                 goto err_unmap_cq;
1004         }
1005
1006         /*
1007          * For flow steering device managed mode it is required to use
1008          * mlx4_init_icm_table. For B0 steering mode it's not strictly
1009          * required, but for simplicity just map the whole multicast
1010          * group table now.  The table isn't very big and it's a lot
1011          * easier than trying to track ref counts.
1012          */
1013         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
1014                                   init_hca->mc_base,
1015                                   mlx4_get_mgm_entry_size(dev),
1016                                   dev->caps.num_mgms + dev->caps.num_amgms,
1017                                   dev->caps.num_mgms + dev->caps.num_amgms,
1018                                   0, 0);
1019         if (err) {
1020                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
1021                 goto err_unmap_srq;
1022         }
1023
1024         return 0;
1025
1026 err_unmap_srq:
1027         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1028
1029 err_unmap_cq:
1030         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1031
1032 err_unmap_rdmarc:
1033         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1034
1035 err_unmap_altc:
1036         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1037
1038 err_unmap_auxc:
1039         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1040
1041 err_unmap_qp:
1042         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1043
1044 err_unmap_dmpt:
1045         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1046
1047 err_unmap_mtt:
1048         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1049
1050 err_unmap_eq:
1051         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1052
1053 err_unmap_cmpt:
1054         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1055         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1056         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1057         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1058
1059 err_unmap_aux:
1060         mlx4_UNMAP_ICM_AUX(dev);
1061
1062 err_free_aux:
1063         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1064
1065         return err;
1066 }
1067
1068 static void mlx4_free_icms(struct mlx4_dev *dev)
1069 {
1070         struct mlx4_priv *priv = mlx4_priv(dev);
1071
1072         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
1073         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1074         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1075         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1076         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1077         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1078         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1079         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1080         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1081         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1082         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1083         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1084         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1085         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1086
1087         mlx4_UNMAP_ICM_AUX(dev);
1088         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1089 }
1090
1091 static void mlx4_slave_exit(struct mlx4_dev *dev)
1092 {
1093         struct mlx4_priv *priv = mlx4_priv(dev);
1094
1095         down(&priv->cmd.slave_sem);
1096         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_TIME))
1097                 mlx4_warn(dev, "Failed to close slave function.\n");
1098         up(&priv->cmd.slave_sem);
1099 }
1100
1101 static int map_bf_area(struct mlx4_dev *dev)
1102 {
1103         struct mlx4_priv *priv = mlx4_priv(dev);
1104         resource_size_t bf_start;
1105         resource_size_t bf_len;
1106         int err = 0;
1107
1108         if (!dev->caps.bf_reg_size)
1109                 return -ENXIO;
1110
1111         bf_start = pci_resource_start(dev->pdev, 2) +
1112                         (dev->caps.num_uars << PAGE_SHIFT);
1113         bf_len = pci_resource_len(dev->pdev, 2) -
1114                         (dev->caps.num_uars << PAGE_SHIFT);
1115         priv->bf_mapping = io_mapping_create_wc(bf_start, bf_len);
1116         if (!priv->bf_mapping)
1117                 err = -ENOMEM;
1118
1119         return err;
1120 }
1121
1122 static void unmap_bf_area(struct mlx4_dev *dev)
1123 {
1124         if (mlx4_priv(dev)->bf_mapping)
1125                 io_mapping_free(mlx4_priv(dev)->bf_mapping);
1126 }
1127
1128 static void mlx4_close_hca(struct mlx4_dev *dev)
1129 {
1130         unmap_bf_area(dev);
1131         if (mlx4_is_slave(dev))
1132                 mlx4_slave_exit(dev);
1133         else {
1134                 mlx4_CLOSE_HCA(dev, 0);
1135                 mlx4_free_icms(dev);
1136                 mlx4_UNMAP_FA(dev);
1137                 mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
1138         }
1139 }
1140
1141 static int mlx4_init_slave(struct mlx4_dev *dev)
1142 {
1143         struct mlx4_priv *priv = mlx4_priv(dev);
1144         u64 dma = (u64) priv->mfunc.vhcr_dma;
1145         int num_of_reset_retries = NUM_OF_RESET_RETRIES;
1146         int ret_from_reset = 0;
1147         u32 slave_read;
1148         u32 cmd_channel_ver;
1149
1150         down(&priv->cmd.slave_sem);
1151         priv->cmd.max_cmds = 1;
1152         mlx4_warn(dev, "Sending reset\n");
1153         ret_from_reset = mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0,
1154                                        MLX4_COMM_TIME);
1155         /* if we are in the middle of flr the slave will try
1156          * NUM_OF_RESET_RETRIES times before leaving.*/
1157         if (ret_from_reset) {
1158                 if (MLX4_DELAY_RESET_SLAVE == ret_from_reset) {
1159                         msleep(SLEEP_TIME_IN_RESET);
1160                         while (ret_from_reset && num_of_reset_retries) {
1161                                 mlx4_warn(dev, "slave is currently in the"
1162                                           "middle of FLR. retrying..."
1163                                           "(try num:%d)\n",
1164                                           (NUM_OF_RESET_RETRIES -
1165                                            num_of_reset_retries  + 1));
1166                                 ret_from_reset =
1167                                         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET,
1168                                                       0, MLX4_COMM_TIME);
1169                                 num_of_reset_retries = num_of_reset_retries - 1;
1170                         }
1171                 } else
1172                         goto err;
1173         }
1174
1175         /* check the driver version - the slave I/F revision
1176          * must match the master's */
1177         slave_read = swab32(readl(&priv->mfunc.comm->slave_read));
1178         cmd_channel_ver = mlx4_comm_get_version();
1179
1180         if (MLX4_COMM_GET_IF_REV(cmd_channel_ver) !=
1181                 MLX4_COMM_GET_IF_REV(slave_read)) {
1182                 mlx4_err(dev, "slave driver version is not supported"
1183                          " by the master\n");
1184                 goto err;
1185         }
1186
1187         mlx4_warn(dev, "Sending vhcr0\n");
1188         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR0, dma >> 48,
1189                                                     MLX4_COMM_TIME))
1190                 goto err;
1191         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR1, dma >> 32,
1192                                                     MLX4_COMM_TIME))
1193                 goto err;
1194         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR2, dma >> 16,
1195                                                     MLX4_COMM_TIME))
1196                 goto err;
1197         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR_EN, dma, MLX4_COMM_TIME))
1198                 goto err;
1199         up(&priv->cmd.slave_sem);
1200         return 0;
1201
1202 err:
1203         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, 0);
1204         up(&priv->cmd.slave_sem);
1205         return -EIO;
1206 }
1207
1208 static void mlx4_parav_master_pf_caps(struct mlx4_dev *dev)
1209 {
1210         int i;
1211
1212         for (i = 1; i <= dev->caps.num_ports; i++) {
1213                 dev->caps.gid_table_len[i] = 1;
1214                 dev->caps.pkey_table_len[i] =
1215                         dev->phys_caps.pkey_phys_table_len[i] - 1;
1216         }
1217 }
1218
1219 static int mlx4_init_hca(struct mlx4_dev *dev)
1220 {
1221         struct mlx4_priv          *priv = mlx4_priv(dev);
1222         struct mlx4_adapter        adapter;
1223         struct mlx4_dev_cap        dev_cap;
1224         struct mlx4_mod_stat_cfg   mlx4_cfg;
1225         struct mlx4_profile        profile;
1226         struct mlx4_init_hca_param init_hca;
1227         u64 icm_size;
1228         int err;
1229
1230         if (!mlx4_is_slave(dev)) {
1231                 err = mlx4_QUERY_FW(dev);
1232                 if (err) {
1233                         if (err == -EACCES)
1234                                 mlx4_info(dev, "non-primary physical function, skipping.\n");
1235                         else
1236                                 mlx4_err(dev, "QUERY_FW command failed, aborting.\n");
1237                         return err;
1238                 }
1239
1240                 err = mlx4_load_fw(dev);
1241                 if (err) {
1242                         mlx4_err(dev, "Failed to start FW, aborting.\n");
1243                         return err;
1244                 }
1245
1246                 mlx4_cfg.log_pg_sz_m = 1;
1247                 mlx4_cfg.log_pg_sz = 0;
1248                 err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg);
1249                 if (err)
1250                         mlx4_warn(dev, "Failed to override log_pg_sz parameter\n");
1251
1252                 err = mlx4_dev_cap(dev, &dev_cap);
1253                 if (err) {
1254                         mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
1255                         goto err_stop_fw;
1256                 }
1257
1258                 if (mlx4_is_master(dev))
1259                         mlx4_parav_master_pf_caps(dev);
1260
1261                 priv->fs_hash_mode = MLX4_FS_L2_HASH;
1262
1263                 switch (priv->fs_hash_mode) {
1264                 case MLX4_FS_L2_HASH:
1265                         init_hca.fs_hash_enable_bits = 0;
1266                         break;
1267
1268                 case MLX4_FS_L2_L3_L4_HASH:
1269                         /* Enable flow steering with
1270                          * udp unicast and tcp unicast
1271                          */
1272                         init_hca.fs_hash_enable_bits =
1273                                 MLX4_FS_UDP_UC_EN | MLX4_FS_TCP_UC_EN;
1274                         break;
1275                 }
1276
1277                 profile = default_profile;
1278                 if (dev->caps.steering_mode ==
1279                     MLX4_STEERING_MODE_DEVICE_MANAGED)
1280                         profile.num_mcg = MLX4_FS_NUM_MCG;
1281
1282                 icm_size = mlx4_make_profile(dev, &profile, &dev_cap,
1283                                              &init_hca);
1284                 if ((long long) icm_size < 0) {
1285                         err = icm_size;
1286                         goto err_stop_fw;
1287                 }
1288
1289                 dev->caps.max_fmr_maps = (1 << (32 - ilog2(dev->caps.num_mpts))) - 1;
1290
1291                 init_hca.log_uar_sz = ilog2(dev->caps.num_uars);
1292                 init_hca.uar_page_sz = PAGE_SHIFT - 12;
1293
1294                 err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
1295                 if (err)
1296                         goto err_stop_fw;
1297
1298                 err = mlx4_INIT_HCA(dev, &init_hca);
1299                 if (err) {
1300                         mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
1301                         goto err_free_icm;
1302                 }
1303         } else {
1304                 err = mlx4_init_slave(dev);
1305                 if (err) {
1306                         mlx4_err(dev, "Failed to initialize slave\n");
1307                         return err;
1308                 }
1309
1310                 err = mlx4_slave_cap(dev);
1311                 if (err) {
1312                         mlx4_err(dev, "Failed to obtain slave caps\n");
1313                         goto err_close;
1314                 }
1315         }
1316
1317         if (map_bf_area(dev))
1318                 mlx4_dbg(dev, "Failed to map blue flame area\n");
1319
1320         /*Only the master set the ports, all the rest got it from it.*/
1321         if (!mlx4_is_slave(dev))
1322                 mlx4_set_port_mask(dev);
1323
1324         err = mlx4_QUERY_ADAPTER(dev, &adapter);
1325         if (err) {
1326                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
1327                 goto unmap_bf;
1328         }
1329
1330         priv->eq_table.inta_pin = adapter.inta_pin;
1331         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
1332
1333         return 0;
1334
1335 unmap_bf:
1336         unmap_bf_area(dev);
1337
1338 err_close:
1339         mlx4_close_hca(dev);
1340
1341 err_free_icm:
1342         if (!mlx4_is_slave(dev))
1343                 mlx4_free_icms(dev);
1344
1345 err_stop_fw:
1346         if (!mlx4_is_slave(dev)) {
1347                 mlx4_UNMAP_FA(dev);
1348                 mlx4_free_icm(dev, priv->fw.fw_icm, 0);
1349         }
1350         return err;
1351 }
1352
1353 static int mlx4_init_counters_table(struct mlx4_dev *dev)
1354 {
1355         struct mlx4_priv *priv = mlx4_priv(dev);
1356         int nent;
1357
1358         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1359                 return -ENOENT;
1360
1361         nent = dev->caps.max_counters;
1362         return mlx4_bitmap_init(&priv->counters_bitmap, nent, nent - 1, 0, 0);
1363 }
1364
1365 static void mlx4_cleanup_counters_table(struct mlx4_dev *dev)
1366 {
1367         mlx4_bitmap_cleanup(&mlx4_priv(dev)->counters_bitmap);
1368 }
1369
1370 int __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
1371 {
1372         struct mlx4_priv *priv = mlx4_priv(dev);
1373
1374         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1375                 return -ENOENT;
1376
1377         *idx = mlx4_bitmap_alloc(&priv->counters_bitmap);
1378         if (*idx == -1)
1379                 return -ENOMEM;
1380
1381         return 0;
1382 }
1383
1384 int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
1385 {
1386         u64 out_param;
1387         int err;
1388
1389         if (mlx4_is_mfunc(dev)) {
1390                 err = mlx4_cmd_imm(dev, 0, &out_param, RES_COUNTER,
1391                                    RES_OP_RESERVE, MLX4_CMD_ALLOC_RES,
1392                                    MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
1393                 if (!err)
1394                         *idx = get_param_l(&out_param);
1395
1396                 return err;
1397         }
1398         return __mlx4_counter_alloc(dev, idx);
1399 }
1400 EXPORT_SYMBOL_GPL(mlx4_counter_alloc);
1401
1402 void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
1403 {
1404         mlx4_bitmap_free(&mlx4_priv(dev)->counters_bitmap, idx);
1405         return;
1406 }
1407
1408 void mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
1409 {
1410         u64 in_param;
1411
1412         if (mlx4_is_mfunc(dev)) {
1413                 set_param_l(&in_param, idx);
1414                 mlx4_cmd(dev, in_param, RES_COUNTER, RES_OP_RESERVE,
1415                          MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A,
1416                          MLX4_CMD_WRAPPED);
1417                 return;
1418         }
1419         __mlx4_counter_free(dev, idx);
1420 }
1421 EXPORT_SYMBOL_GPL(mlx4_counter_free);
1422
1423 static int mlx4_setup_hca(struct mlx4_dev *dev)
1424 {
1425         struct mlx4_priv *priv = mlx4_priv(dev);
1426         int err;
1427         int port;
1428         __be32 ib_port_default_caps;
1429
1430         err = mlx4_init_uar_table(dev);
1431         if (err) {
1432                 mlx4_err(dev, "Failed to initialize "
1433                          "user access region table, aborting.\n");
1434                 return err;
1435         }
1436
1437         err = mlx4_uar_alloc(dev, &priv->driver_uar);
1438         if (err) {
1439                 mlx4_err(dev, "Failed to allocate driver access region, "
1440                          "aborting.\n");
1441                 goto err_uar_table_free;
1442         }
1443
1444         priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
1445         if (!priv->kar) {
1446                 mlx4_err(dev, "Couldn't map kernel access region, "
1447                          "aborting.\n");
1448                 err = -ENOMEM;
1449                 goto err_uar_free;
1450         }
1451
1452         err = mlx4_init_pd_table(dev);
1453         if (err) {
1454                 mlx4_err(dev, "Failed to initialize "
1455                          "protection domain table, aborting.\n");
1456                 goto err_kar_unmap;
1457         }
1458
1459         err = mlx4_init_xrcd_table(dev);
1460         if (err) {
1461                 mlx4_err(dev, "Failed to initialize "
1462                          "reliable connection domain table, aborting.\n");
1463                 goto err_pd_table_free;
1464         }
1465
1466         err = mlx4_init_mr_table(dev);
1467         if (err) {
1468                 mlx4_err(dev, "Failed to initialize "
1469                          "memory region table, aborting.\n");
1470                 goto err_xrcd_table_free;
1471         }
1472
1473         err = mlx4_init_eq_table(dev);
1474         if (err) {
1475                 mlx4_err(dev, "Failed to initialize "
1476                          "event queue table, aborting.\n");
1477                 goto err_mr_table_free;
1478         }
1479
1480         err = mlx4_cmd_use_events(dev);
1481         if (err) {
1482                 mlx4_err(dev, "Failed to switch to event-driven "
1483                          "firmware commands, aborting.\n");
1484                 goto err_eq_table_free;
1485         }
1486
1487         err = mlx4_NOP(dev);
1488         if (err) {
1489                 if (dev->flags & MLX4_FLAG_MSI_X) {
1490                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
1491                                   "interrupt IRQ %d).\n",
1492                                   priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1493                         mlx4_warn(dev, "Trying again without MSI-X.\n");
1494                 } else {
1495                         mlx4_err(dev, "NOP command failed to generate interrupt "
1496                                  "(IRQ %d), aborting.\n",
1497                                  priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1498                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
1499                 }
1500
1501                 goto err_cmd_poll;
1502         }
1503
1504         mlx4_dbg(dev, "NOP command IRQ test passed\n");
1505
1506         err = mlx4_init_cq_table(dev);
1507         if (err) {
1508                 mlx4_err(dev, "Failed to initialize "
1509                          "completion queue table, aborting.\n");
1510                 goto err_cmd_poll;
1511         }
1512
1513         err = mlx4_init_srq_table(dev);
1514         if (err) {
1515                 mlx4_err(dev, "Failed to initialize "
1516                          "shared receive queue table, aborting.\n");
1517                 goto err_cq_table_free;
1518         }
1519
1520         err = mlx4_init_qp_table(dev);
1521         if (err) {
1522                 mlx4_err(dev, "Failed to initialize "
1523                          "queue pair table, aborting.\n");
1524                 goto err_srq_table_free;
1525         }
1526
1527         if (!mlx4_is_slave(dev)) {
1528                 err = mlx4_init_mcg_table(dev);
1529                 if (err) {
1530                         mlx4_err(dev, "Failed to initialize "
1531                                  "multicast group table, aborting.\n");
1532                         goto err_qp_table_free;
1533                 }
1534         }
1535
1536         err = mlx4_init_counters_table(dev);
1537         if (err && err != -ENOENT) {
1538                 mlx4_err(dev, "Failed to initialize counters table, aborting.\n");
1539                 goto err_mcg_table_free;
1540         }
1541
1542         if (!mlx4_is_slave(dev)) {
1543                 for (port = 1; port <= dev->caps.num_ports; port++) {
1544                         ib_port_default_caps = 0;
1545                         err = mlx4_get_port_ib_caps(dev, port,
1546                                                     &ib_port_default_caps);
1547                         if (err)
1548                                 mlx4_warn(dev, "failed to get port %d default "
1549                                           "ib capabilities (%d). Continuing "
1550                                           "with caps = 0\n", port, err);
1551                         dev->caps.ib_port_def_cap[port] = ib_port_default_caps;
1552
1553                         /* initialize per-slave default ib port capabilities */
1554                         if (mlx4_is_master(dev)) {
1555                                 int i;
1556                                 for (i = 0; i < dev->num_slaves; i++) {
1557                                         if (i == mlx4_master_func_num(dev))
1558                                                 continue;
1559                                         priv->mfunc.master.slave_state[i].ib_cap_mask[port] =
1560                                                         ib_port_default_caps;
1561                                 }
1562                         }
1563
1564                         if (mlx4_is_mfunc(dev))
1565                                 dev->caps.port_ib_mtu[port] = IB_MTU_2048;
1566                         else
1567                                 dev->caps.port_ib_mtu[port] = IB_MTU_4096;
1568
1569                         err = mlx4_SET_PORT(dev, port, mlx4_is_master(dev) ?
1570                                             dev->caps.pkey_table_len[port] : -1);
1571                         if (err) {
1572                                 mlx4_err(dev, "Failed to set port %d, aborting\n",
1573                                         port);
1574                                 goto err_counters_table_free;
1575                         }
1576                 }
1577         }
1578
1579         return 0;
1580
1581 err_counters_table_free:
1582         mlx4_cleanup_counters_table(dev);
1583
1584 err_mcg_table_free:
1585         mlx4_cleanup_mcg_table(dev);
1586
1587 err_qp_table_free:
1588         mlx4_cleanup_qp_table(dev);
1589
1590 err_srq_table_free:
1591         mlx4_cleanup_srq_table(dev);
1592
1593 err_cq_table_free:
1594         mlx4_cleanup_cq_table(dev);
1595
1596 err_cmd_poll:
1597         mlx4_cmd_use_polling(dev);
1598
1599 err_eq_table_free:
1600         mlx4_cleanup_eq_table(dev);
1601
1602 err_mr_table_free:
1603         mlx4_cleanup_mr_table(dev);
1604
1605 err_xrcd_table_free:
1606         mlx4_cleanup_xrcd_table(dev);
1607
1608 err_pd_table_free:
1609         mlx4_cleanup_pd_table(dev);
1610
1611 err_kar_unmap:
1612         iounmap(priv->kar);
1613
1614 err_uar_free:
1615         mlx4_uar_free(dev, &priv->driver_uar);
1616
1617 err_uar_table_free:
1618         mlx4_cleanup_uar_table(dev);
1619         return err;
1620 }
1621
1622 static void mlx4_enable_msi_x(struct mlx4_dev *dev)
1623 {
1624         struct mlx4_priv *priv = mlx4_priv(dev);
1625         struct msix_entry *entries;
1626         int nreq = min_t(int, dev->caps.num_ports *
1627                          min_t(int, netif_get_num_default_rss_queues() + 1,
1628                                MAX_MSIX_P_PORT) + MSIX_LEGACY_SZ, MAX_MSIX);
1629         int err;
1630         int i;
1631
1632         if (msi_x) {
1633                 /* In multifunction mode each function gets 2 msi-X vectors
1634                  * one for data path completions anf the other for asynch events
1635                  * or command completions */
1636                 if (mlx4_is_mfunc(dev)) {
1637                         nreq = 2;
1638                 } else {
1639                         nreq = min_t(int, dev->caps.num_eqs -
1640                                      dev->caps.reserved_eqs, nreq);
1641                 }
1642
1643                 entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL);
1644                 if (!entries)
1645                         goto no_msi;
1646
1647                 for (i = 0; i < nreq; ++i)
1648                         entries[i].entry = i;
1649
1650         retry:
1651                 err = pci_enable_msix(dev->pdev, entries, nreq);
1652                 if (err) {
1653                         /* Try again if at least 2 vectors are available */
1654                         if (err > 1) {
1655                                 mlx4_info(dev, "Requested %d vectors, "
1656                                           "but only %d MSI-X vectors available, "
1657                                           "trying again\n", nreq, err);
1658                                 nreq = err;
1659                                 goto retry;
1660                         }
1661                         kfree(entries);
1662                         goto no_msi;
1663                 }
1664
1665                 if (nreq <
1666                     MSIX_LEGACY_SZ + dev->caps.num_ports * MIN_MSIX_P_PORT) {
1667                         /*Working in legacy mode , all EQ's shared*/
1668                         dev->caps.comp_pool           = 0;
1669                         dev->caps.num_comp_vectors = nreq - 1;
1670                 } else {
1671                         dev->caps.comp_pool           = nreq - MSIX_LEGACY_SZ;
1672                         dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1;
1673                 }
1674                 for (i = 0; i < nreq; ++i)
1675                         priv->eq_table.eq[i].irq = entries[i].vector;
1676
1677                 dev->flags |= MLX4_FLAG_MSI_X;
1678
1679                 kfree(entries);
1680                 return;
1681         }
1682
1683 no_msi:
1684         dev->caps.num_comp_vectors = 1;
1685         dev->caps.comp_pool        = 0;
1686
1687         for (i = 0; i < 2; ++i)
1688                 priv->eq_table.eq[i].irq = dev->pdev->irq;
1689 }
1690
1691 static int mlx4_init_port_info(struct mlx4_dev *dev, int port)
1692 {
1693         struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
1694         int err = 0;
1695
1696         info->dev = dev;
1697         info->port = port;
1698         if (!mlx4_is_slave(dev)) {
1699                 INIT_RADIX_TREE(&info->mac_tree, GFP_KERNEL);
1700                 mlx4_init_mac_table(dev, &info->mac_table);
1701                 mlx4_init_vlan_table(dev, &info->vlan_table);
1702                 info->base_qpn =
1703                         dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] +
1704                         (port - 1) * (1 << log_num_mac);
1705         }
1706
1707         sprintf(info->dev_name, "mlx4_port%d", port);
1708         info->port_attr.attr.name = info->dev_name;
1709         if (mlx4_is_mfunc(dev))
1710                 info->port_attr.attr.mode = S_IRUGO;
1711         else {
1712                 info->port_attr.attr.mode = S_IRUGO | S_IWUSR;
1713                 info->port_attr.store     = set_port_type;
1714         }
1715         info->port_attr.show      = show_port_type;
1716         sysfs_attr_init(&info->port_attr.attr);
1717
1718         err = device_create_file(&dev->pdev->dev, &info->port_attr);
1719         if (err) {
1720                 mlx4_err(dev, "Failed to create file for port %d\n", port);
1721                 info->port = -1;
1722         }
1723
1724         sprintf(info->dev_mtu_name, "mlx4_port%d_mtu", port);
1725         info->port_mtu_attr.attr.name = info->dev_mtu_name;
1726         if (mlx4_is_mfunc(dev))
1727                 info->port_mtu_attr.attr.mode = S_IRUGO;
1728         else {
1729                 info->port_mtu_attr.attr.mode = S_IRUGO | S_IWUSR;
1730                 info->port_mtu_attr.store     = set_port_ib_mtu;
1731         }
1732         info->port_mtu_attr.show      = show_port_ib_mtu;
1733         sysfs_attr_init(&info->port_mtu_attr.attr);
1734
1735         err = device_create_file(&dev->pdev->dev, &info->port_mtu_attr);
1736         if (err) {
1737                 mlx4_err(dev, "Failed to create mtu file for port %d\n", port);
1738                 device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1739                 info->port = -1;
1740         }
1741
1742         return err;
1743 }
1744
1745 static void mlx4_cleanup_port_info(struct mlx4_port_info *info)
1746 {
1747         if (info->port < 0)
1748                 return;
1749
1750         device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1751         device_remove_file(&info->dev->pdev->dev, &info->port_mtu_attr);
1752 }
1753
1754 static int mlx4_init_steering(struct mlx4_dev *dev)
1755 {
1756         struct mlx4_priv *priv = mlx4_priv(dev);
1757         int num_entries = dev->caps.num_ports;
1758         int i, j;
1759
1760         priv->steer = kzalloc(sizeof(struct mlx4_steer) * num_entries, GFP_KERNEL);
1761         if (!priv->steer)
1762                 return -ENOMEM;
1763
1764         for (i = 0; i < num_entries; i++)
1765                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1766                         INIT_LIST_HEAD(&priv->steer[i].promisc_qps[j]);
1767                         INIT_LIST_HEAD(&priv->steer[i].steer_entries[j]);
1768                 }
1769         return 0;
1770 }
1771
1772 static void mlx4_clear_steering(struct mlx4_dev *dev)
1773 {
1774         struct mlx4_priv *priv = mlx4_priv(dev);
1775         struct mlx4_steer_index *entry, *tmp_entry;
1776         struct mlx4_promisc_qp *pqp, *tmp_pqp;
1777         int num_entries = dev->caps.num_ports;
1778         int i, j;
1779
1780         for (i = 0; i < num_entries; i++) {
1781                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1782                         list_for_each_entry_safe(pqp, tmp_pqp,
1783                                                  &priv->steer[i].promisc_qps[j],
1784                                                  list) {
1785                                 list_del(&pqp->list);
1786                                 kfree(pqp);
1787                         }
1788                         list_for_each_entry_safe(entry, tmp_entry,
1789                                                  &priv->steer[i].steer_entries[j],
1790                                                  list) {
1791                                 list_del(&entry->list);
1792                                 list_for_each_entry_safe(pqp, tmp_pqp,
1793                                                          &entry->duplicates,
1794                                                          list) {
1795                                         list_del(&pqp->list);
1796                                         kfree(pqp);
1797                                 }
1798                                 kfree(entry);
1799                         }
1800                 }
1801         }
1802         kfree(priv->steer);
1803 }
1804
1805 static int extended_func_num(struct pci_dev *pdev)
1806 {
1807         return PCI_SLOT(pdev->devfn) * 8 + PCI_FUNC(pdev->devfn);
1808 }
1809
1810 #define MLX4_OWNER_BASE 0x8069c
1811 #define MLX4_OWNER_SIZE 4
1812
1813 static int mlx4_get_ownership(struct mlx4_dev *dev)
1814 {
1815         void __iomem *owner;
1816         u32 ret;
1817
1818         if (pci_channel_offline(dev->pdev))
1819                 return -EIO;
1820
1821         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1822                         MLX4_OWNER_SIZE);
1823         if (!owner) {
1824                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1825                 return -ENOMEM;
1826         }
1827
1828         ret = readl(owner);
1829         iounmap(owner);
1830         return (int) !!ret;
1831 }
1832
1833 static void mlx4_free_ownership(struct mlx4_dev *dev)
1834 {
1835         void __iomem *owner;
1836
1837         if (pci_channel_offline(dev->pdev))
1838                 return;
1839
1840         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1841                         MLX4_OWNER_SIZE);
1842         if (!owner) {
1843                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1844                 return;
1845         }
1846         writel(0, owner);
1847         msleep(1000);
1848         iounmap(owner);
1849 }
1850
1851 static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
1852 {
1853         struct mlx4_priv *priv;
1854         struct mlx4_dev *dev;
1855         int err;
1856         int port;
1857
1858         pr_info(DRV_NAME ": Initializing %s\n", pci_name(pdev));
1859
1860         err = pci_enable_device(pdev);
1861         if (err) {
1862                 dev_err(&pdev->dev, "Cannot enable PCI device, "
1863                         "aborting.\n");
1864                 return err;
1865         }
1866         if (num_vfs > MLX4_MAX_NUM_VF) {
1867                 printk(KERN_ERR "There are more VF's (%d) than allowed(%d)\n",
1868                        num_vfs, MLX4_MAX_NUM_VF);
1869                 return -EINVAL;
1870         }
1871         /*
1872          * Check for BARs.
1873          */
1874         if (((id == NULL) || !(id->driver_data & MLX4_VF)) &&
1875             !(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
1876                 dev_err(&pdev->dev, "Missing DCS, aborting."
1877                         "(id == 0X%p, id->driver_data: 0x%lx,"
1878                         " pci_resource_flags(pdev, 0):0x%lx)\n", id,
1879                         id ? id->driver_data : 0, pci_resource_flags(pdev, 0));
1880                 err = -ENODEV;
1881                 goto err_disable_pdev;
1882         }
1883         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
1884                 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1885                 err = -ENODEV;
1886                 goto err_disable_pdev;
1887         }
1888
1889         err = pci_request_regions(pdev, DRV_NAME);
1890         if (err) {
1891                 dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n");
1892                 goto err_disable_pdev;
1893         }
1894
1895         pci_set_master(pdev);
1896
1897         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1898         if (err) {
1899                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1900                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1901                 if (err) {
1902                         dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
1903                         goto err_release_regions;
1904                 }
1905         }
1906         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
1907         if (err) {
1908                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1909                          "consistent PCI DMA mask.\n");
1910                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
1911                 if (err) {
1912                         dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1913                                 "aborting.\n");
1914                         goto err_release_regions;
1915                 }
1916         }
1917
1918         /* Allow large DMA segments, up to the firmware limit of 1 GB */
1919         dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
1920
1921         priv = kzalloc(sizeof *priv, GFP_KERNEL);
1922         if (!priv) {
1923                 dev_err(&pdev->dev, "Device struct alloc failed, "
1924                         "aborting.\n");
1925                 err = -ENOMEM;
1926                 goto err_release_regions;
1927         }
1928
1929         dev       = &priv->dev;
1930         dev->pdev = pdev;
1931         INIT_LIST_HEAD(&priv->ctx_list);
1932         spin_lock_init(&priv->ctx_lock);
1933
1934         mutex_init(&priv->port_mutex);
1935
1936         INIT_LIST_HEAD(&priv->pgdir_list);
1937         mutex_init(&priv->pgdir_mutex);
1938
1939         INIT_LIST_HEAD(&priv->bf_list);
1940         mutex_init(&priv->bf_mutex);
1941
1942         dev->rev_id = pdev->revision;
1943         /* Detect if this device is a virtual function */
1944         if (id && id->driver_data & MLX4_VF) {
1945                 /* When acting as pf, we normally skip vfs unless explicitly
1946                  * requested to probe them. */
1947                 if (num_vfs && extended_func_num(pdev) > probe_vf) {
1948                         mlx4_warn(dev, "Skipping virtual function:%d\n",
1949                                                 extended_func_num(pdev));
1950                         err = -ENODEV;
1951                         goto err_free_dev;
1952                 }
1953                 mlx4_warn(dev, "Detected virtual function - running in slave mode\n");
1954                 dev->flags |= MLX4_FLAG_SLAVE;
1955         } else {
1956                 /* We reset the device and enable SRIOV only for physical
1957                  * devices.  Try to claim ownership on the device;
1958                  * if already taken, skip -- do not allow multiple PFs */
1959                 err = mlx4_get_ownership(dev);
1960                 if (err) {
1961                         if (err < 0)
1962                                 goto err_free_dev;
1963                         else {
1964                                 mlx4_warn(dev, "Multiple PFs not yet supported."
1965                                           " Skipping PF.\n");
1966                                 err = -EINVAL;
1967                                 goto err_free_dev;
1968                         }
1969                 }
1970
1971                 if (num_vfs) {
1972                         mlx4_warn(dev, "Enabling sriov with:%d vfs\n", num_vfs);
1973                         err = pci_enable_sriov(pdev, num_vfs);
1974                         if (err) {
1975                                 mlx4_err(dev, "Failed to enable sriov,"
1976                                          "continuing without sriov enabled"
1977                                          " (err = %d).\n", err);
1978                                 err = 0;
1979                         } else {
1980                                 mlx4_warn(dev, "Running in master mode\n");
1981                                 dev->flags |= MLX4_FLAG_SRIOV |
1982                                               MLX4_FLAG_MASTER;
1983                                 dev->num_vfs = num_vfs;
1984                         }
1985                 }
1986
1987                 /*
1988                  * Now reset the HCA before we touch the PCI capabilities or
1989                  * attempt a firmware command, since a boot ROM may have left
1990                  * the HCA in an undefined state.
1991                  */
1992                 err = mlx4_reset(dev);
1993                 if (err) {
1994                         mlx4_err(dev, "Failed to reset HCA, aborting.\n");
1995                         goto err_rel_own;
1996                 }
1997         }
1998
1999 slave_start:
2000         if (mlx4_cmd_init(dev)) {
2001                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
2002                 goto err_sriov;
2003         }
2004
2005         /* In slave functions, the communication channel must be initialized
2006          * before posting commands. Also, init num_slaves before calling
2007          * mlx4_init_hca */
2008         if (mlx4_is_mfunc(dev)) {
2009                 if (mlx4_is_master(dev))
2010                         dev->num_slaves = MLX4_MAX_NUM_SLAVES;
2011                 else {
2012                         dev->num_slaves = 0;
2013                         if (mlx4_multi_func_init(dev)) {
2014                                 mlx4_err(dev, "Failed to init slave mfunc"
2015                                          " interface, aborting.\n");
2016                                 goto err_cmd;
2017                         }
2018                 }
2019         }
2020
2021         err = mlx4_init_hca(dev);
2022         if (err) {
2023                 if (err == -EACCES) {
2024                         /* Not primary Physical function
2025                          * Running in slave mode */
2026                         mlx4_cmd_cleanup(dev);
2027                         dev->flags |= MLX4_FLAG_SLAVE;
2028                         dev->flags &= ~MLX4_FLAG_MASTER;
2029                         goto slave_start;
2030                 } else
2031                         goto err_mfunc;
2032         }
2033
2034         /* In master functions, the communication channel must be initialized
2035          * after obtaining its address from fw */
2036         if (mlx4_is_master(dev)) {
2037                 if (mlx4_multi_func_init(dev)) {
2038                         mlx4_err(dev, "Failed to init master mfunc"
2039                                  "interface, aborting.\n");
2040                         goto err_close;
2041                 }
2042         }
2043
2044         err = mlx4_alloc_eq_table(dev);
2045         if (err)
2046                 goto err_master_mfunc;
2047
2048         priv->msix_ctl.pool_bm = 0;
2049         mutex_init(&priv->msix_ctl.pool_lock);
2050
2051         mlx4_enable_msi_x(dev);
2052         if ((mlx4_is_mfunc(dev)) &&
2053             !(dev->flags & MLX4_FLAG_MSI_X)) {
2054                 mlx4_err(dev, "INTx is not supported in multi-function mode."
2055                          " aborting.\n");
2056                 goto err_free_eq;
2057         }
2058
2059         if (!mlx4_is_slave(dev)) {
2060                 err = mlx4_init_steering(dev);
2061                 if (err)
2062                         goto err_free_eq;
2063         }
2064
2065         err = mlx4_setup_hca(dev);
2066         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X) &&
2067             !mlx4_is_mfunc(dev)) {
2068                 dev->flags &= ~MLX4_FLAG_MSI_X;
2069                 dev->caps.num_comp_vectors = 1;
2070                 dev->caps.comp_pool        = 0;
2071                 pci_disable_msix(pdev);
2072                 err = mlx4_setup_hca(dev);
2073         }
2074
2075         if (err)
2076                 goto err_steer;
2077
2078         for (port = 1; port <= dev->caps.num_ports; port++) {
2079                 err = mlx4_init_port_info(dev, port);
2080                 if (err)
2081                         goto err_port;
2082         }
2083
2084         err = mlx4_register_device(dev);
2085         if (err)
2086                 goto err_port;
2087
2088         mlx4_sense_init(dev);
2089         mlx4_start_sense(dev);
2090
2091         pci_set_drvdata(pdev, dev);
2092
2093         return 0;
2094
2095 err_port:
2096         for (--port; port >= 1; --port)
2097                 mlx4_cleanup_port_info(&priv->port[port]);
2098
2099         mlx4_cleanup_counters_table(dev);
2100         mlx4_cleanup_mcg_table(dev);
2101         mlx4_cleanup_qp_table(dev);
2102         mlx4_cleanup_srq_table(dev);
2103         mlx4_cleanup_cq_table(dev);
2104         mlx4_cmd_use_polling(dev);
2105         mlx4_cleanup_eq_table(dev);
2106         mlx4_cleanup_mr_table(dev);
2107         mlx4_cleanup_xrcd_table(dev);
2108         mlx4_cleanup_pd_table(dev);
2109         mlx4_cleanup_uar_table(dev);
2110
2111 err_steer:
2112         if (!mlx4_is_slave(dev))
2113                 mlx4_clear_steering(dev);
2114
2115 err_free_eq:
2116         mlx4_free_eq_table(dev);
2117
2118 err_master_mfunc:
2119         if (mlx4_is_master(dev))
2120                 mlx4_multi_func_cleanup(dev);
2121
2122 err_close:
2123         if (dev->flags & MLX4_FLAG_MSI_X)
2124                 pci_disable_msix(pdev);
2125
2126         mlx4_close_hca(dev);
2127
2128 err_mfunc:
2129         if (mlx4_is_slave(dev))
2130                 mlx4_multi_func_cleanup(dev);
2131
2132 err_cmd:
2133         mlx4_cmd_cleanup(dev);
2134
2135 err_sriov:
2136         if (dev->flags & MLX4_FLAG_SRIOV)
2137                 pci_disable_sriov(pdev);
2138
2139 err_rel_own:
2140         if (!mlx4_is_slave(dev))
2141                 mlx4_free_ownership(dev);
2142
2143 err_free_dev:
2144         kfree(priv);
2145
2146 err_release_regions:
2147         pci_release_regions(pdev);
2148
2149 err_disable_pdev:
2150         pci_disable_device(pdev);
2151         pci_set_drvdata(pdev, NULL);
2152         return err;
2153 }
2154
2155 static int __devinit mlx4_init_one(struct pci_dev *pdev,
2156                                    const struct pci_device_id *id)
2157 {
2158         printk_once(KERN_INFO "%s", mlx4_version);
2159
2160         return __mlx4_init_one(pdev, id);
2161 }
2162
2163 static void mlx4_remove_one(struct pci_dev *pdev)
2164 {
2165         struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
2166         struct mlx4_priv *priv = mlx4_priv(dev);
2167         int p;
2168
2169         if (dev) {
2170                 /* in SRIOV it is not allowed to unload the pf's
2171                  * driver while there are alive vf's */
2172                 if (mlx4_is_master(dev)) {
2173                         if (mlx4_how_many_lives_vf(dev))
2174                                 printk(KERN_ERR "Removing PF when there are assigned VF's !!!\n");
2175                 }
2176                 mlx4_stop_sense(dev);
2177                 mlx4_unregister_device(dev);
2178
2179                 for (p = 1; p <= dev->caps.num_ports; p++) {
2180                         mlx4_cleanup_port_info(&priv->port[p]);
2181                         mlx4_CLOSE_PORT(dev, p);
2182                 }
2183
2184                 if (mlx4_is_master(dev))
2185                         mlx4_free_resource_tracker(dev,
2186                                                    RES_TR_FREE_SLAVES_ONLY);
2187
2188                 mlx4_cleanup_counters_table(dev);
2189                 mlx4_cleanup_mcg_table(dev);
2190                 mlx4_cleanup_qp_table(dev);
2191                 mlx4_cleanup_srq_table(dev);
2192                 mlx4_cleanup_cq_table(dev);
2193                 mlx4_cmd_use_polling(dev);
2194                 mlx4_cleanup_eq_table(dev);
2195                 mlx4_cleanup_mr_table(dev);
2196                 mlx4_cleanup_xrcd_table(dev);
2197                 mlx4_cleanup_pd_table(dev);
2198
2199                 if (mlx4_is_master(dev))
2200                         mlx4_free_resource_tracker(dev,
2201                                                    RES_TR_FREE_STRUCTS_ONLY);
2202
2203                 iounmap(priv->kar);
2204                 mlx4_uar_free(dev, &priv->driver_uar);
2205                 mlx4_cleanup_uar_table(dev);
2206                 if (!mlx4_is_slave(dev))
2207                         mlx4_clear_steering(dev);
2208                 mlx4_free_eq_table(dev);
2209                 if (mlx4_is_master(dev))
2210                         mlx4_multi_func_cleanup(dev);
2211                 mlx4_close_hca(dev);
2212                 if (mlx4_is_slave(dev))
2213                         mlx4_multi_func_cleanup(dev);
2214                 mlx4_cmd_cleanup(dev);
2215
2216                 if (dev->flags & MLX4_FLAG_MSI_X)
2217                         pci_disable_msix(pdev);
2218                 if (dev->flags & MLX4_FLAG_SRIOV) {
2219                         mlx4_warn(dev, "Disabling sriov\n");
2220                         pci_disable_sriov(pdev);
2221                 }
2222
2223                 if (!mlx4_is_slave(dev))
2224                         mlx4_free_ownership(dev);
2225                 kfree(priv);
2226                 pci_release_regions(pdev);
2227                 pci_disable_device(pdev);
2228                 pci_set_drvdata(pdev, NULL);
2229         }
2230 }
2231
2232 int mlx4_restart_one(struct pci_dev *pdev)
2233 {
2234         mlx4_remove_one(pdev);
2235         return __mlx4_init_one(pdev, NULL);
2236 }
2237
2238 static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = {
2239         /* MT25408 "Hermon" SDR */
2240         { PCI_VDEVICE(MELLANOX, 0x6340), 0 },
2241         /* MT25408 "Hermon" DDR */
2242         { PCI_VDEVICE(MELLANOX, 0x634a), 0 },
2243         /* MT25408 "Hermon" QDR */
2244         { PCI_VDEVICE(MELLANOX, 0x6354), 0 },
2245         /* MT25408 "Hermon" DDR PCIe gen2 */
2246         { PCI_VDEVICE(MELLANOX, 0x6732), 0 },
2247         /* MT25408 "Hermon" QDR PCIe gen2 */
2248         { PCI_VDEVICE(MELLANOX, 0x673c), 0 },
2249         /* MT25408 "Hermon" EN 10GigE */
2250         { PCI_VDEVICE(MELLANOX, 0x6368), 0 },
2251         /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
2252         { PCI_VDEVICE(MELLANOX, 0x6750), 0 },
2253         /* MT25458 ConnectX EN 10GBASE-T 10GigE */
2254         { PCI_VDEVICE(MELLANOX, 0x6372), 0 },
2255         /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
2256         { PCI_VDEVICE(MELLANOX, 0x675a), 0 },
2257         /* MT26468 ConnectX EN 10GigE PCIe gen2*/
2258         { PCI_VDEVICE(MELLANOX, 0x6764), 0 },
2259         /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */
2260         { PCI_VDEVICE(MELLANOX, 0x6746), 0 },
2261         /* MT26478 ConnectX2 40GigE PCIe gen2 */
2262         { PCI_VDEVICE(MELLANOX, 0x676e), 0 },
2263         /* MT25400 Family [ConnectX-2 Virtual Function] */
2264         { PCI_VDEVICE(MELLANOX, 0x1002), MLX4_VF },
2265         /* MT27500 Family [ConnectX-3] */
2266         { PCI_VDEVICE(MELLANOX, 0x1003), 0 },
2267         /* MT27500 Family [ConnectX-3 Virtual Function] */
2268         { PCI_VDEVICE(MELLANOX, 0x1004), MLX4_VF },
2269         { PCI_VDEVICE(MELLANOX, 0x1005), 0 }, /* MT27510 Family */
2270         { PCI_VDEVICE(MELLANOX, 0x1006), 0 }, /* MT27511 Family */
2271         { PCI_VDEVICE(MELLANOX, 0x1007), 0 }, /* MT27520 Family */
2272         { PCI_VDEVICE(MELLANOX, 0x1008), 0 }, /* MT27521 Family */
2273         { PCI_VDEVICE(MELLANOX, 0x1009), 0 }, /* MT27530 Family */
2274         { PCI_VDEVICE(MELLANOX, 0x100a), 0 }, /* MT27531 Family */
2275         { PCI_VDEVICE(MELLANOX, 0x100b), 0 }, /* MT27540 Family */
2276         { PCI_VDEVICE(MELLANOX, 0x100c), 0 }, /* MT27541 Family */
2277         { PCI_VDEVICE(MELLANOX, 0x100d), 0 }, /* MT27550 Family */
2278         { PCI_VDEVICE(MELLANOX, 0x100e), 0 }, /* MT27551 Family */
2279         { PCI_VDEVICE(MELLANOX, 0x100f), 0 }, /* MT27560 Family */
2280         { PCI_VDEVICE(MELLANOX, 0x1010), 0 }, /* MT27561 Family */
2281         { 0, }
2282 };
2283
2284 MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
2285
2286 static pci_ers_result_t mlx4_pci_err_detected(struct pci_dev *pdev,
2287                                               pci_channel_state_t state)
2288 {
2289         mlx4_remove_one(pdev);
2290
2291         return state == pci_channel_io_perm_failure ?
2292                 PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET;
2293 }
2294
2295 static pci_ers_result_t mlx4_pci_slot_reset(struct pci_dev *pdev)
2296 {
2297         int ret = __mlx4_init_one(pdev, NULL);
2298
2299         return ret ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED;
2300 }
2301
2302 static struct pci_error_handlers mlx4_err_handler = {
2303         .error_detected = mlx4_pci_err_detected,
2304         .slot_reset     = mlx4_pci_slot_reset,
2305 };
2306
2307 static struct pci_driver mlx4_driver = {
2308         .name           = DRV_NAME,
2309         .id_table       = mlx4_pci_table,
2310         .probe          = mlx4_init_one,
2311         .remove         = __devexit_p(mlx4_remove_one),
2312         .err_handler    = &mlx4_err_handler,
2313 };
2314
2315 static int __init mlx4_verify_params(void)
2316 {
2317         if ((log_num_mac < 0) || (log_num_mac > 7)) {
2318                 pr_warning("mlx4_core: bad num_mac: %d\n", log_num_mac);
2319                 return -1;
2320         }
2321
2322         if (log_num_vlan != 0)
2323                 pr_warning("mlx4_core: log_num_vlan - obsolete module param, using %d\n",
2324                            MLX4_LOG_NUM_VLANS);
2325
2326         if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) {
2327                 pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg);
2328                 return -1;
2329         }
2330
2331         /* Check if module param for ports type has legal combination */
2332         if (port_type_array[0] == false && port_type_array[1] == true) {
2333                 printk(KERN_WARNING "Module parameter configuration ETH/IB is not supported. Switching to default configuration IB/IB\n");
2334                 port_type_array[0] = true;
2335         }
2336
2337         return 0;
2338 }
2339
2340 static int __init mlx4_init(void)
2341 {
2342         int ret;
2343
2344         if (mlx4_verify_params())
2345                 return -EINVAL;
2346
2347         mlx4_catas_init();
2348
2349         mlx4_wq = create_singlethread_workqueue("mlx4");
2350         if (!mlx4_wq)
2351                 return -ENOMEM;
2352
2353         ret = pci_register_driver(&mlx4_driver);
2354         return ret < 0 ? ret : 0;
2355 }
2356
2357 static void __exit mlx4_cleanup(void)
2358 {
2359         pci_unregister_driver(&mlx4_driver);
2360         destroy_workqueue(mlx4_wq);
2361 }
2362
2363 module_init(mlx4_init);
2364 module_exit(mlx4_cleanup);