drivers/net/ethernet/mellanox/mlx4/main.c

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
   5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 #include <linux/module.h>
  37 #include <linux/init.h>
  38 #include <linux/errno.h>
  39 #include <linux/pci.h>
  40 #include <linux/dma-mapping.h>
  41 #include <linux/slab.h>
  42 #include <linux/io-mapping.h>
  43 #include <linux/delay.h>
  44 #include <linux/netdevice.h>
  45
  46 #include <linux/mlx4/device.h>
  47 #include <linux/mlx4/doorbell.h>
  48
  49 #include "mlx4.h"
  50 #include "fw.h"
  51 #include "icm.h"
  52
  53 MODULE_AUTHOR("Roland Dreier");
  54 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
  55 MODULE_LICENSE("Dual BSD/GPL");
  56 MODULE_VERSION(DRV_VERSION);
  57
  58 struct workqueue_struct *mlx4_wq;
  59
  60 #ifdef CONFIG_MLX4_DEBUG
  61
  62 int mlx4_debug_level = 0;
  63 module_param_named(debug_level, mlx4_debug_level, int, 0644);
  64 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
  65
  66 #endif /* CONFIG_MLX4_DEBUG */
  67
  68 #ifdef CONFIG_PCI_MSI
  69
  70 static int msi_x = 1;
  71 module_param(msi_x, int, 0444);
  72 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  73
  74 #else /* CONFIG_PCI_MSI */
  75
  76 #define msi_x (0)
  77
  78 #endif /* CONFIG_PCI_MSI */
  79
  80 static int num_vfs;
  81 module_param(num_vfs, int, 0444);
  82 MODULE_PARM_DESC(num_vfs, "enable #num_vfs functions if num_vfs > 0");
  83
  84 static int probe_vf;
  85 module_param(probe_vf, int, 0644);
  86 MODULE_PARM_DESC(probe_vf, "number of vfs to probe by pf driver (num_vfs > 0)");
  87
  88 int mlx4_log_num_mgm_entry_size = 10;
  89 module_param_named(log_num_mgm_entry_size,
  90                         mlx4_log_num_mgm_entry_size, int, 0444);
  91 MODULE_PARM_DESC(log_num_mgm_entry_size, "log mgm size, that defines the num"
  92                                          " of qp per mcg, for example:"
  93                                          " 10 gives 248.range: 9<="
  94                                          " log_num_mgm_entry_size <= 12."
  95                                          " Not in use with device managed"
  96                                          " flow steering");
  97
  98 #define MLX4_VF                                        (1 << 0)
  99
 100 #define HCA_GLOBAL_CAP_MASK            0
 101 #define PF_CONTEXT_BEHAVIOUR_MASK      0
 102
 103 static char mlx4_version[] __devinitdata =
 104         DRV_NAME ": Mellanox ConnectX core driver v"
 105         DRV_VERSION " (" DRV_RELDATE ")\n";
 106
 107 static struct mlx4_profile default_profile = {
 108         .num_qp         = 1 << 18,
 109         .num_srq        = 1 << 16,
 110         .rdmarc_per_qp  = 1 << 4,
 111         .num_cq         = 1 << 16,
 112         .num_mcg        = 1 << 13,
 113         .num_mpt        = 1 << 19,
 114         .num_mtt        = 1 << 20, /* It is really num mtt segements */
 115 };
 116
 117 static int log_num_mac = 7;
 118 module_param_named(log_num_mac, log_num_mac, int, 0444);
 119 MODULE_PARM_DESC(log_num_mac, "Log2 max number of MACs per ETH port (1-7)");
 120
 121 static int log_num_vlan;
 122 module_param_named(log_num_vlan, log_num_vlan, int, 0444);
 123 MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)");
 124 /* Log2 max number of VLANs per ETH port (0-7) */
 125 #define MLX4_LOG_NUM_VLANS 7
 126
 127 static bool use_prio;
 128 module_param_named(use_prio, use_prio, bool, 0444);
 129 MODULE_PARM_DESC(use_prio, "Enable steering by VLAN priority on ETH ports "
 130                   "(0/1, default 0)");
 131
 132 int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG);
 133 module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444);
 134 MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-7)");
 135
 136 static int port_type_array[2] = {MLX4_PORT_TYPE_NONE, MLX4_PORT_TYPE_NONE};
 137 static int arr_argc = 2;
 138 module_param_array(port_type_array, int, &arr_argc, 0444);
 139 MODULE_PARM_DESC(port_type_array, "Array of port types: HW_DEFAULT (0) is default "
 140                                 "1 for IB, 2 for Ethernet");
 141
 142 struct mlx4_port_config {
 143         struct list_head list;
 144         enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1];
 145         struct pci_dev *pdev;
 146 };
 147
 148 int mlx4_check_port_params(struct mlx4_dev *dev,
 149                            enum mlx4_port_type *port_type)
 150 {
 151         int i;
 152
 153         for (i = 0; i < dev->caps.num_ports - 1; i++) {
 154                 if (port_type[i] != port_type[i + 1]) {
 155                         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
 156                                 mlx4_err(dev, "Only same port types supported "
 157                                          "on this HCA, aborting.\n");
 158                                 return -EINVAL;
 159                         }
 160                 }
 161         }
 162
 163         for (i = 0; i < dev->caps.num_ports; i++) {
 164                 if (!(port_type[i] & dev->caps.supported_type[i+1])) {
 165                         mlx4_err(dev, "Requested port type for port %d is not "
 166                                       "supported on this HCA\n", i + 1);
 167                         return -EINVAL;
 168                 }
 169         }
 170         return 0;
 171 }
 172
 173 static void mlx4_set_port_mask(struct mlx4_dev *dev)
 174 {
 175         int i;
 176
 177         for (i = 1; i <= dev->caps.num_ports; ++i)
 178                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 179 }
 180
 181 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
 182 {
 183         int err;
 184         int i;
 185
 186         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
 187         if (err) {
 188                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 189                 return err;
 190         }
 191
 192         if (dev_cap->min_page_sz > PAGE_SIZE) {
 193                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 194                          "kernel PAGE_SIZE of %ld, aborting.\n",
 195                          dev_cap->min_page_sz, PAGE_SIZE);
 196                 return -ENODEV;
 197         }
 198         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
 199                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 200                          "aborting.\n",
 201                          dev_cap->num_ports, MLX4_MAX_PORTS);
 202                 return -ENODEV;
 203         }
 204
 205         if (dev_cap->uar_size > pci_resource_len(dev->pdev, 2)) {
 206                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
 207                          "PCI resource 2 size of 0x%llx, aborting.\n",
 208                          dev_cap->uar_size,
 209                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 210                 return -ENODEV;
 211         }
 212
 213         dev->caps.num_ports          = dev_cap->num_ports;
 214         dev->phys_caps.num_phys_eqs  = MLX4_MAX_EQ_NUM;
 215         for (i = 1; i <= dev->caps.num_ports; ++i) {
 216                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
 217                 dev->caps.ib_mtu_cap[i]     = dev_cap->ib_mtu[i];
 218                 dev->phys_caps.gid_phys_table_len[i]  = dev_cap->max_gids[i];
 219                 dev->phys_caps.pkey_phys_table_len[i] = dev_cap->max_pkeys[i];
 220                 /* set gid and pkey table operating lengths by default
 221                  * to non-sriov values */
 222                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
 223                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
 224                 dev->caps.port_width_cap[i] = dev_cap->max_port_width[i];
 225                 dev->caps.eth_mtu_cap[i]    = dev_cap->eth_mtu[i];
 226                 dev->caps.def_mac[i]        = dev_cap->def_mac[i];
 227                 dev->caps.supported_type[i] = dev_cap->supported_port_types[i];
 228                 dev->caps.suggested_type[i] = dev_cap->suggested_type[i];
 229                 dev->caps.default_sense[i] = dev_cap->default_sense[i];
 230                 dev->caps.trans_type[i]     = dev_cap->trans_type[i];
 231                 dev->caps.vendor_oui[i]     = dev_cap->vendor_oui[i];
 232                 dev->caps.wavelength[i]     = dev_cap->wavelength[i];
 233                 dev->caps.trans_code[i]     = dev_cap->trans_code[i];
 234         }
 235
 236         dev->caps.uar_page_size      = PAGE_SIZE;
 237         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
 238         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
 239         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
 240         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
 241         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
 242         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
 243         dev->caps.max_wqes           = dev_cap->max_qp_sz;
 244         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
 245         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
 246         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
 247         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
 248         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
 249         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
 250         /*
 251          * Subtract 1 from the limit because we need to allocate a
 252          * spare CQE so the HCA HW can tell the difference between an
 253          * empty CQ and a full CQ.
 254          */
 255         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
 256         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
 257         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
 258         dev->caps.reserved_mtts      = dev_cap->reserved_mtts;
 259         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
 260
 261         /* The first 128 UARs are used for EQ doorbells */
 262         dev->caps.reserved_uars      = max_t(int, 128, dev_cap->reserved_uars);
 263         dev->caps.reserved_pds       = dev_cap->reserved_pds;
 264         dev->caps.reserved_xrcds     = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 265                                         dev_cap->reserved_xrcds : 0;
 266         dev->caps.max_xrcds          = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 267                                         dev_cap->max_xrcds : 0;
 268         dev->caps.mtt_entry_sz       = dev_cap->mtt_entry_sz;
 269
 270         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
 271         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
 272         dev->caps.flags              = dev_cap->flags;
 273         dev->caps.flags2             = dev_cap->flags2;
 274         dev->caps.bmme_flags         = dev_cap->bmme_flags;
 275         dev->caps.reserved_lkey      = dev_cap->reserved_lkey;
 276         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
 277         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
 278         dev->caps.max_rss_tbl_sz     = dev_cap->max_rss_tbl_sz;
 279
 280         if (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) {
 281                 dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED;
 282                 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry;
 283                 dev->caps.fs_log_max_ucast_qp_range_size =
 284                         dev_cap->fs_log_max_ucast_qp_range_size;
 285         } else {
 286                 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER &&
 287                     dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) {
 288                         dev->caps.steering_mode = MLX4_STEERING_MODE_B0;
 289                 } else {
 290                         dev->caps.steering_mode = MLX4_STEERING_MODE_A0;
 291
 292                         if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER ||
 293                             dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER)
 294                                 mlx4_warn(dev, "Must have UC_STEER and MC_STEER flags "
 295                                                 "set to use B0 steering. Falling back to A0 steering mode.\n");
 296                 }
 297                 dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev);
 298         }
 299         mlx4_dbg(dev, "Steering mode is: %s\n",
 300                  mlx4_steering_mode_str(dev->caps.steering_mode));
 301
 302         /* Sense port always allowed on supported devices for ConnectX1 and 2 */
 303         if (dev->pdev->device != 0x1003)
 304                 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT;
 305
 306         dev->caps.log_num_macs  = log_num_mac;
 307         dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS;
 308         dev->caps.log_num_prios = use_prio ? 3 : 0;
 309
 310         for (i = 1; i <= dev->caps.num_ports; ++i) {
 311                 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE;
 312                 if (dev->caps.supported_type[i]) {
 313                         /* if only ETH is supported - assign ETH */
 314                         if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH)
 315                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
 316                         /* if only IB is supported, assign IB */
 317                         else if (dev->caps.supported_type[i] ==
 318                                  MLX4_PORT_TYPE_IB)
 319                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_IB;
 320                         else {
 321                                 /* if IB and ETH are supported, we set the port
 322                                  * type according to user selection of port type;
 323                                  * if user selected none, take the FW hint */
 324                                 if (port_type_array[i - 1] == MLX4_PORT_TYPE_NONE)
 325                                         dev->caps.port_type[i] = dev->caps.suggested_type[i] ?
 326                                                 MLX4_PORT_TYPE_ETH : MLX4_PORT_TYPE_IB;
 327                                 else
 328                                         dev->caps.port_type[i] = port_type_array[i - 1];
 329                         }
 330                 }
 331                 /*
 332                  * Link sensing is allowed on the port if 3 conditions are true:
 333                  * 1. Both protocols are supported on the port.
 334                  * 2. Different types are supported on the port
 335                  * 3. FW declared that it supports link sensing
 336                  */
 337                 mlx4_priv(dev)->sense.sense_allowed[i] =
 338                         ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) &&
 339                          (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
 340                          (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT));
 341
 342                 /*
 343                  * If "default_sense" bit is set, we move the port to "AUTO" mode
 344                  * and perform sense_port FW command to try and set the correct
 345                  * port type from beginning
 346                  */
 347                 if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) {
 348                         enum mlx4_port_type sensed_port = MLX4_PORT_TYPE_NONE;
 349                         dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO;
 350                         mlx4_SENSE_PORT(dev, i, &sensed_port);
 351                         if (sensed_port != MLX4_PORT_TYPE_NONE)
 352                                 dev->caps.port_type[i] = sensed_port;
 353                 } else {
 354                         dev->caps.possible_type[i] = dev->caps.port_type[i];
 355                 }
 356
 357                 if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) {
 358                         dev->caps.log_num_macs = dev_cap->log_max_macs[i];
 359                         mlx4_warn(dev, "Requested number of MACs is too much "
 360                                   "for port %d, reducing to %d.\n",
 361                                   i, 1 << dev->caps.log_num_macs);
 362                 }
 363                 if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) {
 364                         dev->caps.log_num_vlans = dev_cap->log_max_vlans[i];
 365                         mlx4_warn(dev, "Requested number of VLANs is too much "
 366                                   "for port %d, reducing to %d.\n",
 367                                   i, 1 << dev->caps.log_num_vlans);
 368                 }
 369         }
 370
 371         dev->caps.max_counters = 1 << ilog2(dev_cap->max_counters);
 372
 373         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
 374         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] =
 375                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] =
 376                 (1 << dev->caps.log_num_macs) *
 377                 (1 << dev->caps.log_num_vlans) *
 378                 (1 << dev->caps.log_num_prios) *
 379                 dev->caps.num_ports;
 380         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH;
 381
 382         dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] +
 383                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] +
 384                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] +
 385                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH];
 386
 387         dev->caps.sqp_demux = (mlx4_is_master(dev)) ? MLX4_MAX_NUM_SLAVES : 0;
 388         return 0;
 389 }
 390 /*The function checks if there are live vf, return the num of them*/
 391 static int mlx4_how_many_lives_vf(struct mlx4_dev *dev)
 392 {
 393         struct mlx4_priv *priv = mlx4_priv(dev);
 394         struct mlx4_slave_state *s_state;
 395         int i;
 396         int ret = 0;
 397
 398         for (i = 1/*the ppf is 0*/; i < dev->num_slaves; ++i) {
 399                 s_state = &priv->mfunc.master.slave_state[i];
 400                 if (s_state->active && s_state->last_cmd !=
 401                     MLX4_COMM_CMD_RESET) {
 402                         mlx4_warn(dev, "%s: slave: %d is still active\n",
 403                                   __func__, i);
 404                         ret++;
 405                 }
 406         }
 407         return ret;
 408 }
 409
 410 int mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey)
 411 {
 412         u32 qk = MLX4_RESERVED_QKEY_BASE;
 413         if (qpn >= dev->caps.base_tunnel_sqpn + 8 * MLX4_MFUNC_MAX ||
 414             qpn < dev->caps.sqp_start)
 415                 return -EINVAL;
 416
 417         if (qpn >= dev->caps.base_tunnel_sqpn)
 418                 /* tunnel qp */
 419                 qk += qpn - dev->caps.base_tunnel_sqpn;
 420         else
 421                 qk += qpn - dev->caps.sqp_start;
 422         *qkey = qk;
 423         return 0;
 424 }
 425 EXPORT_SYMBOL(mlx4_get_parav_qkey);
 426
 427 void mlx4_sync_pkey_table(struct mlx4_dev *dev, int slave, int port, int i, int val)
 428 {
 429         struct mlx4_priv *priv = container_of(dev, struct mlx4_priv, dev);
 430
 431         if (!mlx4_is_master(dev))
 432                 return;
 433
 434         priv->virt2phys_pkey[slave][port - 1][i] = val;
 435 }
 436 EXPORT_SYMBOL(mlx4_sync_pkey_table);
 437
 438 int mlx4_is_slave_active(struct mlx4_dev *dev, int slave)
 439 {
 440         struct mlx4_priv *priv = mlx4_priv(dev);
 441         struct mlx4_slave_state *s_slave;
 442
 443         if (!mlx4_is_master(dev))
 444                 return 0;
 445
 446         s_slave = &priv->mfunc.master.slave_state[slave];
 447         return !!s_slave->active;
 448 }
 449 EXPORT_SYMBOL(mlx4_is_slave_active);
 450
 451 static int mlx4_slave_cap(struct mlx4_dev *dev)
 452 {
 453         int                        err;
 454         u32                        page_size;
 455         struct mlx4_dev_cap        dev_cap;
 456         struct mlx4_func_cap       func_cap;
 457         struct mlx4_init_hca_param hca_param;
 458         int                        i;
 459
 460         memset(&hca_param, 0, sizeof(hca_param));
 461         err = mlx4_QUERY_HCA(dev, &hca_param);
 462         if (err) {
 463                 mlx4_err(dev, "QUERY_HCA command failed, aborting.\n");
 464                 return err;
 465         }
 466
 467         /*fail if the hca has an unknown capability */
 468         if ((hca_param.global_caps | HCA_GLOBAL_CAP_MASK) !=
 469             HCA_GLOBAL_CAP_MASK) {
 470                 mlx4_err(dev, "Unknown hca global capabilities\n");
 471                 return -ENOSYS;
 472         }
 473
 474         mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz;
 475
 476         memset(&dev_cap, 0, sizeof(dev_cap));
 477         dev->caps.max_qp_dest_rdma = 1 << hca_param.log_rd_per_qp;
 478         err = mlx4_dev_cap(dev, &dev_cap);
 479         if (err) {
 480                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 481                 return err;
 482         }
 483
 484         err = mlx4_QUERY_FW(dev);
 485         if (err)
 486                 mlx4_err(dev, "QUERY_FW command failed: could not get FW version.\n");
 487
 488         page_size = ~dev->caps.page_size_cap + 1;
 489         mlx4_warn(dev, "HCA minimum page size:%d\n", page_size);
 490         if (page_size > PAGE_SIZE) {
 491                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 492                          "kernel PAGE_SIZE of %ld, aborting.\n",
 493                          page_size, PAGE_SIZE);
 494                 return -ENODEV;
 495         }
 496
 497         /* slave gets uar page size from QUERY_HCA fw command */
 498         dev->caps.uar_page_size = 1 << (hca_param.uar_page_sz + 12);
 499
 500         /* TODO: relax this assumption */
 501         if (dev->caps.uar_page_size != PAGE_SIZE) {
 502                 mlx4_err(dev, "UAR size:%d != kernel PAGE_SIZE of %ld\n",
 503                          dev->caps.uar_page_size, PAGE_SIZE);
 504                 return -ENODEV;
 505         }
 506
 507         memset(&func_cap, 0, sizeof(func_cap));
 508         err = mlx4_QUERY_FUNC_CAP(dev, &func_cap);
 509         if (err) {
 510                 mlx4_err(dev, "QUERY_FUNC_CAP command failed, aborting.\n");
 511                 return err;
 512         }
 513
 514         if ((func_cap.pf_context_behaviour | PF_CONTEXT_BEHAVIOUR_MASK) !=
 515             PF_CONTEXT_BEHAVIOUR_MASK) {
 516                 mlx4_err(dev, "Unknown pf context behaviour\n");
 517                 return -ENOSYS;
 518         }
 519
 520         dev->caps.num_ports             = func_cap.num_ports;
 521         dev->caps.num_qps               = func_cap.qp_quota;
 522         dev->caps.num_srqs              = func_cap.srq_quota;
 523         dev->caps.num_cqs               = func_cap.cq_quota;
 524         dev->caps.num_eqs               = func_cap.max_eq;
 525         dev->caps.reserved_eqs          = func_cap.reserved_eq;
 526         dev->caps.num_mpts              = func_cap.mpt_quota;
 527         dev->caps.num_mtts              = func_cap.mtt_quota;
 528         dev->caps.num_pds               = MLX4_NUM_PDS;
 529         dev->caps.num_mgms              = 0;
 530         dev->caps.num_amgms             = 0;
 531
 532         if (dev->caps.num_ports > MLX4_MAX_PORTS) {
 533                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 534                          "aborting.\n", dev->caps.num_ports, MLX4_MAX_PORTS);
 535                 return -ENODEV;
 536         }
 537
 538         for (i = 1; i <= dev->caps.num_ports; ++i) {
 539                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 540                 if (mlx4_get_slave_pkey_gid_tbl_len(dev, i,
 541                                                     &dev->caps.gid_table_len[i],
 542                                                     &dev->caps.pkey_table_len[i]))
 543                         return -ENODEV;
 544         }
 545
 546         if (dev->caps.uar_page_size * (dev->caps.num_uars -
 547                                        dev->caps.reserved_uars) >
 548                                        pci_resource_len(dev->pdev, 2)) {
 549                 mlx4_err(dev, "HCA reported UAR region size of 0x%x bigger than "
 550                          "PCI resource 2 size of 0x%llx, aborting.\n",
 551                          dev->caps.uar_page_size * dev->caps.num_uars,
 552                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 553                 return -ENODEV;
 554         }
 555
 556         /* Calculate our sqp_start */
 557         dev->caps.sqp_start = func_cap.base_proxy_qpn;
 558         dev->caps.base_tunnel_sqpn = func_cap.base_tunnel_qpn;
 559
 560         return 0;
 561 }
 562
 563 /*
 564  * Change the port configuration of the device.
 565  * Every user of this function must hold the port mutex.
 566  */
 567 int mlx4_change_port_types(struct mlx4_dev *dev,
 568                            enum mlx4_port_type *port_types)
 569 {
 570         int err = 0;
 571         int change = 0;
 572         int port;
 573
 574         for (port = 0; port <  dev->caps.num_ports; port++) {
 575                 /* Change the port type only if the new type is different
 576                  * from the current, and not set to Auto */
 577                 if (port_types[port] != dev->caps.port_type[port + 1])
 578                         change = 1;
 579         }
 580         if (change) {
 581                 mlx4_unregister_device(dev);
 582                 for (port = 1; port <= dev->caps.num_ports; port++) {
 583                         mlx4_CLOSE_PORT(dev, port);
 584                         dev->caps.port_type[port] = port_types[port - 1];
 585                         err = mlx4_SET_PORT(dev, port, -1);
 586                         if (err) {
 587                                 mlx4_err(dev, "Failed to set port %d, "
 588                                               "aborting\n", port);
 589                                 goto out;
 590                         }
 591                 }
 592                 mlx4_set_port_mask(dev);
 593                 err = mlx4_register_device(dev);
 594         }
 595
 596 out:
 597         return err;
 598 }
 599
 600 static ssize_t show_port_type(struct device *dev,
 601                               struct device_attribute *attr,
 602                               char *buf)
 603 {
 604         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 605                                                    port_attr);
 606         struct mlx4_dev *mdev = info->dev;
 607         char type[8];
 608
 609         sprintf(type, "%s",
 610                 (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ?
 611                 "ib" : "eth");
 612         if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO)
 613                 sprintf(buf, "auto (%s)\n", type);
 614         else
 615                 sprintf(buf, "%s\n", type);
 616
 617         return strlen(buf);
 618 }
 619
 620 static ssize_t set_port_type(struct device *dev,
 621                              struct device_attribute *attr,
 622                              const char *buf, size_t count)
 623 {
 624         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 625                                                    port_attr);
 626         struct mlx4_dev *mdev = info->dev;
 627         struct mlx4_priv *priv = mlx4_priv(mdev);
 628         enum mlx4_port_type types[MLX4_MAX_PORTS];
 629         enum mlx4_port_type new_types[MLX4_MAX_PORTS];
 630         int i;
 631         int err = 0;
 632
 633         if (!strcmp(buf, "ib\n"))
 634                 info->tmp_type = MLX4_PORT_TYPE_IB;
 635         else if (!strcmp(buf, "eth\n"))
 636                 info->tmp_type = MLX4_PORT_TYPE_ETH;
 637         else if (!strcmp(buf, "auto\n"))
 638                 info->tmp_type = MLX4_PORT_TYPE_AUTO;
 639         else {
 640                 mlx4_err(mdev, "%s is not supported port type\n", buf);
 641                 return -EINVAL;
 642         }
 643
 644         mlx4_stop_sense(mdev);
 645         mutex_lock(&priv->port_mutex);
 646         /* Possible type is always the one that was delivered */
 647         mdev->caps.possible_type[info->port] = info->tmp_type;
 648
 649         for (i = 0; i < mdev->caps.num_ports; i++) {
 650                 types[i] = priv->port[i+1].tmp_type ? priv->port[i+1].tmp_type :
 651                                         mdev->caps.possible_type[i+1];
 652                 if (types[i] == MLX4_PORT_TYPE_AUTO)
 653                         types[i] = mdev->caps.port_type[i+1];
 654         }
 655
 656         if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
 657             !(mdev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)) {
 658                 for (i = 1; i <= mdev->caps.num_ports; i++) {
 659                         if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) {
 660                                 mdev->caps.possible_type[i] = mdev->caps.port_type[i];
 661                                 err = -EINVAL;
 662                         }
 663                 }
 664         }
 665         if (err) {
 666                 mlx4_err(mdev, "Auto sensing is not supported on this HCA. "
 667                                "Set only 'eth' or 'ib' for both ports "
 668                                "(should be the same)\n");
 669                 goto out;
 670         }
 671
 672         mlx4_do_sense_ports(mdev, new_types, types);
 673
 674         err = mlx4_check_port_params(mdev, new_types);
 675         if (err)
 676                 goto out;
 677
 678         /* We are about to apply the changes after the configuration
 679          * was verified, no need to remember the temporary types
 680          * any more */
 681         for (i = 0; i < mdev->caps.num_ports; i++)
 682                 priv->port[i + 1].tmp_type = 0;
 683
 684         err = mlx4_change_port_types(mdev, new_types);
 685
 686 out:
 687         mlx4_start_sense(mdev);
 688         mutex_unlock(&priv->port_mutex);
 689         return err ? err : count;
 690 }
 691
 692 enum ibta_mtu {
 693         IB_MTU_256  = 1,
 694         IB_MTU_512  = 2,
 695         IB_MTU_1024 = 3,
 696         IB_MTU_2048 = 4,
 697         IB_MTU_4096 = 5
 698 };
 699
 700 static inline int int_to_ibta_mtu(int mtu)
 701 {
 702         switch (mtu) {
 703         case 256:  return IB_MTU_256;
 704         case 512:  return IB_MTU_512;
 705         case 1024: return IB_MTU_1024;
 706         case 2048: return IB_MTU_2048;
 707         case 4096: return IB_MTU_4096;
 708         default: return -1;
 709         }
 710 }
 711
 712 static inline int ibta_mtu_to_int(enum ibta_mtu mtu)
 713 {
 714         switch (mtu) {
 715         case IB_MTU_256:  return  256;
 716         case IB_MTU_512:  return  512;
 717         case IB_MTU_1024: return 1024;
 718         case IB_MTU_2048: return 2048;
 719         case IB_MTU_4096: return 4096;
 720         default: return -1;
 721         }
 722 }
 723
 724 static ssize_t show_port_ib_mtu(struct device *dev,
 725                              struct device_attribute *attr,
 726                              char *buf)
 727 {
 728         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 729                                                    port_mtu_attr);
 730         struct mlx4_dev *mdev = info->dev;
 731
 732         if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH)
 733                 mlx4_warn(mdev, "port level mtu is only used for IB ports\n");
 734
 735         sprintf(buf, "%d\n",
 736                         ibta_mtu_to_int(mdev->caps.port_ib_mtu[info->port]));
 737         return strlen(buf);
 738 }
 739
 740 static ssize_t set_port_ib_mtu(struct device *dev,
 741                              struct device_attribute *attr,
 742                              const char *buf, size_t count)
 743 {
 744         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 745                                                    port_mtu_attr);
 746         struct mlx4_dev *mdev = info->dev;
 747         struct mlx4_priv *priv = mlx4_priv(mdev);
 748         int err, port, mtu, ibta_mtu = -1;
 749
 750         if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) {
 751                 mlx4_warn(mdev, "port level mtu is only used for IB ports\n");
 752                 return -EINVAL;
 753         }
 754
 755         err = sscanf(buf, "%d", &mtu);
 756         if (err > 0)
 757                 ibta_mtu = int_to_ibta_mtu(mtu);
 758
 759         if (err <= 0 || ibta_mtu < 0) {
 760                 mlx4_err(mdev, "%s is invalid IBTA mtu\n", buf);
 761                 return -EINVAL;
 762         }
 763
 764         mdev->caps.port_ib_mtu[info->port] = ibta_mtu;
 765
 766         mlx4_stop_sense(mdev);
 767         mutex_lock(&priv->port_mutex);
 768         mlx4_unregister_device(mdev);
 769         for (port = 1; port <= mdev->caps.num_ports; port++) {
 770                 mlx4_CLOSE_PORT(mdev, port);
 771                 err = mlx4_SET_PORT(mdev, port, -1);
 772                 if (err) {
 773                         mlx4_err(mdev, "Failed to set port %d, "
 774                                       "aborting\n", port);
 775                         goto err_set_port;
 776                 }
 777         }
 778         err = mlx4_register_device(mdev);
 779 err_set_port:
 780         mutex_unlock(&priv->port_mutex);
 781         mlx4_start_sense(mdev);
 782         return err ? err : count;
 783 }
 784
 785 static int mlx4_load_fw(struct mlx4_dev *dev)
 786 {
 787         struct mlx4_priv *priv = mlx4_priv(dev);
 788         int err;
 789
 790         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
 791                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
 792         if (!priv->fw.fw_icm) {
 793                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
 794                 return -ENOMEM;
 795         }
 796
 797         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
 798         if (err) {
 799                 mlx4_err(dev, "MAP_FA command failed, aborting.\n");
 800                 goto err_free;
 801         }
 802
 803         err = mlx4_RUN_FW(dev);
 804         if (err) {
 805                 mlx4_err(dev, "RUN_FW command failed, aborting.\n");
 806                 goto err_unmap_fa;
 807         }
 808
 809         return 0;
 810
 811 err_unmap_fa:
 812         mlx4_UNMAP_FA(dev);
 813
 814 err_free:
 815         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 816         return err;
 817 }
 818
 819 static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
 820                                 int cmpt_entry_sz)
 821 {
 822         struct mlx4_priv *priv = mlx4_priv(dev);
 823         int err;
 824         int num_eqs;
 825
 826         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
 827                                   cmpt_base +
 828                                   ((u64) (MLX4_CMPT_TYPE_QP *
 829                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 830                                   cmpt_entry_sz, dev->caps.num_qps,
 831                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 832                                   0, 0);
 833         if (err)
 834                 goto err;
 835
 836         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
 837                                   cmpt_base +
 838                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
 839                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 840                                   cmpt_entry_sz, dev->caps.num_srqs,
 841                                   dev->caps.reserved_srqs, 0, 0);
 842         if (err)
 843                 goto err_qp;
 844
 845         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
 846                                   cmpt_base +
 847                                   ((u64) (MLX4_CMPT_TYPE_CQ *
 848                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 849                                   cmpt_entry_sz, dev->caps.num_cqs,
 850                                   dev->caps.reserved_cqs, 0, 0);
 851         if (err)
 852                 goto err_srq;
 853
 854         num_eqs = (mlx4_is_master(dev)) ? dev->phys_caps.num_phys_eqs :
 855                   dev->caps.num_eqs;
 856         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
 857                                   cmpt_base +
 858                                   ((u64) (MLX4_CMPT_TYPE_EQ *
 859                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 860                                   cmpt_entry_sz, num_eqs, num_eqs, 0, 0);
 861         if (err)
 862                 goto err_cq;
 863
 864         return 0;
 865
 866 err_cq:
 867         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 868
 869 err_srq:
 870         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 871
 872 err_qp:
 873         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 874
 875 err:
 876         return err;
 877 }
 878
 879 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
 880                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
 881 {
 882         struct mlx4_priv *priv = mlx4_priv(dev);
 883         u64 aux_pages;
 884         int num_eqs;
 885         int err;
 886
 887         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
 888         if (err) {
 889                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
 890                 return err;
 891         }
 892
 893         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
 894                  (unsigned long long) icm_size >> 10,
 895                  (unsigned long long) aux_pages << 2);
 896
 897         priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages,
 898                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
 899         if (!priv->fw.aux_icm) {
 900                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
 901                 return -ENOMEM;
 902         }
 903
 904         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
 905         if (err) {
 906                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
 907                 goto err_free_aux;
 908         }
 909
 910         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
 911         if (err) {
 912                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
 913                 goto err_unmap_aux;
 914         }
 915
 916
 917         num_eqs = (mlx4_is_master(dev)) ? dev->phys_caps.num_phys_eqs :
 918                    dev->caps.num_eqs;
 919         err = mlx4_init_icm_table(dev, &priv->eq_table.table,
 920                                   init_hca->eqc_base, dev_cap->eqc_entry_sz,
 921                                   num_eqs, num_eqs, 0, 0);
 922         if (err) {
 923                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
 924                 goto err_unmap_cmpt;
 925         }
 926
 927         /*
 928          * Reserved MTT entries must be aligned up to a cacheline
 929          * boundary, since the FW will write to them, while the driver
 930          * writes to all other MTT entries. (The variable
 931          * dev->caps.mtt_entry_sz below is really the MTT segment
 932          * size, not the raw entry size)
 933          */
 934         dev->caps.reserved_mtts =
 935                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
 936                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
 937
 938         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
 939                                   init_hca->mtt_base,
 940                                   dev->caps.mtt_entry_sz,
 941                                   dev->caps.num_mtts,
 942                                   dev->caps.reserved_mtts, 1, 0);
 943         if (err) {
 944                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
 945                 goto err_unmap_eq;
 946         }
 947
 948         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
 949                                   init_hca->dmpt_base,
 950                                   dev_cap->dmpt_entry_sz,
 951                                   dev->caps.num_mpts,
 952                                   dev->caps.reserved_mrws, 1, 1);
 953         if (err) {
 954                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
 955                 goto err_unmap_mtt;
 956         }
 957
 958         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
 959                                   init_hca->qpc_base,
 960                                   dev_cap->qpc_entry_sz,
 961                                   dev->caps.num_qps,
 962                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 963                                   0, 0);
 964         if (err) {
 965                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
 966                 goto err_unmap_dmpt;
 967         }
 968
 969         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
 970                                   init_hca->auxc_base,
 971                                   dev_cap->aux_entry_sz,
 972                                   dev->caps.num_qps,
 973                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 974                                   0, 0);
 975         if (err) {
 976                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
 977                 goto err_unmap_qp;
 978         }
 979
 980         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
 981                                   init_hca->altc_base,
 982                                   dev_cap->altc_entry_sz,
 983                                   dev->caps.num_qps,
 984                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 985                                   0, 0);
 986         if (err) {
 987                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
 988                 goto err_unmap_auxc;
 989         }
 990
 991         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
 992                                   init_hca->rdmarc_base,
 993                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
 994                                   dev->caps.num_qps,
 995                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 996                                   0, 0);
 997         if (err) {
 998                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
 999                 goto err_unmap_altc;
1000         }
1001
1002         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
1003                                   init_hca->cqc_base,
1004                                   dev_cap->cqc_entry_sz,
1005                                   dev->caps.num_cqs,
1006                                   dev->caps.reserved_cqs, 0, 0);
1007         if (err) {
1008                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
1009                 goto err_unmap_rdmarc;
1010         }
1011
1012         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
1013                                   init_hca->srqc_base,
1014                                   dev_cap->srq_entry_sz,
1015                                   dev->caps.num_srqs,
1016                                   dev->caps.reserved_srqs, 0, 0);
1017         if (err) {
1018                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
1019                 goto err_unmap_cq;
1020         }
1021
1022         /*
1023          * For flow steering device managed mode it is required to use
1024          * mlx4_init_icm_table. For B0 steering mode it's not strictly
1025          * required, but for simplicity just map the whole multicast
1026          * group table now.  The table isn't very big and it's a lot
1027          * easier than trying to track ref counts.
1028          */
1029         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
1030                                   init_hca->mc_base,
1031                                   mlx4_get_mgm_entry_size(dev),
1032                                   dev->caps.num_mgms + dev->caps.num_amgms,
1033                                   dev->caps.num_mgms + dev->caps.num_amgms,
1034                                   0, 0);
1035         if (err) {
1036                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
1037                 goto err_unmap_srq;
1038         }
1039
1040         return 0;
1041
1042 err_unmap_srq:
1043         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1044
1045 err_unmap_cq:
1046         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1047
1048 err_unmap_rdmarc:
1049         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1050
1051 err_unmap_altc:
1052         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1053
1054 err_unmap_auxc:
1055         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1056
1057 err_unmap_qp:
1058         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1059
1060 err_unmap_dmpt:
1061         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1062
1063 err_unmap_mtt:
1064         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1065
1066 err_unmap_eq:
1067         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1068
1069 err_unmap_cmpt:
1070         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1071         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1072         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1073         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1074
1075 err_unmap_aux:
1076         mlx4_UNMAP_ICM_AUX(dev);
1077
1078 err_free_aux:
1079         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1080
1081         return err;
1082 }
1083
1084 static void mlx4_free_icms(struct mlx4_dev *dev)
1085 {
1086         struct mlx4_priv *priv = mlx4_priv(dev);
1087
1088         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
1089         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1090         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1091         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1092         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1093         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1094         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1095         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1096         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1097         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1098         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1099         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1100         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1101         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1102
1103         mlx4_UNMAP_ICM_AUX(dev);
1104         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1105 }
1106
1107 static void mlx4_slave_exit(struct mlx4_dev *dev)
1108 {
1109         struct mlx4_priv *priv = mlx4_priv(dev);
1110
1111         down(&priv->cmd.slave_sem);
1112         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_TIME))
1113                 mlx4_warn(dev, "Failed to close slave function.\n");
1114         up(&priv->cmd.slave_sem);
1115 }
1116
1117 static int map_bf_area(struct mlx4_dev *dev)
1118 {
1119         struct mlx4_priv *priv = mlx4_priv(dev);
1120         resource_size_t bf_start;
1121         resource_size_t bf_len;
1122         int err = 0;
1123
1124         if (!dev->caps.bf_reg_size)
1125                 return -ENXIO;
1126
1127         bf_start = pci_resource_start(dev->pdev, 2) +
1128                         (dev->caps.num_uars << PAGE_SHIFT);
1129         bf_len = pci_resource_len(dev->pdev, 2) -
1130                         (dev->caps.num_uars << PAGE_SHIFT);
1131         priv->bf_mapping = io_mapping_create_wc(bf_start, bf_len);
1132         if (!priv->bf_mapping)
1133                 err = -ENOMEM;
1134
1135         return err;
1136 }
1137
1138 static void unmap_bf_area(struct mlx4_dev *dev)
1139 {
1140         if (mlx4_priv(dev)->bf_mapping)
1141                 io_mapping_free(mlx4_priv(dev)->bf_mapping);
1142 }
1143
1144 static void mlx4_close_hca(struct mlx4_dev *dev)
1145 {
1146         unmap_bf_area(dev);
1147         if (mlx4_is_slave(dev))
1148                 mlx4_slave_exit(dev);
1149         else {
1150                 mlx4_CLOSE_HCA(dev, 0);
1151                 mlx4_free_icms(dev);
1152                 mlx4_UNMAP_FA(dev);
1153                 mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
1154         }
1155 }
1156
1157 static int mlx4_init_slave(struct mlx4_dev *dev)
1158 {
1159         struct mlx4_priv *priv = mlx4_priv(dev);
1160         u64 dma = (u64) priv->mfunc.vhcr_dma;
1161         int num_of_reset_retries = NUM_OF_RESET_RETRIES;
1162         int ret_from_reset = 0;
1163         u32 slave_read;
1164         u32 cmd_channel_ver;
1165
1166         down(&priv->cmd.slave_sem);
1167         priv->cmd.max_cmds = 1;
1168         mlx4_warn(dev, "Sending reset\n");
1169         ret_from_reset = mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0,
1170                                        MLX4_COMM_TIME);
1171         /* if we are in the middle of flr the slave will try
1172          * NUM_OF_RESET_RETRIES times before leaving.*/
1173         if (ret_from_reset) {
1174                 if (MLX4_DELAY_RESET_SLAVE == ret_from_reset) {
1175                         msleep(SLEEP_TIME_IN_RESET);
1176                         while (ret_from_reset && num_of_reset_retries) {
1177                                 mlx4_warn(dev, "slave is currently in the"
1178                                           "middle of FLR. retrying..."
1179                                           "(try num:%d)\n",
1180                                           (NUM_OF_RESET_RETRIES -
1181                                            num_of_reset_retries  + 1));
1182                                 ret_from_reset =
1183                                         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET,
1184                                                       0, MLX4_COMM_TIME);
1185                                 num_of_reset_retries = num_of_reset_retries - 1;
1186                         }
1187                 } else
1188                         goto err;
1189         }
1190
1191         /* check the driver version - the slave I/F revision
1192          * must match the master's */
1193         slave_read = swab32(readl(&priv->mfunc.comm->slave_read));
1194         cmd_channel_ver = mlx4_comm_get_version();
1195
1196         if (MLX4_COMM_GET_IF_REV(cmd_channel_ver) !=
1197                 MLX4_COMM_GET_IF_REV(slave_read)) {
1198                 mlx4_err(dev, "slave driver version is not supported"
1199                          " by the master\n");
1200                 goto err;
1201         }
1202
1203         mlx4_warn(dev, "Sending vhcr0\n");
1204         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR0, dma >> 48,
1205                                                     MLX4_COMM_TIME))
1206                 goto err;
1207         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR1, dma >> 32,
1208                                                     MLX4_COMM_TIME))
1209                 goto err;
1210         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR2, dma >> 16,
1211                                                     MLX4_COMM_TIME))
1212                 goto err;
1213         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR_EN, dma, MLX4_COMM_TIME))
1214                 goto err;
1215         up(&priv->cmd.slave_sem);
1216         return 0;
1217
1218 err:
1219         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, 0);
1220         up(&priv->cmd.slave_sem);
1221         return -EIO;
1222 }
1223
1224 static void mlx4_parav_master_pf_caps(struct mlx4_dev *dev)
1225 {
1226         int i;
1227
1228         for (i = 1; i <= dev->caps.num_ports; i++) {
1229                 dev->caps.gid_table_len[i] = 1;
1230                 dev->caps.pkey_table_len[i] =
1231                         dev->phys_caps.pkey_phys_table_len[i] - 1;
1232         }
1233 }
1234
1235 static int mlx4_init_hca(struct mlx4_dev *dev)
1236 {
1237         struct mlx4_priv          *priv = mlx4_priv(dev);
1238         struct mlx4_adapter        adapter;
1239         struct mlx4_dev_cap        dev_cap;
1240         struct mlx4_mod_stat_cfg   mlx4_cfg;
1241         struct mlx4_profile        profile;
1242         struct mlx4_init_hca_param init_hca;
1243         u64 icm_size;
1244         int err;
1245
1246         if (!mlx4_is_slave(dev)) {
1247                 err = mlx4_QUERY_FW(dev);
1248                 if (err) {
1249                         if (err == -EACCES)
1250                                 mlx4_info(dev, "non-primary physical function, skipping.\n");
1251                         else
1252                                 mlx4_err(dev, "QUERY_FW command failed, aborting.\n");
1253                         return err;
1254                 }
1255
1256                 err = mlx4_load_fw(dev);
1257                 if (err) {
1258                         mlx4_err(dev, "Failed to start FW, aborting.\n");
1259                         return err;
1260                 }
1261
1262                 mlx4_cfg.log_pg_sz_m = 1;
1263                 mlx4_cfg.log_pg_sz = 0;
1264                 err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg);
1265                 if (err)
1266                         mlx4_warn(dev, "Failed to override log_pg_sz parameter\n");
1267
1268                 err = mlx4_dev_cap(dev, &dev_cap);
1269                 if (err) {
1270                         mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
1271                         goto err_stop_fw;
1272                 }
1273
1274                 if (mlx4_is_master(dev))
1275                         mlx4_parav_master_pf_caps(dev);
1276
1277                 priv->fs_hash_mode = MLX4_FS_L2_HASH;
1278
1279                 switch (priv->fs_hash_mode) {
1280                 case MLX4_FS_L2_HASH:
1281                         init_hca.fs_hash_enable_bits = 0;
1282                         break;
1283
1284                 case MLX4_FS_L2_L3_L4_HASH:
1285                         /* Enable flow steering with
1286                          * udp unicast and tcp unicast
1287                          */
1288                         init_hca.fs_hash_enable_bits =
1289                                 MLX4_FS_UDP_UC_EN | MLX4_FS_TCP_UC_EN;
1290                         break;
1291                 }
1292
1293                 profile = default_profile;
1294                 if (dev->caps.steering_mode ==
1295                     MLX4_STEERING_MODE_DEVICE_MANAGED)
1296                         profile.num_mcg = MLX4_FS_NUM_MCG;
1297
1298                 icm_size = mlx4_make_profile(dev, &profile, &dev_cap,
1299                                              &init_hca);
1300                 if ((long long) icm_size < 0) {
1301                         err = icm_size;
1302                         goto err_stop_fw;
1303                 }
1304
1305                 dev->caps.max_fmr_maps = (1 << (32 - ilog2(dev->caps.num_mpts))) - 1;
1306
1307                 init_hca.log_uar_sz = ilog2(dev->caps.num_uars);
1308                 init_hca.uar_page_sz = PAGE_SHIFT - 12;
1309
1310                 err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
1311                 if (err)
1312                         goto err_stop_fw;
1313
1314                 err = mlx4_INIT_HCA(dev, &init_hca);
1315                 if (err) {
1316                         mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
1317                         goto err_free_icm;
1318                 }
1319         } else {
1320                 err = mlx4_init_slave(dev);
1321                 if (err) {
1322                         mlx4_err(dev, "Failed to initialize slave\n");
1323                         return err;
1324                 }
1325
1326                 err = mlx4_slave_cap(dev);
1327                 if (err) {
1328                         mlx4_err(dev, "Failed to obtain slave caps\n");
1329                         goto err_close;
1330                 }
1331         }
1332
1333         if (map_bf_area(dev))
1334                 mlx4_dbg(dev, "Failed to map blue flame area\n");
1335
1336         /*Only the master set the ports, all the rest got it from it.*/
1337         if (!mlx4_is_slave(dev))
1338                 mlx4_set_port_mask(dev);
1339
1340         err = mlx4_QUERY_ADAPTER(dev, &adapter);
1341         if (err) {
1342                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
1343                 goto unmap_bf;
1344         }
1345
1346         priv->eq_table.inta_pin = adapter.inta_pin;
1347         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
1348
1349         return 0;
1350
1351 unmap_bf:
1352         unmap_bf_area(dev);
1353
1354 err_close:
1355         mlx4_close_hca(dev);
1356
1357 err_free_icm:
1358         if (!mlx4_is_slave(dev))
1359                 mlx4_free_icms(dev);
1360
1361 err_stop_fw:
1362         if (!mlx4_is_slave(dev)) {
1363                 mlx4_UNMAP_FA(dev);
1364                 mlx4_free_icm(dev, priv->fw.fw_icm, 0);
1365         }
1366         return err;
1367 }
1368
1369 static int mlx4_init_counters_table(struct mlx4_dev *dev)
1370 {
1371         struct mlx4_priv *priv = mlx4_priv(dev);
1372         int nent;
1373
1374         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1375                 return -ENOENT;
1376
1377         nent = dev->caps.max_counters;
1378         return mlx4_bitmap_init(&priv->counters_bitmap, nent, nent - 1, 0, 0);
1379 }
1380
1381 static void mlx4_cleanup_counters_table(struct mlx4_dev *dev)
1382 {
1383         mlx4_bitmap_cleanup(&mlx4_priv(dev)->counters_bitmap);
1384 }
1385
1386 int __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
1387 {
1388         struct mlx4_priv *priv = mlx4_priv(dev);
1389
1390         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1391                 return -ENOENT;
1392
1393         *idx = mlx4_bitmap_alloc(&priv->counters_bitmap);
1394         if (*idx == -1)
1395                 return -ENOMEM;
1396
1397         return 0;
1398 }
1399
1400 int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
1401 {
1402         u64 out_param;
1403         int err;
1404
1405         if (mlx4_is_mfunc(dev)) {
1406                 err = mlx4_cmd_imm(dev, 0, &out_param, RES_COUNTER,
1407                                    RES_OP_RESERVE, MLX4_CMD_ALLOC_RES,
1408                                    MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
1409                 if (!err)
1410                         *idx = get_param_l(&out_param);
1411
1412                 return err;
1413         }
1414         return __mlx4_counter_alloc(dev, idx);
1415 }
1416 EXPORT_SYMBOL_GPL(mlx4_counter_alloc);
1417
1418 void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
1419 {
1420         mlx4_bitmap_free(&mlx4_priv(dev)->counters_bitmap, idx);
1421         return;
1422 }
1423
1424 void mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
1425 {
1426         u64 in_param;
1427
1428         if (mlx4_is_mfunc(dev)) {
1429                 set_param_l(&in_param, idx);
1430                 mlx4_cmd(dev, in_param, RES_COUNTER, RES_OP_RESERVE,
1431                          MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A,
1432                          MLX4_CMD_WRAPPED);
1433                 return;
1434         }
1435         __mlx4_counter_free(dev, idx);
1436 }
1437 EXPORT_SYMBOL_GPL(mlx4_counter_free);
1438
1439 static int mlx4_setup_hca(struct mlx4_dev *dev)
1440 {
1441         struct mlx4_priv *priv = mlx4_priv(dev);
1442         int err;
1443         int port;
1444         __be32 ib_port_default_caps;
1445
1446         err = mlx4_init_uar_table(dev);
1447         if (err) {
1448                 mlx4_err(dev, "Failed to initialize "
1449                          "user access region table, aborting.\n");
1450                 return err;
1451         }
1452
1453         err = mlx4_uar_alloc(dev, &priv->driver_uar);
1454         if (err) {
1455                 mlx4_err(dev, "Failed to allocate driver access region, "
1456                          "aborting.\n");
1457                 goto err_uar_table_free;
1458         }
1459
1460         priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
1461         if (!priv->kar) {
1462                 mlx4_err(dev, "Couldn't map kernel access region, "
1463                          "aborting.\n");
1464                 err = -ENOMEM;
1465                 goto err_uar_free;
1466         }
1467
1468         err = mlx4_init_pd_table(dev);
1469         if (err) {
1470                 mlx4_err(dev, "Failed to initialize "
1471                          "protection domain table, aborting.\n");
1472                 goto err_kar_unmap;
1473         }
1474
1475         err = mlx4_init_xrcd_table(dev);
1476         if (err) {
1477                 mlx4_err(dev, "Failed to initialize "
1478                          "reliable connection domain table, aborting.\n");
1479                 goto err_pd_table_free;
1480         }
1481
1482         err = mlx4_init_mr_table(dev);
1483         if (err) {
1484                 mlx4_err(dev, "Failed to initialize "
1485                          "memory region table, aborting.\n");
1486                 goto err_xrcd_table_free;
1487         }
1488
1489         err = mlx4_init_eq_table(dev);
1490         if (err) {
1491                 mlx4_err(dev, "Failed to initialize "
1492                          "event queue table, aborting.\n");
1493                 goto err_mr_table_free;
1494         }
1495
1496         err = mlx4_cmd_use_events(dev);
1497         if (err) {
1498                 mlx4_err(dev, "Failed to switch to event-driven "
1499                          "firmware commands, aborting.\n");
1500                 goto err_eq_table_free;
1501         }
1502
1503         err = mlx4_NOP(dev);
1504         if (err) {
1505                 if (dev->flags & MLX4_FLAG_MSI_X) {
1506                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
1507                                   "interrupt IRQ %d).\n",
1508                                   priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1509                         mlx4_warn(dev, "Trying again without MSI-X.\n");
1510                 } else {
1511                         mlx4_err(dev, "NOP command failed to generate interrupt "
1512                                  "(IRQ %d), aborting.\n",
1513                                  priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1514                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
1515                 }
1516
1517                 goto err_cmd_poll;
1518         }
1519
1520         mlx4_dbg(dev, "NOP command IRQ test passed\n");
1521
1522         err = mlx4_init_cq_table(dev);
1523         if (err) {
1524                 mlx4_err(dev, "Failed to initialize "
1525                          "completion queue table, aborting.\n");
1526                 goto err_cmd_poll;
1527         }
1528
1529         err = mlx4_init_srq_table(dev);
1530         if (err) {
1531                 mlx4_err(dev, "Failed to initialize "
1532                          "shared receive queue table, aborting.\n");
1533                 goto err_cq_table_free;
1534         }
1535
1536         err = mlx4_init_qp_table(dev);
1537         if (err) {
1538                 mlx4_err(dev, "Failed to initialize "
1539                          "queue pair table, aborting.\n");
1540                 goto err_srq_table_free;
1541         }
1542
1543         if (!mlx4_is_slave(dev)) {
1544                 err = mlx4_init_mcg_table(dev);
1545                 if (err) {
1546                         mlx4_err(dev, "Failed to initialize "
1547                                  "multicast group table, aborting.\n");
1548                         goto err_qp_table_free;
1549                 }
1550         }
1551
1552         err = mlx4_init_counters_table(dev);
1553         if (err && err != -ENOENT) {
1554                 mlx4_err(dev, "Failed to initialize counters table, aborting.\n");
1555                 goto err_mcg_table_free;
1556         }
1557
1558         if (!mlx4_is_slave(dev)) {
1559                 for (port = 1; port <= dev->caps.num_ports; port++) {
1560                         ib_port_default_caps = 0;
1561                         err = mlx4_get_port_ib_caps(dev, port,
1562                                                     &ib_port_default_caps);
1563                         if (err)
1564                                 mlx4_warn(dev, "failed to get port %d default "
1565                                           "ib capabilities (%d). Continuing "
1566                                           "with caps = 0\n", port, err);
1567                         dev->caps.ib_port_def_cap[port] = ib_port_default_caps;
1568
1569                         /* initialize per-slave default ib port capabilities */
1570                         if (mlx4_is_master(dev)) {
1571                                 int i;
1572                                 for (i = 0; i < dev->num_slaves; i++) {
1573                                         if (i == mlx4_master_func_num(dev))
1574                                                 continue;
1575                                         priv->mfunc.master.slave_state[i].ib_cap_mask[port] =
1576                                                         ib_port_default_caps;
1577                                 }
1578                         }
1579
1580                         if (mlx4_is_mfunc(dev))
1581                                 dev->caps.port_ib_mtu[port] = IB_MTU_2048;
1582                         else
1583                                 dev->caps.port_ib_mtu[port] = IB_MTU_4096;
1584
1585                         err = mlx4_SET_PORT(dev, port, mlx4_is_master(dev) ?
1586                                             dev->caps.pkey_table_len[port] : -1);
1587                         if (err) {
1588                                 mlx4_err(dev, "Failed to set port %d, aborting\n",
1589                                         port);
1590                                 goto err_counters_table_free;
1591                         }
1592                 }
1593         }
1594
1595         return 0;
1596
1597 err_counters_table_free:
1598         mlx4_cleanup_counters_table(dev);
1599
1600 err_mcg_table_free:
1601         mlx4_cleanup_mcg_table(dev);
1602
1603 err_qp_table_free:
1604         mlx4_cleanup_qp_table(dev);
1605
1606 err_srq_table_free:
1607         mlx4_cleanup_srq_table(dev);
1608
1609 err_cq_table_free:
1610         mlx4_cleanup_cq_table(dev);
1611
1612 err_cmd_poll:
1613         mlx4_cmd_use_polling(dev);
1614
1615 err_eq_table_free:
1616         mlx4_cleanup_eq_table(dev);
1617
1618 err_mr_table_free:
1619         mlx4_cleanup_mr_table(dev);
1620
1621 err_xrcd_table_free:
1622         mlx4_cleanup_xrcd_table(dev);
1623
1624 err_pd_table_free:
1625         mlx4_cleanup_pd_table(dev);
1626
1627 err_kar_unmap:
1628         iounmap(priv->kar);
1629
1630 err_uar_free:
1631         mlx4_uar_free(dev, &priv->driver_uar);
1632
1633 err_uar_table_free:
1634         mlx4_cleanup_uar_table(dev);
1635         return err;
1636 }
1637
1638 static void mlx4_enable_msi_x(struct mlx4_dev *dev)
1639 {
1640         struct mlx4_priv *priv = mlx4_priv(dev);
1641         struct msix_entry *entries;
1642         int nreq = min_t(int, dev->caps.num_ports *
1643                          min_t(int, netif_get_num_default_rss_queues() + 1,
1644                                MAX_MSIX_P_PORT) + MSIX_LEGACY_SZ, MAX_MSIX);
1645         int err;
1646         int i;
1647
1648         if (msi_x) {
1649                 /* In multifunction mode each function gets 2 msi-X vectors
1650                  * one for data path completions anf the other for asynch events
1651                  * or command completions */
1652                 if (mlx4_is_mfunc(dev)) {
1653                         nreq = 2;
1654                 } else {
1655                         nreq = min_t(int, dev->caps.num_eqs -
1656                                      dev->caps.reserved_eqs, nreq);
1657                 }
1658
1659                 entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL);
1660                 if (!entries)
1661                         goto no_msi;
1662
1663                 for (i = 0; i < nreq; ++i)
1664                         entries[i].entry = i;
1665
1666         retry:
1667                 err = pci_enable_msix(dev->pdev, entries, nreq);
1668                 if (err) {
1669                         /* Try again if at least 2 vectors are available */
1670                         if (err > 1) {
1671                                 mlx4_info(dev, "Requested %d vectors, "
1672                                           "but only %d MSI-X vectors available, "
1673                                           "trying again\n", nreq, err);
1674                                 nreq = err;
1675                                 goto retry;
1676                         }
1677                         kfree(entries);
1678                         goto no_msi;
1679                 }
1680
1681                 if (nreq <
1682                     MSIX_LEGACY_SZ + dev->caps.num_ports * MIN_MSIX_P_PORT) {
1683                         /*Working in legacy mode , all EQ's shared*/
1684                         dev->caps.comp_pool           = 0;
1685                         dev->caps.num_comp_vectors = nreq - 1;
1686                 } else {
1687                         dev->caps.comp_pool           = nreq - MSIX_LEGACY_SZ;
1688                         dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1;
1689                 }
1690                 for (i = 0; i < nreq; ++i)
1691                         priv->eq_table.eq[i].irq = entries[i].vector;
1692
1693                 dev->flags |= MLX4_FLAG_MSI_X;
1694
1695                 kfree(entries);
1696                 return;
1697         }
1698
1699 no_msi:
1700         dev->caps.num_comp_vectors = 1;
1701         dev->caps.comp_pool        = 0;
1702
1703         for (i = 0; i < 2; ++i)
1704                 priv->eq_table.eq[i].irq = dev->pdev->irq;
1705 }
1706
1707 static int mlx4_init_port_info(struct mlx4_dev *dev, int port)
1708 {
1709         struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
1710         int err = 0;
1711
1712         info->dev = dev;
1713         info->port = port;
1714         if (!mlx4_is_slave(dev)) {
1715                 INIT_RADIX_TREE(&info->mac_tree, GFP_KERNEL);
1716                 mlx4_init_mac_table(dev, &info->mac_table);
1717                 mlx4_init_vlan_table(dev, &info->vlan_table);
1718                 info->base_qpn =
1719                         dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] +
1720                         (port - 1) * (1 << log_num_mac);
1721         }
1722
1723         sprintf(info->dev_name, "mlx4_port%d", port);
1724         info->port_attr.attr.name = info->dev_name;
1725         if (mlx4_is_mfunc(dev))
1726                 info->port_attr.attr.mode = S_IRUGO;
1727         else {
1728                 info->port_attr.attr.mode = S_IRUGO | S_IWUSR;
1729                 info->port_attr.store     = set_port_type;
1730         }
1731         info->port_attr.show      = show_port_type;
1732         sysfs_attr_init(&info->port_attr.attr);
1733
1734         err = device_create_file(&dev->pdev->dev, &info->port_attr);
1735         if (err) {
1736                 mlx4_err(dev, "Failed to create file for port %d\n", port);
1737                 info->port = -1;
1738         }
1739
1740         sprintf(info->dev_mtu_name, "mlx4_port%d_mtu", port);
1741         info->port_mtu_attr.attr.name = info->dev_mtu_name;
1742         if (mlx4_is_mfunc(dev))
1743                 info->port_mtu_attr.attr.mode = S_IRUGO;
1744         else {
1745                 info->port_mtu_attr.attr.mode = S_IRUGO | S_IWUSR;
1746                 info->port_mtu_attr.store     = set_port_ib_mtu;
1747         }
1748         info->port_mtu_attr.show      = show_port_ib_mtu;
1749         sysfs_attr_init(&info->port_mtu_attr.attr);
1750
1751         err = device_create_file(&dev->pdev->dev, &info->port_mtu_attr);
1752         if (err) {
1753                 mlx4_err(dev, "Failed to create mtu file for port %d\n", port);
1754                 device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1755                 info->port = -1;
1756         }
1757
1758         return err;
1759 }
1760
1761 static void mlx4_cleanup_port_info(struct mlx4_port_info *info)
1762 {
1763         if (info->port < 0)
1764                 return;
1765
1766         device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1767         device_remove_file(&info->dev->pdev->dev, &info->port_mtu_attr);
1768 }
1769
1770 static int mlx4_init_steering(struct mlx4_dev *dev)
1771 {
1772         struct mlx4_priv *priv = mlx4_priv(dev);
1773         int num_entries = dev->caps.num_ports;
1774         int i, j;
1775
1776         priv->steer = kzalloc(sizeof(struct mlx4_steer) * num_entries, GFP_KERNEL);
1777         if (!priv->steer)
1778                 return -ENOMEM;
1779
1780         for (i = 0; i < num_entries; i++)
1781                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1782                         INIT_LIST_HEAD(&priv->steer[i].promisc_qps[j]);
1783                         INIT_LIST_HEAD(&priv->steer[i].steer_entries[j]);
1784                 }
1785         return 0;
1786 }
1787
1788 static void mlx4_clear_steering(struct mlx4_dev *dev)
1789 {
1790         struct mlx4_priv *priv = mlx4_priv(dev);
1791         struct mlx4_steer_index *entry, *tmp_entry;
1792         struct mlx4_promisc_qp *pqp, *tmp_pqp;
1793         int num_entries = dev->caps.num_ports;
1794         int i, j;
1795
1796         for (i = 0; i < num_entries; i++) {
1797                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1798                         list_for_each_entry_safe(pqp, tmp_pqp,
1799                                                  &priv->steer[i].promisc_qps[j],
1800                                                  list) {
1801                                 list_del(&pqp->list);
1802                                 kfree(pqp);
1803                         }
1804                         list_for_each_entry_safe(entry, tmp_entry,
1805                                                  &priv->steer[i].steer_entries[j],
1806                                                  list) {
1807                                 list_del(&entry->list);
1808                                 list_for_each_entry_safe(pqp, tmp_pqp,
1809                                                          &entry->duplicates,
1810                                                          list) {
1811                                         list_del(&pqp->list);
1812                                         kfree(pqp);
1813                                 }
1814                                 kfree(entry);
1815                         }
1816                 }
1817         }
1818         kfree(priv->steer);
1819 }
1820
1821 static int extended_func_num(struct pci_dev *pdev)
1822 {
1823         return PCI_SLOT(pdev->devfn) * 8 + PCI_FUNC(pdev->devfn);
1824 }
1825
1826 #define MLX4_OWNER_BASE 0x8069c
1827 #define MLX4_OWNER_SIZE 4
1828
1829 static int mlx4_get_ownership(struct mlx4_dev *dev)
1830 {
1831         void __iomem *owner;
1832         u32 ret;
1833
1834         if (pci_channel_offline(dev->pdev))
1835                 return -EIO;
1836
1837         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1838                         MLX4_OWNER_SIZE);
1839         if (!owner) {
1840                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1841                 return -ENOMEM;
1842         }
1843
1844         ret = readl(owner);
1845         iounmap(owner);
1846         return (int) !!ret;
1847 }
1848
1849 static void mlx4_free_ownership(struct mlx4_dev *dev)
1850 {
1851         void __iomem *owner;
1852
1853         if (pci_channel_offline(dev->pdev))
1854                 return;
1855
1856         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1857                         MLX4_OWNER_SIZE);
1858         if (!owner) {
1859                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1860                 return;
1861         }
1862         writel(0, owner);
1863         msleep(1000);
1864         iounmap(owner);
1865 }
1866
1867 static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
1868 {
1869         struct mlx4_priv *priv;
1870         struct mlx4_dev *dev;
1871         int err;
1872         int port;
1873
1874         pr_info(DRV_NAME ": Initializing %s\n", pci_name(pdev));
1875
1876         err = pci_enable_device(pdev);
1877         if (err) {
1878                 dev_err(&pdev->dev, "Cannot enable PCI device, "
1879                         "aborting.\n");
1880                 return err;
1881         }
1882         if (num_vfs > MLX4_MAX_NUM_VF) {
1883                 printk(KERN_ERR "There are more VF's (%d) than allowed(%d)\n",
1884                        num_vfs, MLX4_MAX_NUM_VF);
1885                 return -EINVAL;
1886         }
1887         /*
1888          * Check for BARs.
1889          */
1890         if (((id == NULL) || !(id->driver_data & MLX4_VF)) &&
1891             !(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
1892                 dev_err(&pdev->dev, "Missing DCS, aborting."
1893                         "(id == 0X%p, id->driver_data: 0x%lx,"
1894                         " pci_resource_flags(pdev, 0):0x%lx)\n", id,
1895                         id ? id->driver_data : 0, pci_resource_flags(pdev, 0));
1896                 err = -ENODEV;
1897                 goto err_disable_pdev;
1898         }
1899         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
1900                 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1901                 err = -ENODEV;
1902                 goto err_disable_pdev;
1903         }
1904
1905         err = pci_request_regions(pdev, DRV_NAME);
1906         if (err) {
1907                 dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n");
1908                 goto err_disable_pdev;
1909         }
1910
1911         pci_set_master(pdev);
1912
1913         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1914         if (err) {
1915                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1916                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1917                 if (err) {
1918                         dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
1919                         goto err_release_regions;
1920                 }
1921         }
1922         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
1923         if (err) {
1924                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1925                          "consistent PCI DMA mask.\n");
1926                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
1927                 if (err) {
1928                         dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1929                                 "aborting.\n");
1930                         goto err_release_regions;
1931                 }
1932         }
1933
1934         /* Allow large DMA segments, up to the firmware limit of 1 GB */
1935         dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
1936
1937         priv = kzalloc(sizeof *priv, GFP_KERNEL);
1938         if (!priv) {
1939                 dev_err(&pdev->dev, "Device struct alloc failed, "
1940                         "aborting.\n");
1941                 err = -ENOMEM;
1942                 goto err_release_regions;
1943         }
1944
1945         dev       = &priv->dev;
1946         dev->pdev = pdev;
1947         INIT_LIST_HEAD(&priv->ctx_list);
1948         spin_lock_init(&priv->ctx_lock);
1949
1950         mutex_init(&priv->port_mutex);
1951
1952         INIT_LIST_HEAD(&priv->pgdir_list);
1953         mutex_init(&priv->pgdir_mutex);
1954
1955         INIT_LIST_HEAD(&priv->bf_list);
1956         mutex_init(&priv->bf_mutex);
1957
1958         dev->rev_id = pdev->revision;
1959         /* Detect if this device is a virtual function */
1960         if (id && id->driver_data & MLX4_VF) {
1961                 /* When acting as pf, we normally skip vfs unless explicitly
1962                  * requested to probe them. */
1963                 if (num_vfs && extended_func_num(pdev) > probe_vf) {
1964                         mlx4_warn(dev, "Skipping virtual function:%d\n",
1965                                                 extended_func_num(pdev));
1966                         err = -ENODEV;
1967                         goto err_free_dev;
1968                 }
1969                 mlx4_warn(dev, "Detected virtual function - running in slave mode\n");
1970                 dev->flags |= MLX4_FLAG_SLAVE;
1971         } else {
1972                 /* We reset the device and enable SRIOV only for physical
1973                  * devices.  Try to claim ownership on the device;
1974                  * if already taken, skip -- do not allow multiple PFs */
1975                 err = mlx4_get_ownership(dev);
1976                 if (err) {
1977                         if (err < 0)
1978                                 goto err_free_dev;
1979                         else {
1980                                 mlx4_warn(dev, "Multiple PFs not yet supported."
1981                                           " Skipping PF.\n");
1982                                 err = -EINVAL;
1983                                 goto err_free_dev;
1984                         }
1985                 }
1986
1987                 if (num_vfs) {
1988                         mlx4_warn(dev, "Enabling sriov with:%d vfs\n", num_vfs);
1989                         err = pci_enable_sriov(pdev, num_vfs);
1990                         if (err) {
1991                                 mlx4_err(dev, "Failed to enable sriov,"
1992                                          "continuing without sriov enabled"
1993                                          " (err = %d).\n", err);
1994                                 err = 0;
1995                         } else {
1996                                 mlx4_warn(dev, "Running in master mode\n");
1997                                 dev->flags |= MLX4_FLAG_SRIOV |
1998                                               MLX4_FLAG_MASTER;
1999                                 dev->num_vfs = num_vfs;
2000                         }
2001                 }
2002
2003                 /*
2004                  * Now reset the HCA before we touch the PCI capabilities or
2005                  * attempt a firmware command, since a boot ROM may have left
2006                  * the HCA in an undefined state.
2007                  */
2008                 err = mlx4_reset(dev);
2009                 if (err) {
2010                         mlx4_err(dev, "Failed to reset HCA, aborting.\n");
2011                         goto err_rel_own;
2012                 }
2013         }
2014
2015 slave_start:
2016         err = mlx4_cmd_init(dev);
2017         if (err) {
2018                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
2019                 goto err_sriov;
2020         }
2021
2022         /* In slave functions, the communication channel must be initialized
2023          * before posting commands. Also, init num_slaves before calling
2024          * mlx4_init_hca */
2025         if (mlx4_is_mfunc(dev)) {
2026                 if (mlx4_is_master(dev))
2027                         dev->num_slaves = MLX4_MAX_NUM_SLAVES;
2028                 else {
2029                         dev->num_slaves = 0;
2030                         if (mlx4_multi_func_init(dev)) {
2031                                 mlx4_err(dev, "Failed to init slave mfunc"
2032                                          " interface, aborting.\n");
2033                                 goto err_cmd;
2034                         }
2035                 }
2036         }
2037
2038         err = mlx4_init_hca(dev);
2039         if (err) {
2040                 if (err == -EACCES) {
2041                         /* Not primary Physical function
2042                          * Running in slave mode */
2043                         mlx4_cmd_cleanup(dev);
2044                         dev->flags |= MLX4_FLAG_SLAVE;
2045                         dev->flags &= ~MLX4_FLAG_MASTER;
2046                         goto slave_start;
2047                 } else
2048                         goto err_mfunc;
2049         }
2050
2051         /* In master functions, the communication channel must be initialized
2052          * after obtaining its address from fw */
2053         if (mlx4_is_master(dev)) {
2054                 if (mlx4_multi_func_init(dev)) {
2055                         mlx4_err(dev, "Failed to init master mfunc"
2056                                  "interface, aborting.\n");
2057                         goto err_close;
2058                 }
2059         }
2060
2061         err = mlx4_alloc_eq_table(dev);
2062         if (err)
2063                 goto err_master_mfunc;
2064
2065         priv->msix_ctl.pool_bm = 0;
2066         mutex_init(&priv->msix_ctl.pool_lock);
2067
2068         mlx4_enable_msi_x(dev);
2069         if ((mlx4_is_mfunc(dev)) &&
2070             !(dev->flags & MLX4_FLAG_MSI_X)) {
2071                 mlx4_err(dev, "INTx is not supported in multi-function mode."
2072                          " aborting.\n");
2073                 goto err_free_eq;
2074         }
2075
2076         if (!mlx4_is_slave(dev)) {
2077                 err = mlx4_init_steering(dev);
2078                 if (err)
2079                         goto err_free_eq;
2080         }
2081
2082         err = mlx4_setup_hca(dev);
2083         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X) &&
2084             !mlx4_is_mfunc(dev)) {
2085                 dev->flags &= ~MLX4_FLAG_MSI_X;
2086                 dev->caps.num_comp_vectors = 1;
2087                 dev->caps.comp_pool        = 0;
2088                 pci_disable_msix(pdev);
2089                 err = mlx4_setup_hca(dev);
2090         }
2091
2092         if (err)
2093                 goto err_steer;
2094
2095         for (port = 1; port <= dev->caps.num_ports; port++) {
2096                 err = mlx4_init_port_info(dev, port);
2097                 if (err)
2098                         goto err_port;
2099         }
2100
2101         err = mlx4_register_device(dev);
2102         if (err)
2103                 goto err_port;
2104
2105         mlx4_sense_init(dev);
2106         mlx4_start_sense(dev);
2107
2108         pci_set_drvdata(pdev, dev);
2109
2110         return 0;
2111
2112 err_port:
2113         for (--port; port >= 1; --port)
2114                 mlx4_cleanup_port_info(&priv->port[port]);
2115
2116         mlx4_cleanup_counters_table(dev);
2117         mlx4_cleanup_mcg_table(dev);
2118         mlx4_cleanup_qp_table(dev);
2119         mlx4_cleanup_srq_table(dev);
2120         mlx4_cleanup_cq_table(dev);
2121         mlx4_cmd_use_polling(dev);
2122         mlx4_cleanup_eq_table(dev);
2123         mlx4_cleanup_mr_table(dev);
2124         mlx4_cleanup_xrcd_table(dev);
2125         mlx4_cleanup_pd_table(dev);
2126         mlx4_cleanup_uar_table(dev);
2127
2128 err_steer:
2129         if (!mlx4_is_slave(dev))
2130                 mlx4_clear_steering(dev);
2131
2132 err_free_eq:
2133         mlx4_free_eq_table(dev);
2134
2135 err_master_mfunc:
2136         if (mlx4_is_master(dev))
2137                 mlx4_multi_func_cleanup(dev);
2138
2139 err_close:
2140         if (dev->flags & MLX4_FLAG_MSI_X)
2141                 pci_disable_msix(pdev);
2142
2143         mlx4_close_hca(dev);
2144
2145 err_mfunc:
2146         if (mlx4_is_slave(dev))
2147                 mlx4_multi_func_cleanup(dev);
2148
2149 err_cmd:
2150         mlx4_cmd_cleanup(dev);
2151
2152 err_sriov:
2153         if (dev->flags & MLX4_FLAG_SRIOV)
2154                 pci_disable_sriov(pdev);
2155
2156 err_rel_own:
2157         if (!mlx4_is_slave(dev))
2158                 mlx4_free_ownership(dev);
2159
2160 err_free_dev:
2161         kfree(priv);
2162
2163 err_release_regions:
2164         pci_release_regions(pdev);
2165
2166 err_disable_pdev:
2167         pci_disable_device(pdev);
2168         pci_set_drvdata(pdev, NULL);
2169         return err;
2170 }
2171
2172 static int __devinit mlx4_init_one(struct pci_dev *pdev,
2173                                    const struct pci_device_id *id)
2174 {
2175         printk_once(KERN_INFO "%s", mlx4_version);
2176
2177         return __mlx4_init_one(pdev, id);
2178 }
2179
2180 static void mlx4_remove_one(struct pci_dev *pdev)
2181 {
2182         struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
2183         struct mlx4_priv *priv = mlx4_priv(dev);
2184         int p;
2185
2186         if (dev) {
2187                 /* in SRIOV it is not allowed to unload the pf's
2188                  * driver while there are alive vf's */
2189                 if (mlx4_is_master(dev)) {
2190                         if (mlx4_how_many_lives_vf(dev))
2191                                 printk(KERN_ERR "Removing PF when there are assigned VF's !!!\n");
2192                 }
2193                 mlx4_stop_sense(dev);
2194                 mlx4_unregister_device(dev);
2195
2196                 for (p = 1; p <= dev->caps.num_ports; p++) {
2197                         mlx4_cleanup_port_info(&priv->port[p]);
2198                         mlx4_CLOSE_PORT(dev, p);
2199                 }
2200
2201                 if (mlx4_is_master(dev))
2202                         mlx4_free_resource_tracker(dev,
2203                                                    RES_TR_FREE_SLAVES_ONLY);
2204
2205                 mlx4_cleanup_counters_table(dev);
2206                 mlx4_cleanup_mcg_table(dev);
2207                 mlx4_cleanup_qp_table(dev);
2208                 mlx4_cleanup_srq_table(dev);
2209                 mlx4_cleanup_cq_table(dev);
2210                 mlx4_cmd_use_polling(dev);
2211                 mlx4_cleanup_eq_table(dev);
2212                 mlx4_cleanup_mr_table(dev);
2213                 mlx4_cleanup_xrcd_table(dev);
2214                 mlx4_cleanup_pd_table(dev);
2215
2216                 if (mlx4_is_master(dev))
2217                         mlx4_free_resource_tracker(dev,
2218                                                    RES_TR_FREE_STRUCTS_ONLY);
2219
2220                 iounmap(priv->kar);
2221                 mlx4_uar_free(dev, &priv->driver_uar);
2222                 mlx4_cleanup_uar_table(dev);
2223                 if (!mlx4_is_slave(dev))
2224                         mlx4_clear_steering(dev);
2225                 mlx4_free_eq_table(dev);
2226                 if (mlx4_is_master(dev))
2227                         mlx4_multi_func_cleanup(dev);
2228                 mlx4_close_hca(dev);
2229                 if (mlx4_is_slave(dev))
2230                         mlx4_multi_func_cleanup(dev);
2231                 mlx4_cmd_cleanup(dev);
2232
2233                 if (dev->flags & MLX4_FLAG_MSI_X)
2234                         pci_disable_msix(pdev);
2235                 if (dev->flags & MLX4_FLAG_SRIOV) {
2236                         mlx4_warn(dev, "Disabling sriov\n");
2237                         pci_disable_sriov(pdev);
2238                 }
2239
2240                 if (!mlx4_is_slave(dev))
2241                         mlx4_free_ownership(dev);
2242                 kfree(priv);
2243                 pci_release_regions(pdev);
2244                 pci_disable_device(pdev);
2245                 pci_set_drvdata(pdev, NULL);
2246         }
2247 }
2248
2249 int mlx4_restart_one(struct pci_dev *pdev)
2250 {
2251         mlx4_remove_one(pdev);
2252         return __mlx4_init_one(pdev, NULL);
2253 }
2254
2255 static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = {
2256         /* MT25408 "Hermon" SDR */
2257         { PCI_VDEVICE(MELLANOX, 0x6340), 0 },
2258         /* MT25408 "Hermon" DDR */
2259         { PCI_VDEVICE(MELLANOX, 0x634a), 0 },
2260         /* MT25408 "Hermon" QDR */
2261         { PCI_VDEVICE(MELLANOX, 0x6354), 0 },
2262         /* MT25408 "Hermon" DDR PCIe gen2 */
2263         { PCI_VDEVICE(MELLANOX, 0x6732), 0 },
2264         /* MT25408 "Hermon" QDR PCIe gen2 */
2265         { PCI_VDEVICE(MELLANOX, 0x673c), 0 },
2266         /* MT25408 "Hermon" EN 10GigE */
2267         { PCI_VDEVICE(MELLANOX, 0x6368), 0 },
2268         /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
2269         { PCI_VDEVICE(MELLANOX, 0x6750), 0 },
2270         /* MT25458 ConnectX EN 10GBASE-T 10GigE */
2271         { PCI_VDEVICE(MELLANOX, 0x6372), 0 },
2272         /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
2273         { PCI_VDEVICE(MELLANOX, 0x675a), 0 },
2274         /* MT26468 ConnectX EN 10GigE PCIe gen2*/
2275         { PCI_VDEVICE(MELLANOX, 0x6764), 0 },
2276         /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */
2277         { PCI_VDEVICE(MELLANOX, 0x6746), 0 },
2278         /* MT26478 ConnectX2 40GigE PCIe gen2 */
2279         { PCI_VDEVICE(MELLANOX, 0x676e), 0 },
2280         /* MT25400 Family [ConnectX-2 Virtual Function] */
2281         { PCI_VDEVICE(MELLANOX, 0x1002), MLX4_VF },
2282         /* MT27500 Family [ConnectX-3] */
2283         { PCI_VDEVICE(MELLANOX, 0x1003), 0 },
2284         /* MT27500 Family [ConnectX-3 Virtual Function] */
2285         { PCI_VDEVICE(MELLANOX, 0x1004), MLX4_VF },
2286         { PCI_VDEVICE(MELLANOX, 0x1005), 0 }, /* MT27510 Family */
2287         { PCI_VDEVICE(MELLANOX, 0x1006), 0 }, /* MT27511 Family */
2288         { PCI_VDEVICE(MELLANOX, 0x1007), 0 }, /* MT27520 Family */
2289         { PCI_VDEVICE(MELLANOX, 0x1008), 0 }, /* MT27521 Family */
2290         { PCI_VDEVICE(MELLANOX, 0x1009), 0 }, /* MT27530 Family */
2291         { PCI_VDEVICE(MELLANOX, 0x100a), 0 }, /* MT27531 Family */
2292         { PCI_VDEVICE(MELLANOX, 0x100b), 0 }, /* MT27540 Family */
2293         { PCI_VDEVICE(MELLANOX, 0x100c), 0 }, /* MT27541 Family */
2294         { PCI_VDEVICE(MELLANOX, 0x100d), 0 }, /* MT27550 Family */
2295         { PCI_VDEVICE(MELLANOX, 0x100e), 0 }, /* MT27551 Family */
2296         { PCI_VDEVICE(MELLANOX, 0x100f), 0 }, /* MT27560 Family */
2297         { PCI_VDEVICE(MELLANOX, 0x1010), 0 }, /* MT27561 Family */
2298         { 0, }
2299 };
2300
2301 MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
2302
2303 static pci_ers_result_t mlx4_pci_err_detected(struct pci_dev *pdev,
2304                                               pci_channel_state_t state)
2305 {
2306         mlx4_remove_one(pdev);
2307
2308         return state == pci_channel_io_perm_failure ?
2309                 PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET;
2310 }
2311
2312 static pci_ers_result_t mlx4_pci_slot_reset(struct pci_dev *pdev)
2313 {
2314         int ret = __mlx4_init_one(pdev, NULL);
2315
2316         return ret ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED;
2317 }
2318
2319 static struct pci_error_handlers mlx4_err_handler = {
2320         .error_detected = mlx4_pci_err_detected,
2321         .slot_reset     = mlx4_pci_slot_reset,
2322 };
2323
2324 static struct pci_driver mlx4_driver = {
2325         .name           = DRV_NAME,
2326         .id_table       = mlx4_pci_table,
2327         .probe          = mlx4_init_one,
2328         .remove         = __devexit_p(mlx4_remove_one),
2329         .err_handler    = &mlx4_err_handler,
2330 };
2331
2332 static int __init mlx4_verify_params(void)
2333 {
2334         if ((log_num_mac < 0) || (log_num_mac > 7)) {
2335                 pr_warning("mlx4_core: bad num_mac: %d\n", log_num_mac);
2336                 return -1;
2337         }
2338
2339         if (log_num_vlan != 0)
2340                 pr_warning("mlx4_core: log_num_vlan - obsolete module param, using %d\n",
2341                            MLX4_LOG_NUM_VLANS);
2342
2343         if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) {
2344                 pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg);
2345                 return -1;
2346         }
2347
2348         /* Check if module param for ports type has legal combination */
2349         if (port_type_array[0] == false && port_type_array[1] == true) {
2350                 printk(KERN_WARNING "Module parameter configuration ETH/IB is not supported. Switching to default configuration IB/IB\n");
2351                 port_type_array[0] = true;
2352         }
2353
2354         return 0;
2355 }
2356
2357 static int __init mlx4_init(void)
2358 {
2359         int ret;
2360
2361         if (mlx4_verify_params())
2362                 return -EINVAL;
2363
2364         mlx4_catas_init();
2365
2366         mlx4_wq = create_singlethread_workqueue("mlx4");
2367         if (!mlx4_wq)
2368                 return -ENOMEM;
2369
2370         ret = pci_register_driver(&mlx4_driver);
2371         return ret < 0 ? ret : 0;
2372 }
2373
2374 static void __exit mlx4_cleanup(void)
2375 {
2376         pci_unregister_driver(&mlx4_driver);
2377         destroy_workqueue(mlx4_wq);
2378 }
2379
2380 module_init(mlx4_init);
2381 module_exit(mlx4_cleanup);