drivers/net/ethernet/mellanox/mlx4/main.c

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
   5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 #include <linux/module.h>
  37 #include <linux/init.h>
  38 #include <linux/errno.h>
  39 #include <linux/pci.h>
  40 #include <linux/dma-mapping.h>
  41 #include <linux/slab.h>
  42 #include <linux/io-mapping.h>
  43 #include <linux/delay.h>
  44
  45 #include <linux/mlx4/device.h>
  46 #include <linux/mlx4/doorbell.h>
  47
  48 #include "mlx4.h"
  49 #include "fw.h"
  50 #include "icm.h"
  51
  52 MODULE_AUTHOR("Roland Dreier");
  53 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
  54 MODULE_LICENSE("Dual BSD/GPL");
  55 MODULE_VERSION(DRV_VERSION);
  56
  57 struct workqueue_struct *mlx4_wq;
  58
  59 #ifdef CONFIG_MLX4_DEBUG
  60
  61 int mlx4_debug_level = 0;
  62 module_param_named(debug_level, mlx4_debug_level, int, 0644);
  63 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
  64
  65 #endif /* CONFIG_MLX4_DEBUG */
  66
  67 #ifdef CONFIG_PCI_MSI
  68
  69 static int msi_x = 1;
  70 module_param(msi_x, int, 0444);
  71 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  72
  73 #else /* CONFIG_PCI_MSI */
  74
  75 #define msi_x (0)
  76
  77 #endif /* CONFIG_PCI_MSI */
  78
  79 static int num_vfs;
  80 module_param(num_vfs, int, 0444);
  81 MODULE_PARM_DESC(num_vfs, "enable #num_vfs functions if num_vfs > 0");
  82
  83 static int probe_vf;
  84 module_param(probe_vf, int, 0644);
  85 MODULE_PARM_DESC(probe_vf, "number of vfs to probe by pf driver (num_vfs > 0)");
  86
  87 int mlx4_log_num_mgm_entry_size = 10;
  88 module_param_named(log_num_mgm_entry_size,
  89                         mlx4_log_num_mgm_entry_size, int, 0444);
  90 MODULE_PARM_DESC(log_num_mgm_entry_size, "log mgm size, that defines the num"
  91                                          " of qp per mcg, for example:"
  92                                          " 10 gives 248.range: 9<="
  93                                          " log_num_mgm_entry_size <= 12");
  94
  95 #define MLX4_VF                                        (1 << 0)
  96
  97 #define HCA_GLOBAL_CAP_MASK            0
  98 #define PF_CONTEXT_BEHAVIOUR_MASK      0
  99
 100 static char mlx4_version[] __devinitdata =
 101         DRV_NAME ": Mellanox ConnectX core driver v"
 102         DRV_VERSION " (" DRV_RELDATE ")\n";
 103
 104 static struct mlx4_profile default_profile = {
 105         .num_qp         = 1 << 18,
 106         .num_srq        = 1 << 16,
 107         .rdmarc_per_qp  = 1 << 4,
 108         .num_cq         = 1 << 16,
 109         .num_mcg        = 1 << 13,
 110         .num_mpt        = 1 << 19,
 111         .num_mtt        = 1 << 20,
 112 };
 113
 114 static int log_num_mac = 7;
 115 module_param_named(log_num_mac, log_num_mac, int, 0444);
 116 MODULE_PARM_DESC(log_num_mac, "Log2 max number of MACs per ETH port (1-7)");
 117
 118 static int log_num_vlan;
 119 module_param_named(log_num_vlan, log_num_vlan, int, 0444);
 120 MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)");
 121 /* Log2 max number of VLANs per ETH port (0-7) */
 122 #define MLX4_LOG_NUM_VLANS 7
 123
 124 static int use_prio;
 125 module_param_named(use_prio, use_prio, bool, 0444);
 126 MODULE_PARM_DESC(use_prio, "Enable steering by VLAN priority on ETH ports "
 127                   "(0/1, default 0)");
 128
 129 int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG);
 130 module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444);
 131 MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-7)");
 132
 133 static int port_type_array[2] = {1, 1};
 134 static int arr_argc = 2;
 135 module_param_array(port_type_array, int, &arr_argc, 0444);
 136 MODULE_PARM_DESC(port_type_array, "Array of port types: IB by default");
 137
 138 struct mlx4_port_config {
 139         struct list_head list;
 140         enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1];
 141         struct pci_dev *pdev;
 142 };
 143
 144 static inline int mlx4_master_get_num_eqs(struct mlx4_dev *dev)
 145 {
 146         return dev->caps.reserved_eqs +
 147                 MLX4_MFUNC_EQ_NUM * (dev->num_slaves + 1);
 148 }
 149
 150 int mlx4_check_port_params(struct mlx4_dev *dev,
 151                            enum mlx4_port_type *port_type)
 152 {
 153         int i;
 154
 155         for (i = 0; i < dev->caps.num_ports - 1; i++) {
 156                 if (port_type[i] != port_type[i + 1]) {
 157                         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
 158                                 mlx4_err(dev, "Only same port types supported "
 159                                          "on this HCA, aborting.\n");
 160                                 return -EINVAL;
 161                         }
 162                         if (port_type[i] == MLX4_PORT_TYPE_ETH &&
 163                             port_type[i + 1] == MLX4_PORT_TYPE_IB)
 164                                 return -EINVAL;
 165                 }
 166         }
 167
 168         for (i = 0; i < dev->caps.num_ports; i++) {
 169                 if (!(port_type[i] & dev->caps.supported_type[i+1])) {
 170                         mlx4_err(dev, "Requested port type for port %d is not "
 171                                       "supported on this HCA\n", i + 1);
 172                         return -EINVAL;
 173                 }
 174         }
 175         return 0;
 176 }
 177
 178 static void mlx4_set_port_mask(struct mlx4_dev *dev)
 179 {
 180         int i;
 181
 182         for (i = 1; i <= dev->caps.num_ports; ++i)
 183                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 184 }
 185
 186 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
 187 {
 188         int err;
 189         int i;
 190
 191         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
 192         if (err) {
 193                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 194                 return err;
 195         }
 196
 197         if (dev_cap->min_page_sz > PAGE_SIZE) {
 198                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 199                          "kernel PAGE_SIZE of %ld, aborting.\n",
 200                          dev_cap->min_page_sz, PAGE_SIZE);
 201                 return -ENODEV;
 202         }
 203         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
 204                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 205                          "aborting.\n",
 206                          dev_cap->num_ports, MLX4_MAX_PORTS);
 207                 return -ENODEV;
 208         }
 209
 210         if (dev_cap->uar_size > pci_resource_len(dev->pdev, 2)) {
 211                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
 212                          "PCI resource 2 size of 0x%llx, aborting.\n",
 213                          dev_cap->uar_size,
 214                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 215                 return -ENODEV;
 216         }
 217
 218         dev->caps.num_ports          = dev_cap->num_ports;
 219         for (i = 1; i <= dev->caps.num_ports; ++i) {
 220                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
 221                 dev->caps.ib_mtu_cap[i]     = dev_cap->ib_mtu[i];
 222                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
 223                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
 224                 dev->caps.port_width_cap[i] = dev_cap->max_port_width[i];
 225                 dev->caps.eth_mtu_cap[i]    = dev_cap->eth_mtu[i];
 226                 dev->caps.def_mac[i]        = dev_cap->def_mac[i];
 227                 dev->caps.supported_type[i] = dev_cap->supported_port_types[i];
 228                 dev->caps.trans_type[i]     = dev_cap->trans_type[i];
 229                 dev->caps.vendor_oui[i]     = dev_cap->vendor_oui[i];
 230                 dev->caps.wavelength[i]     = dev_cap->wavelength[i];
 231                 dev->caps.trans_code[i]     = dev_cap->trans_code[i];
 232         }
 233
 234         dev->caps.uar_page_size      = PAGE_SIZE;
 235         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
 236         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
 237         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
 238         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
 239         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
 240         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
 241         dev->caps.max_wqes           = dev_cap->max_qp_sz;
 242         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
 243         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
 244         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
 245         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
 246         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
 247         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
 248         dev->caps.num_qp_per_mgm     = mlx4_get_qp_per_mgm(dev);
 249         /*
 250          * Subtract 1 from the limit because we need to allocate a
 251          * spare CQE so the HCA HW can tell the difference between an
 252          * empty CQ and a full CQ.
 253          */
 254         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
 255         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
 256         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
 257         dev->caps.reserved_mtts      = dev_cap->reserved_mtts;
 258         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
 259
 260         /* The first 128 UARs are used for EQ doorbells */
 261         dev->caps.reserved_uars      = max_t(int, 128, dev_cap->reserved_uars);
 262         dev->caps.reserved_pds       = dev_cap->reserved_pds;
 263         dev->caps.reserved_xrcds     = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 264                                         dev_cap->reserved_xrcds : 0;
 265         dev->caps.max_xrcds          = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 266                                         dev_cap->max_xrcds : 0;
 267         dev->caps.mtt_entry_sz       = dev_cap->mtt_entry_sz;
 268
 269         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
 270         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
 271         dev->caps.flags              = dev_cap->flags;
 272         dev->caps.bmme_flags         = dev_cap->bmme_flags;
 273         dev->caps.reserved_lkey      = dev_cap->reserved_lkey;
 274         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
 275         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
 276
 277         dev->caps.log_num_macs  = log_num_mac;
 278         dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS;
 279         dev->caps.log_num_prios = use_prio ? 3 : 0;
 280
 281         for (i = 1; i <= dev->caps.num_ports; ++i) {
 282                 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE;
 283                 if (dev->caps.supported_type[i]) {
 284                         /* if only ETH is supported - assign ETH */
 285                         if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH)
 286                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
 287                         /* if only IB is supported,
 288                          * assign IB only if SRIOV is off*/
 289                         else if (dev->caps.supported_type[i] ==
 290                                  MLX4_PORT_TYPE_IB) {
 291                                 if (dev->flags & MLX4_FLAG_SRIOV)
 292                                         dev->caps.port_type[i] =
 293                                                 MLX4_PORT_TYPE_NONE;
 294                                 else
 295                                         dev->caps.port_type[i] =
 296                                                 MLX4_PORT_TYPE_IB;
 297                         /* if IB and ETH are supported,
 298                          * first of all check if SRIOV is on */
 299                         } else if (dev->flags & MLX4_FLAG_SRIOV)
 300                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
 301                         /* if IB and ETH are supported and SRIOV is off
 302                          * use module parameters */
 303                         else {
 304                                 if (port_type_array[i-1])
 305                                         dev->caps.port_type[i] =
 306                                                 MLX4_PORT_TYPE_IB;
 307                                 else
 308                                         dev->caps.port_type[i] =
 309                                                 MLX4_PORT_TYPE_ETH;
 310                         }
 311                 }
 312                 dev->caps.possible_type[i] = dev->caps.port_type[i];
 313                 mlx4_priv(dev)->sense.sense_allowed[i] =
 314                         dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO;
 315
 316                 if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) {
 317                         dev->caps.log_num_macs = dev_cap->log_max_macs[i];
 318                         mlx4_warn(dev, "Requested number of MACs is too much "
 319                                   "for port %d, reducing to %d.\n",
 320                                   i, 1 << dev->caps.log_num_macs);
 321                 }
 322                 if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) {
 323                         dev->caps.log_num_vlans = dev_cap->log_max_vlans[i];
 324                         mlx4_warn(dev, "Requested number of VLANs is too much "
 325                                   "for port %d, reducing to %d.\n",
 326                                   i, 1 << dev->caps.log_num_vlans);
 327                 }
 328         }
 329
 330         dev->caps.max_counters = 1 << ilog2(dev_cap->max_counters);
 331
 332         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
 333         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] =
 334                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] =
 335                 (1 << dev->caps.log_num_macs) *
 336                 (1 << dev->caps.log_num_vlans) *
 337                 (1 << dev->caps.log_num_prios) *
 338                 dev->caps.num_ports;
 339         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH;
 340
 341         dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] +
 342                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] +
 343                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] +
 344                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH];
 345
 346         return 0;
 347 }
 348 /*The function checks if there are live vf, return the num of them*/
 349 static int mlx4_how_many_lives_vf(struct mlx4_dev *dev)
 350 {
 351         struct mlx4_priv *priv = mlx4_priv(dev);
 352         struct mlx4_slave_state *s_state;
 353         int i;
 354         int ret = 0;
 355
 356         for (i = 1/*the ppf is 0*/; i < dev->num_slaves; ++i) {
 357                 s_state = &priv->mfunc.master.slave_state[i];
 358                 if (s_state->active && s_state->last_cmd !=
 359                     MLX4_COMM_CMD_RESET) {
 360                         mlx4_warn(dev, "%s: slave: %d is still active\n",
 361                                   __func__, i);
 362                         ret++;
 363                 }
 364         }
 365         return ret;
 366 }
 367
 368 static int mlx4_is_slave_active(struct mlx4_dev *dev, int slave)
 369 {
 370         struct mlx4_priv *priv = mlx4_priv(dev);
 371         struct mlx4_slave_state *s_slave;
 372
 373         if (!mlx4_is_master(dev))
 374                 return 0;
 375
 376         s_slave = &priv->mfunc.master.slave_state[slave];
 377         return !!s_slave->active;
 378 }
 379 EXPORT_SYMBOL(mlx4_is_slave_active);
 380
 381 static int mlx4_slave_cap(struct mlx4_dev *dev)
 382 {
 383         int                        err;
 384         u32                        page_size;
 385         struct mlx4_dev_cap        dev_cap;
 386         struct mlx4_func_cap       func_cap;
 387         struct mlx4_init_hca_param hca_param;
 388         int                        i;
 389
 390         memset(&hca_param, 0, sizeof(hca_param));
 391         err = mlx4_QUERY_HCA(dev, &hca_param);
 392         if (err) {
 393                 mlx4_err(dev, "QUERY_HCA command failed, aborting.\n");
 394                 return err;
 395         }
 396
 397         /*fail if the hca has an unknown capability */
 398         if ((hca_param.global_caps | HCA_GLOBAL_CAP_MASK) !=
 399             HCA_GLOBAL_CAP_MASK) {
 400                 mlx4_err(dev, "Unknown hca global capabilities\n");
 401                 return -ENOSYS;
 402         }
 403
 404         mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz;
 405
 406         memset(&dev_cap, 0, sizeof(dev_cap));
 407         err = mlx4_dev_cap(dev, &dev_cap);
 408         if (err) {
 409                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 410                 return err;
 411         }
 412
 413         page_size = ~dev->caps.page_size_cap + 1;
 414         mlx4_warn(dev, "HCA minimum page size:%d\n", page_size);
 415         if (page_size > PAGE_SIZE) {
 416                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 417                          "kernel PAGE_SIZE of %ld, aborting.\n",
 418                          page_size, PAGE_SIZE);
 419                 return -ENODEV;
 420         }
 421
 422         /* slave gets uar page size from QUERY_HCA fw command */
 423         dev->caps.uar_page_size = 1 << (hca_param.uar_page_sz + 12);
 424
 425         /* TODO: relax this assumption */
 426         if (dev->caps.uar_page_size != PAGE_SIZE) {
 427                 mlx4_err(dev, "UAR size:%d != kernel PAGE_SIZE of %ld\n",
 428                          dev->caps.uar_page_size, PAGE_SIZE);
 429                 return -ENODEV;
 430         }
 431
 432         memset(&func_cap, 0, sizeof(func_cap));
 433         err = mlx4_QUERY_FUNC_CAP(dev, &func_cap);
 434         if (err) {
 435                 mlx4_err(dev, "QUERY_FUNC_CAP command failed, aborting.\n");
 436                 return err;
 437         }
 438
 439         if ((func_cap.pf_context_behaviour | PF_CONTEXT_BEHAVIOUR_MASK) !=
 440             PF_CONTEXT_BEHAVIOUR_MASK) {
 441                 mlx4_err(dev, "Unknown pf context behaviour\n");
 442                 return -ENOSYS;
 443         }
 444
 445         dev->caps.function              = func_cap.function;
 446         dev->caps.num_ports             = func_cap.num_ports;
 447         dev->caps.num_qps               = func_cap.qp_quota;
 448         dev->caps.num_srqs              = func_cap.srq_quota;
 449         dev->caps.num_cqs               = func_cap.cq_quota;
 450         dev->caps.num_eqs               = func_cap.max_eq;
 451         dev->caps.reserved_eqs          = func_cap.reserved_eq;
 452         dev->caps.num_mpts              = func_cap.mpt_quota;
 453         dev->caps.num_mtts              = func_cap.mtt_quota;
 454         dev->caps.num_pds               = MLX4_NUM_PDS;
 455         dev->caps.num_mgms              = 0;
 456         dev->caps.num_amgms             = 0;
 457
 458         for (i = 1; i <= dev->caps.num_ports; ++i)
 459                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 460
 461         if (dev->caps.num_ports > MLX4_MAX_PORTS) {
 462                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 463                          "aborting.\n", dev->caps.num_ports, MLX4_MAX_PORTS);
 464                 return -ENODEV;
 465         }
 466
 467         if (dev->caps.uar_page_size * (dev->caps.num_uars -
 468                                        dev->caps.reserved_uars) >
 469                                        pci_resource_len(dev->pdev, 2)) {
 470                 mlx4_err(dev, "HCA reported UAR region size of 0x%x bigger than "
 471                          "PCI resource 2 size of 0x%llx, aborting.\n",
 472                          dev->caps.uar_page_size * dev->caps.num_uars,
 473                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 474                 return -ENODEV;
 475         }
 476
 477 #if 0
 478         mlx4_warn(dev, "sqp_demux:%d\n", dev->caps.sqp_demux);
 479         mlx4_warn(dev, "num_uars:%d reserved_uars:%d uar region:0x%x bar2:0x%llx\n",
 480                   dev->caps.num_uars, dev->caps.reserved_uars,
 481                   dev->caps.uar_page_size * dev->caps.num_uars,
 482                   pci_resource_len(dev->pdev, 2));
 483         mlx4_warn(dev, "num_eqs:%d reserved_eqs:%d\n", dev->caps.num_eqs,
 484                   dev->caps.reserved_eqs);
 485         mlx4_warn(dev, "num_pds:%d reserved_pds:%d slave_pd_shift:%d pd_base:%d\n",
 486                   dev->caps.num_pds, dev->caps.reserved_pds,
 487                   dev->caps.slave_pd_shift, dev->caps.pd_base);
 488 #endif
 489         return 0;
 490 }
 491
 492 /*
 493  * Change the port configuration of the device.
 494  * Every user of this function must hold the port mutex.
 495  */
 496 int mlx4_change_port_types(struct mlx4_dev *dev,
 497                            enum mlx4_port_type *port_types)
 498 {
 499         int err = 0;
 500         int change = 0;
 501         int port;
 502
 503         for (port = 0; port <  dev->caps.num_ports; port++) {
 504                 /* Change the port type only if the new type is different
 505                  * from the current, and not set to Auto */
 506                 if (port_types[port] != dev->caps.port_type[port + 1]) {
 507                         change = 1;
 508                         dev->caps.port_type[port + 1] = port_types[port];
 509                 }
 510         }
 511         if (change) {
 512                 mlx4_unregister_device(dev);
 513                 for (port = 1; port <= dev->caps.num_ports; port++) {
 514                         mlx4_CLOSE_PORT(dev, port);
 515                         err = mlx4_SET_PORT(dev, port);
 516                         if (err) {
 517                                 mlx4_err(dev, "Failed to set port %d, "
 518                                               "aborting\n", port);
 519                                 goto out;
 520                         }
 521                 }
 522                 mlx4_set_port_mask(dev);
 523                 err = mlx4_register_device(dev);
 524         }
 525
 526 out:
 527         return err;
 528 }
 529
 530 static ssize_t show_port_type(struct device *dev,
 531                               struct device_attribute *attr,
 532                               char *buf)
 533 {
 534         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 535                                                    port_attr);
 536         struct mlx4_dev *mdev = info->dev;
 537         char type[8];
 538
 539         sprintf(type, "%s",
 540                 (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ?
 541                 "ib" : "eth");
 542         if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO)
 543                 sprintf(buf, "auto (%s)\n", type);
 544         else
 545                 sprintf(buf, "%s\n", type);
 546
 547         return strlen(buf);
 548 }
 549
 550 static ssize_t set_port_type(struct device *dev,
 551                              struct device_attribute *attr,
 552                              const char *buf, size_t count)
 553 {
 554         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 555                                                    port_attr);
 556         struct mlx4_dev *mdev = info->dev;
 557         struct mlx4_priv *priv = mlx4_priv(mdev);
 558         enum mlx4_port_type types[MLX4_MAX_PORTS];
 559         enum mlx4_port_type new_types[MLX4_MAX_PORTS];
 560         int i;
 561         int err = 0;
 562
 563         if (!strcmp(buf, "ib\n"))
 564                 info->tmp_type = MLX4_PORT_TYPE_IB;
 565         else if (!strcmp(buf, "eth\n"))
 566                 info->tmp_type = MLX4_PORT_TYPE_ETH;
 567         else if (!strcmp(buf, "auto\n"))
 568                 info->tmp_type = MLX4_PORT_TYPE_AUTO;
 569         else {
 570                 mlx4_err(mdev, "%s is not supported port type\n", buf);
 571                 return -EINVAL;
 572         }
 573
 574         mlx4_stop_sense(mdev);
 575         mutex_lock(&priv->port_mutex);
 576         /* Possible type is always the one that was delivered */
 577         mdev->caps.possible_type[info->port] = info->tmp_type;
 578
 579         for (i = 0; i < mdev->caps.num_ports; i++) {
 580                 types[i] = priv->port[i+1].tmp_type ? priv->port[i+1].tmp_type :
 581                                         mdev->caps.possible_type[i+1];
 582                 if (types[i] == MLX4_PORT_TYPE_AUTO)
 583                         types[i] = mdev->caps.port_type[i+1];
 584         }
 585
 586         if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
 587                 for (i = 1; i <= mdev->caps.num_ports; i++) {
 588                         if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) {
 589                                 mdev->caps.possible_type[i] = mdev->caps.port_type[i];
 590                                 err = -EINVAL;
 591                         }
 592                 }
 593         }
 594         if (err) {
 595                 mlx4_err(mdev, "Auto sensing is not supported on this HCA. "
 596                                "Set only 'eth' or 'ib' for both ports "
 597                                "(should be the same)\n");
 598                 goto out;
 599         }
 600
 601         mlx4_do_sense_ports(mdev, new_types, types);
 602
 603         err = mlx4_check_port_params(mdev, new_types);
 604         if (err)
 605                 goto out;
 606
 607         /* We are about to apply the changes after the configuration
 608          * was verified, no need to remember the temporary types
 609          * any more */
 610         for (i = 0; i < mdev->caps.num_ports; i++)
 611                 priv->port[i + 1].tmp_type = 0;
 612
 613         err = mlx4_change_port_types(mdev, new_types);
 614
 615 out:
 616         mlx4_start_sense(mdev);
 617         mutex_unlock(&priv->port_mutex);
 618         return err ? err : count;
 619 }
 620
 621 static int mlx4_load_fw(struct mlx4_dev *dev)
 622 {
 623         struct mlx4_priv *priv = mlx4_priv(dev);
 624         int err;
 625
 626         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
 627                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
 628         if (!priv->fw.fw_icm) {
 629                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
 630                 return -ENOMEM;
 631         }
 632
 633         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
 634         if (err) {
 635                 mlx4_err(dev, "MAP_FA command failed, aborting.\n");
 636                 goto err_free;
 637         }
 638
 639         err = mlx4_RUN_FW(dev);
 640         if (err) {
 641                 mlx4_err(dev, "RUN_FW command failed, aborting.\n");
 642                 goto err_unmap_fa;
 643         }
 644
 645         return 0;
 646
 647 err_unmap_fa:
 648         mlx4_UNMAP_FA(dev);
 649
 650 err_free:
 651         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 652         return err;
 653 }
 654
 655 static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
 656                                 int cmpt_entry_sz)
 657 {
 658         struct mlx4_priv *priv = mlx4_priv(dev);
 659         int err;
 660         int num_eqs;
 661
 662         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
 663                                   cmpt_base +
 664                                   ((u64) (MLX4_CMPT_TYPE_QP *
 665                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 666                                   cmpt_entry_sz, dev->caps.num_qps,
 667                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 668                                   0, 0);
 669         if (err)
 670                 goto err;
 671
 672         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
 673                                   cmpt_base +
 674                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
 675                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 676                                   cmpt_entry_sz, dev->caps.num_srqs,
 677                                   dev->caps.reserved_srqs, 0, 0);
 678         if (err)
 679                 goto err_qp;
 680
 681         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
 682                                   cmpt_base +
 683                                   ((u64) (MLX4_CMPT_TYPE_CQ *
 684                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 685                                   cmpt_entry_sz, dev->caps.num_cqs,
 686                                   dev->caps.reserved_cqs, 0, 0);
 687         if (err)
 688                 goto err_srq;
 689
 690         num_eqs = (mlx4_is_master(dev)) ?
 691                 roundup_pow_of_two(mlx4_master_get_num_eqs(dev)) :
 692                 dev->caps.num_eqs;
 693         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
 694                                   cmpt_base +
 695                                   ((u64) (MLX4_CMPT_TYPE_EQ *
 696                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 697                                   cmpt_entry_sz, num_eqs, num_eqs, 0, 0);
 698         if (err)
 699                 goto err_cq;
 700
 701         return 0;
 702
 703 err_cq:
 704         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 705
 706 err_srq:
 707         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 708
 709 err_qp:
 710         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 711
 712 err:
 713         return err;
 714 }
 715
 716 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
 717                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
 718 {
 719         struct mlx4_priv *priv = mlx4_priv(dev);
 720         u64 aux_pages;
 721         int num_eqs;
 722         int err;
 723
 724         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
 725         if (err) {
 726                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
 727                 return err;
 728         }
 729
 730         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
 731                  (unsigned long long) icm_size >> 10,
 732                  (unsigned long long) aux_pages << 2);
 733
 734         priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages,
 735                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
 736         if (!priv->fw.aux_icm) {
 737                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
 738                 return -ENOMEM;
 739         }
 740
 741         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
 742         if (err) {
 743                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
 744                 goto err_free_aux;
 745         }
 746
 747         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
 748         if (err) {
 749                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
 750                 goto err_unmap_aux;
 751         }
 752
 753
 754         num_eqs = (mlx4_is_master(dev)) ?
 755                 roundup_pow_of_two(mlx4_master_get_num_eqs(dev)) :
 756                 dev->caps.num_eqs;
 757         err = mlx4_init_icm_table(dev, &priv->eq_table.table,
 758                                   init_hca->eqc_base, dev_cap->eqc_entry_sz,
 759                                   num_eqs, num_eqs, 0, 0);
 760         if (err) {
 761                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
 762                 goto err_unmap_cmpt;
 763         }
 764
 765         /*
 766          * Reserved MTT entries must be aligned up to a cacheline
 767          * boundary, since the FW will write to them, while the driver
 768          * writes to all other MTT entries. (The variable
 769          * dev->caps.mtt_entry_sz below is really the MTT segment
 770          * size, not the raw entry size)
 771          */
 772         dev->caps.reserved_mtts =
 773                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
 774                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
 775
 776         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
 777                                   init_hca->mtt_base,
 778                                   dev->caps.mtt_entry_sz,
 779                                   dev->caps.num_mtts,
 780                                   dev->caps.reserved_mtts, 1, 0);
 781         if (err) {
 782                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
 783                 goto err_unmap_eq;
 784         }
 785
 786         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
 787                                   init_hca->dmpt_base,
 788                                   dev_cap->dmpt_entry_sz,
 789                                   dev->caps.num_mpts,
 790                                   dev->caps.reserved_mrws, 1, 1);
 791         if (err) {
 792                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
 793                 goto err_unmap_mtt;
 794         }
 795
 796         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
 797                                   init_hca->qpc_base,
 798                                   dev_cap->qpc_entry_sz,
 799                                   dev->caps.num_qps,
 800                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 801                                   0, 0);
 802         if (err) {
 803                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
 804                 goto err_unmap_dmpt;
 805         }
 806
 807         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
 808                                   init_hca->auxc_base,
 809                                   dev_cap->aux_entry_sz,
 810                                   dev->caps.num_qps,
 811                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 812                                   0, 0);
 813         if (err) {
 814                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
 815                 goto err_unmap_qp;
 816         }
 817
 818         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
 819                                   init_hca->altc_base,
 820                                   dev_cap->altc_entry_sz,
 821                                   dev->caps.num_qps,
 822                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 823                                   0, 0);
 824         if (err) {
 825                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
 826                 goto err_unmap_auxc;
 827         }
 828
 829         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
 830                                   init_hca->rdmarc_base,
 831                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
 832                                   dev->caps.num_qps,
 833                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 834                                   0, 0);
 835         if (err) {
 836                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
 837                 goto err_unmap_altc;
 838         }
 839
 840         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
 841                                   init_hca->cqc_base,
 842                                   dev_cap->cqc_entry_sz,
 843                                   dev->caps.num_cqs,
 844                                   dev->caps.reserved_cqs, 0, 0);
 845         if (err) {
 846                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
 847                 goto err_unmap_rdmarc;
 848         }
 849
 850         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
 851                                   init_hca->srqc_base,
 852                                   dev_cap->srq_entry_sz,
 853                                   dev->caps.num_srqs,
 854                                   dev->caps.reserved_srqs, 0, 0);
 855         if (err) {
 856                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
 857                 goto err_unmap_cq;
 858         }
 859
 860         /*
 861          * It's not strictly required, but for simplicity just map the
 862          * whole multicast group table now.  The table isn't very big
 863          * and it's a lot easier than trying to track ref counts.
 864          */
 865         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
 866                                   init_hca->mc_base,
 867                                   mlx4_get_mgm_entry_size(dev),
 868                                   dev->caps.num_mgms + dev->caps.num_amgms,
 869                                   dev->caps.num_mgms + dev->caps.num_amgms,
 870                                   0, 0);
 871         if (err) {
 872                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
 873                 goto err_unmap_srq;
 874         }
 875
 876         return 0;
 877
 878 err_unmap_srq:
 879         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
 880
 881 err_unmap_cq:
 882         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
 883
 884 err_unmap_rdmarc:
 885         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
 886
 887 err_unmap_altc:
 888         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
 889
 890 err_unmap_auxc:
 891         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
 892
 893 err_unmap_qp:
 894         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
 895
 896 err_unmap_dmpt:
 897         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
 898
 899 err_unmap_mtt:
 900         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
 901
 902 err_unmap_eq:
 903         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
 904
 905 err_unmap_cmpt:
 906         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
 907         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 908         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 909         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 910
 911 err_unmap_aux:
 912         mlx4_UNMAP_ICM_AUX(dev);
 913
 914 err_free_aux:
 915         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
 916
 917         return err;
 918 }
 919
 920 static void mlx4_free_icms(struct mlx4_dev *dev)
 921 {
 922         struct mlx4_priv *priv = mlx4_priv(dev);
 923
 924         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
 925         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
 926         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
 927         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
 928         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
 929         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
 930         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
 931         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
 932         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
 933         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
 934         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
 935         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 936         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 937         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 938
 939         mlx4_UNMAP_ICM_AUX(dev);
 940         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
 941 }
 942
 943 static void mlx4_slave_exit(struct mlx4_dev *dev)
 944 {
 945         struct mlx4_priv *priv = mlx4_priv(dev);
 946
 947         down(&priv->cmd.slave_sem);
 948         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_TIME))
 949                 mlx4_warn(dev, "Failed to close slave function.\n");
 950         up(&priv->cmd.slave_sem);
 951 }
 952
 953 static int map_bf_area(struct mlx4_dev *dev)
 954 {
 955         struct mlx4_priv *priv = mlx4_priv(dev);
 956         resource_size_t bf_start;
 957         resource_size_t bf_len;
 958         int err = 0;
 959
 960         bf_start = pci_resource_start(dev->pdev, 2) +
 961                         (dev->caps.num_uars << PAGE_SHIFT);
 962         bf_len = pci_resource_len(dev->pdev, 2) -
 963                         (dev->caps.num_uars << PAGE_SHIFT);
 964         priv->bf_mapping = io_mapping_create_wc(bf_start, bf_len);
 965         if (!priv->bf_mapping)
 966                 err = -ENOMEM;
 967
 968         return err;
 969 }
 970
 971 static void unmap_bf_area(struct mlx4_dev *dev)
 972 {
 973         if (mlx4_priv(dev)->bf_mapping)
 974                 io_mapping_free(mlx4_priv(dev)->bf_mapping);
 975 }
 976
 977 static void mlx4_close_hca(struct mlx4_dev *dev)
 978 {
 979         unmap_bf_area(dev);
 980         if (mlx4_is_slave(dev))
 981                 mlx4_slave_exit(dev);
 982         else {
 983                 mlx4_CLOSE_HCA(dev, 0);
 984                 mlx4_free_icms(dev);
 985                 mlx4_UNMAP_FA(dev);
 986                 mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
 987         }
 988 }
 989
 990 static int mlx4_init_slave(struct mlx4_dev *dev)
 991 {
 992         struct mlx4_priv *priv = mlx4_priv(dev);
 993         u64 dma = (u64) priv->mfunc.vhcr_dma;
 994         int num_of_reset_retries = NUM_OF_RESET_RETRIES;
 995         int ret_from_reset = 0;
 996         u32 slave_read;
 997         u32 cmd_channel_ver;
 998
 999         down(&priv->cmd.slave_sem);
1000         priv->cmd.max_cmds = 1;
1001         mlx4_warn(dev, "Sending reset\n");
1002         ret_from_reset = mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0,
1003                                        MLX4_COMM_TIME);
1004         /* if we are in the middle of flr the slave will try
1005          * NUM_OF_RESET_RETRIES times before leaving.*/
1006         if (ret_from_reset) {
1007                 if (MLX4_DELAY_RESET_SLAVE == ret_from_reset) {
1008                         msleep(SLEEP_TIME_IN_RESET);
1009                         while (ret_from_reset && num_of_reset_retries) {
1010                                 mlx4_warn(dev, "slave is currently in the"
1011                                           "middle of FLR. retrying..."
1012                                           "(try num:%d)\n",
1013                                           (NUM_OF_RESET_RETRIES -
1014                                            num_of_reset_retries  + 1));
1015                                 ret_from_reset =
1016                                         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET,
1017                                                       0, MLX4_COMM_TIME);
1018                                 num_of_reset_retries = num_of_reset_retries - 1;
1019                         }
1020                 } else
1021                         goto err;
1022         }
1023
1024         /* check the driver version - the slave I/F revision
1025          * must match the master's */
1026         slave_read = swab32(readl(&priv->mfunc.comm->slave_read));
1027         cmd_channel_ver = mlx4_comm_get_version();
1028
1029         if (MLX4_COMM_GET_IF_REV(cmd_channel_ver) !=
1030                 MLX4_COMM_GET_IF_REV(slave_read)) {
1031                 mlx4_err(dev, "slave driver version is not supported"
1032                          " by the master\n");
1033                 goto err;
1034         }
1035
1036         mlx4_warn(dev, "Sending vhcr0\n");
1037         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR0, dma >> 48,
1038                                                     MLX4_COMM_TIME))
1039                 goto err;
1040         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR1, dma >> 32,
1041                                                     MLX4_COMM_TIME))
1042                 goto err;
1043         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR2, dma >> 16,
1044                                                     MLX4_COMM_TIME))
1045                 goto err;
1046         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR_EN, dma, MLX4_COMM_TIME))
1047                 goto err;
1048         up(&priv->cmd.slave_sem);
1049         return 0;
1050
1051 err:
1052         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, 0);
1053         up(&priv->cmd.slave_sem);
1054         return -EIO;
1055 }
1056
1057 static int mlx4_init_hca(struct mlx4_dev *dev)
1058 {
1059         struct mlx4_priv          *priv = mlx4_priv(dev);
1060         struct mlx4_adapter        adapter;
1061         struct mlx4_dev_cap        dev_cap;
1062         struct mlx4_mod_stat_cfg   mlx4_cfg;
1063         struct mlx4_profile        profile;
1064         struct mlx4_init_hca_param init_hca;
1065         u64 icm_size;
1066         int err;
1067
1068         if (!mlx4_is_slave(dev)) {
1069                 err = mlx4_QUERY_FW(dev);
1070                 if (err) {
1071                         if (err == -EACCES)
1072                                 mlx4_info(dev, "non-primary physical function, skipping.\n");
1073                         else
1074                                 mlx4_err(dev, "QUERY_FW command failed, aborting.\n");
1075                         goto unmap_bf;
1076                 }
1077
1078                 err = mlx4_load_fw(dev);
1079                 if (err) {
1080                         mlx4_err(dev, "Failed to start FW, aborting.\n");
1081                         goto unmap_bf;
1082                 }
1083
1084                 mlx4_cfg.log_pg_sz_m = 1;
1085                 mlx4_cfg.log_pg_sz = 0;
1086                 err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg);
1087                 if (err)
1088                         mlx4_warn(dev, "Failed to override log_pg_sz parameter\n");
1089
1090                 err = mlx4_dev_cap(dev, &dev_cap);
1091                 if (err) {
1092                         mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
1093                         goto err_stop_fw;
1094                 }
1095
1096                 profile = default_profile;
1097
1098                 icm_size = mlx4_make_profile(dev, &profile, &dev_cap,
1099                                              &init_hca);
1100                 if ((long long) icm_size < 0) {
1101                         err = icm_size;
1102                         goto err_stop_fw;
1103                 }
1104
1105                 init_hca.log_uar_sz = ilog2(dev->caps.num_uars);
1106                 init_hca.uar_page_sz = PAGE_SHIFT - 12;
1107
1108                 err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
1109                 if (err)
1110                         goto err_stop_fw;
1111
1112                 err = mlx4_INIT_HCA(dev, &init_hca);
1113                 if (err) {
1114                         mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
1115                         goto err_free_icm;
1116                 }
1117         } else {
1118                 err = mlx4_init_slave(dev);
1119                 if (err) {
1120                         mlx4_err(dev, "Failed to initialize slave\n");
1121                         goto unmap_bf;
1122                 }
1123
1124                 err = mlx4_slave_cap(dev);
1125                 if (err) {
1126                         mlx4_err(dev, "Failed to obtain slave caps\n");
1127                         goto err_close;
1128                 }
1129         }
1130
1131         if (map_bf_area(dev))
1132                 mlx4_dbg(dev, "Failed to map blue flame area\n");
1133
1134         /*Only the master set the ports, all the rest got it from it.*/
1135         if (!mlx4_is_slave(dev))
1136                 mlx4_set_port_mask(dev);
1137
1138         err = mlx4_QUERY_ADAPTER(dev, &adapter);
1139         if (err) {
1140                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
1141                 goto err_close;
1142         }
1143
1144         priv->eq_table.inta_pin = adapter.inta_pin;
1145         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
1146
1147         return 0;
1148
1149 err_close:
1150         mlx4_close_hca(dev);
1151
1152 err_free_icm:
1153         if (!mlx4_is_slave(dev))
1154                 mlx4_free_icms(dev);
1155
1156 err_stop_fw:
1157         if (!mlx4_is_slave(dev)) {
1158                 mlx4_UNMAP_FA(dev);
1159                 mlx4_free_icm(dev, priv->fw.fw_icm, 0);
1160         }
1161 unmap_bf:
1162         unmap_bf_area(dev);
1163         return err;
1164 }
1165
1166 static int mlx4_init_counters_table(struct mlx4_dev *dev)
1167 {
1168         struct mlx4_priv *priv = mlx4_priv(dev);
1169         int nent;
1170
1171         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1172                 return -ENOENT;
1173
1174         nent = dev->caps.max_counters;
1175         return mlx4_bitmap_init(&priv->counters_bitmap, nent, nent - 1, 0, 0);
1176 }
1177
1178 static void mlx4_cleanup_counters_table(struct mlx4_dev *dev)
1179 {
1180         mlx4_bitmap_cleanup(&mlx4_priv(dev)->counters_bitmap);
1181 }
1182
1183 int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
1184 {
1185         struct mlx4_priv *priv = mlx4_priv(dev);
1186
1187         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1188                 return -ENOENT;
1189
1190         *idx = mlx4_bitmap_alloc(&priv->counters_bitmap);
1191         if (*idx == -1)
1192                 return -ENOMEM;
1193
1194         return 0;
1195 }
1196 EXPORT_SYMBOL_GPL(mlx4_counter_alloc);
1197
1198 void mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
1199 {
1200         mlx4_bitmap_free(&mlx4_priv(dev)->counters_bitmap, idx);
1201         return;
1202 }
1203 EXPORT_SYMBOL_GPL(mlx4_counter_free);
1204
1205 static int mlx4_setup_hca(struct mlx4_dev *dev)
1206 {
1207         struct mlx4_priv *priv = mlx4_priv(dev);
1208         int err;
1209         int port;
1210         __be32 ib_port_default_caps;
1211
1212         err = mlx4_init_uar_table(dev);
1213         if (err) {
1214                 mlx4_err(dev, "Failed to initialize "
1215                          "user access region table, aborting.\n");
1216                 return err;
1217         }
1218
1219         err = mlx4_uar_alloc(dev, &priv->driver_uar);
1220         if (err) {
1221                 mlx4_err(dev, "Failed to allocate driver access region, "
1222                          "aborting.\n");
1223                 goto err_uar_table_free;
1224         }
1225
1226         priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
1227         if (!priv->kar) {
1228                 mlx4_err(dev, "Couldn't map kernel access region, "
1229                          "aborting.\n");
1230                 err = -ENOMEM;
1231                 goto err_uar_free;
1232         }
1233
1234         err = mlx4_init_pd_table(dev);
1235         if (err) {
1236                 mlx4_err(dev, "Failed to initialize "
1237                          "protection domain table, aborting.\n");
1238                 goto err_kar_unmap;
1239         }
1240
1241         err = mlx4_init_xrcd_table(dev);
1242         if (err) {
1243                 mlx4_err(dev, "Failed to initialize "
1244                          "reliable connection domain table, aborting.\n");
1245                 goto err_pd_table_free;
1246         }
1247
1248         err = mlx4_init_mr_table(dev);
1249         if (err) {
1250                 mlx4_err(dev, "Failed to initialize "
1251                          "memory region table, aborting.\n");
1252                 goto err_xrcd_table_free;
1253         }
1254
1255         err = mlx4_init_eq_table(dev);
1256         if (err) {
1257                 mlx4_err(dev, "Failed to initialize "
1258                          "event queue table, aborting.\n");
1259                 goto err_mr_table_free;
1260         }
1261
1262         err = mlx4_cmd_use_events(dev);
1263         if (err) {
1264                 mlx4_err(dev, "Failed to switch to event-driven "
1265                          "firmware commands, aborting.\n");
1266                 goto err_eq_table_free;
1267         }
1268
1269         err = mlx4_NOP(dev);
1270         if (err) {
1271                 if (dev->flags & MLX4_FLAG_MSI_X) {
1272                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
1273                                   "interrupt IRQ %d).\n",
1274                                   priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1275                         mlx4_warn(dev, "Trying again without MSI-X.\n");
1276                 } else {
1277                         mlx4_err(dev, "NOP command failed to generate interrupt "
1278                                  "(IRQ %d), aborting.\n",
1279                                  priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1280                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
1281                 }
1282
1283                 goto err_cmd_poll;
1284         }
1285
1286         mlx4_dbg(dev, "NOP command IRQ test passed\n");
1287
1288         err = mlx4_init_cq_table(dev);
1289         if (err) {
1290                 mlx4_err(dev, "Failed to initialize "
1291                          "completion queue table, aborting.\n");
1292                 goto err_cmd_poll;
1293         }
1294
1295         err = mlx4_init_srq_table(dev);
1296         if (err) {
1297                 mlx4_err(dev, "Failed to initialize "
1298                          "shared receive queue table, aborting.\n");
1299                 goto err_cq_table_free;
1300         }
1301
1302         err = mlx4_init_qp_table(dev);
1303         if (err) {
1304                 mlx4_err(dev, "Failed to initialize "
1305                          "queue pair table, aborting.\n");
1306                 goto err_srq_table_free;
1307         }
1308
1309         if (!mlx4_is_slave(dev)) {
1310                 err = mlx4_init_mcg_table(dev);
1311                 if (err) {
1312                         mlx4_err(dev, "Failed to initialize "
1313                                  "multicast group table, aborting.\n");
1314                         goto err_qp_table_free;
1315                 }
1316         }
1317
1318         err = mlx4_init_counters_table(dev);
1319         if (err && err != -ENOENT) {
1320                 mlx4_err(dev, "Failed to initialize counters table, aborting.\n");
1321                 goto err_mcg_table_free;
1322         }
1323
1324         if (!mlx4_is_slave(dev)) {
1325                 for (port = 1; port <= dev->caps.num_ports; port++) {
1326                         if (!mlx4_is_mfunc(dev)) {
1327                                 enum mlx4_port_type port_type = 0;
1328                                 mlx4_SENSE_PORT(dev, port, &port_type);
1329                                 if (port_type)
1330                                         dev->caps.port_type[port] = port_type;
1331                         }
1332                         ib_port_default_caps = 0;
1333                         err = mlx4_get_port_ib_caps(dev, port,
1334                                                     &ib_port_default_caps);
1335                         if (err)
1336                                 mlx4_warn(dev, "failed to get port %d default "
1337                                           "ib capabilities (%d). Continuing "
1338                                           "with caps = 0\n", port, err);
1339                         dev->caps.ib_port_def_cap[port] = ib_port_default_caps;
1340
1341                         err = mlx4_check_ext_port_caps(dev, port);
1342                         if (err)
1343                                 mlx4_warn(dev, "failed to get port %d extended "
1344                                           "port capabilities support info (%d)."
1345                                           " Assuming not supported\n",
1346                                           port, err);
1347
1348                         err = mlx4_SET_PORT(dev, port);
1349                         if (err) {
1350                                 mlx4_err(dev, "Failed to set port %d, aborting\n",
1351                                         port);
1352                                 goto err_counters_table_free;
1353                         }
1354                 }
1355         }
1356
1357         return 0;
1358
1359 err_counters_table_free:
1360         mlx4_cleanup_counters_table(dev);
1361
1362 err_mcg_table_free:
1363         mlx4_cleanup_mcg_table(dev);
1364
1365 err_qp_table_free:
1366         mlx4_cleanup_qp_table(dev);
1367
1368 err_srq_table_free:
1369         mlx4_cleanup_srq_table(dev);
1370
1371 err_cq_table_free:
1372         mlx4_cleanup_cq_table(dev);
1373
1374 err_cmd_poll:
1375         mlx4_cmd_use_polling(dev);
1376
1377 err_eq_table_free:
1378         mlx4_cleanup_eq_table(dev);
1379
1380 err_mr_table_free:
1381         mlx4_cleanup_mr_table(dev);
1382
1383 err_xrcd_table_free:
1384         mlx4_cleanup_xrcd_table(dev);
1385
1386 err_pd_table_free:
1387         mlx4_cleanup_pd_table(dev);
1388
1389 err_kar_unmap:
1390         iounmap(priv->kar);
1391
1392 err_uar_free:
1393         mlx4_uar_free(dev, &priv->driver_uar);
1394
1395 err_uar_table_free:
1396         mlx4_cleanup_uar_table(dev);
1397         return err;
1398 }
1399
1400 static void mlx4_enable_msi_x(struct mlx4_dev *dev)
1401 {
1402         struct mlx4_priv *priv = mlx4_priv(dev);
1403         struct msix_entry *entries;
1404         int nreq = min_t(int, dev->caps.num_ports *
1405                          min_t(int, num_online_cpus() + 1, MAX_MSIX_P_PORT)
1406                                 + MSIX_LEGACY_SZ, MAX_MSIX);
1407         int err;
1408         int i;
1409
1410         if (msi_x) {
1411                 /* In multifunction mode each function gets 2 msi-X vectors
1412                  * one for data path completions anf the other for asynch events
1413                  * or command completions */
1414                 if (mlx4_is_mfunc(dev)) {
1415                         nreq = 2;
1416                 } else {
1417                         nreq = min_t(int, dev->caps.num_eqs -
1418                                      dev->caps.reserved_eqs, nreq);
1419                 }
1420
1421                 entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL);
1422                 if (!entries)
1423                         goto no_msi;
1424
1425                 for (i = 0; i < nreq; ++i)
1426                         entries[i].entry = i;
1427
1428         retry:
1429                 err = pci_enable_msix(dev->pdev, entries, nreq);
1430                 if (err) {
1431                         /* Try again if at least 2 vectors are available */
1432                         if (err > 1) {
1433                                 mlx4_info(dev, "Requested %d vectors, "
1434                                           "but only %d MSI-X vectors available, "
1435                                           "trying again\n", nreq, err);
1436                                 nreq = err;
1437                                 goto retry;
1438                         }
1439                         kfree(entries);
1440                         goto no_msi;
1441                 }
1442
1443                 if (nreq <
1444                     MSIX_LEGACY_SZ + dev->caps.num_ports * MIN_MSIX_P_PORT) {
1445                         /*Working in legacy mode , all EQ's shared*/
1446                         dev->caps.comp_pool           = 0;
1447                         dev->caps.num_comp_vectors = nreq - 1;
1448                 } else {
1449                         dev->caps.comp_pool           = nreq - MSIX_LEGACY_SZ;
1450                         dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1;
1451                 }
1452                 for (i = 0; i < nreq; ++i)
1453                         priv->eq_table.eq[i].irq = entries[i].vector;
1454
1455                 dev->flags |= MLX4_FLAG_MSI_X;
1456
1457                 kfree(entries);
1458                 return;
1459         }
1460
1461 no_msi:
1462         dev->caps.num_comp_vectors = 1;
1463         dev->caps.comp_pool        = 0;
1464
1465         for (i = 0; i < 2; ++i)
1466                 priv->eq_table.eq[i].irq = dev->pdev->irq;
1467 }
1468
1469 static int mlx4_init_port_info(struct mlx4_dev *dev, int port)
1470 {
1471         struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
1472         int err = 0;
1473
1474         info->dev = dev;
1475         info->port = port;
1476         if (!mlx4_is_slave(dev)) {
1477                 INIT_RADIX_TREE(&info->mac_tree, GFP_KERNEL);
1478                 mlx4_init_mac_table(dev, &info->mac_table);
1479                 mlx4_init_vlan_table(dev, &info->vlan_table);
1480                 info->base_qpn =
1481                         dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] +
1482                         (port - 1) * (1 << log_num_mac);
1483         }
1484
1485         sprintf(info->dev_name, "mlx4_port%d", port);
1486         info->port_attr.attr.name = info->dev_name;
1487         if (mlx4_is_mfunc(dev))
1488                 info->port_attr.attr.mode = S_IRUGO;
1489         else {
1490                 info->port_attr.attr.mode = S_IRUGO | S_IWUSR;
1491                 info->port_attr.store     = set_port_type;
1492         }
1493         info->port_attr.show      = show_port_type;
1494         sysfs_attr_init(&info->port_attr.attr);
1495
1496         err = device_create_file(&dev->pdev->dev, &info->port_attr);
1497         if (err) {
1498                 mlx4_err(dev, "Failed to create file for port %d\n", port);
1499                 info->port = -1;
1500         }
1501
1502         return err;
1503 }
1504
1505 static void mlx4_cleanup_port_info(struct mlx4_port_info *info)
1506 {
1507         if (info->port < 0)
1508                 return;
1509
1510         device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1511 }
1512
1513 static int mlx4_init_steering(struct mlx4_dev *dev)
1514 {
1515         struct mlx4_priv *priv = mlx4_priv(dev);
1516         int num_entries = dev->caps.num_ports;
1517         int i, j;
1518
1519         priv->steer = kzalloc(sizeof(struct mlx4_steer) * num_entries, GFP_KERNEL);
1520         if (!priv->steer)
1521                 return -ENOMEM;
1522
1523         for (i = 0; i < num_entries; i++) {
1524                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1525                         INIT_LIST_HEAD(&priv->steer[i].promisc_qps[j]);
1526                         INIT_LIST_HEAD(&priv->steer[i].steer_entries[j]);
1527                 }
1528                 INIT_LIST_HEAD(&priv->steer[i].high_prios);
1529         }
1530         return 0;
1531 }
1532
1533 static void mlx4_clear_steering(struct mlx4_dev *dev)
1534 {
1535         struct mlx4_priv *priv = mlx4_priv(dev);
1536         struct mlx4_steer_index *entry, *tmp_entry;
1537         struct mlx4_promisc_qp *pqp, *tmp_pqp;
1538         int num_entries = dev->caps.num_ports;
1539         int i, j;
1540
1541         for (i = 0; i < num_entries; i++) {
1542                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1543                         list_for_each_entry_safe(pqp, tmp_pqp,
1544                                                  &priv->steer[i].promisc_qps[j],
1545                                                  list) {
1546                                 list_del(&pqp->list);
1547                                 kfree(pqp);
1548                         }
1549                         list_for_each_entry_safe(entry, tmp_entry,
1550                                                  &priv->steer[i].steer_entries[j],
1551                                                  list) {
1552                                 list_del(&entry->list);
1553                                 list_for_each_entry_safe(pqp, tmp_pqp,
1554                                                          &entry->duplicates,
1555                                                          list) {
1556                                         list_del(&pqp->list);
1557                                         kfree(pqp);
1558                                 }
1559                                 kfree(entry);
1560                         }
1561                 }
1562         }
1563         kfree(priv->steer);
1564 }
1565
1566 static int extended_func_num(struct pci_dev *pdev)
1567 {
1568         return PCI_SLOT(pdev->devfn) * 8 + PCI_FUNC(pdev->devfn);
1569 }
1570
1571 #define MLX4_OWNER_BASE 0x8069c
1572 #define MLX4_OWNER_SIZE 4
1573
1574 static int mlx4_get_ownership(struct mlx4_dev *dev)
1575 {
1576         void __iomem *owner;
1577         u32 ret;
1578
1579         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1580                         MLX4_OWNER_SIZE);
1581         if (!owner) {
1582                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1583                 return -ENOMEM;
1584         }
1585
1586         ret = readl(owner);
1587         iounmap(owner);
1588         return (int) !!ret;
1589 }
1590
1591 static void mlx4_free_ownership(struct mlx4_dev *dev)
1592 {
1593         void __iomem *owner;
1594
1595         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1596                         MLX4_OWNER_SIZE);
1597         if (!owner) {
1598                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1599                 return;
1600         }
1601         writel(0, owner);
1602         msleep(1000);
1603         iounmap(owner);
1604 }
1605
1606 static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
1607 {
1608         struct mlx4_priv *priv;
1609         struct mlx4_dev *dev;
1610         int err;
1611         int port;
1612
1613         pr_info(DRV_NAME ": Initializing %s\n", pci_name(pdev));
1614
1615         err = pci_enable_device(pdev);
1616         if (err) {
1617                 dev_err(&pdev->dev, "Cannot enable PCI device, "
1618                         "aborting.\n");
1619                 return err;
1620         }
1621         if (num_vfs > MLX4_MAX_NUM_VF) {
1622                 printk(KERN_ERR "There are more VF's (%d) than allowed(%d)\n",
1623                        num_vfs, MLX4_MAX_NUM_VF);
1624                 return -EINVAL;
1625         }
1626         /*
1627          * Check for BARs.
1628          */
1629         if (((id == NULL) || !(id->driver_data & MLX4_VF)) &&
1630             !(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
1631                 dev_err(&pdev->dev, "Missing DCS, aborting."
1632                         "(id == 0X%p, id->driver_data: 0x%lx,"
1633                         " pci_resource_flags(pdev, 0):0x%lx)\n", id,
1634                         id ? id->driver_data : 0, pci_resource_flags(pdev, 0));
1635                 err = -ENODEV;
1636                 goto err_disable_pdev;
1637         }
1638         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
1639                 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1640                 err = -ENODEV;
1641                 goto err_disable_pdev;
1642         }
1643
1644         err = pci_request_regions(pdev, DRV_NAME);
1645         if (err) {
1646                 dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n");
1647                 goto err_disable_pdev;
1648         }
1649
1650         pci_set_master(pdev);
1651
1652         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1653         if (err) {
1654                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1655                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1656                 if (err) {
1657                         dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
1658                         goto err_release_regions;
1659                 }
1660         }
1661         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
1662         if (err) {
1663                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1664                          "consistent PCI DMA mask.\n");
1665                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
1666                 if (err) {
1667                         dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1668                                 "aborting.\n");
1669                         goto err_release_regions;
1670                 }
1671         }
1672
1673         /* Allow large DMA segments, up to the firmware limit of 1 GB */
1674         dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
1675
1676         priv = kzalloc(sizeof *priv, GFP_KERNEL);
1677         if (!priv) {
1678                 dev_err(&pdev->dev, "Device struct alloc failed, "
1679                         "aborting.\n");
1680                 err = -ENOMEM;
1681                 goto err_release_regions;
1682         }
1683
1684         dev       = &priv->dev;
1685         dev->pdev = pdev;
1686         INIT_LIST_HEAD(&priv->ctx_list);
1687         spin_lock_init(&priv->ctx_lock);
1688
1689         mutex_init(&priv->port_mutex);
1690
1691         INIT_LIST_HEAD(&priv->pgdir_list);
1692         mutex_init(&priv->pgdir_mutex);
1693
1694         INIT_LIST_HEAD(&priv->bf_list);
1695         mutex_init(&priv->bf_mutex);
1696
1697         dev->rev_id = pdev->revision;
1698         /* Detect if this device is a virtual function */
1699         if (id && id->driver_data & MLX4_VF) {
1700                 /* When acting as pf, we normally skip vfs unless explicitly
1701                  * requested to probe them. */
1702                 if (num_vfs && extended_func_num(pdev) > probe_vf) {
1703                         mlx4_warn(dev, "Skipping virtual function:%d\n",
1704                                                 extended_func_num(pdev));
1705                         err = -ENODEV;
1706                         goto err_free_dev;
1707                 }
1708                 mlx4_warn(dev, "Detected virtual function - running in slave mode\n");
1709                 dev->flags |= MLX4_FLAG_SLAVE;
1710         } else {
1711                 /* We reset the device and enable SRIOV only for physical
1712                  * devices.  Try to claim ownership on the device;
1713                  * if already taken, skip -- do not allow multiple PFs */
1714                 err = mlx4_get_ownership(dev);
1715                 if (err) {
1716                         if (err < 0)
1717                                 goto err_free_dev;
1718                         else {
1719                                 mlx4_warn(dev, "Multiple PFs not yet supported."
1720                                           " Skipping PF.\n");
1721                                 err = -EINVAL;
1722                                 goto err_free_dev;
1723                         }
1724                 }
1725
1726                 if (num_vfs) {
1727                         mlx4_warn(dev, "Enabling sriov with:%d vfs\n", num_vfs);
1728                         err = pci_enable_sriov(pdev, num_vfs);
1729                         if (err) {
1730                                 mlx4_err(dev, "Failed to enable sriov,"
1731                                          "continuing without sriov enabled"
1732                                          " (err = %d).\n", err);
1733                                 num_vfs = 0;
1734                                 err = 0;
1735                         } else {
1736                                 mlx4_warn(dev, "Running in master mode\n");
1737                                 dev->flags |= MLX4_FLAG_SRIOV |
1738                                               MLX4_FLAG_MASTER;
1739                                 dev->num_vfs = num_vfs;
1740                         }
1741                 }
1742
1743                 /*
1744                  * Now reset the HCA before we touch the PCI capabilities or
1745                  * attempt a firmware command, since a boot ROM may have left
1746                  * the HCA in an undefined state.
1747                  */
1748                 err = mlx4_reset(dev);
1749                 if (err) {
1750                         mlx4_err(dev, "Failed to reset HCA, aborting.\n");
1751                         goto err_rel_own;
1752                 }
1753         }
1754
1755 slave_start:
1756         if (mlx4_cmd_init(dev)) {
1757                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
1758                 goto err_sriov;
1759         }
1760
1761         /* In slave functions, the communication channel must be initialized
1762          * before posting commands. Also, init num_slaves before calling
1763          * mlx4_init_hca */
1764         if (mlx4_is_mfunc(dev)) {
1765                 if (mlx4_is_master(dev))
1766                         dev->num_slaves = MLX4_MAX_NUM_SLAVES;
1767                 else {
1768                         dev->num_slaves = 0;
1769                         if (mlx4_multi_func_init(dev)) {
1770                                 mlx4_err(dev, "Failed to init slave mfunc"
1771                                          " interface, aborting.\n");
1772                                 goto err_cmd;
1773                         }
1774                 }
1775         }
1776
1777         err = mlx4_init_hca(dev);
1778         if (err) {
1779                 if (err == -EACCES) {
1780                         /* Not primary Physical function
1781                          * Running in slave mode */
1782                         mlx4_cmd_cleanup(dev);
1783                         dev->flags |= MLX4_FLAG_SLAVE;
1784                         dev->flags &= ~MLX4_FLAG_MASTER;
1785                         goto slave_start;
1786                 } else
1787                         goto err_mfunc;
1788         }
1789
1790         /* In master functions, the communication channel must be initialized
1791          * after obtaining its address from fw */
1792         if (mlx4_is_master(dev)) {
1793                 if (mlx4_multi_func_init(dev)) {
1794                         mlx4_err(dev, "Failed to init master mfunc"
1795                                  "interface, aborting.\n");
1796                         goto err_close;
1797                 }
1798         }
1799
1800         err = mlx4_alloc_eq_table(dev);
1801         if (err)
1802                 goto err_master_mfunc;
1803
1804         priv->msix_ctl.pool_bm = 0;
1805         spin_lock_init(&priv->msix_ctl.pool_lock);
1806
1807         mlx4_enable_msi_x(dev);
1808         if ((mlx4_is_mfunc(dev)) &&
1809             !(dev->flags & MLX4_FLAG_MSI_X)) {
1810                 mlx4_err(dev, "INTx is not supported in multi-function mode."
1811                          " aborting.\n");
1812                 goto err_free_eq;
1813         }
1814
1815         if (!mlx4_is_slave(dev)) {
1816                 err = mlx4_init_steering(dev);
1817                 if (err)
1818                         goto err_free_eq;
1819         }
1820
1821         err = mlx4_setup_hca(dev);
1822         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X) &&
1823             !mlx4_is_mfunc(dev)) {
1824                 dev->flags &= ~MLX4_FLAG_MSI_X;
1825                 pci_disable_msix(pdev);
1826                 err = mlx4_setup_hca(dev);
1827         }
1828
1829         if (err)
1830                 goto err_steer;
1831
1832         for (port = 1; port <= dev->caps.num_ports; port++) {
1833                 err = mlx4_init_port_info(dev, port);
1834                 if (err)
1835                         goto err_port;
1836         }
1837
1838         err = mlx4_register_device(dev);
1839         if (err)
1840                 goto err_port;
1841
1842         mlx4_sense_init(dev);
1843         mlx4_start_sense(dev);
1844
1845         pci_set_drvdata(pdev, dev);
1846
1847         return 0;
1848
1849 err_port:
1850         for (--port; port >= 1; --port)
1851                 mlx4_cleanup_port_info(&priv->port[port]);
1852
1853         mlx4_cleanup_counters_table(dev);
1854         mlx4_cleanup_mcg_table(dev);
1855         mlx4_cleanup_qp_table(dev);
1856         mlx4_cleanup_srq_table(dev);
1857         mlx4_cleanup_cq_table(dev);
1858         mlx4_cmd_use_polling(dev);
1859         mlx4_cleanup_eq_table(dev);
1860         mlx4_cleanup_mr_table(dev);
1861         mlx4_cleanup_xrcd_table(dev);
1862         mlx4_cleanup_pd_table(dev);
1863         mlx4_cleanup_uar_table(dev);
1864
1865 err_steer:
1866         if (!mlx4_is_slave(dev))
1867                 mlx4_clear_steering(dev);
1868
1869 err_free_eq:
1870         mlx4_free_eq_table(dev);
1871
1872 err_master_mfunc:
1873         if (mlx4_is_master(dev))
1874                 mlx4_multi_func_cleanup(dev);
1875
1876 err_close:
1877         if (dev->flags & MLX4_FLAG_MSI_X)
1878                 pci_disable_msix(pdev);
1879
1880         mlx4_close_hca(dev);
1881
1882 err_mfunc:
1883         if (mlx4_is_slave(dev))
1884                 mlx4_multi_func_cleanup(dev);
1885
1886 err_cmd:
1887         mlx4_cmd_cleanup(dev);
1888
1889 err_sriov:
1890         if (num_vfs && (dev->flags & MLX4_FLAG_SRIOV))
1891                 pci_disable_sriov(pdev);
1892
1893 err_rel_own:
1894         if (!mlx4_is_slave(dev))
1895                 mlx4_free_ownership(dev);
1896
1897 err_free_dev:
1898         kfree(priv);
1899
1900 err_release_regions:
1901         pci_release_regions(pdev);
1902
1903 err_disable_pdev:
1904         pci_disable_device(pdev);
1905         pci_set_drvdata(pdev, NULL);
1906         return err;
1907 }
1908
1909 static int __devinit mlx4_init_one(struct pci_dev *pdev,
1910                                    const struct pci_device_id *id)
1911 {
1912         printk_once(KERN_INFO "%s", mlx4_version);
1913
1914         return __mlx4_init_one(pdev, id);
1915 }
1916
1917 static void mlx4_remove_one(struct pci_dev *pdev)
1918 {
1919         struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
1920         struct mlx4_priv *priv = mlx4_priv(dev);
1921         int p;
1922
1923         if (dev) {
1924                 /* in SRIOV it is not allowed to unload the pf's
1925                  * driver while there are alive vf's */
1926                 if (mlx4_is_master(dev)) {
1927                         if (mlx4_how_many_lives_vf(dev))
1928                                 printk(KERN_ERR "Removing PF when there are assigned VF's !!!\n");
1929                 }
1930                 mlx4_stop_sense(dev);
1931                 mlx4_unregister_device(dev);
1932
1933                 for (p = 1; p <= dev->caps.num_ports; p++) {
1934                         mlx4_cleanup_port_info(&priv->port[p]);
1935                         mlx4_CLOSE_PORT(dev, p);
1936                 }
1937
1938                 mlx4_cleanup_counters_table(dev);
1939                 mlx4_cleanup_mcg_table(dev);
1940                 mlx4_cleanup_qp_table(dev);
1941                 mlx4_cleanup_srq_table(dev);
1942                 mlx4_cleanup_cq_table(dev);
1943                 mlx4_cmd_use_polling(dev);
1944                 mlx4_cleanup_eq_table(dev);
1945                 mlx4_cleanup_mr_table(dev);
1946                 mlx4_cleanup_xrcd_table(dev);
1947                 mlx4_cleanup_pd_table(dev);
1948
1949                 if (mlx4_is_master(dev))
1950                         mlx4_free_resource_tracker(dev);
1951
1952                 iounmap(priv->kar);
1953                 mlx4_uar_free(dev, &priv->driver_uar);
1954                 mlx4_cleanup_uar_table(dev);
1955                 if (!mlx4_is_slave(dev))
1956                         mlx4_clear_steering(dev);
1957                 mlx4_free_eq_table(dev);
1958                 if (mlx4_is_master(dev))
1959                         mlx4_multi_func_cleanup(dev);
1960                 mlx4_close_hca(dev);
1961                 if (mlx4_is_slave(dev))
1962                         mlx4_multi_func_cleanup(dev);
1963                 mlx4_cmd_cleanup(dev);
1964
1965                 if (dev->flags & MLX4_FLAG_MSI_X)
1966                         pci_disable_msix(pdev);
1967                 if (num_vfs && (dev->flags & MLX4_FLAG_SRIOV)) {
1968                         mlx4_warn(dev, "Disabling sriov\n");
1969                         pci_disable_sriov(pdev);
1970                 }
1971
1972                 if (!mlx4_is_slave(dev))
1973                         mlx4_free_ownership(dev);
1974                 kfree(priv);
1975                 pci_release_regions(pdev);
1976                 pci_disable_device(pdev);
1977                 pci_set_drvdata(pdev, NULL);
1978         }
1979 }
1980
1981 int mlx4_restart_one(struct pci_dev *pdev)
1982 {
1983         mlx4_remove_one(pdev);
1984         return __mlx4_init_one(pdev, NULL);
1985 }
1986
1987 static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = {
1988         /* MT25408 "Hermon" SDR */
1989         { PCI_VDEVICE(MELLANOX, 0x6340), 0 },
1990         /* MT25408 "Hermon" DDR */
1991         { PCI_VDEVICE(MELLANOX, 0x634a), 0 },
1992         /* MT25408 "Hermon" QDR */
1993         { PCI_VDEVICE(MELLANOX, 0x6354), 0 },
1994         /* MT25408 "Hermon" DDR PCIe gen2 */
1995         { PCI_VDEVICE(MELLANOX, 0x6732), 0 },
1996         /* MT25408 "Hermon" QDR PCIe gen2 */
1997         { PCI_VDEVICE(MELLANOX, 0x673c), 0 },
1998         /* MT25408 "Hermon" EN 10GigE */
1999         { PCI_VDEVICE(MELLANOX, 0x6368), 0 },
2000         /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
2001         { PCI_VDEVICE(MELLANOX, 0x6750), 0 },
2002         /* MT25458 ConnectX EN 10GBASE-T 10GigE */
2003         { PCI_VDEVICE(MELLANOX, 0x6372), 0 },
2004         /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
2005         { PCI_VDEVICE(MELLANOX, 0x675a), 0 },
2006         /* MT26468 ConnectX EN 10GigE PCIe gen2*/
2007         { PCI_VDEVICE(MELLANOX, 0x6764), 0 },
2008         /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */
2009         { PCI_VDEVICE(MELLANOX, 0x6746), 0 },
2010         /* MT26478 ConnectX2 40GigE PCIe gen2 */
2011         { PCI_VDEVICE(MELLANOX, 0x676e), 0 },
2012         /* MT25400 Family [ConnectX-2 Virtual Function] */
2013         { PCI_VDEVICE(MELLANOX, 0x1002), MLX4_VF },
2014         /* MT27500 Family [ConnectX-3] */
2015         { PCI_VDEVICE(MELLANOX, 0x1003), 0 },
2016         /* MT27500 Family [ConnectX-3 Virtual Function] */
2017         { PCI_VDEVICE(MELLANOX, 0x1004), MLX4_VF },
2018         { PCI_VDEVICE(MELLANOX, 0x1005), 0 }, /* MT27510 Family */
2019         { PCI_VDEVICE(MELLANOX, 0x1006), 0 }, /* MT27511 Family */
2020         { PCI_VDEVICE(MELLANOX, 0x1007), 0 }, /* MT27520 Family */
2021         { PCI_VDEVICE(MELLANOX, 0x1008), 0 }, /* MT27521 Family */
2022         { PCI_VDEVICE(MELLANOX, 0x1009), 0 }, /* MT27530 Family */
2023         { PCI_VDEVICE(MELLANOX, 0x100a), 0 }, /* MT27531 Family */
2024         { PCI_VDEVICE(MELLANOX, 0x100b), 0 }, /* MT27540 Family */
2025         { PCI_VDEVICE(MELLANOX, 0x100c), 0 }, /* MT27541 Family */
2026         { PCI_VDEVICE(MELLANOX, 0x100d), 0 }, /* MT27550 Family */
2027         { PCI_VDEVICE(MELLANOX, 0x100e), 0 }, /* MT27551 Family */
2028         { PCI_VDEVICE(MELLANOX, 0x100f), 0 }, /* MT27560 Family */
2029         { PCI_VDEVICE(MELLANOX, 0x1010), 0 }, /* MT27561 Family */
2030         { 0, }
2031 };
2032
2033 MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
2034
2035 static struct pci_driver mlx4_driver = {
2036         .name           = DRV_NAME,
2037         .id_table       = mlx4_pci_table,
2038         .probe          = mlx4_init_one,
2039         .remove         = __devexit_p(mlx4_remove_one)
2040 };
2041
2042 static int __init mlx4_verify_params(void)
2043 {
2044         if ((log_num_mac < 0) || (log_num_mac > 7)) {
2045                 pr_warning("mlx4_core: bad num_mac: %d\n", log_num_mac);
2046                 return -1;
2047         }
2048
2049         if (log_num_vlan != 0)
2050                 pr_warning("mlx4_core: log_num_vlan - obsolete module param, using %d\n",
2051                            MLX4_LOG_NUM_VLANS);
2052
2053         if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) {
2054                 pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg);
2055                 return -1;
2056         }
2057
2058         /* Check if module param for ports type has legal combination */
2059         if (port_type_array[0] == false && port_type_array[1] == true) {
2060                 printk(KERN_WARNING "Module parameter configuration ETH/IB is not supported. Switching to default configuration IB/IB\n");
2061                 port_type_array[0] = true;
2062         }
2063
2064         return 0;
2065 }
2066
2067 static int __init mlx4_init(void)
2068 {
2069         int ret;
2070
2071         if (mlx4_verify_params())
2072                 return -EINVAL;
2073
2074         mlx4_catas_init();
2075
2076         mlx4_wq = create_singlethread_workqueue("mlx4");
2077         if (!mlx4_wq)
2078                 return -ENOMEM;
2079
2080         ret = pci_register_driver(&mlx4_driver);
2081         return ret < 0 ? ret : 0;
2082 }
2083
2084 static void __exit mlx4_cleanup(void)
2085 {
2086         pci_unregister_driver(&mlx4_driver);
2087         destroy_workqueue(mlx4_wq);
2088 }
2089
2090 module_init(mlx4_init);
2091 module_exit(mlx4_cleanup);