2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/init.h>
36 #include <linux/mlx4/cmd.h>
37 #include <linux/mlx4/srq.h>
38 #include <linux/export.h>
39 #include <linux/gfp.h>
44 void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type)
46 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
49 spin_lock(&srq_table->lock);
51 srq = radix_tree_lookup(&srq_table->tree, srqn & (dev->caps.num_srqs - 1));
53 atomic_inc(&srq->refcount);
55 spin_unlock(&srq_table->lock);
58 mlx4_warn(dev, "Async event for bogus SRQ %08x\n", srqn);
62 srq->event(srq, event_type);
64 if (atomic_dec_and_test(&srq->refcount))
68 static int mlx4_SW2HW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
71 return mlx4_cmd(dev, mailbox->dma, srq_num, 0,
72 MLX4_CMD_SW2HW_SRQ, MLX4_CMD_TIME_CLASS_A,
76 static int mlx4_HW2SW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
79 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, srq_num,
80 mailbox ? 0 : 1, MLX4_CMD_HW2SW_SRQ,
81 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
84 static int mlx4_ARM_SRQ(struct mlx4_dev *dev, int srq_num, int limit_watermark)
86 return mlx4_cmd(dev, limit_watermark, srq_num, 0, MLX4_CMD_ARM_SRQ,
87 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
90 static int mlx4_QUERY_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox,
93 return mlx4_cmd_box(dev, 0, mailbox->dma, srq_num, 0, MLX4_CMD_QUERY_SRQ,
94 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
97 int __mlx4_srq_alloc_icm(struct mlx4_dev *dev, int *srqn)
99 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
103 *srqn = mlx4_bitmap_alloc(&srq_table->bitmap);
107 err = mlx4_table_get(dev, &srq_table->table, *srqn);
111 err = mlx4_table_get(dev, &srq_table->cmpt_table, *srqn);
117 mlx4_table_put(dev, &srq_table->table, *srqn);
120 mlx4_bitmap_free(&srq_table->bitmap, *srqn, MLX4_NO_RR);
124 static int mlx4_srq_alloc_icm(struct mlx4_dev *dev, int *srqn)
129 if (mlx4_is_mfunc(dev)) {
130 err = mlx4_cmd_imm(dev, 0, &out_param, RES_SRQ,
131 RES_OP_RESERVE_AND_MAP,
133 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
135 *srqn = get_param_l(&out_param);
139 return __mlx4_srq_alloc_icm(dev, srqn);
142 void __mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn)
144 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
146 mlx4_table_put(dev, &srq_table->cmpt_table, srqn);
147 mlx4_table_put(dev, &srq_table->table, srqn);
148 mlx4_bitmap_free(&srq_table->bitmap, srqn, MLX4_NO_RR);
151 static void mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn)
155 if (mlx4_is_mfunc(dev)) {
156 set_param_l(&in_param, srqn);
157 if (mlx4_cmd(dev, in_param, RES_SRQ, RES_OP_RESERVE_AND_MAP,
159 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED))
160 mlx4_warn(dev, "Failed freeing cq:%d\n", srqn);
163 __mlx4_srq_free_icm(dev, srqn);
166 int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd,
167 struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq)
169 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
170 struct mlx4_cmd_mailbox *mailbox;
171 struct mlx4_srq_context *srq_context;
175 err = mlx4_srq_alloc_icm(dev, &srq->srqn);
179 spin_lock_irq(&srq_table->lock);
180 err = radix_tree_insert(&srq_table->tree, srq->srqn, srq);
181 spin_unlock_irq(&srq_table->lock);
185 mailbox = mlx4_alloc_cmd_mailbox(dev);
186 if (IS_ERR(mailbox)) {
187 err = PTR_ERR(mailbox);
191 srq_context = mailbox->buf;
192 srq_context->state_logsize_srqn = cpu_to_be32((ilog2(srq->max) << 24) |
194 srq_context->logstride = srq->wqe_shift - 4;
195 srq_context->xrcd = cpu_to_be16(xrcd);
196 srq_context->pg_offset_cqn = cpu_to_be32(cqn & 0xffffff);
197 srq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT;
199 mtt_addr = mlx4_mtt_addr(dev, mtt);
200 srq_context->mtt_base_addr_h = mtt_addr >> 32;
201 srq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff);
202 srq_context->pd = cpu_to_be32(pdn);
203 srq_context->db_rec_addr = cpu_to_be64(db_rec);
205 err = mlx4_SW2HW_SRQ(dev, mailbox, srq->srqn);
206 mlx4_free_cmd_mailbox(dev, mailbox);
210 atomic_set(&srq->refcount, 1);
211 init_completion(&srq->free);
216 spin_lock_irq(&srq_table->lock);
217 radix_tree_delete(&srq_table->tree, srq->srqn);
218 spin_unlock_irq(&srq_table->lock);
221 mlx4_srq_free_icm(dev, srq->srqn);
224 EXPORT_SYMBOL_GPL(mlx4_srq_alloc);
226 void mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq)
228 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
231 err = mlx4_HW2SW_SRQ(dev, NULL, srq->srqn);
233 mlx4_warn(dev, "HW2SW_SRQ failed (%d) for SRQN %06x\n", err, srq->srqn);
235 spin_lock_irq(&srq_table->lock);
236 radix_tree_delete(&srq_table->tree, srq->srqn);
237 spin_unlock_irq(&srq_table->lock);
239 if (atomic_dec_and_test(&srq->refcount))
240 complete(&srq->free);
241 wait_for_completion(&srq->free);
243 mlx4_srq_free_icm(dev, srq->srqn);
245 EXPORT_SYMBOL_GPL(mlx4_srq_free);
247 int mlx4_srq_arm(struct mlx4_dev *dev, struct mlx4_srq *srq, int limit_watermark)
249 return mlx4_ARM_SRQ(dev, srq->srqn, limit_watermark);
251 EXPORT_SYMBOL_GPL(mlx4_srq_arm);
253 int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_watermark)
255 struct mlx4_cmd_mailbox *mailbox;
256 struct mlx4_srq_context *srq_context;
259 mailbox = mlx4_alloc_cmd_mailbox(dev);
261 return PTR_ERR(mailbox);
263 srq_context = mailbox->buf;
265 err = mlx4_QUERY_SRQ(dev, mailbox, srq->srqn);
268 *limit_watermark = be16_to_cpu(srq_context->limit_watermark);
271 mlx4_free_cmd_mailbox(dev, mailbox);
274 EXPORT_SYMBOL_GPL(mlx4_srq_query);
276 int mlx4_init_srq_table(struct mlx4_dev *dev)
278 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
281 spin_lock_init(&srq_table->lock);
282 INIT_RADIX_TREE(&srq_table->tree, GFP_ATOMIC);
283 if (mlx4_is_slave(dev))
286 err = mlx4_bitmap_init(&srq_table->bitmap, dev->caps.num_srqs,
287 dev->caps.num_srqs - 1, dev->caps.reserved_srqs, 0);
294 void mlx4_cleanup_srq_table(struct mlx4_dev *dev)
296 if (mlx4_is_slave(dev))
298 mlx4_bitmap_cleanup(&mlx4_priv(dev)->srq_table.bitmap);
301 struct mlx4_srq *mlx4_srq_lookup(struct mlx4_dev *dev, u32 srqn)
303 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table;
304 struct mlx4_srq *srq;
307 spin_lock_irqsave(&srq_table->lock, flags);
308 srq = radix_tree_lookup(&srq_table->tree,
309 srqn & (dev->caps.num_srqs - 1));
310 spin_unlock_irqrestore(&srq_table->lock, flags);
314 EXPORT_SYMBOL_GPL(mlx4_srq_lookup);