drivers/net/ethernet/mellanox/mlx5/core/cmd.c

   1 /*
   2  * Copyright (c) 2013, Mellanox Technologies inc.  All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <asm-generic/kmap_types.h>
  34 #include <linux/module.h>
  35 #include <linux/init.h>
  36 #include <linux/errno.h>
  37 #include <linux/pci.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/slab.h>
  40 #include <linux/delay.h>
  41 #include <linux/random.h>
  42 #include <linux/io-mapping.h>
  43 #include <linux/mlx5/driver.h>
  44 #include <linux/debugfs.h>
  45
  46 #include "mlx5_core.h"
  47
  48 enum {
  49         CMD_IF_REV = 3,
  50 };
  51
  52 enum {
  53         CMD_MODE_POLLING,
  54         CMD_MODE_EVENTS
  55 };
  56
  57 enum {
  58         NUM_LONG_LISTS    = 2,
  59         NUM_MED_LISTS     = 64,
  60         LONG_LIST_SIZE    = (2ULL * 1024 * 1024 * 1024 / PAGE_SIZE) * 8 + 16 +
  61                                 MLX5_CMD_DATA_BLOCK_SIZE,
  62         MED_LIST_SIZE     = 16 + MLX5_CMD_DATA_BLOCK_SIZE,
  63 };
  64
  65 enum {
  66         MLX5_CMD_DELIVERY_STAT_OK                       = 0x0,
  67         MLX5_CMD_DELIVERY_STAT_SIGNAT_ERR               = 0x1,
  68         MLX5_CMD_DELIVERY_STAT_TOK_ERR                  = 0x2,
  69         MLX5_CMD_DELIVERY_STAT_BAD_BLK_NUM_ERR          = 0x3,
  70         MLX5_CMD_DELIVERY_STAT_OUT_PTR_ALIGN_ERR        = 0x4,
  71         MLX5_CMD_DELIVERY_STAT_IN_PTR_ALIGN_ERR         = 0x5,
  72         MLX5_CMD_DELIVERY_STAT_FW_ERR                   = 0x6,
  73         MLX5_CMD_DELIVERY_STAT_IN_LENGTH_ERR            = 0x7,
  74         MLX5_CMD_DELIVERY_STAT_OUT_LENGTH_ERR           = 0x8,
  75         MLX5_CMD_DELIVERY_STAT_RES_FLD_NOT_CLR_ERR      = 0x9,
  76         MLX5_CMD_DELIVERY_STAT_CMD_DESCR_ERR            = 0x10,
  77 };
  78
  79 enum {
  80         MLX5_CMD_STAT_OK                        = 0x0,
  81         MLX5_CMD_STAT_INT_ERR                   = 0x1,
  82         MLX5_CMD_STAT_BAD_OP_ERR                = 0x2,
  83         MLX5_CMD_STAT_BAD_PARAM_ERR             = 0x3,
  84         MLX5_CMD_STAT_BAD_SYS_STATE_ERR         = 0x4,
  85         MLX5_CMD_STAT_BAD_RES_ERR               = 0x5,
  86         MLX5_CMD_STAT_RES_BUSY                  = 0x6,
  87         MLX5_CMD_STAT_LIM_ERR                   = 0x8,
  88         MLX5_CMD_STAT_BAD_RES_STATE_ERR         = 0x9,
  89         MLX5_CMD_STAT_IX_ERR                    = 0xa,
  90         MLX5_CMD_STAT_NO_RES_ERR                = 0xf,
  91         MLX5_CMD_STAT_BAD_INP_LEN_ERR           = 0x50,
  92         MLX5_CMD_STAT_BAD_OUTP_LEN_ERR          = 0x51,
  93         MLX5_CMD_STAT_BAD_QP_STATE_ERR          = 0x10,
  94         MLX5_CMD_STAT_BAD_PKT_ERR               = 0x30,
  95         MLX5_CMD_STAT_BAD_SIZE_OUTS_CQES_ERR    = 0x40,
  96 };
  97
  98 static struct mlx5_cmd_work_ent *alloc_cmd(struct mlx5_cmd *cmd,
  99                                            struct mlx5_cmd_msg *in,
 100                                            struct mlx5_cmd_msg *out,
 101                                            mlx5_cmd_cbk_t cbk,
 102                                            void *context, int page_queue)
 103 {
 104         gfp_t alloc_flags = cbk ? GFP_ATOMIC : GFP_KERNEL;
 105         struct mlx5_cmd_work_ent *ent;
 106
 107         ent = kzalloc(sizeof(*ent), alloc_flags);
 108         if (!ent)
 109                 return ERR_PTR(-ENOMEM);
 110
 111         ent->in         = in;
 112         ent->out        = out;
 113         ent->callback   = cbk;
 114         ent->context    = context;
 115         ent->cmd        = cmd;
 116         ent->page_queue = page_queue;
 117
 118         return ent;
 119 }
 120
 121 static u8 alloc_token(struct mlx5_cmd *cmd)
 122 {
 123         u8 token;
 124
 125         spin_lock(&cmd->token_lock);
 126         token = cmd->token++ % 255 + 1;
 127         spin_unlock(&cmd->token_lock);
 128
 129         return token;
 130 }
 131
 132 static int alloc_ent(struct mlx5_cmd *cmd)
 133 {
 134         unsigned long flags;
 135         int ret;
 136
 137         spin_lock_irqsave(&cmd->alloc_lock, flags);
 138         ret = find_first_bit(&cmd->bitmask, cmd->max_reg_cmds);
 139         if (ret < cmd->max_reg_cmds)
 140                 clear_bit(ret, &cmd->bitmask);
 141         spin_unlock_irqrestore(&cmd->alloc_lock, flags);
 142
 143         return ret < cmd->max_reg_cmds ? ret : -ENOMEM;
 144 }
 145
 146 static void free_ent(struct mlx5_cmd *cmd, int idx)
 147 {
 148         unsigned long flags;
 149
 150         spin_lock_irqsave(&cmd->alloc_lock, flags);
 151         set_bit(idx, &cmd->bitmask);
 152         spin_unlock_irqrestore(&cmd->alloc_lock, flags);
 153 }
 154
 155 static struct mlx5_cmd_layout *get_inst(struct mlx5_cmd *cmd, int idx)
 156 {
 157         return cmd->cmd_buf + (idx << cmd->log_stride);
 158 }
 159
 160 static u8 xor8_buf(void *buf, int len)
 161 {
 162         u8 *ptr = buf;
 163         u8 sum = 0;
 164         int i;
 165
 166         for (i = 0; i < len; i++)
 167                 sum ^= ptr[i];
 168
 169         return sum;
 170 }
 171
 172 static int verify_block_sig(struct mlx5_cmd_prot_block *block)
 173 {
 174         if (xor8_buf(block->rsvd0, sizeof(*block) - sizeof(block->data) - 1) != 0xff)
 175                 return -EINVAL;
 176
 177         if (xor8_buf(block, sizeof(*block)) != 0xff)
 178                 return -EINVAL;
 179
 180         return 0;
 181 }
 182
 183 static void calc_block_sig(struct mlx5_cmd_prot_block *block, u8 token)
 184 {
 185         block->token = token;
 186         block->ctrl_sig = ~xor8_buf(block->rsvd0, sizeof(*block) - sizeof(block->data) - 2);
 187         block->sig = ~xor8_buf(block, sizeof(*block) - 1);
 188 }
 189
 190 static void calc_chain_sig(struct mlx5_cmd_msg *msg, u8 token)
 191 {
 192         struct mlx5_cmd_mailbox *next = msg->next;
 193
 194         while (next) {
 195                 calc_block_sig(next->buf, token);
 196                 next = next->next;
 197         }
 198 }
 199
 200 static void set_signature(struct mlx5_cmd_work_ent *ent)
 201 {
 202         ent->lay->sig = ~xor8_buf(ent->lay, sizeof(*ent->lay));
 203         calc_chain_sig(ent->in, ent->token);
 204         calc_chain_sig(ent->out, ent->token);
 205 }
 206
 207 static void poll_timeout(struct mlx5_cmd_work_ent *ent)
 208 {
 209         unsigned long poll_end = jiffies + msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC + 1000);
 210         u8 own;
 211
 212         do {
 213                 own = ent->lay->status_own;
 214                 if (!(own & CMD_OWNER_HW)) {
 215                         ent->ret = 0;
 216                         return;
 217                 }
 218                 usleep_range(5000, 10000);
 219         } while (time_before(jiffies, poll_end));
 220
 221         ent->ret = -ETIMEDOUT;
 222 }
 223
 224 static void free_cmd(struct mlx5_cmd_work_ent *ent)
 225 {
 226         kfree(ent);
 227 }
 228
 229
 230 static int verify_signature(struct mlx5_cmd_work_ent *ent)
 231 {
 232         struct mlx5_cmd_mailbox *next = ent->out->next;
 233         int err;
 234         u8 sig;
 235
 236         sig = xor8_buf(ent->lay, sizeof(*ent->lay));
 237         if (sig != 0xff)
 238                 return -EINVAL;
 239
 240         while (next) {
 241                 err = verify_block_sig(next->buf);
 242                 if (err)
 243                         return err;
 244
 245                 next = next->next;
 246         }
 247
 248         return 0;
 249 }
 250
 251 static void dump_buf(void *buf, int size, int data_only, int offset)
 252 {
 253         __be32 *p = buf;
 254         int i;
 255
 256         for (i = 0; i < size; i += 16) {
 257                 pr_debug("%03x: %08x %08x %08x %08x\n", offset, be32_to_cpu(p[0]),
 258                          be32_to_cpu(p[1]), be32_to_cpu(p[2]),
 259                          be32_to_cpu(p[3]));
 260                 p += 4;
 261                 offset += 16;
 262         }
 263         if (!data_only)
 264                 pr_debug("\n");
 265 }
 266
 267 const char *mlx5_command_str(int command)
 268 {
 269         switch (command) {
 270         case MLX5_CMD_OP_QUERY_HCA_CAP:
 271                 return "QUERY_HCA_CAP";
 272
 273         case MLX5_CMD_OP_SET_HCA_CAP:
 274                 return "SET_HCA_CAP";
 275
 276         case MLX5_CMD_OP_QUERY_ADAPTER:
 277                 return "QUERY_ADAPTER";
 278
 279         case MLX5_CMD_OP_INIT_HCA:
 280                 return "INIT_HCA";
 281
 282         case MLX5_CMD_OP_TEARDOWN_HCA:
 283                 return "TEARDOWN_HCA";
 284
 285         case MLX5_CMD_OP_QUERY_PAGES:
 286                 return "QUERY_PAGES";
 287
 288         case MLX5_CMD_OP_MANAGE_PAGES:
 289                 return "MANAGE_PAGES";
 290
 291         case MLX5_CMD_OP_CREATE_MKEY:
 292                 return "CREATE_MKEY";
 293
 294         case MLX5_CMD_OP_QUERY_MKEY:
 295                 return "QUERY_MKEY";
 296
 297         case MLX5_CMD_OP_DESTROY_MKEY:
 298                 return "DESTROY_MKEY";
 299
 300         case MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS:
 301                 return "QUERY_SPECIAL_CONTEXTS";
 302
 303         case MLX5_CMD_OP_CREATE_EQ:
 304                 return "CREATE_EQ";
 305
 306         case MLX5_CMD_OP_DESTROY_EQ:
 307                 return "DESTROY_EQ";
 308
 309         case MLX5_CMD_OP_QUERY_EQ:
 310                 return "QUERY_EQ";
 311
 312         case MLX5_CMD_OP_CREATE_CQ:
 313                 return "CREATE_CQ";
 314
 315         case MLX5_CMD_OP_DESTROY_CQ:
 316                 return "DESTROY_CQ";
 317
 318         case MLX5_CMD_OP_QUERY_CQ:
 319                 return "QUERY_CQ";
 320
 321         case MLX5_CMD_OP_MODIFY_CQ:
 322                 return "MODIFY_CQ";
 323
 324         case MLX5_CMD_OP_CREATE_QP:
 325                 return "CREATE_QP";
 326
 327         case MLX5_CMD_OP_DESTROY_QP:
 328                 return "DESTROY_QP";
 329
 330         case MLX5_CMD_OP_RST2INIT_QP:
 331                 return "RST2INIT_QP";
 332
 333         case MLX5_CMD_OP_INIT2RTR_QP:
 334                 return "INIT2RTR_QP";
 335
 336         case MLX5_CMD_OP_RTR2RTS_QP:
 337                 return "RTR2RTS_QP";
 338
 339         case MLX5_CMD_OP_RTS2RTS_QP:
 340                 return "RTS2RTS_QP";
 341
 342         case MLX5_CMD_OP_SQERR2RTS_QP:
 343                 return "SQERR2RTS_QP";
 344
 345         case MLX5_CMD_OP_2ERR_QP:
 346                 return "2ERR_QP";
 347
 348         case MLX5_CMD_OP_RTS2SQD_QP:
 349                 return "RTS2SQD_QP";
 350
 351         case MLX5_CMD_OP_SQD2RTS_QP:
 352                 return "SQD2RTS_QP";
 353
 354         case MLX5_CMD_OP_2RST_QP:
 355                 return "2RST_QP";
 356
 357         case MLX5_CMD_OP_QUERY_QP:
 358                 return "QUERY_QP";
 359
 360         case MLX5_CMD_OP_CONF_SQP:
 361                 return "CONF_SQP";
 362
 363         case MLX5_CMD_OP_MAD_IFC:
 364                 return "MAD_IFC";
 365
 366         case MLX5_CMD_OP_INIT2INIT_QP:
 367                 return "INIT2INIT_QP";
 368
 369         case MLX5_CMD_OP_SUSPEND_QP:
 370                 return "SUSPEND_QP";
 371
 372         case MLX5_CMD_OP_UNSUSPEND_QP:
 373                 return "UNSUSPEND_QP";
 374
 375         case MLX5_CMD_OP_SQD2SQD_QP:
 376                 return "SQD2SQD_QP";
 377
 378         case MLX5_CMD_OP_ALLOC_QP_COUNTER_SET:
 379                 return "ALLOC_QP_COUNTER_SET";
 380
 381         case MLX5_CMD_OP_DEALLOC_QP_COUNTER_SET:
 382                 return "DEALLOC_QP_COUNTER_SET";
 383
 384         case MLX5_CMD_OP_QUERY_QP_COUNTER_SET:
 385                 return "QUERY_QP_COUNTER_SET";
 386
 387         case MLX5_CMD_OP_CREATE_PSV:
 388                 return "CREATE_PSV";
 389
 390         case MLX5_CMD_OP_DESTROY_PSV:
 391                 return "DESTROY_PSV";
 392
 393         case MLX5_CMD_OP_QUERY_PSV:
 394                 return "QUERY_PSV";
 395
 396         case MLX5_CMD_OP_QUERY_SIG_RULE_TABLE:
 397                 return "QUERY_SIG_RULE_TABLE";
 398
 399         case MLX5_CMD_OP_QUERY_BLOCK_SIZE_TABLE:
 400                 return "QUERY_BLOCK_SIZE_TABLE";
 401
 402         case MLX5_CMD_OP_CREATE_SRQ:
 403                 return "CREATE_SRQ";
 404
 405         case MLX5_CMD_OP_DESTROY_SRQ:
 406                 return "DESTROY_SRQ";
 407
 408         case MLX5_CMD_OP_QUERY_SRQ:
 409                 return "QUERY_SRQ";
 410
 411         case MLX5_CMD_OP_ARM_RQ:
 412                 return "ARM_RQ";
 413
 414         case MLX5_CMD_OP_RESIZE_SRQ:
 415                 return "RESIZE_SRQ";
 416
 417         case MLX5_CMD_OP_ALLOC_PD:
 418                 return "ALLOC_PD";
 419
 420         case MLX5_CMD_OP_DEALLOC_PD:
 421                 return "DEALLOC_PD";
 422
 423         case MLX5_CMD_OP_ALLOC_UAR:
 424                 return "ALLOC_UAR";
 425
 426         case MLX5_CMD_OP_DEALLOC_UAR:
 427                 return "DEALLOC_UAR";
 428
 429         case MLX5_CMD_OP_ATTACH_TO_MCG:
 430                 return "ATTACH_TO_MCG";
 431
 432         case MLX5_CMD_OP_DETACH_FROM_MCG:
 433                 return "DETACH_FROM_MCG";
 434
 435         case MLX5_CMD_OP_ALLOC_XRCD:
 436                 return "ALLOC_XRCD";
 437
 438         case MLX5_CMD_OP_DEALLOC_XRCD:
 439                 return "DEALLOC_XRCD";
 440
 441         case MLX5_CMD_OP_ACCESS_REG:
 442                 return "MLX5_CMD_OP_ACCESS_REG";
 443
 444         default: return "unknown command opcode";
 445         }
 446 }
 447
 448 static void dump_command(struct mlx5_core_dev *dev,
 449                          struct mlx5_cmd_work_ent *ent, int input)
 450 {
 451         u16 op = be16_to_cpu(((struct mlx5_inbox_hdr *)(ent->lay->in))->opcode);
 452         struct mlx5_cmd_msg *msg = input ? ent->in : ent->out;
 453         struct mlx5_cmd_mailbox *next = msg->next;
 454         int data_only;
 455         int offset = 0;
 456         int dump_len;
 457
 458         data_only = !!(mlx5_core_debug_mask & (1 << MLX5_CMD_DATA));
 459
 460         if (data_only)
 461                 mlx5_core_dbg_mask(dev, 1 << MLX5_CMD_DATA,
 462                                    "dump command data %s(0x%x) %s\n",
 463                                    mlx5_command_str(op), op,
 464                                    input ? "INPUT" : "OUTPUT");
 465         else
 466                 mlx5_core_dbg(dev, "dump command %s(0x%x) %s\n",
 467                               mlx5_command_str(op), op,
 468                               input ? "INPUT" : "OUTPUT");
 469
 470         if (data_only) {
 471                 if (input) {
 472                         dump_buf(ent->lay->in, sizeof(ent->lay->in), 1, offset);
 473                         offset += sizeof(ent->lay->in);
 474                 } else {
 475                         dump_buf(ent->lay->out, sizeof(ent->lay->out), 1, offset);
 476                         offset += sizeof(ent->lay->out);
 477                 }
 478         } else {
 479                 dump_buf(ent->lay, sizeof(*ent->lay), 0, offset);
 480                 offset += sizeof(*ent->lay);
 481         }
 482
 483         while (next && offset < msg->len) {
 484                 if (data_only) {
 485                         dump_len = min_t(int, MLX5_CMD_DATA_BLOCK_SIZE, msg->len - offset);
 486                         dump_buf(next->buf, dump_len, 1, offset);
 487                         offset += MLX5_CMD_DATA_BLOCK_SIZE;
 488                 } else {
 489                         mlx5_core_dbg(dev, "command block:\n");
 490                         dump_buf(next->buf, sizeof(struct mlx5_cmd_prot_block), 0, offset);
 491                         offset += sizeof(struct mlx5_cmd_prot_block);
 492                 }
 493                 next = next->next;
 494         }
 495
 496         if (data_only)
 497                 pr_debug("\n");
 498 }
 499
 500 static void cmd_work_handler(struct work_struct *work)
 501 {
 502         struct mlx5_cmd_work_ent *ent = container_of(work, struct mlx5_cmd_work_ent, work);
 503         struct mlx5_cmd *cmd = ent->cmd;
 504         struct mlx5_core_dev *dev = container_of(cmd, struct mlx5_core_dev, cmd);
 505         struct mlx5_cmd_layout *lay;
 506         struct semaphore *sem;
 507
 508         sem = ent->page_queue ? &cmd->pages_sem : &cmd->sem;
 509         down(sem);
 510         if (!ent->page_queue) {
 511                 ent->idx = alloc_ent(cmd);
 512                 if (ent->idx < 0) {
 513                         mlx5_core_err(dev, "failed to allocate command entry\n");
 514                         up(sem);
 515                         return;
 516                 }
 517         } else {
 518                 ent->idx = cmd->max_reg_cmds;
 519         }
 520
 521         ent->token = alloc_token(cmd);
 522         cmd->ent_arr[ent->idx] = ent;
 523         lay = get_inst(cmd, ent->idx);
 524         ent->lay = lay;
 525         memset(lay, 0, sizeof(*lay));
 526         memcpy(lay->in, ent->in->first.data, sizeof(lay->in));
 527         if (ent->in->next)
 528                 lay->in_ptr = cpu_to_be64(ent->in->next->dma);
 529         lay->inlen = cpu_to_be32(ent->in->len);
 530         if (ent->out->next)
 531                 lay->out_ptr = cpu_to_be64(ent->out->next->dma);
 532         lay->outlen = cpu_to_be32(ent->out->len);
 533         lay->type = MLX5_PCI_CMD_XPORT;
 534         lay->token = ent->token;
 535         lay->status_own = CMD_OWNER_HW;
 536         if (!cmd->checksum_disabled)
 537                 set_signature(ent);
 538         dump_command(dev, ent, 1);
 539         ktime_get_ts(&ent->ts1);
 540
 541         /* ring doorbell after the descriptor is valid */
 542         wmb();
 543         iowrite32be(1 << ent->idx, &dev->iseg->cmd_dbell);
 544         mlx5_core_dbg(dev, "write 0x%x to command doorbell\n", 1 << ent->idx);
 545         mmiowb();
 546         if (cmd->mode == CMD_MODE_POLLING) {
 547                 poll_timeout(ent);
 548                 /* make sure we read the descriptor after ownership is SW */
 549                 rmb();
 550                 mlx5_cmd_comp_handler(dev, 1UL << ent->idx);
 551         }
 552 }
 553
 554 static const char *deliv_status_to_str(u8 status)
 555 {
 556         switch (status) {
 557         case MLX5_CMD_DELIVERY_STAT_OK:
 558                 return "no errors";
 559         case MLX5_CMD_DELIVERY_STAT_SIGNAT_ERR:
 560                 return "signature error";
 561         case MLX5_CMD_DELIVERY_STAT_TOK_ERR:
 562                 return "token error";
 563         case MLX5_CMD_DELIVERY_STAT_BAD_BLK_NUM_ERR:
 564                 return "bad block number";
 565         case MLX5_CMD_DELIVERY_STAT_OUT_PTR_ALIGN_ERR:
 566                 return "output pointer not aligned to block size";
 567         case MLX5_CMD_DELIVERY_STAT_IN_PTR_ALIGN_ERR:
 568                 return "input pointer not aligned to block size";
 569         case MLX5_CMD_DELIVERY_STAT_FW_ERR:
 570                 return "firmware internal error";
 571         case MLX5_CMD_DELIVERY_STAT_IN_LENGTH_ERR:
 572                 return "command input length error";
 573         case MLX5_CMD_DELIVERY_STAT_OUT_LENGTH_ERR:
 574                 return "command ouput length error";
 575         case MLX5_CMD_DELIVERY_STAT_RES_FLD_NOT_CLR_ERR:
 576                 return "reserved fields not cleared";
 577         case MLX5_CMD_DELIVERY_STAT_CMD_DESCR_ERR:
 578                 return "bad command descriptor type";
 579         default:
 580                 return "unknown status code";
 581         }
 582 }
 583
 584 static u16 msg_to_opcode(struct mlx5_cmd_msg *in)
 585 {
 586         struct mlx5_inbox_hdr *hdr = (struct mlx5_inbox_hdr *)(in->first.data);
 587
 588         return be16_to_cpu(hdr->opcode);
 589 }
 590
 591 static int wait_func(struct mlx5_core_dev *dev, struct mlx5_cmd_work_ent *ent)
 592 {
 593         unsigned long timeout = msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC);
 594         struct mlx5_cmd *cmd = &dev->cmd;
 595         int err;
 596
 597         if (cmd->mode == CMD_MODE_POLLING) {
 598                 wait_for_completion(&ent->done);
 599                 err = ent->ret;
 600         } else {
 601                 if (!wait_for_completion_timeout(&ent->done, timeout))
 602                         err = -ETIMEDOUT;
 603                 else
 604                         err = 0;
 605         }
 606         if (err == -ETIMEDOUT) {
 607                 mlx5_core_warn(dev, "%s(0x%x) timeout. Will cause a leak of a command resource\n",
 608                                mlx5_command_str(msg_to_opcode(ent->in)),
 609                                msg_to_opcode(ent->in));
 610         }
 611         mlx5_core_dbg(dev, "err %d, delivery status %s(%d)\n", err,
 612                       deliv_status_to_str(ent->status), ent->status);
 613
 614         return err;
 615 }
 616
 617 /*  Notes:
 618  *    1. Callback functions may not sleep
 619  *    2. page queue commands do not support asynchrous completion
 620  */
 621 static int mlx5_cmd_invoke(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *in,
 622                            struct mlx5_cmd_msg *out, mlx5_cmd_cbk_t callback,
 623                            void *context, int page_queue, u8 *status)
 624 {
 625         struct mlx5_cmd *cmd = &dev->cmd;
 626         struct mlx5_cmd_work_ent *ent;
 627         ktime_t t1, t2, delta;
 628         struct mlx5_cmd_stats *stats;
 629         int err = 0;
 630         s64 ds;
 631         u16 op;
 632
 633         if (callback && page_queue)
 634                 return -EINVAL;
 635
 636         ent = alloc_cmd(cmd, in, out, callback, context, page_queue);
 637         if (IS_ERR(ent))
 638                 return PTR_ERR(ent);
 639
 640         if (!callback)
 641                 init_completion(&ent->done);
 642
 643         INIT_WORK(&ent->work, cmd_work_handler);
 644         if (page_queue) {
 645                 cmd_work_handler(&ent->work);
 646         } else if (!queue_work(cmd->wq, &ent->work)) {
 647                 mlx5_core_warn(dev, "failed to queue work\n");
 648                 err = -ENOMEM;
 649                 goto out_free;
 650         }
 651
 652         if (!callback) {
 653                 err = wait_func(dev, ent);
 654                 if (err == -ETIMEDOUT)
 655                         goto out;
 656
 657                 t1 = timespec_to_ktime(ent->ts1);
 658                 t2 = timespec_to_ktime(ent->ts2);
 659                 delta = ktime_sub(t2, t1);
 660                 ds = ktime_to_ns(delta);
 661                 op = be16_to_cpu(((struct mlx5_inbox_hdr *)in->first.data)->opcode);
 662                 if (op < ARRAY_SIZE(cmd->stats)) {
 663                         stats = &cmd->stats[op];
 664                         spin_lock(&stats->lock);
 665                         stats->sum += ds;
 666                         ++stats->n;
 667                         spin_unlock(&stats->lock);
 668                 }
 669                 mlx5_core_dbg_mask(dev, 1 << MLX5_CMD_TIME,
 670                                    "fw exec time for %s is %lld nsec\n",
 671                                    mlx5_command_str(op), ds);
 672                 *status = ent->status;
 673                 free_cmd(ent);
 674         }
 675
 676         return err;
 677
 678 out_free:
 679         free_cmd(ent);
 680 out:
 681         return err;
 682 }
 683
 684 static ssize_t dbg_write(struct file *filp, const char __user *buf,
 685                          size_t count, loff_t *pos)
 686 {
 687         struct mlx5_core_dev *dev = filp->private_data;
 688         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
 689         char lbuf[3];
 690         int err;
 691
 692         if (!dbg->in_msg || !dbg->out_msg)
 693                 return -ENOMEM;
 694
 695         if (copy_from_user(lbuf, buf, sizeof(lbuf)))
 696                 return -EPERM;
 697
 698         lbuf[sizeof(lbuf) - 1] = 0;
 699
 700         if (strcmp(lbuf, "go"))
 701                 return -EINVAL;
 702
 703         err = mlx5_cmd_exec(dev, dbg->in_msg, dbg->inlen, dbg->out_msg, dbg->outlen);
 704
 705         return err ? err : count;
 706 }
 707
 708
 709 static const struct file_operations fops = {
 710         .owner  = THIS_MODULE,
 711         .open   = simple_open,
 712         .write  = dbg_write,
 713 };
 714
 715 static int mlx5_copy_to_msg(struct mlx5_cmd_msg *to, void *from, int size)
 716 {
 717         struct mlx5_cmd_prot_block *block;
 718         struct mlx5_cmd_mailbox *next;
 719         int copy;
 720
 721         if (!to || !from)
 722                 return -ENOMEM;
 723
 724         copy = min_t(int, size, sizeof(to->first.data));
 725         memcpy(to->first.data, from, copy);
 726         size -= copy;
 727         from += copy;
 728
 729         next = to->next;
 730         while (size) {
 731                 if (!next) {
 732                         /* this is a BUG */
 733                         return -ENOMEM;
 734                 }
 735
 736                 copy = min_t(int, size, MLX5_CMD_DATA_BLOCK_SIZE);
 737                 block = next->buf;
 738                 memcpy(block->data, from, copy);
 739                 from += copy;
 740                 size -= copy;
 741                 next = next->next;
 742         }
 743
 744         return 0;
 745 }
 746
 747 static int mlx5_copy_from_msg(void *to, struct mlx5_cmd_msg *from, int size)
 748 {
 749         struct mlx5_cmd_prot_block *block;
 750         struct mlx5_cmd_mailbox *next;
 751         int copy;
 752
 753         if (!to || !from)
 754                 return -ENOMEM;
 755
 756         copy = min_t(int, size, sizeof(from->first.data));
 757         memcpy(to, from->first.data, copy);
 758         size -= copy;
 759         to += copy;
 760
 761         next = from->next;
 762         while (size) {
 763                 if (!next) {
 764                         /* this is a BUG */
 765                         return -ENOMEM;
 766                 }
 767
 768                 copy = min_t(int, size, MLX5_CMD_DATA_BLOCK_SIZE);
 769                 block = next->buf;
 770                 if (xor8_buf(block, sizeof(*block)) != 0xff)
 771                         return -EINVAL;
 772
 773                 memcpy(to, block->data, copy);
 774                 to += copy;
 775                 size -= copy;
 776                 next = next->next;
 777         }
 778
 779         return 0;
 780 }
 781
 782 static struct mlx5_cmd_mailbox *alloc_cmd_box(struct mlx5_core_dev *dev,
 783                                               gfp_t flags)
 784 {
 785         struct mlx5_cmd_mailbox *mailbox;
 786
 787         mailbox = kmalloc(sizeof(*mailbox), flags);
 788         if (!mailbox)
 789                 return ERR_PTR(-ENOMEM);
 790
 791         mailbox->buf = pci_pool_alloc(dev->cmd.pool, flags,
 792                                       &mailbox->dma);
 793         if (!mailbox->buf) {
 794                 mlx5_core_dbg(dev, "failed allocation\n");
 795                 kfree(mailbox);
 796                 return ERR_PTR(-ENOMEM);
 797         }
 798         memset(mailbox->buf, 0, sizeof(struct mlx5_cmd_prot_block));
 799         mailbox->next = NULL;
 800
 801         return mailbox;
 802 }
 803
 804 static void free_cmd_box(struct mlx5_core_dev *dev,
 805                          struct mlx5_cmd_mailbox *mailbox)
 806 {
 807         pci_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma);
 808         kfree(mailbox);
 809 }
 810
 811 static struct mlx5_cmd_msg *mlx5_alloc_cmd_msg(struct mlx5_core_dev *dev,
 812                                                gfp_t flags, int size)
 813 {
 814         struct mlx5_cmd_mailbox *tmp, *head = NULL;
 815         struct mlx5_cmd_prot_block *block;
 816         struct mlx5_cmd_msg *msg;
 817         int blen;
 818         int err;
 819         int n;
 820         int i;
 821
 822         msg = kzalloc(sizeof(*msg), GFP_KERNEL);
 823         if (!msg)
 824                 return ERR_PTR(-ENOMEM);
 825
 826         blen = size - min_t(int, sizeof(msg->first.data), size);
 827         n = (blen + MLX5_CMD_DATA_BLOCK_SIZE - 1) / MLX5_CMD_DATA_BLOCK_SIZE;
 828
 829         for (i = 0; i < n; i++) {
 830                 tmp = alloc_cmd_box(dev, flags);
 831                 if (IS_ERR(tmp)) {
 832                         mlx5_core_warn(dev, "failed allocating block\n");
 833                         err = PTR_ERR(tmp);
 834                         goto err_alloc;
 835                 }
 836
 837                 block = tmp->buf;
 838                 tmp->next = head;
 839                 block->next = cpu_to_be64(tmp->next ? tmp->next->dma : 0);
 840                 block->block_num = cpu_to_be32(n - i - 1);
 841                 head = tmp;
 842         }
 843         msg->next = head;
 844         msg->len = size;
 845         return msg;
 846
 847 err_alloc:
 848         while (head) {
 849                 tmp = head->next;
 850                 free_cmd_box(dev, head);
 851                 head = tmp;
 852         }
 853         kfree(msg);
 854
 855         return ERR_PTR(err);
 856 }
 857
 858 static void mlx5_free_cmd_msg(struct mlx5_core_dev *dev,
 859                                   struct mlx5_cmd_msg *msg)
 860 {
 861         struct mlx5_cmd_mailbox *head = msg->next;
 862         struct mlx5_cmd_mailbox *next;
 863
 864         while (head) {
 865                 next = head->next;
 866                 free_cmd_box(dev, head);
 867                 head = next;
 868         }
 869         kfree(msg);
 870 }
 871
 872 static ssize_t data_write(struct file *filp, const char __user *buf,
 873                           size_t count, loff_t *pos)
 874 {
 875         struct mlx5_core_dev *dev = filp->private_data;
 876         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
 877         void *ptr;
 878         int err;
 879
 880         if (*pos != 0)
 881                 return -EINVAL;
 882
 883         kfree(dbg->in_msg);
 884         dbg->in_msg = NULL;
 885         dbg->inlen = 0;
 886
 887         ptr = kzalloc(count, GFP_KERNEL);
 888         if (!ptr)
 889                 return -ENOMEM;
 890
 891         if (copy_from_user(ptr, buf, count)) {
 892                 err = -EPERM;
 893                 goto out;
 894         }
 895         dbg->in_msg = ptr;
 896         dbg->inlen = count;
 897
 898         *pos = count;
 899
 900         return count;
 901
 902 out:
 903         kfree(ptr);
 904         return err;
 905 }
 906
 907 static ssize_t data_read(struct file *filp, char __user *buf, size_t count,
 908                          loff_t *pos)
 909 {
 910         struct mlx5_core_dev *dev = filp->private_data;
 911         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
 912         int copy;
 913
 914         if (*pos)
 915                 return 0;
 916
 917         if (!dbg->out_msg)
 918                 return -ENOMEM;
 919
 920         copy = min_t(int, count, dbg->outlen);
 921         if (copy_to_user(buf, dbg->out_msg, copy))
 922                 return -EPERM;
 923
 924         *pos += copy;
 925
 926         return copy;
 927 }
 928
 929 static const struct file_operations dfops = {
 930         .owner  = THIS_MODULE,
 931         .open   = simple_open,
 932         .write  = data_write,
 933         .read   = data_read,
 934 };
 935
 936 static ssize_t outlen_read(struct file *filp, char __user *buf, size_t count,
 937                            loff_t *pos)
 938 {
 939         struct mlx5_core_dev *dev = filp->private_data;
 940         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
 941         char outlen[8];
 942         int err;
 943
 944         if (*pos)
 945                 return 0;
 946
 947         err = snprintf(outlen, sizeof(outlen), "%d", dbg->outlen);
 948         if (err < 0)
 949                 return err;
 950
 951         if (copy_to_user(buf, &outlen, err))
 952                 return -EPERM;
 953
 954         *pos += err;
 955
 956         return err;
 957 }
 958
 959 static ssize_t outlen_write(struct file *filp, const char __user *buf,
 960                             size_t count, loff_t *pos)
 961 {
 962         struct mlx5_core_dev *dev = filp->private_data;
 963         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
 964         char outlen_str[8];
 965         int outlen;
 966         void *ptr;
 967         int err;
 968
 969         if (*pos != 0 || count > 6)
 970                 return -EINVAL;
 971
 972         kfree(dbg->out_msg);
 973         dbg->out_msg = NULL;
 974         dbg->outlen = 0;
 975
 976         if (copy_from_user(outlen_str, buf, count))
 977                 return -EPERM;
 978
 979         outlen_str[7] = 0;
 980
 981         err = sscanf(outlen_str, "%d", &outlen);
 982         if (err < 0)
 983                 return err;
 984
 985         ptr = kzalloc(outlen, GFP_KERNEL);
 986         if (!ptr)
 987                 return -ENOMEM;
 988
 989         dbg->out_msg = ptr;
 990         dbg->outlen = outlen;
 991
 992         *pos = count;
 993
 994         return count;
 995 }
 996
 997 static const struct file_operations olfops = {
 998         .owner  = THIS_MODULE,
 999         .open   = simple_open,
1000         .write  = outlen_write,
1001         .read   = outlen_read,
1002 };
1003
1004 static void set_wqname(struct mlx5_core_dev *dev)
1005 {
1006         struct mlx5_cmd *cmd = &dev->cmd;
1007
1008         snprintf(cmd->wq_name, sizeof(cmd->wq_name), "mlx5_cmd_%s",
1009                  dev_name(&dev->pdev->dev));
1010 }
1011
1012 static void clean_debug_files(struct mlx5_core_dev *dev)
1013 {
1014         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
1015
1016         if (!mlx5_debugfs_root)
1017                 return;
1018
1019         mlx5_cmdif_debugfs_cleanup(dev);
1020         debugfs_remove_recursive(dbg->dbg_root);
1021 }
1022
1023 static int create_debugfs_files(struct mlx5_core_dev *dev)
1024 {
1025         struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
1026         int err = -ENOMEM;
1027
1028         if (!mlx5_debugfs_root)
1029                 return 0;
1030
1031         dbg->dbg_root = debugfs_create_dir("cmd", dev->priv.dbg_root);
1032         if (!dbg->dbg_root)
1033                 return err;
1034
1035         dbg->dbg_in = debugfs_create_file("in", 0400, dbg->dbg_root,
1036                                           dev, &dfops);
1037         if (!dbg->dbg_in)
1038                 goto err_dbg;
1039
1040         dbg->dbg_out = debugfs_create_file("out", 0200, dbg->dbg_root,
1041                                            dev, &dfops);
1042         if (!dbg->dbg_out)
1043                 goto err_dbg;
1044
1045         dbg->dbg_outlen = debugfs_create_file("out_len", 0600, dbg->dbg_root,
1046                                               dev, &olfops);
1047         if (!dbg->dbg_outlen)
1048                 goto err_dbg;
1049
1050         dbg->dbg_status = debugfs_create_u8("status", 0600, dbg->dbg_root,
1051                                             &dbg->status);
1052         if (!dbg->dbg_status)
1053                 goto err_dbg;
1054
1055         dbg->dbg_run = debugfs_create_file("run", 0200, dbg->dbg_root, dev, &fops);
1056         if (!dbg->dbg_run)
1057                 goto err_dbg;
1058
1059         mlx5_cmdif_debugfs_init(dev);
1060
1061         return 0;
1062
1063 err_dbg:
1064         clean_debug_files(dev);
1065         return err;
1066 }
1067
1068 void mlx5_cmd_use_events(struct mlx5_core_dev *dev)
1069 {
1070         struct mlx5_cmd *cmd = &dev->cmd;
1071         int i;
1072
1073         for (i = 0; i < cmd->max_reg_cmds; i++)
1074                 down(&cmd->sem);
1075
1076         down(&cmd->pages_sem);
1077
1078         flush_workqueue(cmd->wq);
1079
1080         cmd->mode = CMD_MODE_EVENTS;
1081
1082         up(&cmd->pages_sem);
1083         for (i = 0; i < cmd->max_reg_cmds; i++)
1084                 up(&cmd->sem);
1085 }
1086
1087 void mlx5_cmd_use_polling(struct mlx5_core_dev *dev)
1088 {
1089         struct mlx5_cmd *cmd = &dev->cmd;
1090         int i;
1091
1092         for (i = 0; i < cmd->max_reg_cmds; i++)
1093                 down(&cmd->sem);
1094
1095         down(&cmd->pages_sem);
1096
1097         flush_workqueue(cmd->wq);
1098         cmd->mode = CMD_MODE_POLLING;
1099
1100         up(&cmd->pages_sem);
1101         for (i = 0; i < cmd->max_reg_cmds; i++)
1102                 up(&cmd->sem);
1103 }
1104
1105 void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, unsigned long vector)
1106 {
1107         struct mlx5_cmd *cmd = &dev->cmd;
1108         struct mlx5_cmd_work_ent *ent;
1109         mlx5_cmd_cbk_t callback;
1110         void *context;
1111         int err;
1112         int i;
1113
1114         for (i = 0; i < (1 << cmd->log_sz); i++) {
1115                 if (test_bit(i, &vector)) {
1116                         ent = cmd->ent_arr[i];
1117                         ktime_get_ts(&ent->ts2);
1118                         memcpy(ent->out->first.data, ent->lay->out, sizeof(ent->lay->out));
1119                         dump_command(dev, ent, 0);
1120                         if (!ent->ret) {
1121                                 if (!cmd->checksum_disabled)
1122                                         ent->ret = verify_signature(ent);
1123                                 else
1124                                         ent->ret = 0;
1125                                 ent->status = ent->lay->status_own >> 1;
1126                                 mlx5_core_dbg(dev, "command completed. ret 0x%x, delivery status %s(0x%x)\n",
1127                                               ent->ret, deliv_status_to_str(ent->status), ent->status);
1128                         }
1129                         free_ent(cmd, ent->idx);
1130                         if (ent->callback) {
1131                                 callback = ent->callback;
1132                                 context = ent->context;
1133                                 err = ent->ret;
1134                                 free_cmd(ent);
1135                                 callback(err, context);
1136                         } else {
1137                                 complete(&ent->done);
1138                         }
1139                         if (ent->page_queue)
1140                                 up(&cmd->pages_sem);
1141                         else
1142                                 up(&cmd->sem);
1143                 }
1144         }
1145 }
1146 EXPORT_SYMBOL(mlx5_cmd_comp_handler);
1147
1148 static int status_to_err(u8 status)
1149 {
1150         return status ? -1 : 0; /* TBD more meaningful codes */
1151 }
1152
1153 static struct mlx5_cmd_msg *alloc_msg(struct mlx5_core_dev *dev, int in_size)
1154 {
1155         struct mlx5_cmd_msg *msg = ERR_PTR(-ENOMEM);
1156         struct mlx5_cmd *cmd = &dev->cmd;
1157         struct cache_ent *ent = NULL;
1158
1159         if (in_size > MED_LIST_SIZE && in_size <= LONG_LIST_SIZE)
1160                 ent = &cmd->cache.large;
1161         else if (in_size > 16 && in_size <= MED_LIST_SIZE)
1162                 ent = &cmd->cache.med;
1163
1164         if (ent) {
1165                 spin_lock(&ent->lock);
1166                 if (!list_empty(&ent->head)) {
1167                         msg = list_entry(ent->head.next, typeof(*msg), list);
1168                         /* For cached lists, we must explicitly state what is
1169                          * the real size
1170                          */
1171                         msg->len = in_size;
1172                         list_del(&msg->list);
1173                 }
1174                 spin_unlock(&ent->lock);
1175         }
1176
1177         if (IS_ERR(msg))
1178                 msg = mlx5_alloc_cmd_msg(dev, GFP_KERNEL, in_size);
1179
1180         return msg;
1181 }
1182
1183 static void free_msg(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *msg)
1184 {
1185         if (msg->cache) {
1186                 spin_lock(&msg->cache->lock);
1187                 list_add_tail(&msg->list, &msg->cache->head);
1188                 spin_unlock(&msg->cache->lock);
1189         } else {
1190                 mlx5_free_cmd_msg(dev, msg);
1191         }
1192 }
1193
1194 static int is_manage_pages(struct mlx5_inbox_hdr *in)
1195 {
1196         return be16_to_cpu(in->opcode) == MLX5_CMD_OP_MANAGE_PAGES;
1197 }
1198
1199 int mlx5_cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
1200                   int out_size)
1201 {
1202         struct mlx5_cmd_msg *inb;
1203         struct mlx5_cmd_msg *outb;
1204         int pages_queue;
1205         int err;
1206         u8 status = 0;
1207
1208         pages_queue = is_manage_pages(in);
1209
1210         inb = alloc_msg(dev, in_size);
1211         if (IS_ERR(inb)) {
1212                 err = PTR_ERR(inb);
1213                 return err;
1214         }
1215
1216         err = mlx5_copy_to_msg(inb, in, in_size);
1217         if (err) {
1218                 mlx5_core_warn(dev, "err %d\n", err);
1219                 goto out_in;
1220         }
1221
1222         outb = mlx5_alloc_cmd_msg(dev, GFP_KERNEL, out_size);
1223         if (IS_ERR(outb)) {
1224                 err = PTR_ERR(outb);
1225                 goto out_in;
1226         }
1227
1228         err = mlx5_cmd_invoke(dev, inb, outb, NULL, NULL, pages_queue, &status);
1229         if (err)
1230                 goto out_out;
1231
1232         mlx5_core_dbg(dev, "err %d, status %d\n", err, status);
1233         if (status) {
1234                 err = status_to_err(status);
1235                 goto out_out;
1236         }
1237
1238         err = mlx5_copy_from_msg(out, outb, out_size);
1239
1240 out_out:
1241         mlx5_free_cmd_msg(dev, outb);
1242
1243 out_in:
1244         free_msg(dev, inb);
1245         return err;
1246 }
1247 EXPORT_SYMBOL(mlx5_cmd_exec);
1248
1249 static void destroy_msg_cache(struct mlx5_core_dev *dev)
1250 {
1251         struct mlx5_cmd *cmd = &dev->cmd;
1252         struct mlx5_cmd_msg *msg;
1253         struct mlx5_cmd_msg *n;
1254
1255         list_for_each_entry_safe(msg, n, &cmd->cache.large.head, list) {
1256                 list_del(&msg->list);
1257                 mlx5_free_cmd_msg(dev, msg);
1258         }
1259
1260         list_for_each_entry_safe(msg, n, &cmd->cache.med.head, list) {
1261                 list_del(&msg->list);
1262                 mlx5_free_cmd_msg(dev, msg);
1263         }
1264 }
1265
1266 static int create_msg_cache(struct mlx5_core_dev *dev)
1267 {
1268         struct mlx5_cmd *cmd = &dev->cmd;
1269         struct mlx5_cmd_msg *msg;
1270         int err;
1271         int i;
1272
1273         spin_lock_init(&cmd->cache.large.lock);
1274         INIT_LIST_HEAD(&cmd->cache.large.head);
1275         spin_lock_init(&cmd->cache.med.lock);
1276         INIT_LIST_HEAD(&cmd->cache.med.head);
1277
1278         for (i = 0; i < NUM_LONG_LISTS; i++) {
1279                 msg = mlx5_alloc_cmd_msg(dev, GFP_KERNEL, LONG_LIST_SIZE);
1280                 if (IS_ERR(msg)) {
1281                         err = PTR_ERR(msg);
1282                         goto ex_err;
1283                 }
1284                 msg->cache = &cmd->cache.large;
1285                 list_add_tail(&msg->list, &cmd->cache.large.head);
1286         }
1287
1288         for (i = 0; i < NUM_MED_LISTS; i++) {
1289                 msg = mlx5_alloc_cmd_msg(dev, GFP_KERNEL, MED_LIST_SIZE);
1290                 if (IS_ERR(msg)) {
1291                         err = PTR_ERR(msg);
1292                         goto ex_err;
1293                 }
1294                 msg->cache = &cmd->cache.med;
1295                 list_add_tail(&msg->list, &cmd->cache.med.head);
1296         }
1297
1298         return 0;
1299
1300 ex_err:
1301         destroy_msg_cache(dev);
1302         return err;
1303 }
1304
1305 int mlx5_cmd_init(struct mlx5_core_dev *dev)
1306 {
1307         int size = sizeof(struct mlx5_cmd_prot_block);
1308         int align = roundup_pow_of_two(size);
1309         struct mlx5_cmd *cmd = &dev->cmd;
1310         u32 cmd_h, cmd_l;
1311         u16 cmd_if_rev;
1312         int err;
1313         int i;
1314
1315         cmd_if_rev = cmdif_rev(dev);
1316         if (cmd_if_rev != CMD_IF_REV) {
1317                 dev_err(&dev->pdev->dev,
1318                         "Driver cmdif rev(%d) differs from firmware's(%d)\n",
1319                         CMD_IF_REV, cmd_if_rev);
1320                 return -EINVAL;
1321         }
1322
1323         cmd->pool = pci_pool_create("mlx5_cmd", dev->pdev, size, align, 0);
1324         if (!cmd->pool)
1325                 return -ENOMEM;
1326
1327         cmd->cmd_buf = (void *)__get_free_pages(GFP_ATOMIC, 0);
1328         if (!cmd->cmd_buf) {
1329                 err = -ENOMEM;
1330                 goto err_free_pool;
1331         }
1332         cmd->dma = dma_map_single(&dev->pdev->dev, cmd->cmd_buf, PAGE_SIZE,
1333                                   DMA_BIDIRECTIONAL);
1334         if (dma_mapping_error(&dev->pdev->dev, cmd->dma)) {
1335                 err = -ENOMEM;
1336                 goto err_free;
1337         }
1338
1339         cmd_l = ioread32be(&dev->iseg->cmdq_addr_l_sz) & 0xff;
1340         cmd->log_sz = cmd_l >> 4 & 0xf;
1341         cmd->log_stride = cmd_l & 0xf;
1342         if (1 << cmd->log_sz > MLX5_MAX_COMMANDS) {
1343                 dev_err(&dev->pdev->dev, "firmware reports too many outstanding commands %d\n",
1344                         1 << cmd->log_sz);
1345                 err = -EINVAL;
1346                 goto err_map;
1347         }
1348
1349         if (cmd->log_sz + cmd->log_stride > PAGE_SHIFT) {
1350                 dev_err(&dev->pdev->dev, "command queue size overflow\n");
1351                 err = -EINVAL;
1352                 goto err_map;
1353         }
1354
1355         cmd->max_reg_cmds = (1 << cmd->log_sz) - 1;
1356         cmd->bitmask = (1 << cmd->max_reg_cmds) - 1;
1357
1358         cmd->cmdif_rev = ioread32be(&dev->iseg->cmdif_rev_fw_sub) >> 16;
1359         if (cmd->cmdif_rev > CMD_IF_REV) {
1360                 dev_err(&dev->pdev->dev, "driver does not support command interface version. driver %d, firmware %d\n",
1361                         CMD_IF_REV, cmd->cmdif_rev);
1362                 err = -ENOTSUPP;
1363                 goto err_map;
1364         }
1365
1366         spin_lock_init(&cmd->alloc_lock);
1367         spin_lock_init(&cmd->token_lock);
1368         for (i = 0; i < ARRAY_SIZE(cmd->stats); i++)
1369                 spin_lock_init(&cmd->stats[i].lock);
1370
1371         sema_init(&cmd->sem, cmd->max_reg_cmds);
1372         sema_init(&cmd->pages_sem, 1);
1373
1374         cmd_h = (u32)((u64)(cmd->dma) >> 32);
1375         cmd_l = (u32)(cmd->dma);
1376         if (cmd_l & 0xfff) {
1377                 dev_err(&dev->pdev->dev, "invalid command queue address\n");
1378                 err = -ENOMEM;
1379                 goto err_map;
1380         }
1381
1382         iowrite32be(cmd_h, &dev->iseg->cmdq_addr_h);
1383         iowrite32be(cmd_l, &dev->iseg->cmdq_addr_l_sz);
1384
1385         /* Make sure firmware sees the complete address before we proceed */
1386         wmb();
1387
1388         mlx5_core_dbg(dev, "descriptor at dma 0x%llx\n", (unsigned long long)(cmd->dma));
1389
1390         cmd->mode = CMD_MODE_POLLING;
1391
1392         err = create_msg_cache(dev);
1393         if (err) {
1394                 dev_err(&dev->pdev->dev, "failed to create command cache\n");
1395                 goto err_map;
1396         }
1397
1398         set_wqname(dev);
1399         cmd->wq = create_singlethread_workqueue(cmd->wq_name);
1400         if (!cmd->wq) {
1401                 dev_err(&dev->pdev->dev, "failed to create command workqueue\n");
1402                 err = -ENOMEM;
1403                 goto err_cache;
1404         }
1405
1406         err = create_debugfs_files(dev);
1407         if (err) {
1408                 err = -ENOMEM;
1409                 goto err_wq;
1410         }
1411
1412         return 0;
1413
1414 err_wq:
1415         destroy_workqueue(cmd->wq);
1416
1417 err_cache:
1418         destroy_msg_cache(dev);
1419
1420 err_map:
1421         dma_unmap_single(&dev->pdev->dev, cmd->dma, PAGE_SIZE,
1422                          DMA_BIDIRECTIONAL);
1423 err_free:
1424         free_pages((unsigned long)cmd->cmd_buf, 0);
1425
1426 err_free_pool:
1427         pci_pool_destroy(cmd->pool);
1428
1429         return err;
1430 }
1431 EXPORT_SYMBOL(mlx5_cmd_init);
1432
1433 void mlx5_cmd_cleanup(struct mlx5_core_dev *dev)
1434 {
1435         struct mlx5_cmd *cmd = &dev->cmd;
1436
1437         clean_debug_files(dev);
1438         destroy_workqueue(cmd->wq);
1439         destroy_msg_cache(dev);
1440         dma_unmap_single(&dev->pdev->dev, cmd->dma, PAGE_SIZE,
1441                          DMA_BIDIRECTIONAL);
1442         free_pages((unsigned long)cmd->cmd_buf, 0);
1443         pci_pool_destroy(cmd->pool);
1444 }
1445 EXPORT_SYMBOL(mlx5_cmd_cleanup);
1446
1447 static const char *cmd_status_str(u8 status)
1448 {
1449         switch (status) {
1450         case MLX5_CMD_STAT_OK:
1451                 return "OK";
1452         case MLX5_CMD_STAT_INT_ERR:
1453                 return "internal error";
1454         case MLX5_CMD_STAT_BAD_OP_ERR:
1455                 return "bad operation";
1456         case MLX5_CMD_STAT_BAD_PARAM_ERR:
1457                 return "bad parameter";
1458         case MLX5_CMD_STAT_BAD_SYS_STATE_ERR:
1459                 return "bad system state";
1460         case MLX5_CMD_STAT_BAD_RES_ERR:
1461                 return "bad resource";
1462         case MLX5_CMD_STAT_RES_BUSY:
1463                 return "resource busy";
1464         case MLX5_CMD_STAT_LIM_ERR:
1465                 return "limits exceeded";
1466         case MLX5_CMD_STAT_BAD_RES_STATE_ERR:
1467                 return "bad resource state";
1468         case MLX5_CMD_STAT_IX_ERR:
1469                 return "bad index";
1470         case MLX5_CMD_STAT_NO_RES_ERR:
1471                 return "no resources";
1472         case MLX5_CMD_STAT_BAD_INP_LEN_ERR:
1473                 return "bad input length";
1474         case MLX5_CMD_STAT_BAD_OUTP_LEN_ERR:
1475                 return "bad output length";
1476         case MLX5_CMD_STAT_BAD_QP_STATE_ERR:
1477                 return "bad QP state";
1478         case MLX5_CMD_STAT_BAD_PKT_ERR:
1479                 return "bad packet (discarded)";
1480         case MLX5_CMD_STAT_BAD_SIZE_OUTS_CQES_ERR:
1481                 return "bad size too many outstanding CQEs";
1482         default:
1483                 return "unknown status";
1484         }
1485 }
1486
1487 int mlx5_cmd_status_to_err(struct mlx5_outbox_hdr *hdr)
1488 {
1489         if (!hdr->status)
1490                 return 0;
1491
1492         pr_warn("command failed, status %s(0x%x), syndrome 0x%x\n",
1493                 cmd_status_str(hdr->status), hdr->status,
1494                 be32_to_cpu(hdr->syndrome));
1495
1496         switch (hdr->status) {
1497         case MLX5_CMD_STAT_OK:                          return 0;
1498         case MLX5_CMD_STAT_INT_ERR:                     return -EIO;
1499         case MLX5_CMD_STAT_BAD_OP_ERR:                  return -EINVAL;
1500         case MLX5_CMD_STAT_BAD_PARAM_ERR:               return -EINVAL;
1501         case MLX5_CMD_STAT_BAD_SYS_STATE_ERR:           return -EIO;
1502         case MLX5_CMD_STAT_BAD_RES_ERR:                 return -EINVAL;
1503         case MLX5_CMD_STAT_RES_BUSY:                    return -EBUSY;
1504         case MLX5_CMD_STAT_LIM_ERR:                     return -EINVAL;
1505         case MLX5_CMD_STAT_BAD_RES_STATE_ERR:           return -EINVAL;
1506         case MLX5_CMD_STAT_IX_ERR:                      return -EINVAL;
1507         case MLX5_CMD_STAT_NO_RES_ERR:                  return -EAGAIN;
1508         case MLX5_CMD_STAT_BAD_INP_LEN_ERR:             return -EIO;
1509         case MLX5_CMD_STAT_BAD_OUTP_LEN_ERR:            return -EIO;
1510         case MLX5_CMD_STAT_BAD_QP_STATE_ERR:            return -EINVAL;
1511         case MLX5_CMD_STAT_BAD_PKT_ERR:                 return -EINVAL;
1512         case MLX5_CMD_STAT_BAD_SIZE_OUTS_CQES_ERR:      return -EINVAL;
1513         default:                                        return -EIO;
1514         }
1515 }