net/mlx5e: CQE based moderation
[cascardo/linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_ethtool.c
1 /*
2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include "en.h"
34
35 static void mlx5e_get_drvinfo(struct net_device *dev,
36                               struct ethtool_drvinfo *drvinfo)
37 {
38         struct mlx5e_priv *priv = netdev_priv(dev);
39         struct mlx5_core_dev *mdev = priv->mdev;
40
41         strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
42         strlcpy(drvinfo->version, DRIVER_VERSION " (" DRIVER_RELDATE ")",
43                 sizeof(drvinfo->version));
44         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
45                  "%d.%d.%d",
46                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev));
47         strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
48                 sizeof(drvinfo->bus_info));
49 }
50
51 static const struct {
52         u32 supported;
53         u32 advertised;
54         u32 speed;
55 } ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER] = {
56         [MLX5E_1000BASE_CX_SGMII] = {
57                 .supported  = SUPPORTED_1000baseKX_Full,
58                 .advertised = ADVERTISED_1000baseKX_Full,
59                 .speed      = 1000,
60         },
61         [MLX5E_1000BASE_KX] = {
62                 .supported  = SUPPORTED_1000baseKX_Full,
63                 .advertised = ADVERTISED_1000baseKX_Full,
64                 .speed      = 1000,
65         },
66         [MLX5E_10GBASE_CX4] = {
67                 .supported  = SUPPORTED_10000baseKX4_Full,
68                 .advertised = ADVERTISED_10000baseKX4_Full,
69                 .speed      = 10000,
70         },
71         [MLX5E_10GBASE_KX4] = {
72                 .supported  = SUPPORTED_10000baseKX4_Full,
73                 .advertised = ADVERTISED_10000baseKX4_Full,
74                 .speed      = 10000,
75         },
76         [MLX5E_10GBASE_KR] = {
77                 .supported  = SUPPORTED_10000baseKR_Full,
78                 .advertised = ADVERTISED_10000baseKR_Full,
79                 .speed      = 10000,
80         },
81         [MLX5E_20GBASE_KR2] = {
82                 .supported  = SUPPORTED_20000baseKR2_Full,
83                 .advertised = ADVERTISED_20000baseKR2_Full,
84                 .speed      = 20000,
85         },
86         [MLX5E_40GBASE_CR4] = {
87                 .supported  = SUPPORTED_40000baseCR4_Full,
88                 .advertised = ADVERTISED_40000baseCR4_Full,
89                 .speed      = 40000,
90         },
91         [MLX5E_40GBASE_KR4] = {
92                 .supported  = SUPPORTED_40000baseKR4_Full,
93                 .advertised = ADVERTISED_40000baseKR4_Full,
94                 .speed      = 40000,
95         },
96         [MLX5E_56GBASE_R4] = {
97                 .supported  = SUPPORTED_56000baseKR4_Full,
98                 .advertised = ADVERTISED_56000baseKR4_Full,
99                 .speed      = 56000,
100         },
101         [MLX5E_10GBASE_CR] = {
102                 .supported  = SUPPORTED_10000baseKR_Full,
103                 .advertised = ADVERTISED_10000baseKR_Full,
104                 .speed      = 10000,
105         },
106         [MLX5E_10GBASE_SR] = {
107                 .supported  = SUPPORTED_10000baseKR_Full,
108                 .advertised = ADVERTISED_10000baseKR_Full,
109                 .speed      = 10000,
110         },
111         [MLX5E_10GBASE_ER] = {
112                 .supported  = SUPPORTED_10000baseKR_Full,
113                 .advertised = ADVERTISED_10000baseKR_Full,
114                 .speed      = 10000,
115         },
116         [MLX5E_40GBASE_SR4] = {
117                 .supported  = SUPPORTED_40000baseSR4_Full,
118                 .advertised = ADVERTISED_40000baseSR4_Full,
119                 .speed      = 40000,
120         },
121         [MLX5E_40GBASE_LR4] = {
122                 .supported  = SUPPORTED_40000baseLR4_Full,
123                 .advertised = ADVERTISED_40000baseLR4_Full,
124                 .speed      = 40000,
125         },
126         [MLX5E_100GBASE_CR4] = {
127                 .speed      = 100000,
128         },
129         [MLX5E_100GBASE_SR4] = {
130                 .speed      = 100000,
131         },
132         [MLX5E_100GBASE_KR4] = {
133                 .speed      = 100000,
134         },
135         [MLX5E_100GBASE_LR4] = {
136                 .speed      = 100000,
137         },
138         [MLX5E_100BASE_TX]   = {
139                 .speed      = 100,
140         },
141         [MLX5E_1000BASE_T]    = {
142                 .supported  = SUPPORTED_1000baseT_Full,
143                 .advertised = ADVERTISED_1000baseT_Full,
144                 .speed      = 1000,
145         },
146         [MLX5E_10GBASE_T]    = {
147                 .supported  = SUPPORTED_10000baseT_Full,
148                 .advertised = ADVERTISED_10000baseT_Full,
149                 .speed      = 1000,
150         },
151         [MLX5E_25GBASE_CR]   = {
152                 .speed      = 25000,
153         },
154         [MLX5E_25GBASE_KR]   = {
155                 .speed      = 25000,
156         },
157         [MLX5E_25GBASE_SR]   = {
158                 .speed      = 25000,
159         },
160         [MLX5E_50GBASE_CR2]  = {
161                 .speed      = 50000,
162         },
163         [MLX5E_50GBASE_KR2]  = {
164                 .speed      = 50000,
165         },
166 };
167
168 static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv)
169 {
170         struct mlx5_core_dev *mdev = priv->mdev;
171         u8 pfc_en_tx;
172         u8 pfc_en_rx;
173         int err;
174
175         err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx);
176
177         return err ? 0 : pfc_en_tx | pfc_en_rx;
178 }
179
180 #define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter))
181 #define MLX5E_NUM_RQ_STATS(priv) \
182         (NUM_RQ_STATS * priv->params.num_channels * \
183          test_bit(MLX5E_STATE_OPENED, &priv->state))
184 #define MLX5E_NUM_SQ_STATS(priv) \
185         (NUM_SQ_STATS * priv->params.num_channels * priv->params.num_tc * \
186          test_bit(MLX5E_STATE_OPENED, &priv->state))
187 #define MLX5E_NUM_PFC_COUNTERS(priv) hweight8(mlx5e_query_pfc_combined(priv))
188
189 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
190 {
191         struct mlx5e_priv *priv = netdev_priv(dev);
192
193         switch (sset) {
194         case ETH_SS_STATS:
195                 return NUM_SW_COUNTERS +
196                        MLX5E_NUM_Q_CNTRS(priv) +
197                        NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS +
198                        MLX5E_NUM_RQ_STATS(priv) +
199                        MLX5E_NUM_SQ_STATS(priv) +
200                        MLX5E_NUM_PFC_COUNTERS(priv);
201         case ETH_SS_PRIV_FLAGS:
202                 return ARRAY_SIZE(mlx5e_priv_flags);
203         /* fallthrough */
204         default:
205                 return -EOPNOTSUPP;
206         }
207 }
208
209 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
210 {
211         int i, j, tc, prio, idx = 0;
212         unsigned long pfc_combined;
213
214         /* SW counters */
215         for (i = 0; i < NUM_SW_COUNTERS; i++)
216                 strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].name);
217
218         /* Q counters */
219         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
220                 strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].name);
221
222         /* VPORT counters */
223         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
224                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
225                        vport_stats_desc[i].name);
226
227         /* PPORT counters */
228         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
229                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
230                        pport_802_3_stats_desc[i].name);
231
232         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
233                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
234                        pport_2863_stats_desc[i].name);
235
236         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
237                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
238                        pport_2819_stats_desc[i].name);
239
240         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
241                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
242                         sprintf(data + (idx++) * ETH_GSTRING_LEN, "prio%d_%s",
243                                 prio,
244                                 pport_per_prio_traffic_stats_desc[i].name);
245         }
246
247         pfc_combined = mlx5e_query_pfc_combined(priv);
248         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
249                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
250                         sprintf(data + (idx++) * ETH_GSTRING_LEN, "prio%d_%s",
251                                 prio, pport_per_prio_pfc_stats_desc[i].name);
252                 }
253         }
254
255         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
256                 return;
257
258         /* per channel counters */
259         for (i = 0; i < priv->params.num_channels; i++)
260                 for (j = 0; j < NUM_RQ_STATS; j++)
261                         sprintf(data + (idx++) * ETH_GSTRING_LEN, "rx%d_%s", i,
262                                 rq_stats_desc[j].name);
263
264         for (tc = 0; tc < priv->params.num_tc; tc++)
265                 for (i = 0; i < priv->params.num_channels; i++)
266                         for (j = 0; j < NUM_SQ_STATS; j++)
267                                 sprintf(data + (idx++) * ETH_GSTRING_LEN,
268                                         "tx%d_%s",
269                                         priv->channeltc_to_txq_map[i][tc],
270                                         sq_stats_desc[j].name);
271 }
272
273 static void mlx5e_get_strings(struct net_device *dev,
274                               uint32_t stringset, uint8_t *data)
275 {
276         struct mlx5e_priv *priv = netdev_priv(dev);
277         int i;
278
279         switch (stringset) {
280         case ETH_SS_PRIV_FLAGS:
281                 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
282                         strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
283                 break;
284
285         case ETH_SS_TEST:
286                 break;
287
288         case ETH_SS_STATS:
289                 mlx5e_fill_stats_strings(priv, data);
290                 break;
291         }
292 }
293
294 static void mlx5e_get_ethtool_stats(struct net_device *dev,
295                                     struct ethtool_stats *stats, u64 *data)
296 {
297         struct mlx5e_priv *priv = netdev_priv(dev);
298         int i, j, tc, prio, idx = 0;
299         unsigned long pfc_combined;
300
301         if (!data)
302                 return;
303
304         mutex_lock(&priv->state_lock);
305         if (test_bit(MLX5E_STATE_OPENED, &priv->state))
306                 mlx5e_update_stats(priv);
307         mutex_unlock(&priv->state_lock);
308
309         for (i = 0; i < NUM_SW_COUNTERS; i++)
310                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw,
311                                                    sw_stats_desc, i);
312
313         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
314                 data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
315                                                    q_stats_desc, i);
316
317         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
318                 data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out,
319                                                   vport_stats_desc, i);
320
321         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
322                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters,
323                                                   pport_802_3_stats_desc, i);
324
325         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
326                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters,
327                                                   pport_2863_stats_desc, i);
328
329         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
330                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters,
331                                                   pport_2819_stats_desc, i);
332
333         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
334                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
335                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
336                                                  pport_per_prio_traffic_stats_desc, i);
337         }
338
339         pfc_combined = mlx5e_query_pfc_combined(priv);
340         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
341                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
342                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
343                                                           pport_per_prio_pfc_stats_desc, i);
344                 }
345         }
346
347         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
348                 return;
349
350         /* per channel counters */
351         for (i = 0; i < priv->params.num_channels; i++)
352                 for (j = 0; j < NUM_RQ_STATS; j++)
353                         data[idx++] =
354                                MLX5E_READ_CTR64_CPU(&priv->channel[i]->rq.stats,
355                                                     rq_stats_desc, j);
356
357         for (tc = 0; tc < priv->params.num_tc; tc++)
358                 for (i = 0; i < priv->params.num_channels; i++)
359                         for (j = 0; j < NUM_SQ_STATS; j++)
360                                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->channel[i]->sq[tc].stats,
361                                                                    sq_stats_desc, j);
362 }
363
364 static void mlx5e_get_ringparam(struct net_device *dev,
365                                 struct ethtool_ringparam *param)
366 {
367         struct mlx5e_priv *priv = netdev_priv(dev);
368         int rq_wq_type = priv->params.rq_wq_type;
369
370         param->rx_max_pending = 1 << mlx5_max_log_rq_size(rq_wq_type);
371         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
372         param->rx_pending     = 1 << priv->params.log_rq_size;
373         param->tx_pending     = 1 << priv->params.log_sq_size;
374 }
375
376 static int mlx5e_set_ringparam(struct net_device *dev,
377                                struct ethtool_ringparam *param)
378 {
379         struct mlx5e_priv *priv = netdev_priv(dev);
380         bool was_opened;
381         int rq_wq_type = priv->params.rq_wq_type;
382         u16 min_rx_wqes;
383         u8 log_rq_size;
384         u8 log_sq_size;
385         int err = 0;
386
387         if (param->rx_jumbo_pending) {
388                 netdev_info(dev, "%s: rx_jumbo_pending not supported\n",
389                             __func__);
390                 return -EINVAL;
391         }
392         if (param->rx_mini_pending) {
393                 netdev_info(dev, "%s: rx_mini_pending not supported\n",
394                             __func__);
395                 return -EINVAL;
396         }
397         if (param->rx_pending < (1 << mlx5_min_log_rq_size(rq_wq_type))) {
398                 netdev_info(dev, "%s: rx_pending (%d) < min (%d)\n",
399                             __func__, param->rx_pending,
400                             1 << mlx5_min_log_rq_size(rq_wq_type));
401                 return -EINVAL;
402         }
403         if (param->rx_pending > (1 << mlx5_max_log_rq_size(rq_wq_type))) {
404                 netdev_info(dev, "%s: rx_pending (%d) > max (%d)\n",
405                             __func__, param->rx_pending,
406                             1 << mlx5_max_log_rq_size(rq_wq_type));
407                 return -EINVAL;
408         }
409         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
410                 netdev_info(dev, "%s: tx_pending (%d) < min (%d)\n",
411                             __func__, param->tx_pending,
412                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
413                 return -EINVAL;
414         }
415         if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
416                 netdev_info(dev, "%s: tx_pending (%d) > max (%d)\n",
417                             __func__, param->tx_pending,
418                             1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
419                 return -EINVAL;
420         }
421
422         log_rq_size = order_base_2(param->rx_pending);
423         log_sq_size = order_base_2(param->tx_pending);
424         min_rx_wqes = mlx5_min_rx_wqes(rq_wq_type, param->rx_pending);
425
426         if (log_rq_size == priv->params.log_rq_size &&
427             log_sq_size == priv->params.log_sq_size &&
428             min_rx_wqes == priv->params.min_rx_wqes)
429                 return 0;
430
431         mutex_lock(&priv->state_lock);
432
433         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
434         if (was_opened)
435                 mlx5e_close_locked(dev);
436
437         priv->params.log_rq_size = log_rq_size;
438         priv->params.log_sq_size = log_sq_size;
439         priv->params.min_rx_wqes = min_rx_wqes;
440
441         if (was_opened)
442                 err = mlx5e_open_locked(dev);
443
444         mutex_unlock(&priv->state_lock);
445
446         return err;
447 }
448
449 static void mlx5e_get_channels(struct net_device *dev,
450                                struct ethtool_channels *ch)
451 {
452         struct mlx5e_priv *priv = netdev_priv(dev);
453
454         ch->max_combined   = mlx5e_get_max_num_channels(priv->mdev);
455         ch->combined_count = priv->params.num_channels;
456 }
457
458 static int mlx5e_set_channels(struct net_device *dev,
459                               struct ethtool_channels *ch)
460 {
461         struct mlx5e_priv *priv = netdev_priv(dev);
462         int ncv = mlx5e_get_max_num_channels(priv->mdev);
463         unsigned int count = ch->combined_count;
464         bool arfs_enabled;
465         bool was_opened;
466         int err = 0;
467
468         if (!count) {
469                 netdev_info(dev, "%s: combined_count=0 not supported\n",
470                             __func__);
471                 return -EINVAL;
472         }
473         if (ch->rx_count || ch->tx_count) {
474                 netdev_info(dev, "%s: separate rx/tx count not supported\n",
475                             __func__);
476                 return -EINVAL;
477         }
478         if (count > ncv) {
479                 netdev_info(dev, "%s: count (%d) > max (%d)\n",
480                             __func__, count, ncv);
481                 return -EINVAL;
482         }
483
484         if (priv->params.num_channels == count)
485                 return 0;
486
487         mutex_lock(&priv->state_lock);
488
489         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
490         if (was_opened)
491                 mlx5e_close_locked(dev);
492
493         arfs_enabled = dev->features & NETIF_F_NTUPLE;
494         if (arfs_enabled)
495                 mlx5e_arfs_disable(priv);
496
497         priv->params.num_channels = count;
498         mlx5e_build_default_indir_rqt(priv->mdev, priv->params.indirection_rqt,
499                                       MLX5E_INDIR_RQT_SIZE, count);
500
501         if (was_opened)
502                 err = mlx5e_open_locked(dev);
503         if (err)
504                 goto out;
505
506         if (arfs_enabled) {
507                 err = mlx5e_arfs_enable(priv);
508                 if (err)
509                         netdev_err(dev, "%s: mlx5e_arfs_enable failed: %d\n",
510                                    __func__, err);
511         }
512
513 out:
514         mutex_unlock(&priv->state_lock);
515
516         return err;
517 }
518
519 static int mlx5e_get_coalesce(struct net_device *netdev,
520                               struct ethtool_coalesce *coal)
521 {
522         struct mlx5e_priv *priv = netdev_priv(netdev);
523
524         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
525                 return -ENOTSUPP;
526
527         coal->rx_coalesce_usecs       = priv->params.rx_cq_moderation.usec;
528         coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation.pkts;
529         coal->tx_coalesce_usecs       = priv->params.tx_cq_moderation.usec;
530         coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation.pkts;
531
532         return 0;
533 }
534
535 static int mlx5e_set_coalesce(struct net_device *netdev,
536                               struct ethtool_coalesce *coal)
537 {
538         struct mlx5e_priv *priv    = netdev_priv(netdev);
539         struct mlx5_core_dev *mdev = priv->mdev;
540         struct mlx5e_channel *c;
541         int tc;
542         int i;
543
544         if (!MLX5_CAP_GEN(mdev, cq_moderation))
545                 return -ENOTSUPP;
546
547         mutex_lock(&priv->state_lock);
548
549         priv->params.tx_cq_moderation.usec = coal->tx_coalesce_usecs;
550         priv->params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
551         priv->params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
552         priv->params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
553
554         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
555                 goto out;
556
557         for (i = 0; i < priv->params.num_channels; ++i) {
558                 c = priv->channel[i];
559
560                 for (tc = 0; tc < c->num_tc; tc++) {
561                         mlx5_core_modify_cq_moderation(mdev,
562                                                 &c->sq[tc].cq.mcq,
563                                                 coal->tx_coalesce_usecs,
564                                                 coal->tx_max_coalesced_frames);
565                 }
566
567                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
568                                                coal->rx_coalesce_usecs,
569                                                coal->rx_max_coalesced_frames);
570         }
571
572 out:
573         mutex_unlock(&priv->state_lock);
574         return 0;
575 }
576
577 static u32 ptys2ethtool_supported_link(u32 eth_proto_cap)
578 {
579         int i;
580         u32 supported_modes = 0;
581
582         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
583                 if (eth_proto_cap & MLX5E_PROT_MASK(i))
584                         supported_modes |= ptys2ethtool_table[i].supported;
585         }
586         return supported_modes;
587 }
588
589 static u32 ptys2ethtool_adver_link(u32 eth_proto_cap)
590 {
591         int i;
592         u32 advertising_modes = 0;
593
594         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
595                 if (eth_proto_cap & MLX5E_PROT_MASK(i))
596                         advertising_modes |= ptys2ethtool_table[i].advertised;
597         }
598         return advertising_modes;
599 }
600
601 static u32 ptys2ethtool_supported_port(u32 eth_proto_cap)
602 {
603         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
604                            | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
605                            | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
606                            | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
607                            | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
608                            | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
609                 return SUPPORTED_FIBRE;
610         }
611
612         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
613                            | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
614                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
615                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
616                            | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
617                 return SUPPORTED_Backplane;
618         }
619         return 0;
620 }
621
622 int mlx5e_get_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
623 {
624         u32 max_speed = 0;
625         u32 proto_cap;
626         int err;
627         int i;
628
629         err = mlx5_query_port_proto_cap(mdev, &proto_cap, MLX5_PTYS_EN);
630         if (err)
631                 return err;
632
633         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i)
634                 if (proto_cap & MLX5E_PROT_MASK(i))
635                         max_speed = max(max_speed, ptys2ethtool_table[i].speed);
636
637         *speed = max_speed;
638         return 0;
639 }
640
641 static void get_speed_duplex(struct net_device *netdev,
642                              u32 eth_proto_oper,
643                              struct ethtool_cmd *cmd)
644 {
645         int i;
646         u32 speed = SPEED_UNKNOWN;
647         u8 duplex = DUPLEX_UNKNOWN;
648
649         if (!netif_carrier_ok(netdev))
650                 goto out;
651
652         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
653                 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
654                         speed = ptys2ethtool_table[i].speed;
655                         duplex = DUPLEX_FULL;
656                         break;
657                 }
658         }
659 out:
660         ethtool_cmd_speed_set(cmd, speed);
661         cmd->duplex = duplex;
662 }
663
664 static void get_supported(u32 eth_proto_cap, u32 *supported)
665 {
666         *supported |= ptys2ethtool_supported_port(eth_proto_cap);
667         *supported |= ptys2ethtool_supported_link(eth_proto_cap);
668         *supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
669 }
670
671 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
672                             u8 rx_pause, u32 *advertising)
673 {
674         *advertising |= ptys2ethtool_adver_link(eth_proto_cap);
675         *advertising |= tx_pause ? ADVERTISED_Pause : 0;
676         *advertising |= (tx_pause ^ rx_pause) ? ADVERTISED_Asym_Pause : 0;
677 }
678
679 static u8 get_connector_port(u32 eth_proto)
680 {
681         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
682                          | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
683                          | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
684                          | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
685                         return PORT_FIBRE;
686         }
687
688         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
689                          | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
690                          | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
691                         return PORT_DA;
692         }
693
694         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
695                          | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
696                          | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
697                          | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
698                         return PORT_NONE;
699         }
700
701         return PORT_OTHER;
702 }
703
704 static void get_lp_advertising(u32 eth_proto_lp, u32 *lp_advertising)
705 {
706         *lp_advertising = ptys2ethtool_adver_link(eth_proto_lp);
707 }
708
709 static int mlx5e_get_settings(struct net_device *netdev,
710                               struct ethtool_cmd *cmd)
711 {
712         struct mlx5e_priv *priv    = netdev_priv(netdev);
713         struct mlx5_core_dev *mdev = priv->mdev;
714         u32 out[MLX5_ST_SZ_DW(ptys_reg)];
715         u32 eth_proto_cap;
716         u32 eth_proto_admin;
717         u32 eth_proto_lp;
718         u32 eth_proto_oper;
719         int err;
720
721         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
722
723         if (err) {
724                 netdev_err(netdev, "%s: query port ptys failed: %d\n",
725                            __func__, err);
726                 goto err_query_ptys;
727         }
728
729         eth_proto_cap   = MLX5_GET(ptys_reg, out, eth_proto_capability);
730         eth_proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);
731         eth_proto_oper  = MLX5_GET(ptys_reg, out, eth_proto_oper);
732         eth_proto_lp    = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
733
734         cmd->supported   = 0;
735         cmd->advertising = 0;
736
737         get_supported(eth_proto_cap, &cmd->supported);
738         get_advertising(eth_proto_admin, 0, 0, &cmd->advertising);
739         get_speed_duplex(netdev, eth_proto_oper, cmd);
740
741         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
742
743         cmd->port = get_connector_port(eth_proto_oper);
744         get_lp_advertising(eth_proto_lp, &cmd->lp_advertising);
745
746         cmd->transceiver = XCVR_INTERNAL;
747
748 err_query_ptys:
749         return err;
750 }
751
752 static u32 mlx5e_ethtool2ptys_adver_link(u32 link_modes)
753 {
754         u32 i, ptys_modes = 0;
755
756         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
757                 if (ptys2ethtool_table[i].advertised & link_modes)
758                         ptys_modes |= MLX5E_PROT_MASK(i);
759         }
760
761         return ptys_modes;
762 }
763
764 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
765 {
766         u32 i, speed_links = 0;
767
768         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
769                 if (ptys2ethtool_table[i].speed == speed)
770                         speed_links |= MLX5E_PROT_MASK(i);
771         }
772
773         return speed_links;
774 }
775
776 static int mlx5e_set_settings(struct net_device *netdev,
777                               struct ethtool_cmd *cmd)
778 {
779         struct mlx5e_priv *priv    = netdev_priv(netdev);
780         struct mlx5_core_dev *mdev = priv->mdev;
781         u32 link_modes;
782         u32 speed;
783         u32 eth_proto_cap, eth_proto_admin;
784         enum mlx5_port_status ps;
785         int err;
786
787         speed = ethtool_cmd_speed(cmd);
788
789         link_modes = cmd->autoneg == AUTONEG_ENABLE ?
790                 mlx5e_ethtool2ptys_adver_link(cmd->advertising) :
791                 mlx5e_ethtool2ptys_speed_link(speed);
792
793         err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
794         if (err) {
795                 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
796                            __func__, err);
797                 goto out;
798         }
799
800         link_modes = link_modes & eth_proto_cap;
801         if (!link_modes) {
802                 netdev_err(netdev, "%s: Not supported link mode(s) requested",
803                            __func__);
804                 err = -EINVAL;
805                 goto out;
806         }
807
808         err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
809         if (err) {
810                 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
811                            __func__, err);
812                 goto out;
813         }
814
815         if (link_modes == eth_proto_admin)
816                 goto out;
817
818         mlx5_query_port_admin_status(mdev, &ps);
819         if (ps == MLX5_PORT_UP)
820                 mlx5_set_port_admin_status(mdev, MLX5_PORT_DOWN);
821         mlx5_set_port_proto(mdev, link_modes, MLX5_PTYS_EN);
822         if (ps == MLX5_PORT_UP)
823                 mlx5_set_port_admin_status(mdev, MLX5_PORT_UP);
824
825 out:
826         return err;
827 }
828
829 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
830 {
831         struct mlx5e_priv *priv = netdev_priv(netdev);
832
833         return sizeof(priv->params.toeplitz_hash_key);
834 }
835
836 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
837 {
838         return MLX5E_INDIR_RQT_SIZE;
839 }
840
841 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
842                           u8 *hfunc)
843 {
844         struct mlx5e_priv *priv = netdev_priv(netdev);
845
846         if (indir)
847                 memcpy(indir, priv->params.indirection_rqt,
848                        sizeof(priv->params.indirection_rqt));
849
850         if (key)
851                 memcpy(key, priv->params.toeplitz_hash_key,
852                        sizeof(priv->params.toeplitz_hash_key));
853
854         if (hfunc)
855                 *hfunc = priv->params.rss_hfunc;
856
857         return 0;
858 }
859
860 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
861 {
862         struct mlx5_core_dev *mdev = priv->mdev;
863         void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
864         int i;
865
866         MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
867         mlx5e_build_tir_ctx_hash(tirc, priv);
868
869         for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++)
870                 mlx5_core_modify_tir(mdev, priv->indir_tirn[i], in, inlen);
871 }
872
873 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
874                           const u8 *key, const u8 hfunc)
875 {
876         struct mlx5e_priv *priv = netdev_priv(dev);
877         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
878         void *in;
879
880         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
881             (hfunc != ETH_RSS_HASH_XOR) &&
882             (hfunc != ETH_RSS_HASH_TOP))
883                 return -EINVAL;
884
885         in = mlx5_vzalloc(inlen);
886         if (!in)
887                 return -ENOMEM;
888
889         mutex_lock(&priv->state_lock);
890
891         if (indir) {
892                 u32 rqtn = priv->indir_rqtn;
893
894                 memcpy(priv->params.indirection_rqt, indir,
895                        sizeof(priv->params.indirection_rqt));
896                 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, 0);
897         }
898
899         if (key)
900                 memcpy(priv->params.toeplitz_hash_key, key,
901                        sizeof(priv->params.toeplitz_hash_key));
902
903         if (hfunc != ETH_RSS_HASH_NO_CHANGE)
904                 priv->params.rss_hfunc = hfunc;
905
906         mlx5e_modify_tirs_hash(priv, in, inlen);
907
908         mutex_unlock(&priv->state_lock);
909
910         kvfree(in);
911
912         return 0;
913 }
914
915 static int mlx5e_get_rxnfc(struct net_device *netdev,
916                            struct ethtool_rxnfc *info, u32 *rule_locs)
917 {
918         struct mlx5e_priv *priv = netdev_priv(netdev);
919         int err = 0;
920
921         switch (info->cmd) {
922         case ETHTOOL_GRXRINGS:
923                 info->data = priv->params.num_channels;
924                 break;
925         default:
926                 err = -EOPNOTSUPP;
927                 break;
928         }
929
930         return err;
931 }
932
933 static int mlx5e_get_tunable(struct net_device *dev,
934                              const struct ethtool_tunable *tuna,
935                              void *data)
936 {
937         const struct mlx5e_priv *priv = netdev_priv(dev);
938         int err = 0;
939
940         switch (tuna->id) {
941         case ETHTOOL_TX_COPYBREAK:
942                 *(u32 *)data = priv->params.tx_max_inline;
943                 break;
944         default:
945                 err = -EINVAL;
946                 break;
947         }
948
949         return err;
950 }
951
952 static int mlx5e_set_tunable(struct net_device *dev,
953                              const struct ethtool_tunable *tuna,
954                              const void *data)
955 {
956         struct mlx5e_priv *priv = netdev_priv(dev);
957         struct mlx5_core_dev *mdev = priv->mdev;
958         bool was_opened;
959         u32 val;
960         int err = 0;
961
962         switch (tuna->id) {
963         case ETHTOOL_TX_COPYBREAK:
964                 val = *(u32 *)data;
965                 if (val > mlx5e_get_max_inline_cap(mdev)) {
966                         err = -EINVAL;
967                         break;
968                 }
969
970                 mutex_lock(&priv->state_lock);
971
972                 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
973                 if (was_opened)
974                         mlx5e_close_locked(dev);
975
976                 priv->params.tx_max_inline = val;
977
978                 if (was_opened)
979                         err = mlx5e_open_locked(dev);
980
981                 mutex_unlock(&priv->state_lock);
982                 break;
983         default:
984                 err = -EINVAL;
985                 break;
986         }
987
988         return err;
989 }
990
991 static void mlx5e_get_pauseparam(struct net_device *netdev,
992                                  struct ethtool_pauseparam *pauseparam)
993 {
994         struct mlx5e_priv *priv    = netdev_priv(netdev);
995         struct mlx5_core_dev *mdev = priv->mdev;
996         int err;
997
998         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
999                                     &pauseparam->tx_pause);
1000         if (err) {
1001                 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1002                            __func__, err);
1003         }
1004 }
1005
1006 static int mlx5e_set_pauseparam(struct net_device *netdev,
1007                                 struct ethtool_pauseparam *pauseparam)
1008 {
1009         struct mlx5e_priv *priv    = netdev_priv(netdev);
1010         struct mlx5_core_dev *mdev = priv->mdev;
1011         int err;
1012
1013         if (pauseparam->autoneg)
1014                 return -EINVAL;
1015
1016         err = mlx5_set_port_pause(mdev,
1017                                   pauseparam->rx_pause ? 1 : 0,
1018                                   pauseparam->tx_pause ? 1 : 0);
1019         if (err) {
1020                 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1021                            __func__, err);
1022         }
1023
1024         return err;
1025 }
1026
1027 static int mlx5e_get_ts_info(struct net_device *dev,
1028                              struct ethtool_ts_info *info)
1029 {
1030         struct mlx5e_priv *priv = netdev_priv(dev);
1031         int ret;
1032
1033         ret = ethtool_op_get_ts_info(dev, info);
1034         if (ret)
1035                 return ret;
1036
1037         info->phc_index = priv->tstamp.ptp ?
1038                           ptp_clock_index(priv->tstamp.ptp) : -1;
1039
1040         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
1041                 return 0;
1042
1043         info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
1044                                  SOF_TIMESTAMPING_RX_HARDWARE |
1045                                  SOF_TIMESTAMPING_RAW_HARDWARE;
1046
1047         info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) |
1048                          (BIT(1) << HWTSTAMP_TX_ON);
1049
1050         info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) |
1051                            (BIT(1) << HWTSTAMP_FILTER_ALL);
1052
1053         return 0;
1054 }
1055
1056 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1057 {
1058         __u32 ret = 0;
1059
1060         if (MLX5_CAP_GEN(mdev, wol_g))
1061                 ret |= WAKE_MAGIC;
1062
1063         if (MLX5_CAP_GEN(mdev, wol_s))
1064                 ret |= WAKE_MAGICSECURE;
1065
1066         if (MLX5_CAP_GEN(mdev, wol_a))
1067                 ret |= WAKE_ARP;
1068
1069         if (MLX5_CAP_GEN(mdev, wol_b))
1070                 ret |= WAKE_BCAST;
1071
1072         if (MLX5_CAP_GEN(mdev, wol_m))
1073                 ret |= WAKE_MCAST;
1074
1075         if (MLX5_CAP_GEN(mdev, wol_u))
1076                 ret |= WAKE_UCAST;
1077
1078         if (MLX5_CAP_GEN(mdev, wol_p))
1079                 ret |= WAKE_PHY;
1080
1081         return ret;
1082 }
1083
1084 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1085 {
1086         __u32 ret = 0;
1087
1088         if (mode & MLX5_WOL_MAGIC)
1089                 ret |= WAKE_MAGIC;
1090
1091         if (mode & MLX5_WOL_SECURED_MAGIC)
1092                 ret |= WAKE_MAGICSECURE;
1093
1094         if (mode & MLX5_WOL_ARP)
1095                 ret |= WAKE_ARP;
1096
1097         if (mode & MLX5_WOL_BROADCAST)
1098                 ret |= WAKE_BCAST;
1099
1100         if (mode & MLX5_WOL_MULTICAST)
1101                 ret |= WAKE_MCAST;
1102
1103         if (mode & MLX5_WOL_UNICAST)
1104                 ret |= WAKE_UCAST;
1105
1106         if (mode & MLX5_WOL_PHY_ACTIVITY)
1107                 ret |= WAKE_PHY;
1108
1109         return ret;
1110 }
1111
1112 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1113 {
1114         u8 ret = 0;
1115
1116         if (mode & WAKE_MAGIC)
1117                 ret |= MLX5_WOL_MAGIC;
1118
1119         if (mode & WAKE_MAGICSECURE)
1120                 ret |= MLX5_WOL_SECURED_MAGIC;
1121
1122         if (mode & WAKE_ARP)
1123                 ret |= MLX5_WOL_ARP;
1124
1125         if (mode & WAKE_BCAST)
1126                 ret |= MLX5_WOL_BROADCAST;
1127
1128         if (mode & WAKE_MCAST)
1129                 ret |= MLX5_WOL_MULTICAST;
1130
1131         if (mode & WAKE_UCAST)
1132                 ret |= MLX5_WOL_UNICAST;
1133
1134         if (mode & WAKE_PHY)
1135                 ret |= MLX5_WOL_PHY_ACTIVITY;
1136
1137         return ret;
1138 }
1139
1140 static void mlx5e_get_wol(struct net_device *netdev,
1141                           struct ethtool_wolinfo *wol)
1142 {
1143         struct mlx5e_priv *priv = netdev_priv(netdev);
1144         struct mlx5_core_dev *mdev = priv->mdev;
1145         u8 mlx5_wol_mode;
1146         int err;
1147
1148         memset(wol, 0, sizeof(*wol));
1149
1150         wol->supported = mlx5e_get_wol_supported(mdev);
1151         if (!wol->supported)
1152                 return;
1153
1154         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1155         if (err)
1156                 return;
1157
1158         wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1159 }
1160
1161 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1162 {
1163         struct mlx5e_priv *priv = netdev_priv(netdev);
1164         struct mlx5_core_dev *mdev = priv->mdev;
1165         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1166         u32 mlx5_wol_mode;
1167
1168         if (!wol_supported)
1169                 return -ENOTSUPP;
1170
1171         if (wol->wolopts & ~wol_supported)
1172                 return -EINVAL;
1173
1174         mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1175
1176         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1177 }
1178
1179 static int mlx5e_set_phys_id(struct net_device *dev,
1180                              enum ethtool_phys_id_state state)
1181 {
1182         struct mlx5e_priv *priv = netdev_priv(dev);
1183         struct mlx5_core_dev *mdev = priv->mdev;
1184         u16 beacon_duration;
1185
1186         if (!MLX5_CAP_GEN(mdev, beacon_led))
1187                 return -EOPNOTSUPP;
1188
1189         switch (state) {
1190         case ETHTOOL_ID_ACTIVE:
1191                 beacon_duration = MLX5_BEACON_DURATION_INF;
1192                 break;
1193         case ETHTOOL_ID_INACTIVE:
1194                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1195                 break;
1196         default:
1197                 return -EOPNOTSUPP;
1198         }
1199
1200         return mlx5_set_port_beacon(mdev, beacon_duration);
1201 }
1202
1203 static int mlx5e_get_module_info(struct net_device *netdev,
1204                                  struct ethtool_modinfo *modinfo)
1205 {
1206         struct mlx5e_priv *priv = netdev_priv(netdev);
1207         struct mlx5_core_dev *dev = priv->mdev;
1208         int size_read = 0;
1209         u8 data[4];
1210
1211         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1212         if (size_read < 2)
1213                 return -EIO;
1214
1215         /* data[0] = identifier byte */
1216         switch (data[0]) {
1217         case MLX5_MODULE_ID_QSFP:
1218                 modinfo->type       = ETH_MODULE_SFF_8436;
1219                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1220                 break;
1221         case MLX5_MODULE_ID_QSFP_PLUS:
1222         case MLX5_MODULE_ID_QSFP28:
1223                 /* data[1] = revision id */
1224                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1225                         modinfo->type       = ETH_MODULE_SFF_8636;
1226                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1227                 } else {
1228                         modinfo->type       = ETH_MODULE_SFF_8436;
1229                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1230                 }
1231                 break;
1232         case MLX5_MODULE_ID_SFP:
1233                 modinfo->type       = ETH_MODULE_SFF_8472;
1234                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1235                 break;
1236         default:
1237                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1238                            __func__, data[0]);
1239                 return -EINVAL;
1240         }
1241
1242         return 0;
1243 }
1244
1245 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1246                                    struct ethtool_eeprom *ee,
1247                                    u8 *data)
1248 {
1249         struct mlx5e_priv *priv = netdev_priv(netdev);
1250         struct mlx5_core_dev *mdev = priv->mdev;
1251         int offset = ee->offset;
1252         int size_read;
1253         int i = 0;
1254
1255         if (!ee->len)
1256                 return -EINVAL;
1257
1258         memset(data, 0, ee->len);
1259
1260         while (i < ee->len) {
1261                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1262                                                      data + i);
1263
1264                 if (!size_read)
1265                         /* Done reading */
1266                         return 0;
1267
1268                 if (size_read < 0) {
1269                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1270                                    __func__, size_read);
1271                         return 0;
1272                 }
1273
1274                 i += size_read;
1275                 offset += size_read;
1276         }
1277
1278         return 0;
1279 }
1280
1281 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1282
1283 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1284 {
1285         struct mlx5e_priv *priv = netdev_priv(netdev);
1286         struct mlx5_core_dev *mdev = priv->mdev;
1287         bool rx_mode_changed;
1288         u8 rx_cq_period_mode;
1289         int err = 0;
1290         bool reset;
1291
1292         rx_cq_period_mode = enable ?
1293                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1294                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1295         rx_mode_changed = rx_cq_period_mode != priv->params.rx_cq_period_mode;
1296
1297         if (rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1298             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1299                 return -ENOTSUPP;
1300
1301         if (!rx_mode_changed)
1302                 return 0;
1303
1304         reset = test_bit(MLX5E_STATE_OPENED, &priv->state);
1305         if (reset)
1306                 mlx5e_close_locked(netdev);
1307
1308         mlx5e_set_rx_cq_mode_params(&priv->params, rx_cq_period_mode);
1309
1310         if (reset)
1311                 err = mlx5e_open_locked(netdev);
1312
1313         return err;
1314 }
1315
1316 static int mlx5e_handle_pflag(struct net_device *netdev,
1317                               u32 wanted_flags,
1318                               enum mlx5e_priv_flag flag,
1319                               mlx5e_pflag_handler pflag_handler)
1320 {
1321         struct mlx5e_priv *priv = netdev_priv(netdev);
1322         bool enable = !!(wanted_flags & flag);
1323         u32 changes = wanted_flags ^ priv->pflags;
1324         int err;
1325
1326         if (!(changes & flag))
1327                 return 0;
1328
1329         err = pflag_handler(netdev, enable);
1330         if (err) {
1331                 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1332                            enable ? "Enable" : "Disable", flag, err);
1333                 return err;
1334         }
1335
1336         MLX5E_SET_PRIV_FLAG(priv, flag, enable);
1337         return 0;
1338 }
1339
1340 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1341 {
1342         struct mlx5e_priv *priv = netdev_priv(netdev);
1343         int err;
1344
1345         mutex_lock(&priv->state_lock);
1346
1347         err = mlx5e_handle_pflag(netdev, pflags,
1348                                  MLX5E_PFLAG_RX_CQE_BASED_MODER,
1349                                  set_pflag_rx_cqe_based_moder);
1350
1351         mutex_unlock(&priv->state_lock);
1352         return err ? -EINVAL : 0;
1353 }
1354
1355 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1356 {
1357         struct mlx5e_priv *priv = netdev_priv(netdev);
1358
1359         return priv->pflags;
1360 }
1361
1362 const struct ethtool_ops mlx5e_ethtool_ops = {
1363         .get_drvinfo       = mlx5e_get_drvinfo,
1364         .get_link          = ethtool_op_get_link,
1365         .get_strings       = mlx5e_get_strings,
1366         .get_sset_count    = mlx5e_get_sset_count,
1367         .get_ethtool_stats = mlx5e_get_ethtool_stats,
1368         .get_ringparam     = mlx5e_get_ringparam,
1369         .set_ringparam     = mlx5e_set_ringparam,
1370         .get_channels      = mlx5e_get_channels,
1371         .set_channels      = mlx5e_set_channels,
1372         .get_coalesce      = mlx5e_get_coalesce,
1373         .set_coalesce      = mlx5e_set_coalesce,
1374         .get_settings      = mlx5e_get_settings,
1375         .set_settings      = mlx5e_set_settings,
1376         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
1377         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1378         .get_rxfh          = mlx5e_get_rxfh,
1379         .set_rxfh          = mlx5e_set_rxfh,
1380         .get_rxnfc         = mlx5e_get_rxnfc,
1381         .get_tunable       = mlx5e_get_tunable,
1382         .set_tunable       = mlx5e_set_tunable,
1383         .get_pauseparam    = mlx5e_get_pauseparam,
1384         .set_pauseparam    = mlx5e_set_pauseparam,
1385         .get_ts_info       = mlx5e_get_ts_info,
1386         .set_phys_id       = mlx5e_set_phys_id,
1387         .get_wol           = mlx5e_get_wol,
1388         .set_wol           = mlx5e_set_wol,
1389         .get_module_info   = mlx5e_get_module_info,
1390         .get_module_eeprom = mlx5e_get_module_eeprom,
1391         .get_priv_flags    = mlx5e_get_priv_flags,
1392         .set_priv_flags    = mlx5e_set_priv_flags
1393 };