drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

   1 /*
   2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include "en.h"
  34
  35 static void mlx5e_get_drvinfo(struct net_device *dev,
  36                               struct ethtool_drvinfo *drvinfo)
  37 {
  38         struct mlx5e_priv *priv = netdev_priv(dev);
  39         struct mlx5_core_dev *mdev = priv->mdev;
  40
  41         strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
  42         strlcpy(drvinfo->version, DRIVER_VERSION " (" DRIVER_RELDATE ")",
  43                 sizeof(drvinfo->version));
  44         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  45                  "%d.%d.%d",
  46                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev));
  47         strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
  48                 sizeof(drvinfo->bus_info));
  49 }
  50
  51 struct ptys2ethtool_config {
  52         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  53         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
  54         u32 speed;
  55 };
  56
  57 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
  58
  59 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...)               \
  60         ({                                                              \
  61                 struct ptys2ethtool_config *cfg;                        \
  62                 const unsigned int modes[] = { __VA_ARGS__ };           \
  63                 unsigned int i;                                         \
  64                 cfg = &ptys2ethtool_table[reg_];                        \
  65                 cfg->speed = speed_;                                    \
  66                 bitmap_zero(cfg->supported,                             \
  67                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  68                 bitmap_zero(cfg->advertised,                            \
  69                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  70                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
  71                         __set_bit(modes[i], cfg->supported);            \
  72                         __set_bit(modes[i], cfg->advertised);           \
  73                 }                                                       \
  74         })
  75
  76 void mlx5e_build_ptys2ethtool_map(void)
  77 {
  78         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, SPEED_1000,
  79                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  80         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, SPEED_1000,
  81                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  82         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, SPEED_10000,
  83                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
  84         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, SPEED_10000,
  85                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
  86         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, SPEED_10000,
  87                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
  88         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, SPEED_20000,
  89                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
  90         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, SPEED_40000,
  91                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
  92         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, SPEED_40000,
  93                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
  94         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, SPEED_56000,
  95                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
  96         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, SPEED_10000,
  97                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
  98         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, SPEED_10000,
  99                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 100         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, SPEED_10000,
 101                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 102         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, SPEED_40000,
 103                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
 104         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, SPEED_40000,
 105                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 106         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, SPEED_50000,
 107                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 108         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, SPEED_100000,
 109                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
 110         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, SPEED_100000,
 111                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
 112         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, SPEED_100000,
 113                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
 114         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, SPEED_100000,
 115                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 116         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, SPEED_10000,
 117                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
 118         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, SPEED_25000,
 119                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
 120         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, SPEED_25000,
 121                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
 122         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, SPEED_25000,
 123                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 124         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, SPEED_50000,
 125                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
 126         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, SPEED_50000,
 127                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
 128 }
 129
 130 static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv)
 131 {
 132         struct mlx5_core_dev *mdev = priv->mdev;
 133         u8 pfc_en_tx;
 134         u8 pfc_en_rx;
 135         int err;
 136
 137         err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx);
 138
 139         return err ? 0 : pfc_en_tx | pfc_en_rx;
 140 }
 141
 142 static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv)
 143 {
 144         struct mlx5_core_dev *mdev = priv->mdev;
 145         u32 rx_pause;
 146         u32 tx_pause;
 147         int err;
 148
 149         err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
 150
 151         return err ? false : rx_pause | tx_pause;
 152 }
 153
 154 #define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter))
 155 #define MLX5E_NUM_RQ_STATS(priv) \
 156         (NUM_RQ_STATS * priv->params.num_channels * \
 157          test_bit(MLX5E_STATE_OPENED, &priv->state))
 158 #define MLX5E_NUM_SQ_STATS(priv) \
 159         (NUM_SQ_STATS * priv->params.num_channels * priv->params.num_tc * \
 160          test_bit(MLX5E_STATE_OPENED, &priv->state))
 161 #define MLX5E_NUM_PFC_COUNTERS(priv) \
 162         ((mlx5e_query_global_pause_combined(priv) + hweight8(mlx5e_query_pfc_combined(priv))) * \
 163           NUM_PPORT_PER_PRIO_PFC_COUNTERS)
 164
 165 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
 166 {
 167         struct mlx5e_priv *priv = netdev_priv(dev);
 168
 169         switch (sset) {
 170         case ETH_SS_STATS:
 171                 return NUM_SW_COUNTERS +
 172                        MLX5E_NUM_Q_CNTRS(priv) +
 173                        NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS +
 174                        MLX5E_NUM_RQ_STATS(priv) +
 175                        MLX5E_NUM_SQ_STATS(priv) +
 176                        MLX5E_NUM_PFC_COUNTERS(priv);
 177         case ETH_SS_PRIV_FLAGS:
 178                 return ARRAY_SIZE(mlx5e_priv_flags);
 179         /* fallthrough */
 180         default:
 181                 return -EOPNOTSUPP;
 182         }
 183 }
 184
 185 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
 186 {
 187         int i, j, tc, prio, idx = 0;
 188         unsigned long pfc_combined;
 189
 190         /* SW counters */
 191         for (i = 0; i < NUM_SW_COUNTERS; i++)
 192                 strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format);
 193
 194         /* Q counters */
 195         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
 196                 strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].format);
 197
 198         /* VPORT counters */
 199         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
 200                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 201                        vport_stats_desc[i].format);
 202
 203         /* PPORT counters */
 204         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
 205                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 206                        pport_802_3_stats_desc[i].format);
 207
 208         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
 209                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 210                        pport_2863_stats_desc[i].format);
 211
 212         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
 213                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
 214                        pport_2819_stats_desc[i].format);
 215
 216         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
 217                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
 218                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
 219                                 pport_per_prio_traffic_stats_desc[i].format, prio);
 220         }
 221
 222         pfc_combined = mlx5e_query_pfc_combined(priv);
 223         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
 224                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
 225                         char pfc_string[ETH_GSTRING_LEN];
 226
 227                         snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio);
 228                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
 229                                 pport_per_prio_pfc_stats_desc[i].format, pfc_string);
 230                 }
 231         }
 232
 233         if (mlx5e_query_global_pause_combined(priv)) {
 234                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
 235                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
 236                                 pport_per_prio_pfc_stats_desc[i].format, "global");
 237                 }
 238         }
 239
 240         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
 241                 return;
 242
 243         /* per channel counters */
 244         for (i = 0; i < priv->params.num_channels; i++)
 245                 for (j = 0; j < NUM_RQ_STATS; j++)
 246                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
 247                                 rq_stats_desc[j].format, i);
 248
 249         for (tc = 0; tc < priv->params.num_tc; tc++)
 250                 for (i = 0; i < priv->params.num_channels; i++)
 251                         for (j = 0; j < NUM_SQ_STATS; j++)
 252                                 sprintf(data + (idx++) * ETH_GSTRING_LEN,
 253                                         sq_stats_desc[j].format,
 254                                         priv->channeltc_to_txq_map[i][tc]);
 255 }
 256
 257 static void mlx5e_get_strings(struct net_device *dev,
 258                               uint32_t stringset, uint8_t *data)
 259 {
 260         struct mlx5e_priv *priv = netdev_priv(dev);
 261         int i;
 262
 263         switch (stringset) {
 264         case ETH_SS_PRIV_FLAGS:
 265                 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
 266                         strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
 267                 break;
 268
 269         case ETH_SS_TEST:
 270                 break;
 271
 272         case ETH_SS_STATS:
 273                 mlx5e_fill_stats_strings(priv, data);
 274                 break;
 275         }
 276 }
 277
 278 static void mlx5e_get_ethtool_stats(struct net_device *dev,
 279                                     struct ethtool_stats *stats, u64 *data)
 280 {
 281         struct mlx5e_priv *priv = netdev_priv(dev);
 282         int i, j, tc, prio, idx = 0;
 283         unsigned long pfc_combined;
 284
 285         if (!data)
 286                 return;
 287
 288         mutex_lock(&priv->state_lock);
 289         if (test_bit(MLX5E_STATE_OPENED, &priv->state))
 290                 mlx5e_update_stats(priv);
 291         mutex_unlock(&priv->state_lock);
 292
 293         for (i = 0; i < NUM_SW_COUNTERS; i++)
 294                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw,
 295                                                    sw_stats_desc, i);
 296
 297         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
 298                 data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
 299                                                    q_stats_desc, i);
 300
 301         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
 302                 data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out,
 303                                                   vport_stats_desc, i);
 304
 305         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
 306                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters,
 307                                                   pport_802_3_stats_desc, i);
 308
 309         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
 310                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters,
 311                                                   pport_2863_stats_desc, i);
 312
 313         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
 314                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters,
 315                                                   pport_2819_stats_desc, i);
 316
 317         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
 318                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
 319                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
 320                                                  pport_per_prio_traffic_stats_desc, i);
 321         }
 322
 323         pfc_combined = mlx5e_query_pfc_combined(priv);
 324         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
 325                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
 326                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
 327                                                           pport_per_prio_pfc_stats_desc, i);
 328                 }
 329         }
 330
 331         if (mlx5e_query_global_pause_combined(priv)) {
 332                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
 333                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0],
 334                                                           pport_per_prio_pfc_stats_desc, 0);
 335                 }
 336         }
 337
 338         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
 339                 return;
 340
 341         /* per channel counters */
 342         for (i = 0; i < priv->params.num_channels; i++)
 343                 for (j = 0; j < NUM_RQ_STATS; j++)
 344                         data[idx++] =
 345                                MLX5E_READ_CTR64_CPU(&priv->channel[i]->rq.stats,
 346                                                     rq_stats_desc, j);
 347
 348         for (tc = 0; tc < priv->params.num_tc; tc++)
 349                 for (i = 0; i < priv->params.num_channels; i++)
 350                         for (j = 0; j < NUM_SQ_STATS; j++)
 351                                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->channel[i]->sq[tc].stats,
 352                                                                    sq_stats_desc, j);
 353 }
 354
 355 static void mlx5e_get_ringparam(struct net_device *dev,
 356                                 struct ethtool_ringparam *param)
 357 {
 358         struct mlx5e_priv *priv = netdev_priv(dev);
 359         int rq_wq_type = priv->params.rq_wq_type;
 360
 361         param->rx_max_pending = 1 << mlx5_max_log_rq_size(rq_wq_type);
 362         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
 363         param->rx_pending     = 1 << priv->params.log_rq_size;
 364         param->tx_pending     = 1 << priv->params.log_sq_size;
 365 }
 366
 367 static int mlx5e_set_ringparam(struct net_device *dev,
 368                                struct ethtool_ringparam *param)
 369 {
 370         struct mlx5e_priv *priv = netdev_priv(dev);
 371         bool was_opened;
 372         int rq_wq_type = priv->params.rq_wq_type;
 373         u16 min_rx_wqes;
 374         u8 log_rq_size;
 375         u8 log_sq_size;
 376         int err = 0;
 377
 378         if (param->rx_jumbo_pending) {
 379                 netdev_info(dev, "%s: rx_jumbo_pending not supported\n",
 380                             __func__);
 381                 return -EINVAL;
 382         }
 383         if (param->rx_mini_pending) {
 384                 netdev_info(dev, "%s: rx_mini_pending not supported\n",
 385                             __func__);
 386                 return -EINVAL;
 387         }
 388         if (param->rx_pending < (1 << mlx5_min_log_rq_size(rq_wq_type))) {
 389                 netdev_info(dev, "%s: rx_pending (%d) < min (%d)\n",
 390                             __func__, param->rx_pending,
 391                             1 << mlx5_min_log_rq_size(rq_wq_type));
 392                 return -EINVAL;
 393         }
 394         if (param->rx_pending > (1 << mlx5_max_log_rq_size(rq_wq_type))) {
 395                 netdev_info(dev, "%s: rx_pending (%d) > max (%d)\n",
 396                             __func__, param->rx_pending,
 397                             1 << mlx5_max_log_rq_size(rq_wq_type));
 398                 return -EINVAL;
 399         }
 400         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
 401                 netdev_info(dev, "%s: tx_pending (%d) < min (%d)\n",
 402                             __func__, param->tx_pending,
 403                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
 404                 return -EINVAL;
 405         }
 406         if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
 407                 netdev_info(dev, "%s: tx_pending (%d) > max (%d)\n",
 408                             __func__, param->tx_pending,
 409                             1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
 410                 return -EINVAL;
 411         }
 412
 413         log_rq_size = order_base_2(param->rx_pending);
 414         log_sq_size = order_base_2(param->tx_pending);
 415         min_rx_wqes = mlx5_min_rx_wqes(rq_wq_type, param->rx_pending);
 416
 417         if (log_rq_size == priv->params.log_rq_size &&
 418             log_sq_size == priv->params.log_sq_size &&
 419             min_rx_wqes == priv->params.min_rx_wqes)
 420                 return 0;
 421
 422         mutex_lock(&priv->state_lock);
 423
 424         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
 425         if (was_opened)
 426                 mlx5e_close_locked(dev);
 427
 428         priv->params.log_rq_size = log_rq_size;
 429         priv->params.log_sq_size = log_sq_size;
 430         priv->params.min_rx_wqes = min_rx_wqes;
 431
 432         if (was_opened)
 433                 err = mlx5e_open_locked(dev);
 434
 435         mutex_unlock(&priv->state_lock);
 436
 437         return err;
 438 }
 439
 440 static void mlx5e_get_channels(struct net_device *dev,
 441                                struct ethtool_channels *ch)
 442 {
 443         struct mlx5e_priv *priv = netdev_priv(dev);
 444
 445         ch->max_combined   = mlx5e_get_max_num_channels(priv->mdev);
 446         ch->combined_count = priv->params.num_channels;
 447 }
 448
 449 static int mlx5e_set_channels(struct net_device *dev,
 450                               struct ethtool_channels *ch)
 451 {
 452         struct mlx5e_priv *priv = netdev_priv(dev);
 453         int ncv = mlx5e_get_max_num_channels(priv->mdev);
 454         unsigned int count = ch->combined_count;
 455         bool arfs_enabled;
 456         bool was_opened;
 457         int err = 0;
 458
 459         if (!count) {
 460                 netdev_info(dev, "%s: combined_count=0 not supported\n",
 461                             __func__);
 462                 return -EINVAL;
 463         }
 464         if (ch->rx_count || ch->tx_count) {
 465                 netdev_info(dev, "%s: separate rx/tx count not supported\n",
 466                             __func__);
 467                 return -EINVAL;
 468         }
 469         if (count > ncv) {
 470                 netdev_info(dev, "%s: count (%d) > max (%d)\n",
 471                             __func__, count, ncv);
 472                 return -EINVAL;
 473         }
 474
 475         if (priv->params.num_channels == count)
 476                 return 0;
 477
 478         mutex_lock(&priv->state_lock);
 479
 480         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
 481         if (was_opened)
 482                 mlx5e_close_locked(dev);
 483
 484         arfs_enabled = dev->features & NETIF_F_NTUPLE;
 485         if (arfs_enabled)
 486                 mlx5e_arfs_disable(priv);
 487
 488         priv->params.num_channels = count;
 489         mlx5e_build_default_indir_rqt(priv->mdev, priv->params.indirection_rqt,
 490                                       MLX5E_INDIR_RQT_SIZE, count);
 491
 492         if (was_opened)
 493                 err = mlx5e_open_locked(dev);
 494         if (err)
 495                 goto out;
 496
 497         if (arfs_enabled) {
 498                 err = mlx5e_arfs_enable(priv);
 499                 if (err)
 500                         netdev_err(dev, "%s: mlx5e_arfs_enable failed: %d\n",
 501                                    __func__, err);
 502         }
 503
 504 out:
 505         mutex_unlock(&priv->state_lock);
 506
 507         return err;
 508 }
 509
 510 static int mlx5e_get_coalesce(struct net_device *netdev,
 511                               struct ethtool_coalesce *coal)
 512 {
 513         struct mlx5e_priv *priv = netdev_priv(netdev);
 514
 515         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
 516                 return -ENOTSUPP;
 517
 518         coal->rx_coalesce_usecs       = priv->params.rx_cq_moderation.usec;
 519         coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation.pkts;
 520         coal->tx_coalesce_usecs       = priv->params.tx_cq_moderation.usec;
 521         coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation.pkts;
 522         coal->use_adaptive_rx_coalesce = priv->params.rx_am_enabled;
 523
 524         return 0;
 525 }
 526
 527 static int mlx5e_set_coalesce(struct net_device *netdev,
 528                               struct ethtool_coalesce *coal)
 529 {
 530         struct mlx5e_priv *priv    = netdev_priv(netdev);
 531         struct mlx5_core_dev *mdev = priv->mdev;
 532         struct mlx5e_channel *c;
 533         bool restart =
 534                 !!coal->use_adaptive_rx_coalesce != priv->params.rx_am_enabled;
 535         bool was_opened;
 536         int err = 0;
 537         int tc;
 538         int i;
 539
 540         if (!MLX5_CAP_GEN(mdev, cq_moderation))
 541                 return -ENOTSUPP;
 542
 543         mutex_lock(&priv->state_lock);
 544
 545         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
 546         if (was_opened && restart) {
 547                 mlx5e_close_locked(netdev);
 548                 priv->params.rx_am_enabled = !!coal->use_adaptive_rx_coalesce;
 549         }
 550
 551         priv->params.tx_cq_moderation.usec = coal->tx_coalesce_usecs;
 552         priv->params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
 553         priv->params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
 554         priv->params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
 555
 556         if (!was_opened || restart)
 557                 goto out;
 558
 559         for (i = 0; i < priv->params.num_channels; ++i) {
 560                 c = priv->channel[i];
 561
 562                 for (tc = 0; tc < c->num_tc; tc++) {
 563                         mlx5_core_modify_cq_moderation(mdev,
 564                                                 &c->sq[tc].cq.mcq,
 565                                                 coal->tx_coalesce_usecs,
 566                                                 coal->tx_max_coalesced_frames);
 567                 }
 568
 569                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
 570                                                coal->rx_coalesce_usecs,
 571                                                coal->rx_max_coalesced_frames);
 572         }
 573
 574 out:
 575         if (was_opened && restart)
 576                 err = mlx5e_open_locked(netdev);
 577
 578         mutex_unlock(&priv->state_lock);
 579         return err;
 580 }
 581
 582 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
 583                                         u32 eth_proto_cap)
 584 {
 585         int proto;
 586
 587         for_each_set_bit(proto, (unsigned long *)&eth_proto_cap, MLX5E_LINK_MODES_NUMBER)
 588                 bitmap_or(supported_modes, supported_modes,
 589                           ptys2ethtool_table[proto].supported,
 590                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 591 }
 592
 593 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
 594                                     u32 eth_proto_cap)
 595 {
 596         int proto;
 597
 598         for_each_set_bit(proto, (unsigned long *)&eth_proto_cap, MLX5E_LINK_MODES_NUMBER)
 599                 bitmap_or(advertising_modes, advertising_modes,
 600                           ptys2ethtool_table[proto].advertised,
 601                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 602 }
 603
 604 static void ptys2ethtool_supported_port(struct ethtool_link_ksettings *link_ksettings,
 605                                         u32 eth_proto_cap)
 606 {
 607         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
 608                            | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
 609                            | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
 610                            | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
 611                            | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
 612                            | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 613                 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, FIBRE);
 614         }
 615
 616         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
 617                            | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
 618                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
 619                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
 620                            | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
 621                 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Backplane);
 622         }
 623 }
 624
 625 int mlx5e_get_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
 626 {
 627         u32 max_speed = 0;
 628         u32 proto_cap;
 629         int err;
 630         int i;
 631
 632         err = mlx5_query_port_proto_cap(mdev, &proto_cap, MLX5_PTYS_EN);
 633         if (err)
 634                 return err;
 635
 636         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i)
 637                 if (proto_cap & MLX5E_PROT_MASK(i))
 638                         max_speed = max(max_speed, ptys2ethtool_table[i].speed);
 639
 640         *speed = max_speed;
 641         return 0;
 642 }
 643
 644 static void get_speed_duplex(struct net_device *netdev,
 645                              u32 eth_proto_oper,
 646                              struct ethtool_link_ksettings *link_ksettings)
 647 {
 648         int i;
 649         u32 speed = SPEED_UNKNOWN;
 650         u8 duplex = DUPLEX_UNKNOWN;
 651
 652         if (!netif_carrier_ok(netdev))
 653                 goto out;
 654
 655         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
 656                 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
 657                         speed = ptys2ethtool_table[i].speed;
 658                         duplex = DUPLEX_FULL;
 659                         break;
 660                 }
 661         }
 662 out:
 663         link_ksettings->base.speed = speed;
 664         link_ksettings->base.duplex = duplex;
 665 }
 666
 667 static void get_supported(u32 eth_proto_cap,
 668                           struct ethtool_link_ksettings *link_ksettings)
 669 {
 670         unsigned long *supported = link_ksettings->link_modes.supported;
 671
 672         ptys2ethtool_supported_port(link_ksettings, eth_proto_cap);
 673         ptys2ethtool_supported_link(supported, eth_proto_cap);
 674         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
 675         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Asym_Pause);
 676 }
 677
 678 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
 679                             u8 rx_pause,
 680                             struct ethtool_link_ksettings *link_ksettings)
 681 {
 682         unsigned long *advertising = link_ksettings->link_modes.advertising;
 683
 684         ptys2ethtool_adver_link(advertising, eth_proto_cap);
 685         if (tx_pause)
 686                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
 687         if (tx_pause ^ rx_pause)
 688                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
 689 }
 690
 691 static u8 get_connector_port(u32 eth_proto)
 692 {
 693         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
 694                          | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
 695                          | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
 696                          | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 697                         return PORT_FIBRE;
 698         }
 699
 700         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
 701                          | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
 702                          | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
 703                         return PORT_DA;
 704         }
 705
 706         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
 707                          | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
 708                          | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
 709                          | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
 710                         return PORT_NONE;
 711         }
 712
 713         return PORT_OTHER;
 714 }
 715
 716 static void get_lp_advertising(u32 eth_proto_lp,
 717                                struct ethtool_link_ksettings *link_ksettings)
 718 {
 719         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
 720
 721         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
 722 }
 723
 724 static int mlx5e_get_link_ksettings(struct net_device *netdev,
 725                                     struct ethtool_link_ksettings *link_ksettings)
 726 {
 727         struct mlx5e_priv *priv    = netdev_priv(netdev);
 728         struct mlx5_core_dev *mdev = priv->mdev;
 729         u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
 730         u32 eth_proto_cap;
 731         u32 eth_proto_admin;
 732         u32 eth_proto_lp;
 733         u32 eth_proto_oper;
 734         u8 an_disable_admin;
 735         u8 an_status;
 736         int err;
 737
 738         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
 739         if (err) {
 740                 netdev_err(netdev, "%s: query port ptys failed: %d\n",
 741                            __func__, err);
 742                 goto err_query_ptys;
 743         }
 744
 745         eth_proto_cap    = MLX5_GET(ptys_reg, out, eth_proto_capability);
 746         eth_proto_admin  = MLX5_GET(ptys_reg, out, eth_proto_admin);
 747         eth_proto_oper   = MLX5_GET(ptys_reg, out, eth_proto_oper);
 748         eth_proto_lp     = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
 749         an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
 750         an_status        = MLX5_GET(ptys_reg, out, an_status);
 751
 752         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
 753         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
 754
 755         get_supported(eth_proto_cap, link_ksettings);
 756         get_advertising(eth_proto_admin, 0, 0, link_ksettings);
 757         get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
 758
 759         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
 760
 761         link_ksettings->base.port = get_connector_port(eth_proto_oper);
 762         get_lp_advertising(eth_proto_lp, link_ksettings);
 763
 764         if (an_status == MLX5_AN_COMPLETE)
 765                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 766                                                      lp_advertising, Autoneg);
 767
 768         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
 769                                                           AUTONEG_ENABLE;
 770         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
 771                                              Autoneg);
 772         if (!an_disable_admin)
 773                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 774                                                      advertising, Autoneg);
 775
 776 err_query_ptys:
 777         return err;
 778 }
 779
 780 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
 781 {
 782         u32 i, ptys_modes = 0;
 783
 784         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
 785                 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
 786                                       link_modes,
 787                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
 788                         ptys_modes |= MLX5E_PROT_MASK(i);
 789         }
 790
 791         return ptys_modes;
 792 }
 793
 794 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
 795 {
 796         u32 i, speed_links = 0;
 797
 798         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
 799                 if (ptys2ethtool_table[i].speed == speed)
 800                         speed_links |= MLX5E_PROT_MASK(i);
 801         }
 802
 803         return speed_links;
 804 }
 805
 806 static int mlx5e_set_link_ksettings(struct net_device *netdev,
 807                                     const struct ethtool_link_ksettings *link_ksettings)
 808 {
 809         struct mlx5e_priv *priv    = netdev_priv(netdev);
 810         struct mlx5_core_dev *mdev = priv->mdev;
 811         u32 eth_proto_cap, eth_proto_admin;
 812         bool an_changes = false;
 813         u8 an_disable_admin;
 814         u8 an_disable_cap;
 815         bool an_disable;
 816         u32 link_modes;
 817         u8 an_status;
 818         u32 speed;
 819         int err;
 820
 821         speed = link_ksettings->base.speed;
 822
 823         link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
 824                 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
 825                 mlx5e_ethtool2ptys_speed_link(speed);
 826
 827         err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
 828         if (err) {
 829                 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
 830                            __func__, err);
 831                 goto out;
 832         }
 833
 834         link_modes = link_modes & eth_proto_cap;
 835         if (!link_modes) {
 836                 netdev_err(netdev, "%s: Not supported link mode(s) requested",
 837                            __func__);
 838                 err = -EINVAL;
 839                 goto out;
 840         }
 841
 842         err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
 843         if (err) {
 844                 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
 845                            __func__, err);
 846                 goto out;
 847         }
 848
 849         mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
 850                                 &an_disable_cap, &an_disable_admin);
 851
 852         an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
 853         an_changes = ((!an_disable && an_disable_admin) ||
 854                       (an_disable && !an_disable_admin));
 855
 856         if (!an_changes && link_modes == eth_proto_admin)
 857                 goto out;
 858
 859         mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
 860         mlx5_toggle_port_link(mdev);
 861
 862 out:
 863         return err;
 864 }
 865
 866 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
 867 {
 868         struct mlx5e_priv *priv = netdev_priv(netdev);
 869
 870         return sizeof(priv->params.toeplitz_hash_key);
 871 }
 872
 873 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
 874 {
 875         return MLX5E_INDIR_RQT_SIZE;
 876 }
 877
 878 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
 879                           u8 *hfunc)
 880 {
 881         struct mlx5e_priv *priv = netdev_priv(netdev);
 882
 883         if (indir)
 884                 memcpy(indir, priv->params.indirection_rqt,
 885                        sizeof(priv->params.indirection_rqt));
 886
 887         if (key)
 888                 memcpy(key, priv->params.toeplitz_hash_key,
 889                        sizeof(priv->params.toeplitz_hash_key));
 890
 891         if (hfunc)
 892                 *hfunc = priv->params.rss_hfunc;
 893
 894         return 0;
 895 }
 896
 897 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
 898 {
 899         struct mlx5_core_dev *mdev = priv->mdev;
 900         void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
 901         int i;
 902
 903         MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
 904         mlx5e_build_tir_ctx_hash(tirc, priv);
 905
 906         for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++)
 907                 mlx5_core_modify_tir(mdev, priv->indir_tir[i].tirn, in, inlen);
 908 }
 909
 910 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
 911                           const u8 *key, const u8 hfunc)
 912 {
 913         struct mlx5e_priv *priv = netdev_priv(dev);
 914         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
 915         void *in;
 916
 917         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
 918             (hfunc != ETH_RSS_HASH_XOR) &&
 919             (hfunc != ETH_RSS_HASH_TOP))
 920                 return -EINVAL;
 921
 922         in = mlx5_vzalloc(inlen);
 923         if (!in)
 924                 return -ENOMEM;
 925
 926         mutex_lock(&priv->state_lock);
 927
 928         if (indir) {
 929                 u32 rqtn = priv->indir_rqt.rqtn;
 930
 931                 memcpy(priv->params.indirection_rqt, indir,
 932                        sizeof(priv->params.indirection_rqt));
 933                 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, 0);
 934         }
 935
 936         if (key)
 937                 memcpy(priv->params.toeplitz_hash_key, key,
 938                        sizeof(priv->params.toeplitz_hash_key));
 939
 940         if (hfunc != ETH_RSS_HASH_NO_CHANGE)
 941                 priv->params.rss_hfunc = hfunc;
 942
 943         mlx5e_modify_tirs_hash(priv, in, inlen);
 944
 945         mutex_unlock(&priv->state_lock);
 946
 947         kvfree(in);
 948
 949         return 0;
 950 }
 951
 952 static int mlx5e_get_rxnfc(struct net_device *netdev,
 953                            struct ethtool_rxnfc *info, u32 *rule_locs)
 954 {
 955         struct mlx5e_priv *priv = netdev_priv(netdev);
 956         int err = 0;
 957
 958         switch (info->cmd) {
 959         case ETHTOOL_GRXRINGS:
 960                 info->data = priv->params.num_channels;
 961                 break;
 962         case ETHTOOL_GRXCLSRLCNT:
 963                 info->rule_cnt = priv->fs.ethtool.tot_num_rules;
 964                 break;
 965         case ETHTOOL_GRXCLSRULE:
 966                 err = mlx5e_ethtool_get_flow(priv, info, info->fs.location);
 967                 break;
 968         case ETHTOOL_GRXCLSRLALL:
 969                 err = mlx5e_ethtool_get_all_flows(priv, info, rule_locs);
 970                 break;
 971         default:
 972                 err = -EOPNOTSUPP;
 973                 break;
 974         }
 975
 976         return err;
 977 }
 978
 979 static int mlx5e_get_tunable(struct net_device *dev,
 980                              const struct ethtool_tunable *tuna,
 981                              void *data)
 982 {
 983         const struct mlx5e_priv *priv = netdev_priv(dev);
 984         int err = 0;
 985
 986         switch (tuna->id) {
 987         case ETHTOOL_TX_COPYBREAK:
 988                 *(u32 *)data = priv->params.tx_max_inline;
 989                 break;
 990         default:
 991                 err = -EINVAL;
 992                 break;
 993         }
 994
 995         return err;
 996 }
 997
 998 static int mlx5e_set_tunable(struct net_device *dev,
 999                              const struct ethtool_tunable *tuna,
1000                              const void *data)
1001 {
1002         struct mlx5e_priv *priv = netdev_priv(dev);
1003         struct mlx5_core_dev *mdev = priv->mdev;
1004         bool was_opened;
1005         u32 val;
1006         int err = 0;
1007
1008         switch (tuna->id) {
1009         case ETHTOOL_TX_COPYBREAK:
1010                 val = *(u32 *)data;
1011                 if (val > mlx5e_get_max_inline_cap(mdev)) {
1012                         err = -EINVAL;
1013                         break;
1014                 }
1015
1016                 mutex_lock(&priv->state_lock);
1017
1018                 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
1019                 if (was_opened)
1020                         mlx5e_close_locked(dev);
1021
1022                 priv->params.tx_max_inline = val;
1023
1024                 if (was_opened)
1025                         err = mlx5e_open_locked(dev);
1026
1027                 mutex_unlock(&priv->state_lock);
1028                 break;
1029         default:
1030                 err = -EINVAL;
1031                 break;
1032         }
1033
1034         return err;
1035 }
1036
1037 static void mlx5e_get_pauseparam(struct net_device *netdev,
1038                                  struct ethtool_pauseparam *pauseparam)
1039 {
1040         struct mlx5e_priv *priv    = netdev_priv(netdev);
1041         struct mlx5_core_dev *mdev = priv->mdev;
1042         int err;
1043
1044         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1045                                     &pauseparam->tx_pause);
1046         if (err) {
1047                 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1048                            __func__, err);
1049         }
1050 }
1051
1052 static int mlx5e_set_pauseparam(struct net_device *netdev,
1053                                 struct ethtool_pauseparam *pauseparam)
1054 {
1055         struct mlx5e_priv *priv    = netdev_priv(netdev);
1056         struct mlx5_core_dev *mdev = priv->mdev;
1057         int err;
1058
1059         if (pauseparam->autoneg)
1060                 return -EINVAL;
1061
1062         err = mlx5_set_port_pause(mdev,
1063                                   pauseparam->rx_pause ? 1 : 0,
1064                                   pauseparam->tx_pause ? 1 : 0);
1065         if (err) {
1066                 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1067                            __func__, err);
1068         }
1069
1070         return err;
1071 }
1072
1073 static int mlx5e_get_ts_info(struct net_device *dev,
1074                              struct ethtool_ts_info *info)
1075 {
1076         struct mlx5e_priv *priv = netdev_priv(dev);
1077         int ret;
1078
1079         ret = ethtool_op_get_ts_info(dev, info);
1080         if (ret)
1081                 return ret;
1082
1083         info->phc_index = priv->tstamp.ptp ?
1084                           ptp_clock_index(priv->tstamp.ptp) : -1;
1085
1086         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
1087                 return 0;
1088
1089         info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
1090                                  SOF_TIMESTAMPING_RX_HARDWARE |
1091                                  SOF_TIMESTAMPING_RAW_HARDWARE;
1092
1093         info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) |
1094                          (BIT(1) << HWTSTAMP_TX_ON);
1095
1096         info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) |
1097                            (BIT(1) << HWTSTAMP_FILTER_ALL);
1098
1099         return 0;
1100 }
1101
1102 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1103 {
1104         __u32 ret = 0;
1105
1106         if (MLX5_CAP_GEN(mdev, wol_g))
1107                 ret |= WAKE_MAGIC;
1108
1109         if (MLX5_CAP_GEN(mdev, wol_s))
1110                 ret |= WAKE_MAGICSECURE;
1111
1112         if (MLX5_CAP_GEN(mdev, wol_a))
1113                 ret |= WAKE_ARP;
1114
1115         if (MLX5_CAP_GEN(mdev, wol_b))
1116                 ret |= WAKE_BCAST;
1117
1118         if (MLX5_CAP_GEN(mdev, wol_m))
1119                 ret |= WAKE_MCAST;
1120
1121         if (MLX5_CAP_GEN(mdev, wol_u))
1122                 ret |= WAKE_UCAST;
1123
1124         if (MLX5_CAP_GEN(mdev, wol_p))
1125                 ret |= WAKE_PHY;
1126
1127         return ret;
1128 }
1129
1130 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1131 {
1132         __u32 ret = 0;
1133
1134         if (mode & MLX5_WOL_MAGIC)
1135                 ret |= WAKE_MAGIC;
1136
1137         if (mode & MLX5_WOL_SECURED_MAGIC)
1138                 ret |= WAKE_MAGICSECURE;
1139
1140         if (mode & MLX5_WOL_ARP)
1141                 ret |= WAKE_ARP;
1142
1143         if (mode & MLX5_WOL_BROADCAST)
1144                 ret |= WAKE_BCAST;
1145
1146         if (mode & MLX5_WOL_MULTICAST)
1147                 ret |= WAKE_MCAST;
1148
1149         if (mode & MLX5_WOL_UNICAST)
1150                 ret |= WAKE_UCAST;
1151
1152         if (mode & MLX5_WOL_PHY_ACTIVITY)
1153                 ret |= WAKE_PHY;
1154
1155         return ret;
1156 }
1157
1158 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1159 {
1160         u8 ret = 0;
1161
1162         if (mode & WAKE_MAGIC)
1163                 ret |= MLX5_WOL_MAGIC;
1164
1165         if (mode & WAKE_MAGICSECURE)
1166                 ret |= MLX5_WOL_SECURED_MAGIC;
1167
1168         if (mode & WAKE_ARP)
1169                 ret |= MLX5_WOL_ARP;
1170
1171         if (mode & WAKE_BCAST)
1172                 ret |= MLX5_WOL_BROADCAST;
1173
1174         if (mode & WAKE_MCAST)
1175                 ret |= MLX5_WOL_MULTICAST;
1176
1177         if (mode & WAKE_UCAST)
1178                 ret |= MLX5_WOL_UNICAST;
1179
1180         if (mode & WAKE_PHY)
1181                 ret |= MLX5_WOL_PHY_ACTIVITY;
1182
1183         return ret;
1184 }
1185
1186 static void mlx5e_get_wol(struct net_device *netdev,
1187                           struct ethtool_wolinfo *wol)
1188 {
1189         struct mlx5e_priv *priv = netdev_priv(netdev);
1190         struct mlx5_core_dev *mdev = priv->mdev;
1191         u8 mlx5_wol_mode;
1192         int err;
1193
1194         memset(wol, 0, sizeof(*wol));
1195
1196         wol->supported = mlx5e_get_wol_supported(mdev);
1197         if (!wol->supported)
1198                 return;
1199
1200         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1201         if (err)
1202                 return;
1203
1204         wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1205 }
1206
1207 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1208 {
1209         struct mlx5e_priv *priv = netdev_priv(netdev);
1210         struct mlx5_core_dev *mdev = priv->mdev;
1211         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1212         u32 mlx5_wol_mode;
1213
1214         if (!wol_supported)
1215                 return -ENOTSUPP;
1216
1217         if (wol->wolopts & ~wol_supported)
1218                 return -EINVAL;
1219
1220         mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1221
1222         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1223 }
1224
1225 static int mlx5e_set_phys_id(struct net_device *dev,
1226                              enum ethtool_phys_id_state state)
1227 {
1228         struct mlx5e_priv *priv = netdev_priv(dev);
1229         struct mlx5_core_dev *mdev = priv->mdev;
1230         u16 beacon_duration;
1231
1232         if (!MLX5_CAP_GEN(mdev, beacon_led))
1233                 return -EOPNOTSUPP;
1234
1235         switch (state) {
1236         case ETHTOOL_ID_ACTIVE:
1237                 beacon_duration = MLX5_BEACON_DURATION_INF;
1238                 break;
1239         case ETHTOOL_ID_INACTIVE:
1240                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1241                 break;
1242         default:
1243                 return -EOPNOTSUPP;
1244         }
1245
1246         return mlx5_set_port_beacon(mdev, beacon_duration);
1247 }
1248
1249 static int mlx5e_get_module_info(struct net_device *netdev,
1250                                  struct ethtool_modinfo *modinfo)
1251 {
1252         struct mlx5e_priv *priv = netdev_priv(netdev);
1253         struct mlx5_core_dev *dev = priv->mdev;
1254         int size_read = 0;
1255         u8 data[4];
1256
1257         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1258         if (size_read < 2)
1259                 return -EIO;
1260
1261         /* data[0] = identifier byte */
1262         switch (data[0]) {
1263         case MLX5_MODULE_ID_QSFP:
1264                 modinfo->type       = ETH_MODULE_SFF_8436;
1265                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1266                 break;
1267         case MLX5_MODULE_ID_QSFP_PLUS:
1268         case MLX5_MODULE_ID_QSFP28:
1269                 /* data[1] = revision id */
1270                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1271                         modinfo->type       = ETH_MODULE_SFF_8636;
1272                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1273                 } else {
1274                         modinfo->type       = ETH_MODULE_SFF_8436;
1275                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1276                 }
1277                 break;
1278         case MLX5_MODULE_ID_SFP:
1279                 modinfo->type       = ETH_MODULE_SFF_8472;
1280                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1281                 break;
1282         default:
1283                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1284                            __func__, data[0]);
1285                 return -EINVAL;
1286         }
1287
1288         return 0;
1289 }
1290
1291 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1292                                    struct ethtool_eeprom *ee,
1293                                    u8 *data)
1294 {
1295         struct mlx5e_priv *priv = netdev_priv(netdev);
1296         struct mlx5_core_dev *mdev = priv->mdev;
1297         int offset = ee->offset;
1298         int size_read;
1299         int i = 0;
1300
1301         if (!ee->len)
1302                 return -EINVAL;
1303
1304         memset(data, 0, ee->len);
1305
1306         while (i < ee->len) {
1307                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1308                                                      data + i);
1309
1310                 if (!size_read)
1311                         /* Done reading */
1312                         return 0;
1313
1314                 if (size_read < 0) {
1315                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1316                                    __func__, size_read);
1317                         return 0;
1318                 }
1319
1320                 i += size_read;
1321                 offset += size_read;
1322         }
1323
1324         return 0;
1325 }
1326
1327 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1328
1329 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1330 {
1331         struct mlx5e_priv *priv = netdev_priv(netdev);
1332         struct mlx5_core_dev *mdev = priv->mdev;
1333         bool rx_mode_changed;
1334         u8 rx_cq_period_mode;
1335         int err = 0;
1336         bool reset;
1337
1338         rx_cq_period_mode = enable ?
1339                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1340                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1341         rx_mode_changed = rx_cq_period_mode != priv->params.rx_cq_period_mode;
1342
1343         if (rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1344             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1345                 return -ENOTSUPP;
1346
1347         if (!rx_mode_changed)
1348                 return 0;
1349
1350         reset = test_bit(MLX5E_STATE_OPENED, &priv->state);
1351         if (reset)
1352                 mlx5e_close_locked(netdev);
1353
1354         mlx5e_set_rx_cq_mode_params(&priv->params, rx_cq_period_mode);
1355
1356         if (reset)
1357                 err = mlx5e_open_locked(netdev);
1358
1359         return err;
1360 }
1361
1362 static int mlx5e_handle_pflag(struct net_device *netdev,
1363                               u32 wanted_flags,
1364                               enum mlx5e_priv_flag flag,
1365                               mlx5e_pflag_handler pflag_handler)
1366 {
1367         struct mlx5e_priv *priv = netdev_priv(netdev);
1368         bool enable = !!(wanted_flags & flag);
1369         u32 changes = wanted_flags ^ priv->pflags;
1370         int err;
1371
1372         if (!(changes & flag))
1373                 return 0;
1374
1375         err = pflag_handler(netdev, enable);
1376         if (err) {
1377                 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1378                            enable ? "Enable" : "Disable", flag, err);
1379                 return err;
1380         }
1381
1382         MLX5E_SET_PRIV_FLAG(priv, flag, enable);
1383         return 0;
1384 }
1385
1386 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1387 {
1388         struct mlx5e_priv *priv = netdev_priv(netdev);
1389         int err;
1390
1391         mutex_lock(&priv->state_lock);
1392
1393         err = mlx5e_handle_pflag(netdev, pflags,
1394                                  MLX5E_PFLAG_RX_CQE_BASED_MODER,
1395                                  set_pflag_rx_cqe_based_moder);
1396
1397         mutex_unlock(&priv->state_lock);
1398         return err ? -EINVAL : 0;
1399 }
1400
1401 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1402 {
1403         struct mlx5e_priv *priv = netdev_priv(netdev);
1404
1405         return priv->pflags;
1406 }
1407
1408 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1409 {
1410         int err = 0;
1411         struct mlx5e_priv *priv = netdev_priv(dev);
1412
1413         switch (cmd->cmd) {
1414         case ETHTOOL_SRXCLSRLINS:
1415                 err = mlx5e_ethtool_flow_replace(priv, &cmd->fs);
1416                 break;
1417         case ETHTOOL_SRXCLSRLDEL:
1418                 err = mlx5e_ethtool_flow_remove(priv, cmd->fs.location);
1419                 break;
1420         default:
1421                 err = -EOPNOTSUPP;
1422                 break;
1423         }
1424
1425         return err;
1426 }
1427
1428 const struct ethtool_ops mlx5e_ethtool_ops = {
1429         .get_drvinfo       = mlx5e_get_drvinfo,
1430         .get_link          = ethtool_op_get_link,
1431         .get_strings       = mlx5e_get_strings,
1432         .get_sset_count    = mlx5e_get_sset_count,
1433         .get_ethtool_stats = mlx5e_get_ethtool_stats,
1434         .get_ringparam     = mlx5e_get_ringparam,
1435         .set_ringparam     = mlx5e_set_ringparam,
1436         .get_channels      = mlx5e_get_channels,
1437         .set_channels      = mlx5e_set_channels,
1438         .get_coalesce      = mlx5e_get_coalesce,
1439         .set_coalesce      = mlx5e_set_coalesce,
1440         .get_link_ksettings  = mlx5e_get_link_ksettings,
1441         .set_link_ksettings  = mlx5e_set_link_ksettings,
1442         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
1443         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1444         .get_rxfh          = mlx5e_get_rxfh,
1445         .set_rxfh          = mlx5e_set_rxfh,
1446         .get_rxnfc         = mlx5e_get_rxnfc,
1447         .set_rxnfc         = mlx5e_set_rxnfc,
1448         .get_tunable       = mlx5e_get_tunable,
1449         .set_tunable       = mlx5e_set_tunable,
1450         .get_pauseparam    = mlx5e_get_pauseparam,
1451         .set_pauseparam    = mlx5e_set_pauseparam,
1452         .get_ts_info       = mlx5e_get_ts_info,
1453         .set_phys_id       = mlx5e_set_phys_id,
1454         .get_wol           = mlx5e_get_wol,
1455         .set_wol           = mlx5e_set_wol,
1456         .get_module_info   = mlx5e_get_module_info,
1457         .get_module_eeprom = mlx5e_get_module_eeprom,
1458         .get_priv_flags    = mlx5e_get_priv_flags,
1459         .set_priv_flags    = mlx5e_set_priv_flags
1460 };