2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 static void mlx5e_get_drvinfo(struct net_device *dev,
36 struct ethtool_drvinfo *drvinfo)
38 struct mlx5e_priv *priv = netdev_priv(dev);
39 struct mlx5_core_dev *mdev = priv->mdev;
41 strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
42 strlcpy(drvinfo->version, DRIVER_VERSION " (" DRIVER_RELDATE ")",
43 sizeof(drvinfo->version));
44 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
46 fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev));
47 strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
48 sizeof(drvinfo->bus_info));
51 struct ptys2ethtool_config {
52 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
53 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
57 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
59 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...) \
61 struct ptys2ethtool_config *cfg; \
62 const unsigned int modes[] = { __VA_ARGS__ }; \
64 cfg = &ptys2ethtool_table[reg_]; \
65 cfg->speed = speed_; \
66 bitmap_zero(cfg->supported, \
67 __ETHTOOL_LINK_MODE_MASK_NBITS); \
68 bitmap_zero(cfg->advertised, \
69 __ETHTOOL_LINK_MODE_MASK_NBITS); \
70 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) { \
71 __set_bit(modes[i], cfg->supported); \
72 __set_bit(modes[i], cfg->advertised); \
76 void mlx5e_build_ptys2ethtool_map(void)
78 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, SPEED_1000,
79 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
80 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, SPEED_1000,
81 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
82 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, SPEED_10000,
83 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
84 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, SPEED_10000,
85 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
86 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, SPEED_10000,
87 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
88 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, SPEED_20000,
89 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
90 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, SPEED_40000,
91 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
92 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, SPEED_40000,
93 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
94 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, SPEED_56000,
95 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
96 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, SPEED_10000,
97 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
98 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, SPEED_10000,
99 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
100 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, SPEED_10000,
101 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
102 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, SPEED_40000,
103 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
104 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, SPEED_40000,
105 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
106 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, SPEED_50000,
107 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
108 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, SPEED_100000,
109 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
110 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, SPEED_100000,
111 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
112 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, SPEED_100000,
113 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
114 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, SPEED_100000,
115 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
116 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, SPEED_10000,
117 ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
118 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, SPEED_25000,
119 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
120 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, SPEED_25000,
121 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
122 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, SPEED_25000,
123 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
124 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, SPEED_50000,
125 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
126 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, SPEED_50000,
127 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
130 static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv)
132 struct mlx5_core_dev *mdev = priv->mdev;
137 err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx);
139 return err ? 0 : pfc_en_tx | pfc_en_rx;
142 static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv)
144 struct mlx5_core_dev *mdev = priv->mdev;
149 err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
151 return err ? false : rx_pause | tx_pause;
154 #define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter))
155 #define MLX5E_NUM_RQ_STATS(priv) \
156 (NUM_RQ_STATS * priv->params.num_channels * \
157 test_bit(MLX5E_STATE_OPENED, &priv->state))
158 #define MLX5E_NUM_SQ_STATS(priv) \
159 (NUM_SQ_STATS * priv->params.num_channels * priv->params.num_tc * \
160 test_bit(MLX5E_STATE_OPENED, &priv->state))
161 #define MLX5E_NUM_PFC_COUNTERS(priv) \
162 ((mlx5e_query_global_pause_combined(priv) + hweight8(mlx5e_query_pfc_combined(priv))) * \
163 NUM_PPORT_PER_PRIO_PFC_COUNTERS)
165 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
167 struct mlx5e_priv *priv = netdev_priv(dev);
171 return NUM_SW_COUNTERS +
172 MLX5E_NUM_Q_CNTRS(priv) +
173 NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS +
174 MLX5E_NUM_RQ_STATS(priv) +
175 MLX5E_NUM_SQ_STATS(priv) +
176 MLX5E_NUM_PFC_COUNTERS(priv);
177 case ETH_SS_PRIV_FLAGS:
178 return ARRAY_SIZE(mlx5e_priv_flags);
185 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
187 int i, j, tc, prio, idx = 0;
188 unsigned long pfc_combined;
191 for (i = 0; i < NUM_SW_COUNTERS; i++)
192 strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format);
195 for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
196 strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].format);
199 for (i = 0; i < NUM_VPORT_COUNTERS; i++)
200 strcpy(data + (idx++) * ETH_GSTRING_LEN,
201 vport_stats_desc[i].format);
204 for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
205 strcpy(data + (idx++) * ETH_GSTRING_LEN,
206 pport_802_3_stats_desc[i].format);
208 for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
209 strcpy(data + (idx++) * ETH_GSTRING_LEN,
210 pport_2863_stats_desc[i].format);
212 for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
213 strcpy(data + (idx++) * ETH_GSTRING_LEN,
214 pport_2819_stats_desc[i].format);
216 for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
217 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
218 sprintf(data + (idx++) * ETH_GSTRING_LEN,
219 pport_per_prio_traffic_stats_desc[i].format, prio);
222 pfc_combined = mlx5e_query_pfc_combined(priv);
223 for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
224 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
225 char pfc_string[ETH_GSTRING_LEN];
227 snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio);
228 sprintf(data + (idx++) * ETH_GSTRING_LEN,
229 pport_per_prio_pfc_stats_desc[i].format, pfc_string);
233 if (mlx5e_query_global_pause_combined(priv)) {
234 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
235 sprintf(data + (idx++) * ETH_GSTRING_LEN,
236 pport_per_prio_pfc_stats_desc[i].format, "global");
240 if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
243 /* per channel counters */
244 for (i = 0; i < priv->params.num_channels; i++)
245 for (j = 0; j < NUM_RQ_STATS; j++)
246 sprintf(data + (idx++) * ETH_GSTRING_LEN,
247 rq_stats_desc[j].format, i);
249 for (tc = 0; tc < priv->params.num_tc; tc++)
250 for (i = 0; i < priv->params.num_channels; i++)
251 for (j = 0; j < NUM_SQ_STATS; j++)
252 sprintf(data + (idx++) * ETH_GSTRING_LEN,
253 sq_stats_desc[j].format,
254 priv->channeltc_to_txq_map[i][tc]);
257 static void mlx5e_get_strings(struct net_device *dev,
258 uint32_t stringset, uint8_t *data)
260 struct mlx5e_priv *priv = netdev_priv(dev);
264 case ETH_SS_PRIV_FLAGS:
265 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
266 strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
273 mlx5e_fill_stats_strings(priv, data);
278 static void mlx5e_get_ethtool_stats(struct net_device *dev,
279 struct ethtool_stats *stats, u64 *data)
281 struct mlx5e_priv *priv = netdev_priv(dev);
282 int i, j, tc, prio, idx = 0;
283 unsigned long pfc_combined;
288 mutex_lock(&priv->state_lock);
289 if (test_bit(MLX5E_STATE_OPENED, &priv->state))
290 mlx5e_update_stats(priv);
291 mutex_unlock(&priv->state_lock);
293 for (i = 0; i < NUM_SW_COUNTERS; i++)
294 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw,
297 for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
298 data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
301 for (i = 0; i < NUM_VPORT_COUNTERS; i++)
302 data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out,
303 vport_stats_desc, i);
305 for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
306 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters,
307 pport_802_3_stats_desc, i);
309 for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
310 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters,
311 pport_2863_stats_desc, i);
313 for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
314 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters,
315 pport_2819_stats_desc, i);
317 for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
318 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
319 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
320 pport_per_prio_traffic_stats_desc, i);
323 pfc_combined = mlx5e_query_pfc_combined(priv);
324 for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
325 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
326 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
327 pport_per_prio_pfc_stats_desc, i);
331 if (mlx5e_query_global_pause_combined(priv)) {
332 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
333 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0],
334 pport_per_prio_pfc_stats_desc, 0);
338 if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
341 /* per channel counters */
342 for (i = 0; i < priv->params.num_channels; i++)
343 for (j = 0; j < NUM_RQ_STATS; j++)
345 MLX5E_READ_CTR64_CPU(&priv->channel[i]->rq.stats,
348 for (tc = 0; tc < priv->params.num_tc; tc++)
349 for (i = 0; i < priv->params.num_channels; i++)
350 for (j = 0; j < NUM_SQ_STATS; j++)
351 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->channel[i]->sq[tc].stats,
355 static void mlx5e_get_ringparam(struct net_device *dev,
356 struct ethtool_ringparam *param)
358 struct mlx5e_priv *priv = netdev_priv(dev);
359 int rq_wq_type = priv->params.rq_wq_type;
361 param->rx_max_pending = 1 << mlx5_max_log_rq_size(rq_wq_type);
362 param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
363 param->rx_pending = 1 << priv->params.log_rq_size;
364 param->tx_pending = 1 << priv->params.log_sq_size;
367 static int mlx5e_set_ringparam(struct net_device *dev,
368 struct ethtool_ringparam *param)
370 struct mlx5e_priv *priv = netdev_priv(dev);
372 int rq_wq_type = priv->params.rq_wq_type;
379 if (param->rx_jumbo_pending) {
380 netdev_info(dev, "%s: rx_jumbo_pending not supported\n",
384 if (param->rx_mini_pending) {
385 netdev_info(dev, "%s: rx_mini_pending not supported\n",
389 if (param->rx_pending < (1 << mlx5_min_log_rq_size(rq_wq_type))) {
390 netdev_info(dev, "%s: rx_pending (%d) < min (%d)\n",
391 __func__, param->rx_pending,
392 1 << mlx5_min_log_rq_size(rq_wq_type));
395 if (param->rx_pending > (1 << mlx5_max_log_rq_size(rq_wq_type))) {
396 netdev_info(dev, "%s: rx_pending (%d) > max (%d)\n",
397 __func__, param->rx_pending,
398 1 << mlx5_max_log_rq_size(rq_wq_type));
402 num_mtts = MLX5E_REQUIRED_MTTS(priv->params.num_channels, param->rx_pending);
403 if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
404 !MLX5E_VALID_NUM_MTTS(num_mtts)) {
405 netdev_info(dev, "%s: rx_pending (%d) request can't be satisfied, try to reduce.\n",
406 __func__, param->rx_pending);
410 if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
411 netdev_info(dev, "%s: tx_pending (%d) < min (%d)\n",
412 __func__, param->tx_pending,
413 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
416 if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
417 netdev_info(dev, "%s: tx_pending (%d) > max (%d)\n",
418 __func__, param->tx_pending,
419 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
423 log_rq_size = order_base_2(param->rx_pending);
424 log_sq_size = order_base_2(param->tx_pending);
425 min_rx_wqes = mlx5_min_rx_wqes(rq_wq_type, param->rx_pending);
427 if (log_rq_size == priv->params.log_rq_size &&
428 log_sq_size == priv->params.log_sq_size &&
429 min_rx_wqes == priv->params.min_rx_wqes)
432 mutex_lock(&priv->state_lock);
434 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
436 mlx5e_close_locked(dev);
438 priv->params.log_rq_size = log_rq_size;
439 priv->params.log_sq_size = log_sq_size;
440 priv->params.min_rx_wqes = min_rx_wqes;
443 err = mlx5e_open_locked(dev);
445 mutex_unlock(&priv->state_lock);
450 static void mlx5e_get_channels(struct net_device *dev,
451 struct ethtool_channels *ch)
453 struct mlx5e_priv *priv = netdev_priv(dev);
455 ch->max_combined = mlx5e_get_max_num_channels(priv->mdev);
456 ch->combined_count = priv->params.num_channels;
459 static int mlx5e_set_channels(struct net_device *dev,
460 struct ethtool_channels *ch)
462 struct mlx5e_priv *priv = netdev_priv(dev);
463 int ncv = mlx5e_get_max_num_channels(priv->mdev);
464 unsigned int count = ch->combined_count;
471 netdev_info(dev, "%s: combined_count=0 not supported\n",
475 if (ch->rx_count || ch->tx_count) {
476 netdev_info(dev, "%s: separate rx/tx count not supported\n",
481 netdev_info(dev, "%s: count (%d) > max (%d)\n",
482 __func__, count, ncv);
486 num_mtts = MLX5E_REQUIRED_MTTS(count, BIT(priv->params.log_rq_size));
487 if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
488 !MLX5E_VALID_NUM_MTTS(num_mtts)) {
489 netdev_info(dev, "%s: rx count (%d) request can't be satisfied, try to reduce.\n",
494 if (priv->params.num_channels == count)
497 mutex_lock(&priv->state_lock);
499 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
501 mlx5e_close_locked(dev);
503 arfs_enabled = dev->features & NETIF_F_NTUPLE;
505 mlx5e_arfs_disable(priv);
507 priv->params.num_channels = count;
508 mlx5e_build_default_indir_rqt(priv->mdev, priv->params.indirection_rqt,
509 MLX5E_INDIR_RQT_SIZE, count);
512 err = mlx5e_open_locked(dev);
517 err = mlx5e_arfs_enable(priv);
519 netdev_err(dev, "%s: mlx5e_arfs_enable failed: %d\n",
524 mutex_unlock(&priv->state_lock);
529 static int mlx5e_get_coalesce(struct net_device *netdev,
530 struct ethtool_coalesce *coal)
532 struct mlx5e_priv *priv = netdev_priv(netdev);
534 if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
537 coal->rx_coalesce_usecs = priv->params.rx_cq_moderation.usec;
538 coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation.pkts;
539 coal->tx_coalesce_usecs = priv->params.tx_cq_moderation.usec;
540 coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation.pkts;
541 coal->use_adaptive_rx_coalesce = priv->params.rx_am_enabled;
546 static int mlx5e_set_coalesce(struct net_device *netdev,
547 struct ethtool_coalesce *coal)
549 struct mlx5e_priv *priv = netdev_priv(netdev);
550 struct mlx5_core_dev *mdev = priv->mdev;
551 struct mlx5e_channel *c;
553 !!coal->use_adaptive_rx_coalesce != priv->params.rx_am_enabled;
559 if (!MLX5_CAP_GEN(mdev, cq_moderation))
562 mutex_lock(&priv->state_lock);
564 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
565 if (was_opened && restart) {
566 mlx5e_close_locked(netdev);
567 priv->params.rx_am_enabled = !!coal->use_adaptive_rx_coalesce;
570 priv->params.tx_cq_moderation.usec = coal->tx_coalesce_usecs;
571 priv->params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
572 priv->params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
573 priv->params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
575 if (!was_opened || restart)
578 for (i = 0; i < priv->params.num_channels; ++i) {
579 c = priv->channel[i];
581 for (tc = 0; tc < c->num_tc; tc++) {
582 mlx5_core_modify_cq_moderation(mdev,
584 coal->tx_coalesce_usecs,
585 coal->tx_max_coalesced_frames);
588 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
589 coal->rx_coalesce_usecs,
590 coal->rx_max_coalesced_frames);
594 if (was_opened && restart)
595 err = mlx5e_open_locked(netdev);
597 mutex_unlock(&priv->state_lock);
601 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
606 for_each_set_bit(proto, (unsigned long *)ð_proto_cap, MLX5E_LINK_MODES_NUMBER)
607 bitmap_or(supported_modes, supported_modes,
608 ptys2ethtool_table[proto].supported,
609 __ETHTOOL_LINK_MODE_MASK_NBITS);
612 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
617 for_each_set_bit(proto, (unsigned long *)ð_proto_cap, MLX5E_LINK_MODES_NUMBER)
618 bitmap_or(advertising_modes, advertising_modes,
619 ptys2ethtool_table[proto].advertised,
620 __ETHTOOL_LINK_MODE_MASK_NBITS);
623 static void ptys2ethtool_supported_port(struct ethtool_link_ksettings *link_ksettings,
626 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
627 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
628 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
629 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
630 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
631 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
632 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, FIBRE);
635 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
636 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
637 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
638 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
639 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
640 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Backplane);
644 int mlx5e_get_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
651 err = mlx5_query_port_proto_cap(mdev, &proto_cap, MLX5_PTYS_EN);
655 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i)
656 if (proto_cap & MLX5E_PROT_MASK(i))
657 max_speed = max(max_speed, ptys2ethtool_table[i].speed);
663 static void get_speed_duplex(struct net_device *netdev,
665 struct ethtool_link_ksettings *link_ksettings)
668 u32 speed = SPEED_UNKNOWN;
669 u8 duplex = DUPLEX_UNKNOWN;
671 if (!netif_carrier_ok(netdev))
674 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
675 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
676 speed = ptys2ethtool_table[i].speed;
677 duplex = DUPLEX_FULL;
682 link_ksettings->base.speed = speed;
683 link_ksettings->base.duplex = duplex;
686 static void get_supported(u32 eth_proto_cap,
687 struct ethtool_link_ksettings *link_ksettings)
689 unsigned long *supported = link_ksettings->link_modes.supported;
691 ptys2ethtool_supported_port(link_ksettings, eth_proto_cap);
692 ptys2ethtool_supported_link(supported, eth_proto_cap);
693 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
694 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Asym_Pause);
697 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
699 struct ethtool_link_ksettings *link_ksettings)
701 unsigned long *advertising = link_ksettings->link_modes.advertising;
703 ptys2ethtool_adver_link(advertising, eth_proto_cap);
705 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
706 if (tx_pause ^ rx_pause)
707 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
710 static u8 get_connector_port(u32 eth_proto)
712 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
713 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
714 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
715 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
719 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
720 | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
721 | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
725 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
726 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
727 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
728 | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
735 static void get_lp_advertising(u32 eth_proto_lp,
736 struct ethtool_link_ksettings *link_ksettings)
738 unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
740 ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
743 static int mlx5e_get_link_ksettings(struct net_device *netdev,
744 struct ethtool_link_ksettings *link_ksettings)
746 struct mlx5e_priv *priv = netdev_priv(netdev);
747 struct mlx5_core_dev *mdev = priv->mdev;
748 u32 out[MLX5_ST_SZ_DW(ptys_reg)];
757 err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
760 netdev_err(netdev, "%s: query port ptys failed: %d\n",
765 eth_proto_cap = MLX5_GET(ptys_reg, out, eth_proto_capability);
766 eth_proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);
767 eth_proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper);
768 eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
769 an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
770 an_status = MLX5_GET(ptys_reg, out, an_status);
772 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
773 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
775 get_supported(eth_proto_cap, link_ksettings);
776 get_advertising(eth_proto_admin, 0, 0, link_ksettings);
777 get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
779 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
781 link_ksettings->base.port = get_connector_port(eth_proto_oper);
782 get_lp_advertising(eth_proto_lp, link_ksettings);
784 if (an_status == MLX5_AN_COMPLETE)
785 ethtool_link_ksettings_add_link_mode(link_ksettings,
786 lp_advertising, Autoneg);
788 link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
790 ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
792 if (!an_disable_admin)
793 ethtool_link_ksettings_add_link_mode(link_ksettings,
794 advertising, Autoneg);
800 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
802 u32 i, ptys_modes = 0;
804 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
805 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
807 __ETHTOOL_LINK_MODE_MASK_NBITS))
808 ptys_modes |= MLX5E_PROT_MASK(i);
814 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
816 u32 i, speed_links = 0;
818 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
819 if (ptys2ethtool_table[i].speed == speed)
820 speed_links |= MLX5E_PROT_MASK(i);
826 static int mlx5e_set_link_ksettings(struct net_device *netdev,
827 const struct ethtool_link_ksettings *link_ksettings)
829 struct mlx5e_priv *priv = netdev_priv(netdev);
830 struct mlx5_core_dev *mdev = priv->mdev;
831 u32 eth_proto_cap, eth_proto_admin;
832 bool an_changes = false;
841 speed = link_ksettings->base.speed;
843 link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
844 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
845 mlx5e_ethtool2ptys_speed_link(speed);
847 err = mlx5_query_port_proto_cap(mdev, ð_proto_cap, MLX5_PTYS_EN);
849 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
854 link_modes = link_modes & eth_proto_cap;
856 netdev_err(netdev, "%s: Not supported link mode(s) requested",
862 err = mlx5_query_port_proto_admin(mdev, ð_proto_admin, MLX5_PTYS_EN);
864 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
869 mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
870 &an_disable_cap, &an_disable_admin);
872 an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
873 an_changes = ((!an_disable && an_disable_admin) ||
874 (an_disable && !an_disable_admin));
876 if (!an_changes && link_modes == eth_proto_admin)
879 mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
880 mlx5_toggle_port_link(mdev);
886 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
888 struct mlx5e_priv *priv = netdev_priv(netdev);
890 return sizeof(priv->params.toeplitz_hash_key);
893 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
895 return MLX5E_INDIR_RQT_SIZE;
898 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
901 struct mlx5e_priv *priv = netdev_priv(netdev);
904 memcpy(indir, priv->params.indirection_rqt,
905 sizeof(priv->params.indirection_rqt));
908 memcpy(key, priv->params.toeplitz_hash_key,
909 sizeof(priv->params.toeplitz_hash_key));
912 *hfunc = priv->params.rss_hfunc;
917 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
919 struct mlx5_core_dev *mdev = priv->mdev;
920 void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
923 MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
924 mlx5e_build_tir_ctx_hash(tirc, priv);
926 for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++)
927 mlx5_core_modify_tir(mdev, priv->indir_tir[i].tirn, in, inlen);
930 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
931 const u8 *key, const u8 hfunc)
933 struct mlx5e_priv *priv = netdev_priv(dev);
934 int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
937 if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
938 (hfunc != ETH_RSS_HASH_XOR) &&
939 (hfunc != ETH_RSS_HASH_TOP))
942 in = mlx5_vzalloc(inlen);
946 mutex_lock(&priv->state_lock);
949 u32 rqtn = priv->indir_rqt.rqtn;
951 memcpy(priv->params.indirection_rqt, indir,
952 sizeof(priv->params.indirection_rqt));
953 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, 0);
957 memcpy(priv->params.toeplitz_hash_key, key,
958 sizeof(priv->params.toeplitz_hash_key));
960 if (hfunc != ETH_RSS_HASH_NO_CHANGE)
961 priv->params.rss_hfunc = hfunc;
963 mlx5e_modify_tirs_hash(priv, in, inlen);
965 mutex_unlock(&priv->state_lock);
972 static int mlx5e_get_rxnfc(struct net_device *netdev,
973 struct ethtool_rxnfc *info, u32 *rule_locs)
975 struct mlx5e_priv *priv = netdev_priv(netdev);
979 case ETHTOOL_GRXRINGS:
980 info->data = priv->params.num_channels;
982 case ETHTOOL_GRXCLSRLCNT:
983 info->rule_cnt = priv->fs.ethtool.tot_num_rules;
985 case ETHTOOL_GRXCLSRULE:
986 err = mlx5e_ethtool_get_flow(priv, info, info->fs.location);
988 case ETHTOOL_GRXCLSRLALL:
989 err = mlx5e_ethtool_get_all_flows(priv, info, rule_locs);
999 static int mlx5e_get_tunable(struct net_device *dev,
1000 const struct ethtool_tunable *tuna,
1003 const struct mlx5e_priv *priv = netdev_priv(dev);
1007 case ETHTOOL_TX_COPYBREAK:
1008 *(u32 *)data = priv->params.tx_max_inline;
1018 static int mlx5e_set_tunable(struct net_device *dev,
1019 const struct ethtool_tunable *tuna,
1022 struct mlx5e_priv *priv = netdev_priv(dev);
1023 struct mlx5_core_dev *mdev = priv->mdev;
1029 case ETHTOOL_TX_COPYBREAK:
1031 if (val > mlx5e_get_max_inline_cap(mdev)) {
1036 mutex_lock(&priv->state_lock);
1038 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
1040 mlx5e_close_locked(dev);
1042 priv->params.tx_max_inline = val;
1045 err = mlx5e_open_locked(dev);
1047 mutex_unlock(&priv->state_lock);
1057 static void mlx5e_get_pauseparam(struct net_device *netdev,
1058 struct ethtool_pauseparam *pauseparam)
1060 struct mlx5e_priv *priv = netdev_priv(netdev);
1061 struct mlx5_core_dev *mdev = priv->mdev;
1064 err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1065 &pauseparam->tx_pause);
1067 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1072 static int mlx5e_set_pauseparam(struct net_device *netdev,
1073 struct ethtool_pauseparam *pauseparam)
1075 struct mlx5e_priv *priv = netdev_priv(netdev);
1076 struct mlx5_core_dev *mdev = priv->mdev;
1079 if (pauseparam->autoneg)
1082 err = mlx5_set_port_pause(mdev,
1083 pauseparam->rx_pause ? 1 : 0,
1084 pauseparam->tx_pause ? 1 : 0);
1086 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1093 static int mlx5e_get_ts_info(struct net_device *dev,
1094 struct ethtool_ts_info *info)
1096 struct mlx5e_priv *priv = netdev_priv(dev);
1099 ret = ethtool_op_get_ts_info(dev, info);
1103 info->phc_index = priv->tstamp.ptp ?
1104 ptp_clock_index(priv->tstamp.ptp) : -1;
1106 if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
1109 info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
1110 SOF_TIMESTAMPING_RX_HARDWARE |
1111 SOF_TIMESTAMPING_RAW_HARDWARE;
1113 info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) |
1114 (BIT(1) << HWTSTAMP_TX_ON);
1116 info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) |
1117 (BIT(1) << HWTSTAMP_FILTER_ALL);
1122 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1126 if (MLX5_CAP_GEN(mdev, wol_g))
1129 if (MLX5_CAP_GEN(mdev, wol_s))
1130 ret |= WAKE_MAGICSECURE;
1132 if (MLX5_CAP_GEN(mdev, wol_a))
1135 if (MLX5_CAP_GEN(mdev, wol_b))
1138 if (MLX5_CAP_GEN(mdev, wol_m))
1141 if (MLX5_CAP_GEN(mdev, wol_u))
1144 if (MLX5_CAP_GEN(mdev, wol_p))
1150 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1154 if (mode & MLX5_WOL_MAGIC)
1157 if (mode & MLX5_WOL_SECURED_MAGIC)
1158 ret |= WAKE_MAGICSECURE;
1160 if (mode & MLX5_WOL_ARP)
1163 if (mode & MLX5_WOL_BROADCAST)
1166 if (mode & MLX5_WOL_MULTICAST)
1169 if (mode & MLX5_WOL_UNICAST)
1172 if (mode & MLX5_WOL_PHY_ACTIVITY)
1178 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1182 if (mode & WAKE_MAGIC)
1183 ret |= MLX5_WOL_MAGIC;
1185 if (mode & WAKE_MAGICSECURE)
1186 ret |= MLX5_WOL_SECURED_MAGIC;
1188 if (mode & WAKE_ARP)
1189 ret |= MLX5_WOL_ARP;
1191 if (mode & WAKE_BCAST)
1192 ret |= MLX5_WOL_BROADCAST;
1194 if (mode & WAKE_MCAST)
1195 ret |= MLX5_WOL_MULTICAST;
1197 if (mode & WAKE_UCAST)
1198 ret |= MLX5_WOL_UNICAST;
1200 if (mode & WAKE_PHY)
1201 ret |= MLX5_WOL_PHY_ACTIVITY;
1206 static void mlx5e_get_wol(struct net_device *netdev,
1207 struct ethtool_wolinfo *wol)
1209 struct mlx5e_priv *priv = netdev_priv(netdev);
1210 struct mlx5_core_dev *mdev = priv->mdev;
1214 memset(wol, 0, sizeof(*wol));
1216 wol->supported = mlx5e_get_wol_supported(mdev);
1217 if (!wol->supported)
1220 err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1224 wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1227 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1229 struct mlx5e_priv *priv = netdev_priv(netdev);
1230 struct mlx5_core_dev *mdev = priv->mdev;
1231 __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1237 if (wol->wolopts & ~wol_supported)
1240 mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1242 return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1245 static int mlx5e_set_phys_id(struct net_device *dev,
1246 enum ethtool_phys_id_state state)
1248 struct mlx5e_priv *priv = netdev_priv(dev);
1249 struct mlx5_core_dev *mdev = priv->mdev;
1250 u16 beacon_duration;
1252 if (!MLX5_CAP_GEN(mdev, beacon_led))
1256 case ETHTOOL_ID_ACTIVE:
1257 beacon_duration = MLX5_BEACON_DURATION_INF;
1259 case ETHTOOL_ID_INACTIVE:
1260 beacon_duration = MLX5_BEACON_DURATION_OFF;
1266 return mlx5_set_port_beacon(mdev, beacon_duration);
1269 static int mlx5e_get_module_info(struct net_device *netdev,
1270 struct ethtool_modinfo *modinfo)
1272 struct mlx5e_priv *priv = netdev_priv(netdev);
1273 struct mlx5_core_dev *dev = priv->mdev;
1277 size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1281 /* data[0] = identifier byte */
1283 case MLX5_MODULE_ID_QSFP:
1284 modinfo->type = ETH_MODULE_SFF_8436;
1285 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1287 case MLX5_MODULE_ID_QSFP_PLUS:
1288 case MLX5_MODULE_ID_QSFP28:
1289 /* data[1] = revision id */
1290 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1291 modinfo->type = ETH_MODULE_SFF_8636;
1292 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1294 modinfo->type = ETH_MODULE_SFF_8436;
1295 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1298 case MLX5_MODULE_ID_SFP:
1299 modinfo->type = ETH_MODULE_SFF_8472;
1300 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1303 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1311 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1312 struct ethtool_eeprom *ee,
1315 struct mlx5e_priv *priv = netdev_priv(netdev);
1316 struct mlx5_core_dev *mdev = priv->mdev;
1317 int offset = ee->offset;
1324 memset(data, 0, ee->len);
1326 while (i < ee->len) {
1327 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1334 if (size_read < 0) {
1335 netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1336 __func__, size_read);
1341 offset += size_read;
1347 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1349 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1351 struct mlx5e_priv *priv = netdev_priv(netdev);
1352 struct mlx5_core_dev *mdev = priv->mdev;
1353 bool rx_mode_changed;
1354 u8 rx_cq_period_mode;
1358 rx_cq_period_mode = enable ?
1359 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1360 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1361 rx_mode_changed = rx_cq_period_mode != priv->params.rx_cq_period_mode;
1363 if (rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1364 !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1367 if (!rx_mode_changed)
1370 reset = test_bit(MLX5E_STATE_OPENED, &priv->state);
1372 mlx5e_close_locked(netdev);
1374 mlx5e_set_rx_cq_mode_params(&priv->params, rx_cq_period_mode);
1377 err = mlx5e_open_locked(netdev);
1382 static int mlx5e_handle_pflag(struct net_device *netdev,
1384 enum mlx5e_priv_flag flag,
1385 mlx5e_pflag_handler pflag_handler)
1387 struct mlx5e_priv *priv = netdev_priv(netdev);
1388 bool enable = !!(wanted_flags & flag);
1389 u32 changes = wanted_flags ^ priv->pflags;
1392 if (!(changes & flag))
1395 err = pflag_handler(netdev, enable);
1397 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1398 enable ? "Enable" : "Disable", flag, err);
1402 MLX5E_SET_PRIV_FLAG(priv, flag, enable);
1406 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1408 struct mlx5e_priv *priv = netdev_priv(netdev);
1411 mutex_lock(&priv->state_lock);
1413 err = mlx5e_handle_pflag(netdev, pflags,
1414 MLX5E_PFLAG_RX_CQE_BASED_MODER,
1415 set_pflag_rx_cqe_based_moder);
1417 mutex_unlock(&priv->state_lock);
1418 return err ? -EINVAL : 0;
1421 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1423 struct mlx5e_priv *priv = netdev_priv(netdev);
1425 return priv->pflags;
1428 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1431 struct mlx5e_priv *priv = netdev_priv(dev);
1434 case ETHTOOL_SRXCLSRLINS:
1435 err = mlx5e_ethtool_flow_replace(priv, &cmd->fs);
1437 case ETHTOOL_SRXCLSRLDEL:
1438 err = mlx5e_ethtool_flow_remove(priv, cmd->fs.location);
1448 const struct ethtool_ops mlx5e_ethtool_ops = {
1449 .get_drvinfo = mlx5e_get_drvinfo,
1450 .get_link = ethtool_op_get_link,
1451 .get_strings = mlx5e_get_strings,
1452 .get_sset_count = mlx5e_get_sset_count,
1453 .get_ethtool_stats = mlx5e_get_ethtool_stats,
1454 .get_ringparam = mlx5e_get_ringparam,
1455 .set_ringparam = mlx5e_set_ringparam,
1456 .get_channels = mlx5e_get_channels,
1457 .set_channels = mlx5e_set_channels,
1458 .get_coalesce = mlx5e_get_coalesce,
1459 .set_coalesce = mlx5e_set_coalesce,
1460 .get_link_ksettings = mlx5e_get_link_ksettings,
1461 .set_link_ksettings = mlx5e_set_link_ksettings,
1462 .get_rxfh_key_size = mlx5e_get_rxfh_key_size,
1463 .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1464 .get_rxfh = mlx5e_get_rxfh,
1465 .set_rxfh = mlx5e_set_rxfh,
1466 .get_rxnfc = mlx5e_get_rxnfc,
1467 .set_rxnfc = mlx5e_set_rxnfc,
1468 .get_tunable = mlx5e_get_tunable,
1469 .set_tunable = mlx5e_set_tunable,
1470 .get_pauseparam = mlx5e_get_pauseparam,
1471 .set_pauseparam = mlx5e_set_pauseparam,
1472 .get_ts_info = mlx5e_get_ts_info,
1473 .set_phys_id = mlx5e_set_phys_id,
1474 .get_wol = mlx5e_get_wol,
1475 .set_wol = mlx5e_set_wol,
1476 .get_module_info = mlx5e_get_module_info,
1477 .get_module_eeprom = mlx5e_get_module_eeprom,
1478 .get_priv_flags = mlx5e_get_priv_flags,
1479 .set_priv_flags = mlx5e_set_priv_flags