net/mlx5e: Limit UMR length to the device's limitation
[cascardo/linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_ethtool.c
1 /*
2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include "en.h"
34
35 static void mlx5e_get_drvinfo(struct net_device *dev,
36                               struct ethtool_drvinfo *drvinfo)
37 {
38         struct mlx5e_priv *priv = netdev_priv(dev);
39         struct mlx5_core_dev *mdev = priv->mdev;
40
41         strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
42         strlcpy(drvinfo->version, DRIVER_VERSION " (" DRIVER_RELDATE ")",
43                 sizeof(drvinfo->version));
44         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
45                  "%d.%d.%d",
46                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev));
47         strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
48                 sizeof(drvinfo->bus_info));
49 }
50
51 struct ptys2ethtool_config {
52         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
53         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
54         u32 speed;
55 };
56
57 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
58
59 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...)               \
60         ({                                                              \
61                 struct ptys2ethtool_config *cfg;                        \
62                 const unsigned int modes[] = { __VA_ARGS__ };           \
63                 unsigned int i;                                         \
64                 cfg = &ptys2ethtool_table[reg_];                        \
65                 cfg->speed = speed_;                                    \
66                 bitmap_zero(cfg->supported,                             \
67                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
68                 bitmap_zero(cfg->advertised,                            \
69                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
70                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
71                         __set_bit(modes[i], cfg->supported);            \
72                         __set_bit(modes[i], cfg->advertised);           \
73                 }                                                       \
74         })
75
76 void mlx5e_build_ptys2ethtool_map(void)
77 {
78         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, SPEED_1000,
79                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
80         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, SPEED_1000,
81                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
82         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, SPEED_10000,
83                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
84         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, SPEED_10000,
85                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
86         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, SPEED_10000,
87                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
88         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, SPEED_20000,
89                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
90         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, SPEED_40000,
91                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
92         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, SPEED_40000,
93                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
94         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, SPEED_56000,
95                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
96         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, SPEED_10000,
97                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
98         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, SPEED_10000,
99                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
100         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, SPEED_10000,
101                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
102         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, SPEED_40000,
103                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
104         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, SPEED_40000,
105                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
106         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, SPEED_50000,
107                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
108         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, SPEED_100000,
109                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
110         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, SPEED_100000,
111                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
112         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, SPEED_100000,
113                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
114         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, SPEED_100000,
115                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
116         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, SPEED_10000,
117                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
118         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, SPEED_25000,
119                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
120         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, SPEED_25000,
121                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
122         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, SPEED_25000,
123                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
124         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, SPEED_50000,
125                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
126         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, SPEED_50000,
127                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
128 }
129
130 static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv)
131 {
132         struct mlx5_core_dev *mdev = priv->mdev;
133         u8 pfc_en_tx;
134         u8 pfc_en_rx;
135         int err;
136
137         err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx);
138
139         return err ? 0 : pfc_en_tx | pfc_en_rx;
140 }
141
142 static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv)
143 {
144         struct mlx5_core_dev *mdev = priv->mdev;
145         u32 rx_pause;
146         u32 tx_pause;
147         int err;
148
149         err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
150
151         return err ? false : rx_pause | tx_pause;
152 }
153
154 #define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter))
155 #define MLX5E_NUM_RQ_STATS(priv) \
156         (NUM_RQ_STATS * priv->params.num_channels * \
157          test_bit(MLX5E_STATE_OPENED, &priv->state))
158 #define MLX5E_NUM_SQ_STATS(priv) \
159         (NUM_SQ_STATS * priv->params.num_channels * priv->params.num_tc * \
160          test_bit(MLX5E_STATE_OPENED, &priv->state))
161 #define MLX5E_NUM_PFC_COUNTERS(priv) \
162         ((mlx5e_query_global_pause_combined(priv) + hweight8(mlx5e_query_pfc_combined(priv))) * \
163           NUM_PPORT_PER_PRIO_PFC_COUNTERS)
164
165 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
166 {
167         struct mlx5e_priv *priv = netdev_priv(dev);
168
169         switch (sset) {
170         case ETH_SS_STATS:
171                 return NUM_SW_COUNTERS +
172                        MLX5E_NUM_Q_CNTRS(priv) +
173                        NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS +
174                        MLX5E_NUM_RQ_STATS(priv) +
175                        MLX5E_NUM_SQ_STATS(priv) +
176                        MLX5E_NUM_PFC_COUNTERS(priv);
177         case ETH_SS_PRIV_FLAGS:
178                 return ARRAY_SIZE(mlx5e_priv_flags);
179         /* fallthrough */
180         default:
181                 return -EOPNOTSUPP;
182         }
183 }
184
185 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
186 {
187         int i, j, tc, prio, idx = 0;
188         unsigned long pfc_combined;
189
190         /* SW counters */
191         for (i = 0; i < NUM_SW_COUNTERS; i++)
192                 strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format);
193
194         /* Q counters */
195         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
196                 strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].format);
197
198         /* VPORT counters */
199         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
200                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
201                        vport_stats_desc[i].format);
202
203         /* PPORT counters */
204         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
205                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
206                        pport_802_3_stats_desc[i].format);
207
208         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
209                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
210                        pport_2863_stats_desc[i].format);
211
212         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
213                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
214                        pport_2819_stats_desc[i].format);
215
216         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
217                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
218                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
219                                 pport_per_prio_traffic_stats_desc[i].format, prio);
220         }
221
222         pfc_combined = mlx5e_query_pfc_combined(priv);
223         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
224                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
225                         char pfc_string[ETH_GSTRING_LEN];
226
227                         snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio);
228                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
229                                 pport_per_prio_pfc_stats_desc[i].format, pfc_string);
230                 }
231         }
232
233         if (mlx5e_query_global_pause_combined(priv)) {
234                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
235                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
236                                 pport_per_prio_pfc_stats_desc[i].format, "global");
237                 }
238         }
239
240         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
241                 return;
242
243         /* per channel counters */
244         for (i = 0; i < priv->params.num_channels; i++)
245                 for (j = 0; j < NUM_RQ_STATS; j++)
246                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
247                                 rq_stats_desc[j].format, i);
248
249         for (tc = 0; tc < priv->params.num_tc; tc++)
250                 for (i = 0; i < priv->params.num_channels; i++)
251                         for (j = 0; j < NUM_SQ_STATS; j++)
252                                 sprintf(data + (idx++) * ETH_GSTRING_LEN,
253                                         sq_stats_desc[j].format,
254                                         priv->channeltc_to_txq_map[i][tc]);
255 }
256
257 static void mlx5e_get_strings(struct net_device *dev,
258                               uint32_t stringset, uint8_t *data)
259 {
260         struct mlx5e_priv *priv = netdev_priv(dev);
261         int i;
262
263         switch (stringset) {
264         case ETH_SS_PRIV_FLAGS:
265                 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
266                         strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
267                 break;
268
269         case ETH_SS_TEST:
270                 break;
271
272         case ETH_SS_STATS:
273                 mlx5e_fill_stats_strings(priv, data);
274                 break;
275         }
276 }
277
278 static void mlx5e_get_ethtool_stats(struct net_device *dev,
279                                     struct ethtool_stats *stats, u64 *data)
280 {
281         struct mlx5e_priv *priv = netdev_priv(dev);
282         int i, j, tc, prio, idx = 0;
283         unsigned long pfc_combined;
284
285         if (!data)
286                 return;
287
288         mutex_lock(&priv->state_lock);
289         if (test_bit(MLX5E_STATE_OPENED, &priv->state))
290                 mlx5e_update_stats(priv);
291         mutex_unlock(&priv->state_lock);
292
293         for (i = 0; i < NUM_SW_COUNTERS; i++)
294                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw,
295                                                    sw_stats_desc, i);
296
297         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
298                 data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
299                                                    q_stats_desc, i);
300
301         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
302                 data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out,
303                                                   vport_stats_desc, i);
304
305         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
306                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters,
307                                                   pport_802_3_stats_desc, i);
308
309         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
310                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters,
311                                                   pport_2863_stats_desc, i);
312
313         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
314                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters,
315                                                   pport_2819_stats_desc, i);
316
317         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
318                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
319                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
320                                                  pport_per_prio_traffic_stats_desc, i);
321         }
322
323         pfc_combined = mlx5e_query_pfc_combined(priv);
324         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
325                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
326                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
327                                                           pport_per_prio_pfc_stats_desc, i);
328                 }
329         }
330
331         if (mlx5e_query_global_pause_combined(priv)) {
332                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
333                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0],
334                                                           pport_per_prio_pfc_stats_desc, 0);
335                 }
336         }
337
338         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
339                 return;
340
341         /* per channel counters */
342         for (i = 0; i < priv->params.num_channels; i++)
343                 for (j = 0; j < NUM_RQ_STATS; j++)
344                         data[idx++] =
345                                MLX5E_READ_CTR64_CPU(&priv->channel[i]->rq.stats,
346                                                     rq_stats_desc, j);
347
348         for (tc = 0; tc < priv->params.num_tc; tc++)
349                 for (i = 0; i < priv->params.num_channels; i++)
350                         for (j = 0; j < NUM_SQ_STATS; j++)
351                                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->channel[i]->sq[tc].stats,
352                                                                    sq_stats_desc, j);
353 }
354
355 static void mlx5e_get_ringparam(struct net_device *dev,
356                                 struct ethtool_ringparam *param)
357 {
358         struct mlx5e_priv *priv = netdev_priv(dev);
359         int rq_wq_type = priv->params.rq_wq_type;
360
361         param->rx_max_pending = 1 << mlx5_max_log_rq_size(rq_wq_type);
362         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
363         param->rx_pending     = 1 << priv->params.log_rq_size;
364         param->tx_pending     = 1 << priv->params.log_sq_size;
365 }
366
367 static int mlx5e_set_ringparam(struct net_device *dev,
368                                struct ethtool_ringparam *param)
369 {
370         struct mlx5e_priv *priv = netdev_priv(dev);
371         bool was_opened;
372         int rq_wq_type = priv->params.rq_wq_type;
373         u16 min_rx_wqes;
374         u8 log_rq_size;
375         u8 log_sq_size;
376         u32 num_mtts;
377         int err = 0;
378
379         if (param->rx_jumbo_pending) {
380                 netdev_info(dev, "%s: rx_jumbo_pending not supported\n",
381                             __func__);
382                 return -EINVAL;
383         }
384         if (param->rx_mini_pending) {
385                 netdev_info(dev, "%s: rx_mini_pending not supported\n",
386                             __func__);
387                 return -EINVAL;
388         }
389         if (param->rx_pending < (1 << mlx5_min_log_rq_size(rq_wq_type))) {
390                 netdev_info(dev, "%s: rx_pending (%d) < min (%d)\n",
391                             __func__, param->rx_pending,
392                             1 << mlx5_min_log_rq_size(rq_wq_type));
393                 return -EINVAL;
394         }
395         if (param->rx_pending > (1 << mlx5_max_log_rq_size(rq_wq_type))) {
396                 netdev_info(dev, "%s: rx_pending (%d) > max (%d)\n",
397                             __func__, param->rx_pending,
398                             1 << mlx5_max_log_rq_size(rq_wq_type));
399                 return -EINVAL;
400         }
401
402         num_mtts = MLX5E_REQUIRED_MTTS(priv->params.num_channels, param->rx_pending);
403         if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
404             !MLX5E_VALID_NUM_MTTS(num_mtts)) {
405                 netdev_info(dev, "%s: rx_pending (%d) request can't be satisfied, try to reduce.\n",
406                             __func__, param->rx_pending);
407                 return -EINVAL;
408         }
409
410         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
411                 netdev_info(dev, "%s: tx_pending (%d) < min (%d)\n",
412                             __func__, param->tx_pending,
413                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
414                 return -EINVAL;
415         }
416         if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
417                 netdev_info(dev, "%s: tx_pending (%d) > max (%d)\n",
418                             __func__, param->tx_pending,
419                             1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
420                 return -EINVAL;
421         }
422
423         log_rq_size = order_base_2(param->rx_pending);
424         log_sq_size = order_base_2(param->tx_pending);
425         min_rx_wqes = mlx5_min_rx_wqes(rq_wq_type, param->rx_pending);
426
427         if (log_rq_size == priv->params.log_rq_size &&
428             log_sq_size == priv->params.log_sq_size &&
429             min_rx_wqes == priv->params.min_rx_wqes)
430                 return 0;
431
432         mutex_lock(&priv->state_lock);
433
434         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
435         if (was_opened)
436                 mlx5e_close_locked(dev);
437
438         priv->params.log_rq_size = log_rq_size;
439         priv->params.log_sq_size = log_sq_size;
440         priv->params.min_rx_wqes = min_rx_wqes;
441
442         if (was_opened)
443                 err = mlx5e_open_locked(dev);
444
445         mutex_unlock(&priv->state_lock);
446
447         return err;
448 }
449
450 static void mlx5e_get_channels(struct net_device *dev,
451                                struct ethtool_channels *ch)
452 {
453         struct mlx5e_priv *priv = netdev_priv(dev);
454
455         ch->max_combined   = mlx5e_get_max_num_channels(priv->mdev);
456         ch->combined_count = priv->params.num_channels;
457 }
458
459 static int mlx5e_set_channels(struct net_device *dev,
460                               struct ethtool_channels *ch)
461 {
462         struct mlx5e_priv *priv = netdev_priv(dev);
463         int ncv = mlx5e_get_max_num_channels(priv->mdev);
464         unsigned int count = ch->combined_count;
465         bool arfs_enabled;
466         bool was_opened;
467         u32 num_mtts;
468         int err = 0;
469
470         if (!count) {
471                 netdev_info(dev, "%s: combined_count=0 not supported\n",
472                             __func__);
473                 return -EINVAL;
474         }
475         if (ch->rx_count || ch->tx_count) {
476                 netdev_info(dev, "%s: separate rx/tx count not supported\n",
477                             __func__);
478                 return -EINVAL;
479         }
480         if (count > ncv) {
481                 netdev_info(dev, "%s: count (%d) > max (%d)\n",
482                             __func__, count, ncv);
483                 return -EINVAL;
484         }
485
486         num_mtts = MLX5E_REQUIRED_MTTS(count, BIT(priv->params.log_rq_size));
487         if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
488             !MLX5E_VALID_NUM_MTTS(num_mtts)) {
489                 netdev_info(dev, "%s: rx count (%d) request can't be satisfied, try to reduce.\n",
490                             __func__, count);
491                 return -EINVAL;
492         }
493
494         if (priv->params.num_channels == count)
495                 return 0;
496
497         mutex_lock(&priv->state_lock);
498
499         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
500         if (was_opened)
501                 mlx5e_close_locked(dev);
502
503         arfs_enabled = dev->features & NETIF_F_NTUPLE;
504         if (arfs_enabled)
505                 mlx5e_arfs_disable(priv);
506
507         priv->params.num_channels = count;
508         mlx5e_build_default_indir_rqt(priv->mdev, priv->params.indirection_rqt,
509                                       MLX5E_INDIR_RQT_SIZE, count);
510
511         if (was_opened)
512                 err = mlx5e_open_locked(dev);
513         if (err)
514                 goto out;
515
516         if (arfs_enabled) {
517                 err = mlx5e_arfs_enable(priv);
518                 if (err)
519                         netdev_err(dev, "%s: mlx5e_arfs_enable failed: %d\n",
520                                    __func__, err);
521         }
522
523 out:
524         mutex_unlock(&priv->state_lock);
525
526         return err;
527 }
528
529 static int mlx5e_get_coalesce(struct net_device *netdev,
530                               struct ethtool_coalesce *coal)
531 {
532         struct mlx5e_priv *priv = netdev_priv(netdev);
533
534         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
535                 return -ENOTSUPP;
536
537         coal->rx_coalesce_usecs       = priv->params.rx_cq_moderation.usec;
538         coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation.pkts;
539         coal->tx_coalesce_usecs       = priv->params.tx_cq_moderation.usec;
540         coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation.pkts;
541         coal->use_adaptive_rx_coalesce = priv->params.rx_am_enabled;
542
543         return 0;
544 }
545
546 static int mlx5e_set_coalesce(struct net_device *netdev,
547                               struct ethtool_coalesce *coal)
548 {
549         struct mlx5e_priv *priv    = netdev_priv(netdev);
550         struct mlx5_core_dev *mdev = priv->mdev;
551         struct mlx5e_channel *c;
552         bool restart =
553                 !!coal->use_adaptive_rx_coalesce != priv->params.rx_am_enabled;
554         bool was_opened;
555         int err = 0;
556         int tc;
557         int i;
558
559         if (!MLX5_CAP_GEN(mdev, cq_moderation))
560                 return -ENOTSUPP;
561
562         mutex_lock(&priv->state_lock);
563
564         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
565         if (was_opened && restart) {
566                 mlx5e_close_locked(netdev);
567                 priv->params.rx_am_enabled = !!coal->use_adaptive_rx_coalesce;
568         }
569
570         priv->params.tx_cq_moderation.usec = coal->tx_coalesce_usecs;
571         priv->params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
572         priv->params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
573         priv->params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
574
575         if (!was_opened || restart)
576                 goto out;
577
578         for (i = 0; i < priv->params.num_channels; ++i) {
579                 c = priv->channel[i];
580
581                 for (tc = 0; tc < c->num_tc; tc++) {
582                         mlx5_core_modify_cq_moderation(mdev,
583                                                 &c->sq[tc].cq.mcq,
584                                                 coal->tx_coalesce_usecs,
585                                                 coal->tx_max_coalesced_frames);
586                 }
587
588                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
589                                                coal->rx_coalesce_usecs,
590                                                coal->rx_max_coalesced_frames);
591         }
592
593 out:
594         if (was_opened && restart)
595                 err = mlx5e_open_locked(netdev);
596
597         mutex_unlock(&priv->state_lock);
598         return err;
599 }
600
601 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
602                                         u32 eth_proto_cap)
603 {
604         int proto;
605
606         for_each_set_bit(proto, (unsigned long *)&eth_proto_cap, MLX5E_LINK_MODES_NUMBER)
607                 bitmap_or(supported_modes, supported_modes,
608                           ptys2ethtool_table[proto].supported,
609                           __ETHTOOL_LINK_MODE_MASK_NBITS);
610 }
611
612 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
613                                     u32 eth_proto_cap)
614 {
615         int proto;
616
617         for_each_set_bit(proto, (unsigned long *)&eth_proto_cap, MLX5E_LINK_MODES_NUMBER)
618                 bitmap_or(advertising_modes, advertising_modes,
619                           ptys2ethtool_table[proto].advertised,
620                           __ETHTOOL_LINK_MODE_MASK_NBITS);
621 }
622
623 static void ptys2ethtool_supported_port(struct ethtool_link_ksettings *link_ksettings,
624                                         u32 eth_proto_cap)
625 {
626         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
627                            | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
628                            | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
629                            | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
630                            | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
631                            | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
632                 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, FIBRE);
633         }
634
635         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
636                            | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
637                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
638                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
639                            | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
640                 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Backplane);
641         }
642 }
643
644 int mlx5e_get_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
645 {
646         u32 max_speed = 0;
647         u32 proto_cap;
648         int err;
649         int i;
650
651         err = mlx5_query_port_proto_cap(mdev, &proto_cap, MLX5_PTYS_EN);
652         if (err)
653                 return err;
654
655         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i)
656                 if (proto_cap & MLX5E_PROT_MASK(i))
657                         max_speed = max(max_speed, ptys2ethtool_table[i].speed);
658
659         *speed = max_speed;
660         return 0;
661 }
662
663 static void get_speed_duplex(struct net_device *netdev,
664                              u32 eth_proto_oper,
665                              struct ethtool_link_ksettings *link_ksettings)
666 {
667         int i;
668         u32 speed = SPEED_UNKNOWN;
669         u8 duplex = DUPLEX_UNKNOWN;
670
671         if (!netif_carrier_ok(netdev))
672                 goto out;
673
674         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
675                 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
676                         speed = ptys2ethtool_table[i].speed;
677                         duplex = DUPLEX_FULL;
678                         break;
679                 }
680         }
681 out:
682         link_ksettings->base.speed = speed;
683         link_ksettings->base.duplex = duplex;
684 }
685
686 static void get_supported(u32 eth_proto_cap,
687                           struct ethtool_link_ksettings *link_ksettings)
688 {
689         unsigned long *supported = link_ksettings->link_modes.supported;
690
691         ptys2ethtool_supported_port(link_ksettings, eth_proto_cap);
692         ptys2ethtool_supported_link(supported, eth_proto_cap);
693         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
694         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Asym_Pause);
695 }
696
697 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
698                             u8 rx_pause,
699                             struct ethtool_link_ksettings *link_ksettings)
700 {
701         unsigned long *advertising = link_ksettings->link_modes.advertising;
702
703         ptys2ethtool_adver_link(advertising, eth_proto_cap);
704         if (tx_pause)
705                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
706         if (tx_pause ^ rx_pause)
707                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
708 }
709
710 static u8 get_connector_port(u32 eth_proto)
711 {
712         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
713                          | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
714                          | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
715                          | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
716                         return PORT_FIBRE;
717         }
718
719         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
720                          | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
721                          | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
722                         return PORT_DA;
723         }
724
725         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
726                          | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
727                          | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
728                          | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
729                         return PORT_NONE;
730         }
731
732         return PORT_OTHER;
733 }
734
735 static void get_lp_advertising(u32 eth_proto_lp,
736                                struct ethtool_link_ksettings *link_ksettings)
737 {
738         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
739
740         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
741 }
742
743 static int mlx5e_get_link_ksettings(struct net_device *netdev,
744                                     struct ethtool_link_ksettings *link_ksettings)
745 {
746         struct mlx5e_priv *priv    = netdev_priv(netdev);
747         struct mlx5_core_dev *mdev = priv->mdev;
748         u32 out[MLX5_ST_SZ_DW(ptys_reg)];
749         u32 eth_proto_cap;
750         u32 eth_proto_admin;
751         u32 eth_proto_lp;
752         u32 eth_proto_oper;
753         u8 an_disable_admin;
754         u8 an_status;
755         int err;
756
757         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
758
759         if (err) {
760                 netdev_err(netdev, "%s: query port ptys failed: %d\n",
761                            __func__, err);
762                 goto err_query_ptys;
763         }
764
765         eth_proto_cap    = MLX5_GET(ptys_reg, out, eth_proto_capability);
766         eth_proto_admin  = MLX5_GET(ptys_reg, out, eth_proto_admin);
767         eth_proto_oper   = MLX5_GET(ptys_reg, out, eth_proto_oper);
768         eth_proto_lp     = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
769         an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
770         an_status        = MLX5_GET(ptys_reg, out, an_status);
771
772         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
773         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
774
775         get_supported(eth_proto_cap, link_ksettings);
776         get_advertising(eth_proto_admin, 0, 0, link_ksettings);
777         get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
778
779         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
780
781         link_ksettings->base.port = get_connector_port(eth_proto_oper);
782         get_lp_advertising(eth_proto_lp, link_ksettings);
783
784         if (an_status == MLX5_AN_COMPLETE)
785                 ethtool_link_ksettings_add_link_mode(link_ksettings,
786                                                      lp_advertising, Autoneg);
787
788         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
789                                                           AUTONEG_ENABLE;
790         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
791                                              Autoneg);
792         if (!an_disable_admin)
793                 ethtool_link_ksettings_add_link_mode(link_ksettings,
794                                                      advertising, Autoneg);
795
796 err_query_ptys:
797         return err;
798 }
799
800 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
801 {
802         u32 i, ptys_modes = 0;
803
804         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
805                 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
806                                       link_modes,
807                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
808                         ptys_modes |= MLX5E_PROT_MASK(i);
809         }
810
811         return ptys_modes;
812 }
813
814 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
815 {
816         u32 i, speed_links = 0;
817
818         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
819                 if (ptys2ethtool_table[i].speed == speed)
820                         speed_links |= MLX5E_PROT_MASK(i);
821         }
822
823         return speed_links;
824 }
825
826 static int mlx5e_set_link_ksettings(struct net_device *netdev,
827                                     const struct ethtool_link_ksettings *link_ksettings)
828 {
829         struct mlx5e_priv *priv    = netdev_priv(netdev);
830         struct mlx5_core_dev *mdev = priv->mdev;
831         u32 eth_proto_cap, eth_proto_admin;
832         bool an_changes = false;
833         u8 an_disable_admin;
834         u8 an_disable_cap;
835         bool an_disable;
836         u32 link_modes;
837         u8 an_status;
838         u32 speed;
839         int err;
840
841         speed = link_ksettings->base.speed;
842
843         link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
844                 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
845                 mlx5e_ethtool2ptys_speed_link(speed);
846
847         err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
848         if (err) {
849                 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
850                            __func__, err);
851                 goto out;
852         }
853
854         link_modes = link_modes & eth_proto_cap;
855         if (!link_modes) {
856                 netdev_err(netdev, "%s: Not supported link mode(s) requested",
857                            __func__);
858                 err = -EINVAL;
859                 goto out;
860         }
861
862         err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
863         if (err) {
864                 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
865                            __func__, err);
866                 goto out;
867         }
868
869         mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
870                                 &an_disable_cap, &an_disable_admin);
871
872         an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
873         an_changes = ((!an_disable && an_disable_admin) ||
874                       (an_disable && !an_disable_admin));
875
876         if (!an_changes && link_modes == eth_proto_admin)
877                 goto out;
878
879         mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
880         mlx5_toggle_port_link(mdev);
881
882 out:
883         return err;
884 }
885
886 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
887 {
888         struct mlx5e_priv *priv = netdev_priv(netdev);
889
890         return sizeof(priv->params.toeplitz_hash_key);
891 }
892
893 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
894 {
895         return MLX5E_INDIR_RQT_SIZE;
896 }
897
898 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
899                           u8 *hfunc)
900 {
901         struct mlx5e_priv *priv = netdev_priv(netdev);
902
903         if (indir)
904                 memcpy(indir, priv->params.indirection_rqt,
905                        sizeof(priv->params.indirection_rqt));
906
907         if (key)
908                 memcpy(key, priv->params.toeplitz_hash_key,
909                        sizeof(priv->params.toeplitz_hash_key));
910
911         if (hfunc)
912                 *hfunc = priv->params.rss_hfunc;
913
914         return 0;
915 }
916
917 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
918 {
919         struct mlx5_core_dev *mdev = priv->mdev;
920         void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
921         int i;
922
923         MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
924         mlx5e_build_tir_ctx_hash(tirc, priv);
925
926         for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++)
927                 mlx5_core_modify_tir(mdev, priv->indir_tir[i].tirn, in, inlen);
928 }
929
930 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
931                           const u8 *key, const u8 hfunc)
932 {
933         struct mlx5e_priv *priv = netdev_priv(dev);
934         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
935         void *in;
936
937         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
938             (hfunc != ETH_RSS_HASH_XOR) &&
939             (hfunc != ETH_RSS_HASH_TOP))
940                 return -EINVAL;
941
942         in = mlx5_vzalloc(inlen);
943         if (!in)
944                 return -ENOMEM;
945
946         mutex_lock(&priv->state_lock);
947
948         if (indir) {
949                 u32 rqtn = priv->indir_rqt.rqtn;
950
951                 memcpy(priv->params.indirection_rqt, indir,
952                        sizeof(priv->params.indirection_rqt));
953                 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, 0);
954         }
955
956         if (key)
957                 memcpy(priv->params.toeplitz_hash_key, key,
958                        sizeof(priv->params.toeplitz_hash_key));
959
960         if (hfunc != ETH_RSS_HASH_NO_CHANGE)
961                 priv->params.rss_hfunc = hfunc;
962
963         mlx5e_modify_tirs_hash(priv, in, inlen);
964
965         mutex_unlock(&priv->state_lock);
966
967         kvfree(in);
968
969         return 0;
970 }
971
972 static int mlx5e_get_rxnfc(struct net_device *netdev,
973                            struct ethtool_rxnfc *info, u32 *rule_locs)
974 {
975         struct mlx5e_priv *priv = netdev_priv(netdev);
976         int err = 0;
977
978         switch (info->cmd) {
979         case ETHTOOL_GRXRINGS:
980                 info->data = priv->params.num_channels;
981                 break;
982         case ETHTOOL_GRXCLSRLCNT:
983                 info->rule_cnt = priv->fs.ethtool.tot_num_rules;
984                 break;
985         case ETHTOOL_GRXCLSRULE:
986                 err = mlx5e_ethtool_get_flow(priv, info, info->fs.location);
987                 break;
988         case ETHTOOL_GRXCLSRLALL:
989                 err = mlx5e_ethtool_get_all_flows(priv, info, rule_locs);
990                 break;
991         default:
992                 err = -EOPNOTSUPP;
993                 break;
994         }
995
996         return err;
997 }
998
999 static int mlx5e_get_tunable(struct net_device *dev,
1000                              const struct ethtool_tunable *tuna,
1001                              void *data)
1002 {
1003         const struct mlx5e_priv *priv = netdev_priv(dev);
1004         int err = 0;
1005
1006         switch (tuna->id) {
1007         case ETHTOOL_TX_COPYBREAK:
1008                 *(u32 *)data = priv->params.tx_max_inline;
1009                 break;
1010         default:
1011                 err = -EINVAL;
1012                 break;
1013         }
1014
1015         return err;
1016 }
1017
1018 static int mlx5e_set_tunable(struct net_device *dev,
1019                              const struct ethtool_tunable *tuna,
1020                              const void *data)
1021 {
1022         struct mlx5e_priv *priv = netdev_priv(dev);
1023         struct mlx5_core_dev *mdev = priv->mdev;
1024         bool was_opened;
1025         u32 val;
1026         int err = 0;
1027
1028         switch (tuna->id) {
1029         case ETHTOOL_TX_COPYBREAK:
1030                 val = *(u32 *)data;
1031                 if (val > mlx5e_get_max_inline_cap(mdev)) {
1032                         err = -EINVAL;
1033                         break;
1034                 }
1035
1036                 mutex_lock(&priv->state_lock);
1037
1038                 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
1039                 if (was_opened)
1040                         mlx5e_close_locked(dev);
1041
1042                 priv->params.tx_max_inline = val;
1043
1044                 if (was_opened)
1045                         err = mlx5e_open_locked(dev);
1046
1047                 mutex_unlock(&priv->state_lock);
1048                 break;
1049         default:
1050                 err = -EINVAL;
1051                 break;
1052         }
1053
1054         return err;
1055 }
1056
1057 static void mlx5e_get_pauseparam(struct net_device *netdev,
1058                                  struct ethtool_pauseparam *pauseparam)
1059 {
1060         struct mlx5e_priv *priv    = netdev_priv(netdev);
1061         struct mlx5_core_dev *mdev = priv->mdev;
1062         int err;
1063
1064         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1065                                     &pauseparam->tx_pause);
1066         if (err) {
1067                 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1068                            __func__, err);
1069         }
1070 }
1071
1072 static int mlx5e_set_pauseparam(struct net_device *netdev,
1073                                 struct ethtool_pauseparam *pauseparam)
1074 {
1075         struct mlx5e_priv *priv    = netdev_priv(netdev);
1076         struct mlx5_core_dev *mdev = priv->mdev;
1077         int err;
1078
1079         if (pauseparam->autoneg)
1080                 return -EINVAL;
1081
1082         err = mlx5_set_port_pause(mdev,
1083                                   pauseparam->rx_pause ? 1 : 0,
1084                                   pauseparam->tx_pause ? 1 : 0);
1085         if (err) {
1086                 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1087                            __func__, err);
1088         }
1089
1090         return err;
1091 }
1092
1093 static int mlx5e_get_ts_info(struct net_device *dev,
1094                              struct ethtool_ts_info *info)
1095 {
1096         struct mlx5e_priv *priv = netdev_priv(dev);
1097         int ret;
1098
1099         ret = ethtool_op_get_ts_info(dev, info);
1100         if (ret)
1101                 return ret;
1102
1103         info->phc_index = priv->tstamp.ptp ?
1104                           ptp_clock_index(priv->tstamp.ptp) : -1;
1105
1106         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
1107                 return 0;
1108
1109         info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
1110                                  SOF_TIMESTAMPING_RX_HARDWARE |
1111                                  SOF_TIMESTAMPING_RAW_HARDWARE;
1112
1113         info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) |
1114                          (BIT(1) << HWTSTAMP_TX_ON);
1115
1116         info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) |
1117                            (BIT(1) << HWTSTAMP_FILTER_ALL);
1118
1119         return 0;
1120 }
1121
1122 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1123 {
1124         __u32 ret = 0;
1125
1126         if (MLX5_CAP_GEN(mdev, wol_g))
1127                 ret |= WAKE_MAGIC;
1128
1129         if (MLX5_CAP_GEN(mdev, wol_s))
1130                 ret |= WAKE_MAGICSECURE;
1131
1132         if (MLX5_CAP_GEN(mdev, wol_a))
1133                 ret |= WAKE_ARP;
1134
1135         if (MLX5_CAP_GEN(mdev, wol_b))
1136                 ret |= WAKE_BCAST;
1137
1138         if (MLX5_CAP_GEN(mdev, wol_m))
1139                 ret |= WAKE_MCAST;
1140
1141         if (MLX5_CAP_GEN(mdev, wol_u))
1142                 ret |= WAKE_UCAST;
1143
1144         if (MLX5_CAP_GEN(mdev, wol_p))
1145                 ret |= WAKE_PHY;
1146
1147         return ret;
1148 }
1149
1150 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1151 {
1152         __u32 ret = 0;
1153
1154         if (mode & MLX5_WOL_MAGIC)
1155                 ret |= WAKE_MAGIC;
1156
1157         if (mode & MLX5_WOL_SECURED_MAGIC)
1158                 ret |= WAKE_MAGICSECURE;
1159
1160         if (mode & MLX5_WOL_ARP)
1161                 ret |= WAKE_ARP;
1162
1163         if (mode & MLX5_WOL_BROADCAST)
1164                 ret |= WAKE_BCAST;
1165
1166         if (mode & MLX5_WOL_MULTICAST)
1167                 ret |= WAKE_MCAST;
1168
1169         if (mode & MLX5_WOL_UNICAST)
1170                 ret |= WAKE_UCAST;
1171
1172         if (mode & MLX5_WOL_PHY_ACTIVITY)
1173                 ret |= WAKE_PHY;
1174
1175         return ret;
1176 }
1177
1178 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1179 {
1180         u8 ret = 0;
1181
1182         if (mode & WAKE_MAGIC)
1183                 ret |= MLX5_WOL_MAGIC;
1184
1185         if (mode & WAKE_MAGICSECURE)
1186                 ret |= MLX5_WOL_SECURED_MAGIC;
1187
1188         if (mode & WAKE_ARP)
1189                 ret |= MLX5_WOL_ARP;
1190
1191         if (mode & WAKE_BCAST)
1192                 ret |= MLX5_WOL_BROADCAST;
1193
1194         if (mode & WAKE_MCAST)
1195                 ret |= MLX5_WOL_MULTICAST;
1196
1197         if (mode & WAKE_UCAST)
1198                 ret |= MLX5_WOL_UNICAST;
1199
1200         if (mode & WAKE_PHY)
1201                 ret |= MLX5_WOL_PHY_ACTIVITY;
1202
1203         return ret;
1204 }
1205
1206 static void mlx5e_get_wol(struct net_device *netdev,
1207                           struct ethtool_wolinfo *wol)
1208 {
1209         struct mlx5e_priv *priv = netdev_priv(netdev);
1210         struct mlx5_core_dev *mdev = priv->mdev;
1211         u8 mlx5_wol_mode;
1212         int err;
1213
1214         memset(wol, 0, sizeof(*wol));
1215
1216         wol->supported = mlx5e_get_wol_supported(mdev);
1217         if (!wol->supported)
1218                 return;
1219
1220         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1221         if (err)
1222                 return;
1223
1224         wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1225 }
1226
1227 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1228 {
1229         struct mlx5e_priv *priv = netdev_priv(netdev);
1230         struct mlx5_core_dev *mdev = priv->mdev;
1231         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1232         u32 mlx5_wol_mode;
1233
1234         if (!wol_supported)
1235                 return -ENOTSUPP;
1236
1237         if (wol->wolopts & ~wol_supported)
1238                 return -EINVAL;
1239
1240         mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1241
1242         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1243 }
1244
1245 static int mlx5e_set_phys_id(struct net_device *dev,
1246                              enum ethtool_phys_id_state state)
1247 {
1248         struct mlx5e_priv *priv = netdev_priv(dev);
1249         struct mlx5_core_dev *mdev = priv->mdev;
1250         u16 beacon_duration;
1251
1252         if (!MLX5_CAP_GEN(mdev, beacon_led))
1253                 return -EOPNOTSUPP;
1254
1255         switch (state) {
1256         case ETHTOOL_ID_ACTIVE:
1257                 beacon_duration = MLX5_BEACON_DURATION_INF;
1258                 break;
1259         case ETHTOOL_ID_INACTIVE:
1260                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1261                 break;
1262         default:
1263                 return -EOPNOTSUPP;
1264         }
1265
1266         return mlx5_set_port_beacon(mdev, beacon_duration);
1267 }
1268
1269 static int mlx5e_get_module_info(struct net_device *netdev,
1270                                  struct ethtool_modinfo *modinfo)
1271 {
1272         struct mlx5e_priv *priv = netdev_priv(netdev);
1273         struct mlx5_core_dev *dev = priv->mdev;
1274         int size_read = 0;
1275         u8 data[4];
1276
1277         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1278         if (size_read < 2)
1279                 return -EIO;
1280
1281         /* data[0] = identifier byte */
1282         switch (data[0]) {
1283         case MLX5_MODULE_ID_QSFP:
1284                 modinfo->type       = ETH_MODULE_SFF_8436;
1285                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1286                 break;
1287         case MLX5_MODULE_ID_QSFP_PLUS:
1288         case MLX5_MODULE_ID_QSFP28:
1289                 /* data[1] = revision id */
1290                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1291                         modinfo->type       = ETH_MODULE_SFF_8636;
1292                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1293                 } else {
1294                         modinfo->type       = ETH_MODULE_SFF_8436;
1295                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1296                 }
1297                 break;
1298         case MLX5_MODULE_ID_SFP:
1299                 modinfo->type       = ETH_MODULE_SFF_8472;
1300                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1301                 break;
1302         default:
1303                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1304                            __func__, data[0]);
1305                 return -EINVAL;
1306         }
1307
1308         return 0;
1309 }
1310
1311 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1312                                    struct ethtool_eeprom *ee,
1313                                    u8 *data)
1314 {
1315         struct mlx5e_priv *priv = netdev_priv(netdev);
1316         struct mlx5_core_dev *mdev = priv->mdev;
1317         int offset = ee->offset;
1318         int size_read;
1319         int i = 0;
1320
1321         if (!ee->len)
1322                 return -EINVAL;
1323
1324         memset(data, 0, ee->len);
1325
1326         while (i < ee->len) {
1327                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1328                                                      data + i);
1329
1330                 if (!size_read)
1331                         /* Done reading */
1332                         return 0;
1333
1334                 if (size_read < 0) {
1335                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1336                                    __func__, size_read);
1337                         return 0;
1338                 }
1339
1340                 i += size_read;
1341                 offset += size_read;
1342         }
1343
1344         return 0;
1345 }
1346
1347 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1348
1349 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1350 {
1351         struct mlx5e_priv *priv = netdev_priv(netdev);
1352         struct mlx5_core_dev *mdev = priv->mdev;
1353         bool rx_mode_changed;
1354         u8 rx_cq_period_mode;
1355         int err = 0;
1356         bool reset;
1357
1358         rx_cq_period_mode = enable ?
1359                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1360                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1361         rx_mode_changed = rx_cq_period_mode != priv->params.rx_cq_period_mode;
1362
1363         if (rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1364             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1365                 return -ENOTSUPP;
1366
1367         if (!rx_mode_changed)
1368                 return 0;
1369
1370         reset = test_bit(MLX5E_STATE_OPENED, &priv->state);
1371         if (reset)
1372                 mlx5e_close_locked(netdev);
1373
1374         mlx5e_set_rx_cq_mode_params(&priv->params, rx_cq_period_mode);
1375
1376         if (reset)
1377                 err = mlx5e_open_locked(netdev);
1378
1379         return err;
1380 }
1381
1382 static int mlx5e_handle_pflag(struct net_device *netdev,
1383                               u32 wanted_flags,
1384                               enum mlx5e_priv_flag flag,
1385                               mlx5e_pflag_handler pflag_handler)
1386 {
1387         struct mlx5e_priv *priv = netdev_priv(netdev);
1388         bool enable = !!(wanted_flags & flag);
1389         u32 changes = wanted_flags ^ priv->pflags;
1390         int err;
1391
1392         if (!(changes & flag))
1393                 return 0;
1394
1395         err = pflag_handler(netdev, enable);
1396         if (err) {
1397                 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1398                            enable ? "Enable" : "Disable", flag, err);
1399                 return err;
1400         }
1401
1402         MLX5E_SET_PRIV_FLAG(priv, flag, enable);
1403         return 0;
1404 }
1405
1406 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1407 {
1408         struct mlx5e_priv *priv = netdev_priv(netdev);
1409         int err;
1410
1411         mutex_lock(&priv->state_lock);
1412
1413         err = mlx5e_handle_pflag(netdev, pflags,
1414                                  MLX5E_PFLAG_RX_CQE_BASED_MODER,
1415                                  set_pflag_rx_cqe_based_moder);
1416
1417         mutex_unlock(&priv->state_lock);
1418         return err ? -EINVAL : 0;
1419 }
1420
1421 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1422 {
1423         struct mlx5e_priv *priv = netdev_priv(netdev);
1424
1425         return priv->pflags;
1426 }
1427
1428 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1429 {
1430         int err = 0;
1431         struct mlx5e_priv *priv = netdev_priv(dev);
1432
1433         switch (cmd->cmd) {
1434         case ETHTOOL_SRXCLSRLINS:
1435                 err = mlx5e_ethtool_flow_replace(priv, &cmd->fs);
1436                 break;
1437         case ETHTOOL_SRXCLSRLDEL:
1438                 err = mlx5e_ethtool_flow_remove(priv, cmd->fs.location);
1439                 break;
1440         default:
1441                 err = -EOPNOTSUPP;
1442                 break;
1443         }
1444
1445         return err;
1446 }
1447
1448 const struct ethtool_ops mlx5e_ethtool_ops = {
1449         .get_drvinfo       = mlx5e_get_drvinfo,
1450         .get_link          = ethtool_op_get_link,
1451         .get_strings       = mlx5e_get_strings,
1452         .get_sset_count    = mlx5e_get_sset_count,
1453         .get_ethtool_stats = mlx5e_get_ethtool_stats,
1454         .get_ringparam     = mlx5e_get_ringparam,
1455         .set_ringparam     = mlx5e_set_ringparam,
1456         .get_channels      = mlx5e_get_channels,
1457         .set_channels      = mlx5e_set_channels,
1458         .get_coalesce      = mlx5e_get_coalesce,
1459         .set_coalesce      = mlx5e_set_coalesce,
1460         .get_link_ksettings  = mlx5e_get_link_ksettings,
1461         .set_link_ksettings  = mlx5e_set_link_ksettings,
1462         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
1463         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1464         .get_rxfh          = mlx5e_get_rxfh,
1465         .set_rxfh          = mlx5e_set_rxfh,
1466         .get_rxnfc         = mlx5e_get_rxnfc,
1467         .set_rxnfc         = mlx5e_set_rxnfc,
1468         .get_tunable       = mlx5e_get_tunable,
1469         .set_tunable       = mlx5e_set_tunable,
1470         .get_pauseparam    = mlx5e_get_pauseparam,
1471         .set_pauseparam    = mlx5e_set_pauseparam,
1472         .get_ts_info       = mlx5e_get_ts_info,
1473         .set_phys_id       = mlx5e_set_phys_id,
1474         .get_wol           = mlx5e_get_wol,
1475         .set_wol           = mlx5e_set_wol,
1476         .get_module_info   = mlx5e_get_module_info,
1477         .get_module_eeprom = mlx5e_get_module_eeprom,
1478         .get_priv_flags    = mlx5e_get_priv_flags,
1479         .set_priv_flags    = mlx5e_set_priv_flags
1480 };