2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.h
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
37 #ifndef _MLXSW_SPECTRUM_H
38 #define _MLXSW_SPECTRUM_H
40 #include <linux/types.h>
41 #include <linux/netdevice.h>
42 #include <linux/bitops.h>
43 #include <linux/if_vlan.h>
44 #include <linux/list.h>
45 #include <linux/dcbnl.h>
46 #include <net/switchdev.h>
47 #include <net/devlink.h>
52 #define MLXSW_SP_VFID_BASE VLAN_N_VID
53 #define MLXSW_SP_VFID_PORT_MAX 512 /* Non-bridged VLAN interfaces */
54 #define MLXSW_SP_VFID_BR_MAX 6144 /* Bridged VLAN interfaces */
55 #define MLXSW_SP_VFID_MAX (MLXSW_SP_VFID_PORT_MAX + MLXSW_SP_VFID_BR_MAX)
57 #define MLXSW_SP_LAG_MAX 64
58 #define MLXSW_SP_PORT_PER_LAG_MAX 16
60 #define MLXSW_SP_MID_MAX 7000
62 #define MLXSW_SP_PORTS_PER_CLUSTER_MAX 4
64 #define MLXSW_SP_PORT_BASE_SPEED 25000 /* Mb/s */
66 #define MLXSW_SP_BYTES_PER_CELL 96
68 #define MLXSW_SP_BYTES_TO_CELLS(b) DIV_ROUND_UP(b, MLXSW_SP_BYTES_PER_CELL)
70 /* Maximum delay buffer needed in case of PAUSE frames, in cells.
71 * Assumes 100m cable and maximum MTU.
73 #define MLXSW_SP_PAUSE_DELAY 612
75 #define MLXSW_SP_CELL_FACTOR 2 /* 2 * cell_size / (IPG + cell_size + 1) */
77 static inline u16 mlxsw_sp_pfc_delay_get(int mtu, u16 delay)
79 delay = MLXSW_SP_BYTES_TO_CELLS(DIV_ROUND_UP(delay, BITS_PER_BYTE));
80 return MLXSW_SP_CELL_FACTOR * delay + MLXSW_SP_BYTES_TO_CELLS(mtu);
85 struct mlxsw_sp_upper {
86 struct net_device *dev;
87 unsigned int ref_count;
90 struct mlxsw_sp_vfid {
91 struct list_head list;
93 u16 vfid; /* Starting at 0 */
94 struct net_device *br_dev;
99 struct list_head list;
100 unsigned char addr[ETH_ALEN];
103 unsigned int ref_count;
106 static inline u16 mlxsw_sp_vfid_to_fid(u16 vfid)
108 return MLXSW_SP_VFID_BASE + vfid;
111 static inline u16 mlxsw_sp_fid_to_vfid(u16 fid)
113 return fid - MLXSW_SP_VFID_BASE;
116 static inline bool mlxsw_sp_fid_is_vfid(u16 fid)
118 return fid >= MLXSW_SP_VFID_BASE;
123 struct list_head list;
124 unsigned long mapped[BITS_TO_LONGS(MLXSW_SP_VFID_PORT_MAX)];
127 struct list_head list;
128 unsigned long mapped[BITS_TO_LONGS(MLXSW_SP_VFID_BR_MAX)];
131 struct list_head list;
132 unsigned long mapped[BITS_TO_LONGS(MLXSW_SP_MID_MAX)];
134 unsigned long active_fids[BITS_TO_LONGS(VLAN_N_VID)];
135 struct mlxsw_sp_port **ports;
136 struct mlxsw_core *core;
137 const struct mlxsw_bus_info *bus_info;
138 unsigned char base_mac[ETH_ALEN];
140 struct delayed_work dw;
141 #define MLXSW_SP_DEFAULT_LEARNING_INTERVAL 100
142 unsigned int interval; /* ms */
144 #define MLXSW_SP_MIN_AGEING_TIME 10
145 #define MLXSW_SP_MAX_AGEING_TIME 1000000
146 #define MLXSW_SP_DEFAULT_AGEING_TIME 300
148 struct mlxsw_sp_upper master_bridge;
149 struct mlxsw_sp_upper lags[MLXSW_SP_LAG_MAX];
150 u8 port_to_module[MLXSW_PORT_MAX_PORTS];
153 static inline struct mlxsw_sp_upper *
154 mlxsw_sp_lag_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
156 return &mlxsw_sp->lags[lag_id];
159 struct mlxsw_sp_port_pcpu_stats {
164 struct u64_stats_sync syncp;
168 struct mlxsw_sp_port {
169 struct net_device *dev;
170 struct mlxsw_sp_port_pcpu_stats __percpu *pcpu_stats;
171 struct mlxsw_sp *mlxsw_sp;
183 struct list_head list;
184 struct mlxsw_sp_vfid *vfid;
192 struct ieee_ets *ets;
193 struct ieee_maxrate *maxrate;
194 struct ieee_pfc *pfc;
196 /* 802.1Q bridge VLANs */
197 unsigned long *active_vlans;
198 unsigned long *untagged_vlans;
199 /* VLAN interfaces */
200 struct list_head vports_list;
201 struct devlink_port devlink_port;
205 mlxsw_sp_port_is_pause_en(const struct mlxsw_sp_port *mlxsw_sp_port)
207 return mlxsw_sp_port->link.tx_pause || mlxsw_sp_port->link.rx_pause;
210 static inline struct mlxsw_sp_port *
211 mlxsw_sp_port_lagged_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id, u8 port_index)
213 struct mlxsw_sp_port *mlxsw_sp_port;
216 local_port = mlxsw_core_lag_mapping_get(mlxsw_sp->core,
218 mlxsw_sp_port = mlxsw_sp->ports[local_port];
219 return mlxsw_sp_port && mlxsw_sp_port->lagged ? mlxsw_sp_port : NULL;
223 mlxsw_sp_port_is_vport(const struct mlxsw_sp_port *mlxsw_sp_port)
225 return mlxsw_sp_port->vport.vfid;
228 static inline struct net_device *
229 mlxsw_sp_vport_br_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
231 return mlxsw_sp_vport->vport.vfid->br_dev;
235 mlxsw_sp_vport_vid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
237 return mlxsw_sp_vport->vport.vid;
241 mlxsw_sp_vport_vfid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
243 return mlxsw_sp_vport->vport.vfid->vfid;
246 static inline struct mlxsw_sp_port *
247 mlxsw_sp_port_vport_find(const struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
249 struct mlxsw_sp_port *mlxsw_sp_vport;
251 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
253 if (mlxsw_sp_vport_vid_get(mlxsw_sp_vport) == vid)
254 return mlxsw_sp_vport;
260 static inline struct mlxsw_sp_port *
261 mlxsw_sp_port_vport_find_by_vfid(const struct mlxsw_sp_port *mlxsw_sp_port,
264 struct mlxsw_sp_port *mlxsw_sp_vport;
266 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
268 if (mlxsw_sp_vport_vfid_get(mlxsw_sp_vport) == vfid)
269 return mlxsw_sp_vport;
275 enum mlxsw_sp_flood_table {
276 MLXSW_SP_FLOOD_TABLE_UC,
277 MLXSW_SP_FLOOD_TABLE_BM,
280 int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp);
281 int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port);
283 int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp);
284 void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp);
285 int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port);
286 void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port);
287 void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port);
288 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
289 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
291 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
292 u16 vid_end, bool is_member, bool untagged);
293 int mlxsw_sp_port_add_vid(struct net_device *dev, __be16 __always_unused proto,
295 int mlxsw_sp_port_kill_vid(struct net_device *dev,
296 __be16 __always_unused proto, u16 vid);
297 int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 vfid,
298 bool set, bool only_uc);
299 void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port);
300 int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid);
301 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
302 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
303 bool dwrr, u8 dwrr_weight);
304 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
305 u8 switch_prio, u8 tclass);
306 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
307 u8 *prio_tc, bool pause_en,
308 struct ieee_pfc *my_pfc);
309 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
310 enum mlxsw_reg_qeec_hr hr, u8 index,
311 u8 next_index, u32 maxrate);
313 #ifdef CONFIG_MLXSW_SPECTRUM_DCB
315 int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port);
316 void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port);
320 static inline int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port)
325 static inline void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port)